ocrdma_verbs.c 72 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220222122222223222422252226222722282229223022312232223322342235223622372238223922402241224222432244224522462247224822492250225122522253225422552256225722582259226022612262226322642265226622672268226922702271227222732274227522762277227822792280228122822283228422852286228722882289229022912292229322942295229622972298229923002301230223032304230523062307230823092310231123122313231423152316231723182319232023212322232323242325232623272328232923302331233223332334233523362337233823392340234123422343234423452346234723482349235023512352235323542355235623572358235923602361236223632364236523662367236823692370237123722373237423752376237723782379238023812382238323842385238623872388238923902391239223932394239523962397239823992400240124022403240424052406240724082409241024112412241324142415241624172418241924202421242224232424242524262427242824292430243124322433243424352436243724382439244024412442244324442445244624472448244924502451245224532454245524562457245824592460246124622463246424652466246724682469247024712472247324742475247624772478247924802481248224832484248524862487248824892490249124922493249424952496249724982499250025012502250325042505250625072508250925102511251225132514251525162517251825192520252125222523252425252526252725282529253025312532253325342535253625372538253925402541254225432544254525462547254825492550255125522553255425552556255725582559256025612562256325642565256625672568256925702571257225732574257525762577257825792580258125822583258425852586258725882589259025912592259325942595259625972598259926002601260226032604260526062607260826092610261126122613261426152616261726182619262026212622262326242625262626272628262926302631263226332634263526362637263826392640264126422643264426452646264726482649265026512652265326542655265626572658265926602661266226632664266526662667266826692670267126722673267426752676267726782679268026812682268326842685268626872688
  1. /*******************************************************************
  2. * This file is part of the Emulex RoCE Device Driver for *
  3. * RoCE (RDMA over Converged Ethernet) adapters. *
  4. * Copyright (C) 2008-2012 Emulex. All rights reserved. *
  5. * EMULEX and SLI are trademarks of Emulex. *
  6. * www.emulex.com *
  7. * *
  8. * This program is free software; you can redistribute it and/or *
  9. * modify it under the terms of version 2 of the GNU General *
  10. * Public License as published by the Free Software Foundation. *
  11. * This program is distributed in the hope that it will be useful. *
  12. * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
  13. * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
  14. * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
  15. * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
  16. * TO BE LEGALLY INVALID. See the GNU General Public License for *
  17. * more details, a copy of which can be found in the file COPYING *
  18. * included with this package. *
  19. *
  20. * Contact Information:
  21. * linux-drivers@emulex.com
  22. *
  23. * Emulex
  24. * 3333 Susan Street
  25. * Costa Mesa, CA 92626
  26. *******************************************************************/
  27. #include <linux/dma-mapping.h>
  28. #include <rdma/ib_verbs.h>
  29. #include <rdma/ib_user_verbs.h>
  30. #include <rdma/iw_cm.h>
  31. #include <rdma/ib_umem.h>
  32. #include <rdma/ib_addr.h>
  33. #include "ocrdma.h"
  34. #include "ocrdma_hw.h"
  35. #include "ocrdma_verbs.h"
  36. #include "ocrdma_abi.h"
  37. int ocrdma_query_pkey(struct ib_device *ibdev, u8 port, u16 index, u16 *pkey)
  38. {
  39. if (index > 1)
  40. return -EINVAL;
  41. *pkey = 0xffff;
  42. return 0;
  43. }
  44. int ocrdma_query_gid(struct ib_device *ibdev, u8 port,
  45. int index, union ib_gid *sgid)
  46. {
  47. struct ocrdma_dev *dev;
  48. dev = get_ocrdma_dev(ibdev);
  49. memset(sgid, 0, sizeof(*sgid));
  50. if (index >= OCRDMA_MAX_SGID)
  51. return -EINVAL;
  52. memcpy(sgid, &dev->sgid_tbl[index], sizeof(*sgid));
  53. return 0;
  54. }
  55. int ocrdma_query_device(struct ib_device *ibdev, struct ib_device_attr *attr)
  56. {
  57. struct ocrdma_dev *dev = get_ocrdma_dev(ibdev);
  58. memset(attr, 0, sizeof *attr);
  59. memcpy(&attr->fw_ver, &dev->attr.fw_ver[0],
  60. min(sizeof(dev->attr.fw_ver), sizeof(attr->fw_ver)));
  61. ocrdma_get_guid(dev, (u8 *)&attr->sys_image_guid);
  62. attr->max_mr_size = ~0ull;
  63. attr->page_size_cap = 0xffff000;
  64. attr->vendor_id = dev->nic_info.pdev->vendor;
  65. attr->vendor_part_id = dev->nic_info.pdev->device;
  66. attr->hw_ver = 0;
  67. attr->max_qp = dev->attr.max_qp;
  68. attr->max_ah = OCRDMA_MAX_AH;
  69. attr->max_qp_wr = dev->attr.max_wqe;
  70. attr->device_cap_flags = IB_DEVICE_CURR_QP_STATE_MOD |
  71. IB_DEVICE_RC_RNR_NAK_GEN |
  72. IB_DEVICE_SHUTDOWN_PORT |
  73. IB_DEVICE_SYS_IMAGE_GUID |
  74. IB_DEVICE_LOCAL_DMA_LKEY |
  75. IB_DEVICE_MEM_MGT_EXTENSIONS;
  76. attr->max_sge = min(dev->attr.max_send_sge, dev->attr.max_srq_sge);
  77. attr->max_sge_rd = dev->attr.max_rdma_sge;
  78. attr->max_cq = dev->attr.max_cq;
  79. attr->max_cqe = dev->attr.max_cqe;
  80. attr->max_mr = dev->attr.max_mr;
  81. attr->max_mw = 0;
  82. attr->max_pd = dev->attr.max_pd;
  83. attr->atomic_cap = 0;
  84. attr->max_fmr = 0;
  85. attr->max_map_per_fmr = 0;
  86. attr->max_qp_rd_atom =
  87. min(dev->attr.max_ord_per_qp, dev->attr.max_ird_per_qp);
  88. attr->max_qp_init_rd_atom = dev->attr.max_ord_per_qp;
  89. attr->max_srq = dev->attr.max_srq;
  90. attr->max_srq_sge = dev->attr.max_srq_sge;
  91. attr->max_srq_wr = dev->attr.max_rqe;
  92. attr->local_ca_ack_delay = dev->attr.local_ca_ack_delay;
  93. attr->max_fast_reg_page_list_len = 0;
  94. attr->max_pkeys = 1;
  95. return 0;
  96. }
  97. int ocrdma_query_port(struct ib_device *ibdev,
  98. u8 port, struct ib_port_attr *props)
  99. {
  100. enum ib_port_state port_state;
  101. struct ocrdma_dev *dev;
  102. struct net_device *netdev;
  103. dev = get_ocrdma_dev(ibdev);
  104. if (port > 1) {
  105. pr_err("%s(%d) invalid_port=0x%x\n", __func__,
  106. dev->id, port);
  107. return -EINVAL;
  108. }
  109. netdev = dev->nic_info.netdev;
  110. if (netif_running(netdev) && netif_oper_up(netdev)) {
  111. port_state = IB_PORT_ACTIVE;
  112. props->phys_state = 5;
  113. } else {
  114. port_state = IB_PORT_DOWN;
  115. props->phys_state = 3;
  116. }
  117. props->max_mtu = IB_MTU_4096;
  118. props->active_mtu = iboe_get_mtu(netdev->mtu);
  119. props->lid = 0;
  120. props->lmc = 0;
  121. props->sm_lid = 0;
  122. props->sm_sl = 0;
  123. props->state = port_state;
  124. props->port_cap_flags =
  125. IB_PORT_CM_SUP |
  126. IB_PORT_REINIT_SUP |
  127. IB_PORT_DEVICE_MGMT_SUP | IB_PORT_VENDOR_CLASS_SUP;
  128. props->gid_tbl_len = OCRDMA_MAX_SGID;
  129. props->pkey_tbl_len = 1;
  130. props->bad_pkey_cntr = 0;
  131. props->qkey_viol_cntr = 0;
  132. props->active_width = IB_WIDTH_1X;
  133. props->active_speed = 4;
  134. props->max_msg_sz = 0x80000000;
  135. props->max_vl_num = 4;
  136. return 0;
  137. }
  138. int ocrdma_modify_port(struct ib_device *ibdev, u8 port, int mask,
  139. struct ib_port_modify *props)
  140. {
  141. struct ocrdma_dev *dev;
  142. dev = get_ocrdma_dev(ibdev);
  143. if (port > 1) {
  144. pr_err("%s(%d) invalid_port=0x%x\n", __func__, dev->id, port);
  145. return -EINVAL;
  146. }
  147. return 0;
  148. }
  149. static int ocrdma_add_mmap(struct ocrdma_ucontext *uctx, u64 phy_addr,
  150. unsigned long len)
  151. {
  152. struct ocrdma_mm *mm;
  153. mm = kzalloc(sizeof(*mm), GFP_KERNEL);
  154. if (mm == NULL)
  155. return -ENOMEM;
  156. mm->key.phy_addr = phy_addr;
  157. mm->key.len = len;
  158. INIT_LIST_HEAD(&mm->entry);
  159. mutex_lock(&uctx->mm_list_lock);
  160. list_add_tail(&mm->entry, &uctx->mm_head);
  161. mutex_unlock(&uctx->mm_list_lock);
  162. return 0;
  163. }
  164. static void ocrdma_del_mmap(struct ocrdma_ucontext *uctx, u64 phy_addr,
  165. unsigned long len)
  166. {
  167. struct ocrdma_mm *mm, *tmp;
  168. mutex_lock(&uctx->mm_list_lock);
  169. list_for_each_entry_safe(mm, tmp, &uctx->mm_head, entry) {
  170. if (len != mm->key.len && phy_addr != mm->key.phy_addr)
  171. continue;
  172. list_del(&mm->entry);
  173. kfree(mm);
  174. break;
  175. }
  176. mutex_unlock(&uctx->mm_list_lock);
  177. }
  178. static bool ocrdma_search_mmap(struct ocrdma_ucontext *uctx, u64 phy_addr,
  179. unsigned long len)
  180. {
  181. bool found = false;
  182. struct ocrdma_mm *mm;
  183. mutex_lock(&uctx->mm_list_lock);
  184. list_for_each_entry(mm, &uctx->mm_head, entry) {
  185. if (len != mm->key.len && phy_addr != mm->key.phy_addr)
  186. continue;
  187. found = true;
  188. break;
  189. }
  190. mutex_unlock(&uctx->mm_list_lock);
  191. return found;
  192. }
  193. struct ib_ucontext *ocrdma_alloc_ucontext(struct ib_device *ibdev,
  194. struct ib_udata *udata)
  195. {
  196. int status;
  197. struct ocrdma_ucontext *ctx;
  198. struct ocrdma_alloc_ucontext_resp resp;
  199. struct ocrdma_dev *dev = get_ocrdma_dev(ibdev);
  200. struct pci_dev *pdev = dev->nic_info.pdev;
  201. u32 map_len = roundup(sizeof(u32) * 2048, PAGE_SIZE);
  202. if (!udata)
  203. return ERR_PTR(-EFAULT);
  204. ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
  205. if (!ctx)
  206. return ERR_PTR(-ENOMEM);
  207. INIT_LIST_HEAD(&ctx->mm_head);
  208. mutex_init(&ctx->mm_list_lock);
  209. ctx->ah_tbl.va = dma_alloc_coherent(&pdev->dev, map_len,
  210. &ctx->ah_tbl.pa, GFP_KERNEL);
  211. if (!ctx->ah_tbl.va) {
  212. kfree(ctx);
  213. return ERR_PTR(-ENOMEM);
  214. }
  215. memset(ctx->ah_tbl.va, 0, map_len);
  216. ctx->ah_tbl.len = map_len;
  217. memset(&resp, 0, sizeof(resp));
  218. resp.ah_tbl_len = ctx->ah_tbl.len;
  219. resp.ah_tbl_page = ctx->ah_tbl.pa;
  220. status = ocrdma_add_mmap(ctx, resp.ah_tbl_page, resp.ah_tbl_len);
  221. if (status)
  222. goto map_err;
  223. resp.dev_id = dev->id;
  224. resp.max_inline_data = dev->attr.max_inline_data;
  225. resp.wqe_size = dev->attr.wqe_size;
  226. resp.rqe_size = dev->attr.rqe_size;
  227. resp.dpp_wqe_size = dev->attr.wqe_size;
  228. memcpy(resp.fw_ver, dev->attr.fw_ver, sizeof(resp.fw_ver));
  229. status = ib_copy_to_udata(udata, &resp, sizeof(resp));
  230. if (status)
  231. goto cpy_err;
  232. return &ctx->ibucontext;
  233. cpy_err:
  234. ocrdma_del_mmap(ctx, ctx->ah_tbl.pa, ctx->ah_tbl.len);
  235. map_err:
  236. dma_free_coherent(&pdev->dev, ctx->ah_tbl.len, ctx->ah_tbl.va,
  237. ctx->ah_tbl.pa);
  238. kfree(ctx);
  239. return ERR_PTR(status);
  240. }
  241. int ocrdma_dealloc_ucontext(struct ib_ucontext *ibctx)
  242. {
  243. struct ocrdma_mm *mm, *tmp;
  244. struct ocrdma_ucontext *uctx = get_ocrdma_ucontext(ibctx);
  245. struct ocrdma_dev *dev = get_ocrdma_dev(ibctx->device);
  246. struct pci_dev *pdev = dev->nic_info.pdev;
  247. ocrdma_del_mmap(uctx, uctx->ah_tbl.pa, uctx->ah_tbl.len);
  248. dma_free_coherent(&pdev->dev, uctx->ah_tbl.len, uctx->ah_tbl.va,
  249. uctx->ah_tbl.pa);
  250. list_for_each_entry_safe(mm, tmp, &uctx->mm_head, entry) {
  251. list_del(&mm->entry);
  252. kfree(mm);
  253. }
  254. kfree(uctx);
  255. return 0;
  256. }
  257. int ocrdma_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
  258. {
  259. struct ocrdma_ucontext *ucontext = get_ocrdma_ucontext(context);
  260. struct ocrdma_dev *dev = get_ocrdma_dev(context->device);
  261. unsigned long vm_page = vma->vm_pgoff << PAGE_SHIFT;
  262. u64 unmapped_db = (u64) dev->nic_info.unmapped_db;
  263. unsigned long len = (vma->vm_end - vma->vm_start);
  264. int status = 0;
  265. bool found;
  266. if (vma->vm_start & (PAGE_SIZE - 1))
  267. return -EINVAL;
  268. found = ocrdma_search_mmap(ucontext, vma->vm_pgoff << PAGE_SHIFT, len);
  269. if (!found)
  270. return -EINVAL;
  271. if ((vm_page >= unmapped_db) && (vm_page <= (unmapped_db +
  272. dev->nic_info.db_total_size)) &&
  273. (len <= dev->nic_info.db_page_size)) {
  274. if (vma->vm_flags & VM_READ)
  275. return -EPERM;
  276. vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
  277. status = io_remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
  278. len, vma->vm_page_prot);
  279. } else if (dev->nic_info.dpp_unmapped_len &&
  280. (vm_page >= (u64) dev->nic_info.dpp_unmapped_addr) &&
  281. (vm_page <= (u64) (dev->nic_info.dpp_unmapped_addr +
  282. dev->nic_info.dpp_unmapped_len)) &&
  283. (len <= dev->nic_info.dpp_unmapped_len)) {
  284. if (vma->vm_flags & VM_READ)
  285. return -EPERM;
  286. vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
  287. status = io_remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
  288. len, vma->vm_page_prot);
  289. } else {
  290. status = remap_pfn_range(vma, vma->vm_start,
  291. vma->vm_pgoff, len, vma->vm_page_prot);
  292. }
  293. return status;
  294. }
  295. static int ocrdma_copy_pd_uresp(struct ocrdma_dev *dev, struct ocrdma_pd *pd,
  296. struct ib_ucontext *ib_ctx,
  297. struct ib_udata *udata)
  298. {
  299. int status;
  300. u64 db_page_addr;
  301. u64 dpp_page_addr = 0;
  302. u32 db_page_size;
  303. struct ocrdma_alloc_pd_uresp rsp;
  304. struct ocrdma_ucontext *uctx = get_ocrdma_ucontext(ib_ctx);
  305. memset(&rsp, 0, sizeof(rsp));
  306. rsp.id = pd->id;
  307. rsp.dpp_enabled = pd->dpp_enabled;
  308. db_page_addr = dev->nic_info.unmapped_db +
  309. (pd->id * dev->nic_info.db_page_size);
  310. db_page_size = dev->nic_info.db_page_size;
  311. status = ocrdma_add_mmap(uctx, db_page_addr, db_page_size);
  312. if (status)
  313. return status;
  314. if (pd->dpp_enabled) {
  315. dpp_page_addr = dev->nic_info.dpp_unmapped_addr +
  316. (pd->id * PAGE_SIZE);
  317. status = ocrdma_add_mmap(uctx, dpp_page_addr,
  318. PAGE_SIZE);
  319. if (status)
  320. goto dpp_map_err;
  321. rsp.dpp_page_addr_hi = upper_32_bits(dpp_page_addr);
  322. rsp.dpp_page_addr_lo = dpp_page_addr;
  323. }
  324. status = ib_copy_to_udata(udata, &rsp, sizeof(rsp));
  325. if (status)
  326. goto ucopy_err;
  327. pd->uctx = uctx;
  328. return 0;
  329. ucopy_err:
  330. if (pd->dpp_enabled)
  331. ocrdma_del_mmap(pd->uctx, dpp_page_addr, PAGE_SIZE);
  332. dpp_map_err:
  333. ocrdma_del_mmap(pd->uctx, db_page_addr, db_page_size);
  334. return status;
  335. }
  336. struct ib_pd *ocrdma_alloc_pd(struct ib_device *ibdev,
  337. struct ib_ucontext *context,
  338. struct ib_udata *udata)
  339. {
  340. struct ocrdma_dev *dev = get_ocrdma_dev(ibdev);
  341. struct ocrdma_pd *pd;
  342. int status;
  343. pd = kzalloc(sizeof(*pd), GFP_KERNEL);
  344. if (!pd)
  345. return ERR_PTR(-ENOMEM);
  346. if (udata && context) {
  347. pd->dpp_enabled =
  348. (dev->nic_info.dev_family == OCRDMA_GEN2_FAMILY);
  349. pd->num_dpp_qp =
  350. pd->dpp_enabled ? OCRDMA_PD_MAX_DPP_ENABLED_QP : 0;
  351. }
  352. retry:
  353. status = ocrdma_mbx_alloc_pd(dev, pd);
  354. if (status) {
  355. /* try for pd with out dpp */
  356. if (pd->dpp_enabled) {
  357. pd->dpp_enabled = false;
  358. pd->num_dpp_qp = 0;
  359. goto retry;
  360. } else {
  361. kfree(pd);
  362. return ERR_PTR(status);
  363. }
  364. }
  365. if (udata && context) {
  366. status = ocrdma_copy_pd_uresp(dev, pd, context, udata);
  367. if (status)
  368. goto err;
  369. }
  370. return &pd->ibpd;
  371. err:
  372. status = ocrdma_mbx_dealloc_pd(dev, pd);
  373. kfree(pd);
  374. return ERR_PTR(status);
  375. }
  376. int ocrdma_dealloc_pd(struct ib_pd *ibpd)
  377. {
  378. struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
  379. struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
  380. int status;
  381. u64 usr_db;
  382. status = ocrdma_mbx_dealloc_pd(dev, pd);
  383. if (pd->uctx) {
  384. u64 dpp_db = dev->nic_info.dpp_unmapped_addr +
  385. (pd->id * PAGE_SIZE);
  386. if (pd->dpp_enabled)
  387. ocrdma_del_mmap(pd->uctx, dpp_db, PAGE_SIZE);
  388. usr_db = dev->nic_info.unmapped_db +
  389. (pd->id * dev->nic_info.db_page_size);
  390. ocrdma_del_mmap(pd->uctx, usr_db, dev->nic_info.db_page_size);
  391. }
  392. kfree(pd);
  393. return status;
  394. }
  395. static int ocrdma_alloc_lkey(struct ocrdma_dev *dev, struct ocrdma_mr *mr,
  396. u32 pdid, int acc, u32 num_pbls, u32 addr_check)
  397. {
  398. int status;
  399. mr->hwmr.fr_mr = 0;
  400. mr->hwmr.local_rd = 1;
  401. mr->hwmr.remote_rd = (acc & IB_ACCESS_REMOTE_READ) ? 1 : 0;
  402. mr->hwmr.remote_wr = (acc & IB_ACCESS_REMOTE_WRITE) ? 1 : 0;
  403. mr->hwmr.local_wr = (acc & IB_ACCESS_LOCAL_WRITE) ? 1 : 0;
  404. mr->hwmr.mw_bind = (acc & IB_ACCESS_MW_BIND) ? 1 : 0;
  405. mr->hwmr.remote_atomic = (acc & IB_ACCESS_REMOTE_ATOMIC) ? 1 : 0;
  406. mr->hwmr.num_pbls = num_pbls;
  407. status = ocrdma_mbx_alloc_lkey(dev, &mr->hwmr, pdid, addr_check);
  408. if (status)
  409. return status;
  410. mr->ibmr.lkey = mr->hwmr.lkey;
  411. if (mr->hwmr.remote_wr || mr->hwmr.remote_rd)
  412. mr->ibmr.rkey = mr->hwmr.lkey;
  413. return 0;
  414. }
  415. struct ib_mr *ocrdma_get_dma_mr(struct ib_pd *ibpd, int acc)
  416. {
  417. int status;
  418. struct ocrdma_mr *mr;
  419. struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
  420. struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
  421. if (acc & IB_ACCESS_REMOTE_WRITE && !(acc & IB_ACCESS_LOCAL_WRITE)) {
  422. pr_err("%s err, invalid access rights\n", __func__);
  423. return ERR_PTR(-EINVAL);
  424. }
  425. mr = kzalloc(sizeof(*mr), GFP_KERNEL);
  426. if (!mr)
  427. return ERR_PTR(-ENOMEM);
  428. status = ocrdma_alloc_lkey(dev, mr, pd->id, acc, 0,
  429. OCRDMA_ADDR_CHECK_DISABLE);
  430. if (status) {
  431. kfree(mr);
  432. return ERR_PTR(status);
  433. }
  434. return &mr->ibmr;
  435. }
  436. static void ocrdma_free_mr_pbl_tbl(struct ocrdma_dev *dev,
  437. struct ocrdma_hw_mr *mr)
  438. {
  439. struct pci_dev *pdev = dev->nic_info.pdev;
  440. int i = 0;
  441. if (mr->pbl_table) {
  442. for (i = 0; i < mr->num_pbls; i++) {
  443. if (!mr->pbl_table[i].va)
  444. continue;
  445. dma_free_coherent(&pdev->dev, mr->pbl_size,
  446. mr->pbl_table[i].va,
  447. mr->pbl_table[i].pa);
  448. }
  449. kfree(mr->pbl_table);
  450. mr->pbl_table = NULL;
  451. }
  452. }
  453. static int ocrdma_get_pbl_info(struct ocrdma_dev *dev, struct ocrdma_mr *mr,
  454. u32 num_pbes)
  455. {
  456. u32 num_pbls = 0;
  457. u32 idx = 0;
  458. int status = 0;
  459. u32 pbl_size;
  460. do {
  461. pbl_size = OCRDMA_MIN_HPAGE_SIZE * (1 << idx);
  462. if (pbl_size > MAX_OCRDMA_PBL_SIZE) {
  463. status = -EFAULT;
  464. break;
  465. }
  466. num_pbls = roundup(num_pbes, (pbl_size / sizeof(u64)));
  467. num_pbls = num_pbls / (pbl_size / sizeof(u64));
  468. idx++;
  469. } while (num_pbls >= dev->attr.max_num_mr_pbl);
  470. mr->hwmr.num_pbes = num_pbes;
  471. mr->hwmr.num_pbls = num_pbls;
  472. mr->hwmr.pbl_size = pbl_size;
  473. return status;
  474. }
  475. static int ocrdma_build_pbl_tbl(struct ocrdma_dev *dev, struct ocrdma_hw_mr *mr)
  476. {
  477. int status = 0;
  478. int i;
  479. u32 dma_len = mr->pbl_size;
  480. struct pci_dev *pdev = dev->nic_info.pdev;
  481. void *va;
  482. dma_addr_t pa;
  483. mr->pbl_table = kzalloc(sizeof(struct ocrdma_pbl) *
  484. mr->num_pbls, GFP_KERNEL);
  485. if (!mr->pbl_table)
  486. return -ENOMEM;
  487. for (i = 0; i < mr->num_pbls; i++) {
  488. va = dma_alloc_coherent(&pdev->dev, dma_len, &pa, GFP_KERNEL);
  489. if (!va) {
  490. ocrdma_free_mr_pbl_tbl(dev, mr);
  491. status = -ENOMEM;
  492. break;
  493. }
  494. memset(va, 0, dma_len);
  495. mr->pbl_table[i].va = va;
  496. mr->pbl_table[i].pa = pa;
  497. }
  498. return status;
  499. }
  500. static void build_user_pbes(struct ocrdma_dev *dev, struct ocrdma_mr *mr,
  501. u32 num_pbes)
  502. {
  503. struct ocrdma_pbe *pbe;
  504. struct ib_umem_chunk *chunk;
  505. struct ocrdma_pbl *pbl_tbl = mr->hwmr.pbl_table;
  506. struct ib_umem *umem = mr->umem;
  507. int i, shift, pg_cnt, pages, pbe_cnt, total_num_pbes = 0;
  508. if (!mr->hwmr.num_pbes)
  509. return;
  510. pbe = (struct ocrdma_pbe *)pbl_tbl->va;
  511. pbe_cnt = 0;
  512. shift = ilog2(umem->page_size);
  513. list_for_each_entry(chunk, &umem->chunk_list, list) {
  514. /* get all the dma regions from the chunk. */
  515. for (i = 0; i < chunk->nmap; i++) {
  516. pages = sg_dma_len(&chunk->page_list[i]) >> shift;
  517. for (pg_cnt = 0; pg_cnt < pages; pg_cnt++) {
  518. /* store the page address in pbe */
  519. pbe->pa_lo =
  520. cpu_to_le32(sg_dma_address
  521. (&chunk->page_list[i]) +
  522. (umem->page_size * pg_cnt));
  523. pbe->pa_hi =
  524. cpu_to_le32(upper_32_bits
  525. ((sg_dma_address
  526. (&chunk->page_list[i]) +
  527. umem->page_size * pg_cnt)));
  528. pbe_cnt += 1;
  529. total_num_pbes += 1;
  530. pbe++;
  531. /* if done building pbes, issue the mbx cmd. */
  532. if (total_num_pbes == num_pbes)
  533. return;
  534. /* if the given pbl is full storing the pbes,
  535. * move to next pbl.
  536. */
  537. if (pbe_cnt ==
  538. (mr->hwmr.pbl_size / sizeof(u64))) {
  539. pbl_tbl++;
  540. pbe = (struct ocrdma_pbe *)pbl_tbl->va;
  541. pbe_cnt = 0;
  542. }
  543. }
  544. }
  545. }
  546. }
  547. struct ib_mr *ocrdma_reg_user_mr(struct ib_pd *ibpd, u64 start, u64 len,
  548. u64 usr_addr, int acc, struct ib_udata *udata)
  549. {
  550. int status = -ENOMEM;
  551. struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
  552. struct ocrdma_mr *mr;
  553. struct ocrdma_pd *pd;
  554. u32 num_pbes;
  555. pd = get_ocrdma_pd(ibpd);
  556. if (acc & IB_ACCESS_REMOTE_WRITE && !(acc & IB_ACCESS_LOCAL_WRITE))
  557. return ERR_PTR(-EINVAL);
  558. mr = kzalloc(sizeof(*mr), GFP_KERNEL);
  559. if (!mr)
  560. return ERR_PTR(status);
  561. mr->umem = ib_umem_get(ibpd->uobject->context, start, len, acc, 0);
  562. if (IS_ERR(mr->umem)) {
  563. status = -EFAULT;
  564. goto umem_err;
  565. }
  566. num_pbes = ib_umem_page_count(mr->umem);
  567. status = ocrdma_get_pbl_info(dev, mr, num_pbes);
  568. if (status)
  569. goto umem_err;
  570. mr->hwmr.pbe_size = mr->umem->page_size;
  571. mr->hwmr.fbo = mr->umem->offset;
  572. mr->hwmr.va = usr_addr;
  573. mr->hwmr.len = len;
  574. mr->hwmr.remote_wr = (acc & IB_ACCESS_REMOTE_WRITE) ? 1 : 0;
  575. mr->hwmr.remote_rd = (acc & IB_ACCESS_REMOTE_READ) ? 1 : 0;
  576. mr->hwmr.local_wr = (acc & IB_ACCESS_LOCAL_WRITE) ? 1 : 0;
  577. mr->hwmr.local_rd = 1;
  578. mr->hwmr.remote_atomic = (acc & IB_ACCESS_REMOTE_ATOMIC) ? 1 : 0;
  579. status = ocrdma_build_pbl_tbl(dev, &mr->hwmr);
  580. if (status)
  581. goto umem_err;
  582. build_user_pbes(dev, mr, num_pbes);
  583. status = ocrdma_reg_mr(dev, &mr->hwmr, pd->id, acc);
  584. if (status)
  585. goto mbx_err;
  586. mr->ibmr.lkey = mr->hwmr.lkey;
  587. if (mr->hwmr.remote_wr || mr->hwmr.remote_rd)
  588. mr->ibmr.rkey = mr->hwmr.lkey;
  589. return &mr->ibmr;
  590. mbx_err:
  591. ocrdma_free_mr_pbl_tbl(dev, &mr->hwmr);
  592. umem_err:
  593. kfree(mr);
  594. return ERR_PTR(status);
  595. }
  596. int ocrdma_dereg_mr(struct ib_mr *ib_mr)
  597. {
  598. struct ocrdma_mr *mr = get_ocrdma_mr(ib_mr);
  599. struct ocrdma_dev *dev = get_ocrdma_dev(ib_mr->device);
  600. int status;
  601. status = ocrdma_mbx_dealloc_lkey(dev, mr->hwmr.fr_mr, mr->hwmr.lkey);
  602. if (mr->hwmr.fr_mr == 0)
  603. ocrdma_free_mr_pbl_tbl(dev, &mr->hwmr);
  604. /* it could be user registered memory. */
  605. if (mr->umem)
  606. ib_umem_release(mr->umem);
  607. kfree(mr);
  608. return status;
  609. }
  610. static int ocrdma_copy_cq_uresp(struct ocrdma_dev *dev, struct ocrdma_cq *cq,
  611. struct ib_udata *udata,
  612. struct ib_ucontext *ib_ctx)
  613. {
  614. int status;
  615. struct ocrdma_ucontext *uctx;
  616. struct ocrdma_create_cq_uresp uresp;
  617. memset(&uresp, 0, sizeof(uresp));
  618. uresp.cq_id = cq->id;
  619. uresp.page_size = PAGE_ALIGN(cq->len);
  620. uresp.num_pages = 1;
  621. uresp.max_hw_cqe = cq->max_hw_cqe;
  622. uresp.page_addr[0] = cq->pa;
  623. uresp.db_page_addr = dev->nic_info.unmapped_db;
  624. uresp.db_page_size = dev->nic_info.db_page_size;
  625. uresp.phase_change = cq->phase_change ? 1 : 0;
  626. status = ib_copy_to_udata(udata, &uresp, sizeof(uresp));
  627. if (status) {
  628. pr_err("%s(%d) copy error cqid=0x%x.\n",
  629. __func__, dev->id, cq->id);
  630. goto err;
  631. }
  632. uctx = get_ocrdma_ucontext(ib_ctx);
  633. status = ocrdma_add_mmap(uctx, uresp.db_page_addr, uresp.db_page_size);
  634. if (status)
  635. goto err;
  636. status = ocrdma_add_mmap(uctx, uresp.page_addr[0], uresp.page_size);
  637. if (status) {
  638. ocrdma_del_mmap(uctx, uresp.db_page_addr, uresp.db_page_size);
  639. goto err;
  640. }
  641. cq->ucontext = uctx;
  642. err:
  643. return status;
  644. }
  645. struct ib_cq *ocrdma_create_cq(struct ib_device *ibdev, int entries, int vector,
  646. struct ib_ucontext *ib_ctx,
  647. struct ib_udata *udata)
  648. {
  649. struct ocrdma_cq *cq;
  650. struct ocrdma_dev *dev = get_ocrdma_dev(ibdev);
  651. int status;
  652. struct ocrdma_create_cq_ureq ureq;
  653. if (udata) {
  654. if (ib_copy_from_udata(&ureq, udata, sizeof(ureq)))
  655. return ERR_PTR(-EFAULT);
  656. } else
  657. ureq.dpp_cq = 0;
  658. cq = kzalloc(sizeof(*cq), GFP_KERNEL);
  659. if (!cq)
  660. return ERR_PTR(-ENOMEM);
  661. spin_lock_init(&cq->cq_lock);
  662. spin_lock_init(&cq->comp_handler_lock);
  663. INIT_LIST_HEAD(&cq->sq_head);
  664. INIT_LIST_HEAD(&cq->rq_head);
  665. status = ocrdma_mbx_create_cq(dev, cq, entries, ureq.dpp_cq);
  666. if (status) {
  667. kfree(cq);
  668. return ERR_PTR(status);
  669. }
  670. if (ib_ctx) {
  671. status = ocrdma_copy_cq_uresp(dev, cq, udata, ib_ctx);
  672. if (status)
  673. goto ctx_err;
  674. }
  675. cq->phase = OCRDMA_CQE_VALID;
  676. cq->arm_needed = true;
  677. dev->cq_tbl[cq->id] = cq;
  678. return &cq->ibcq;
  679. ctx_err:
  680. ocrdma_mbx_destroy_cq(dev, cq);
  681. kfree(cq);
  682. return ERR_PTR(status);
  683. }
  684. int ocrdma_resize_cq(struct ib_cq *ibcq, int new_cnt,
  685. struct ib_udata *udata)
  686. {
  687. int status = 0;
  688. struct ocrdma_cq *cq = get_ocrdma_cq(ibcq);
  689. if (new_cnt < 1 || new_cnt > cq->max_hw_cqe) {
  690. status = -EINVAL;
  691. return status;
  692. }
  693. ibcq->cqe = new_cnt;
  694. return status;
  695. }
  696. int ocrdma_destroy_cq(struct ib_cq *ibcq)
  697. {
  698. int status;
  699. struct ocrdma_cq *cq = get_ocrdma_cq(ibcq);
  700. struct ocrdma_dev *dev = get_ocrdma_dev(ibcq->device);
  701. status = ocrdma_mbx_destroy_cq(dev, cq);
  702. if (cq->ucontext) {
  703. ocrdma_del_mmap(cq->ucontext, (u64) cq->pa,
  704. PAGE_ALIGN(cq->len));
  705. ocrdma_del_mmap(cq->ucontext, dev->nic_info.unmapped_db,
  706. dev->nic_info.db_page_size);
  707. }
  708. dev->cq_tbl[cq->id] = NULL;
  709. kfree(cq);
  710. return status;
  711. }
  712. static int ocrdma_add_qpn_map(struct ocrdma_dev *dev, struct ocrdma_qp *qp)
  713. {
  714. int status = -EINVAL;
  715. if (qp->id < OCRDMA_MAX_QP && dev->qp_tbl[qp->id] == NULL) {
  716. dev->qp_tbl[qp->id] = qp;
  717. status = 0;
  718. }
  719. return status;
  720. }
  721. static void ocrdma_del_qpn_map(struct ocrdma_dev *dev, struct ocrdma_qp *qp)
  722. {
  723. dev->qp_tbl[qp->id] = NULL;
  724. }
  725. static int ocrdma_check_qp_params(struct ib_pd *ibpd, struct ocrdma_dev *dev,
  726. struct ib_qp_init_attr *attrs)
  727. {
  728. if ((attrs->qp_type != IB_QPT_GSI) &&
  729. (attrs->qp_type != IB_QPT_RC) &&
  730. (attrs->qp_type != IB_QPT_UC) &&
  731. (attrs->qp_type != IB_QPT_UD)) {
  732. pr_err("%s(%d) unsupported qp type=0x%x requested\n",
  733. __func__, dev->id, attrs->qp_type);
  734. return -EINVAL;
  735. }
  736. /* Skip the check for QP1 to support CM size of 128 */
  737. if ((attrs->qp_type != IB_QPT_GSI) &&
  738. (attrs->cap.max_send_wr > dev->attr.max_wqe)) {
  739. pr_err("%s(%d) unsupported send_wr=0x%x requested\n",
  740. __func__, dev->id, attrs->cap.max_send_wr);
  741. pr_err("%s(%d) supported send_wr=0x%x\n",
  742. __func__, dev->id, dev->attr.max_wqe);
  743. return -EINVAL;
  744. }
  745. if (!attrs->srq && (attrs->cap.max_recv_wr > dev->attr.max_rqe)) {
  746. pr_err("%s(%d) unsupported recv_wr=0x%x requested\n",
  747. __func__, dev->id, attrs->cap.max_recv_wr);
  748. pr_err("%s(%d) supported recv_wr=0x%x\n",
  749. __func__, dev->id, dev->attr.max_rqe);
  750. return -EINVAL;
  751. }
  752. if (attrs->cap.max_inline_data > dev->attr.max_inline_data) {
  753. pr_err("%s(%d) unsupported inline data size=0x%x requested\n",
  754. __func__, dev->id, attrs->cap.max_inline_data);
  755. pr_err("%s(%d) supported inline data size=0x%x\n",
  756. __func__, dev->id, dev->attr.max_inline_data);
  757. return -EINVAL;
  758. }
  759. if (attrs->cap.max_send_sge > dev->attr.max_send_sge) {
  760. pr_err("%s(%d) unsupported send_sge=0x%x requested\n",
  761. __func__, dev->id, attrs->cap.max_send_sge);
  762. pr_err("%s(%d) supported send_sge=0x%x\n",
  763. __func__, dev->id, dev->attr.max_send_sge);
  764. return -EINVAL;
  765. }
  766. if (attrs->cap.max_recv_sge > dev->attr.max_recv_sge) {
  767. pr_err("%s(%d) unsupported recv_sge=0x%x requested\n",
  768. __func__, dev->id, attrs->cap.max_recv_sge);
  769. pr_err("%s(%d) supported recv_sge=0x%x\n",
  770. __func__, dev->id, dev->attr.max_recv_sge);
  771. return -EINVAL;
  772. }
  773. /* unprivileged user space cannot create special QP */
  774. if (ibpd->uobject && attrs->qp_type == IB_QPT_GSI) {
  775. pr_err
  776. ("%s(%d) Userspace can't create special QPs of type=0x%x\n",
  777. __func__, dev->id, attrs->qp_type);
  778. return -EINVAL;
  779. }
  780. /* allow creating only one GSI type of QP */
  781. if (attrs->qp_type == IB_QPT_GSI && dev->gsi_qp_created) {
  782. pr_err("%s(%d) GSI special QPs already created.\n",
  783. __func__, dev->id);
  784. return -EINVAL;
  785. }
  786. /* verify consumer QPs are not trying to use GSI QP's CQ */
  787. if ((attrs->qp_type != IB_QPT_GSI) && (dev->gsi_qp_created)) {
  788. if ((dev->gsi_sqcq == get_ocrdma_cq(attrs->send_cq)) ||
  789. (dev->gsi_rqcq == get_ocrdma_cq(attrs->recv_cq))) {
  790. pr_err("%s(%d) Consumer QP cannot use GSI CQs.\n",
  791. __func__, dev->id);
  792. return -EINVAL;
  793. }
  794. }
  795. return 0;
  796. }
  797. static int ocrdma_copy_qp_uresp(struct ocrdma_qp *qp,
  798. struct ib_udata *udata, int dpp_offset,
  799. int dpp_credit_lmt, int srq)
  800. {
  801. int status = 0;
  802. u64 usr_db;
  803. struct ocrdma_create_qp_uresp uresp;
  804. struct ocrdma_dev *dev = qp->dev;
  805. struct ocrdma_pd *pd = qp->pd;
  806. memset(&uresp, 0, sizeof(uresp));
  807. usr_db = dev->nic_info.unmapped_db +
  808. (pd->id * dev->nic_info.db_page_size);
  809. uresp.qp_id = qp->id;
  810. uresp.sq_dbid = qp->sq.dbid;
  811. uresp.num_sq_pages = 1;
  812. uresp.sq_page_size = PAGE_ALIGN(qp->sq.len);
  813. uresp.sq_page_addr[0] = qp->sq.pa;
  814. uresp.num_wqe_allocated = qp->sq.max_cnt;
  815. if (!srq) {
  816. uresp.rq_dbid = qp->rq.dbid;
  817. uresp.num_rq_pages = 1;
  818. uresp.rq_page_size = PAGE_ALIGN(qp->rq.len);
  819. uresp.rq_page_addr[0] = qp->rq.pa;
  820. uresp.num_rqe_allocated = qp->rq.max_cnt;
  821. }
  822. uresp.db_page_addr = usr_db;
  823. uresp.db_page_size = dev->nic_info.db_page_size;
  824. if (dev->nic_info.dev_family == OCRDMA_GEN2_FAMILY) {
  825. uresp.db_sq_offset = OCRDMA_DB_GEN2_SQ_OFFSET;
  826. uresp.db_rq_offset = OCRDMA_DB_GEN2_RQ_OFFSET;
  827. uresp.db_shift = 24;
  828. } else {
  829. uresp.db_sq_offset = OCRDMA_DB_SQ_OFFSET;
  830. uresp.db_rq_offset = OCRDMA_DB_RQ_OFFSET;
  831. uresp.db_shift = 16;
  832. }
  833. if (qp->dpp_enabled) {
  834. uresp.dpp_credit = dpp_credit_lmt;
  835. uresp.dpp_offset = dpp_offset;
  836. }
  837. status = ib_copy_to_udata(udata, &uresp, sizeof(uresp));
  838. if (status) {
  839. pr_err("%s(%d) user copy error.\n", __func__, dev->id);
  840. goto err;
  841. }
  842. status = ocrdma_add_mmap(pd->uctx, uresp.sq_page_addr[0],
  843. uresp.sq_page_size);
  844. if (status)
  845. goto err;
  846. if (!srq) {
  847. status = ocrdma_add_mmap(pd->uctx, uresp.rq_page_addr[0],
  848. uresp.rq_page_size);
  849. if (status)
  850. goto rq_map_err;
  851. }
  852. return status;
  853. rq_map_err:
  854. ocrdma_del_mmap(pd->uctx, uresp.sq_page_addr[0], uresp.sq_page_size);
  855. err:
  856. return status;
  857. }
  858. static void ocrdma_set_qp_db(struct ocrdma_dev *dev, struct ocrdma_qp *qp,
  859. struct ocrdma_pd *pd)
  860. {
  861. if (dev->nic_info.dev_family == OCRDMA_GEN2_FAMILY) {
  862. qp->sq_db = dev->nic_info.db +
  863. (pd->id * dev->nic_info.db_page_size) +
  864. OCRDMA_DB_GEN2_SQ_OFFSET;
  865. qp->rq_db = dev->nic_info.db +
  866. (pd->id * dev->nic_info.db_page_size) +
  867. OCRDMA_DB_GEN2_RQ_OFFSET;
  868. } else {
  869. qp->sq_db = dev->nic_info.db +
  870. (pd->id * dev->nic_info.db_page_size) +
  871. OCRDMA_DB_SQ_OFFSET;
  872. qp->rq_db = dev->nic_info.db +
  873. (pd->id * dev->nic_info.db_page_size) +
  874. OCRDMA_DB_RQ_OFFSET;
  875. }
  876. }
  877. static int ocrdma_alloc_wr_id_tbl(struct ocrdma_qp *qp)
  878. {
  879. qp->wqe_wr_id_tbl =
  880. kzalloc(sizeof(*(qp->wqe_wr_id_tbl)) * qp->sq.max_cnt,
  881. GFP_KERNEL);
  882. if (qp->wqe_wr_id_tbl == NULL)
  883. return -ENOMEM;
  884. qp->rqe_wr_id_tbl =
  885. kzalloc(sizeof(u64) * qp->rq.max_cnt, GFP_KERNEL);
  886. if (qp->rqe_wr_id_tbl == NULL)
  887. return -ENOMEM;
  888. return 0;
  889. }
  890. static void ocrdma_set_qp_init_params(struct ocrdma_qp *qp,
  891. struct ocrdma_pd *pd,
  892. struct ib_qp_init_attr *attrs)
  893. {
  894. qp->pd = pd;
  895. spin_lock_init(&qp->q_lock);
  896. INIT_LIST_HEAD(&qp->sq_entry);
  897. INIT_LIST_HEAD(&qp->rq_entry);
  898. qp->qp_type = attrs->qp_type;
  899. qp->cap_flags = OCRDMA_QP_INB_RD | OCRDMA_QP_INB_WR;
  900. qp->max_inline_data = attrs->cap.max_inline_data;
  901. qp->sq.max_sges = attrs->cap.max_send_sge;
  902. qp->rq.max_sges = attrs->cap.max_recv_sge;
  903. qp->state = OCRDMA_QPS_RST;
  904. qp->signaled = (attrs->sq_sig_type == IB_SIGNAL_ALL_WR) ? true : false;
  905. }
  906. static void ocrdma_store_gsi_qp_cq(struct ocrdma_dev *dev,
  907. struct ib_qp_init_attr *attrs)
  908. {
  909. if (attrs->qp_type == IB_QPT_GSI) {
  910. dev->gsi_qp_created = 1;
  911. dev->gsi_sqcq = get_ocrdma_cq(attrs->send_cq);
  912. dev->gsi_rqcq = get_ocrdma_cq(attrs->recv_cq);
  913. }
  914. }
  915. struct ib_qp *ocrdma_create_qp(struct ib_pd *ibpd,
  916. struct ib_qp_init_attr *attrs,
  917. struct ib_udata *udata)
  918. {
  919. int status;
  920. struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
  921. struct ocrdma_qp *qp;
  922. struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
  923. struct ocrdma_create_qp_ureq ureq;
  924. u16 dpp_credit_lmt, dpp_offset;
  925. status = ocrdma_check_qp_params(ibpd, dev, attrs);
  926. if (status)
  927. goto gen_err;
  928. memset(&ureq, 0, sizeof(ureq));
  929. if (udata) {
  930. if (ib_copy_from_udata(&ureq, udata, sizeof(ureq)))
  931. return ERR_PTR(-EFAULT);
  932. }
  933. qp = kzalloc(sizeof(*qp), GFP_KERNEL);
  934. if (!qp) {
  935. status = -ENOMEM;
  936. goto gen_err;
  937. }
  938. qp->dev = dev;
  939. ocrdma_set_qp_init_params(qp, pd, attrs);
  940. if (udata == NULL)
  941. qp->cap_flags |= (OCRDMA_QP_MW_BIND | OCRDMA_QP_LKEY0 |
  942. OCRDMA_QP_FAST_REG);
  943. mutex_lock(&dev->dev_lock);
  944. status = ocrdma_mbx_create_qp(qp, attrs, ureq.enable_dpp_cq,
  945. ureq.dpp_cq_id,
  946. &dpp_offset, &dpp_credit_lmt);
  947. if (status)
  948. goto mbx_err;
  949. /* user space QP's wr_id table are managed in library */
  950. if (udata == NULL) {
  951. status = ocrdma_alloc_wr_id_tbl(qp);
  952. if (status)
  953. goto map_err;
  954. }
  955. status = ocrdma_add_qpn_map(dev, qp);
  956. if (status)
  957. goto map_err;
  958. ocrdma_set_qp_db(dev, qp, pd);
  959. if (udata) {
  960. status = ocrdma_copy_qp_uresp(qp, udata, dpp_offset,
  961. dpp_credit_lmt,
  962. (attrs->srq != NULL));
  963. if (status)
  964. goto cpy_err;
  965. }
  966. ocrdma_store_gsi_qp_cq(dev, attrs);
  967. qp->ibqp.qp_num = qp->id;
  968. mutex_unlock(&dev->dev_lock);
  969. return &qp->ibqp;
  970. cpy_err:
  971. ocrdma_del_qpn_map(dev, qp);
  972. map_err:
  973. ocrdma_mbx_destroy_qp(dev, qp);
  974. mbx_err:
  975. mutex_unlock(&dev->dev_lock);
  976. kfree(qp->wqe_wr_id_tbl);
  977. kfree(qp->rqe_wr_id_tbl);
  978. kfree(qp);
  979. pr_err("%s(%d) error=%d\n", __func__, dev->id, status);
  980. gen_err:
  981. return ERR_PTR(status);
  982. }
  983. static void ocrdma_flush_rq_db(struct ocrdma_qp *qp)
  984. {
  985. if (qp->db_cache) {
  986. u32 val = qp->rq.dbid | (qp->db_cache <<
  987. ocrdma_get_num_posted_shift(qp));
  988. iowrite32(val, qp->rq_db);
  989. qp->db_cache = 0;
  990. }
  991. }
  992. int _ocrdma_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
  993. int attr_mask)
  994. {
  995. int status = 0;
  996. struct ocrdma_qp *qp;
  997. struct ocrdma_dev *dev;
  998. enum ib_qp_state old_qps;
  999. qp = get_ocrdma_qp(ibqp);
  1000. dev = qp->dev;
  1001. if (attr_mask & IB_QP_STATE)
  1002. status = ocrdma_qp_state_change(qp, attr->qp_state, &old_qps);
  1003. /* if new and previous states are same hw doesn't need to
  1004. * know about it.
  1005. */
  1006. if (status < 0)
  1007. return status;
  1008. status = ocrdma_mbx_modify_qp(dev, qp, attr, attr_mask, old_qps);
  1009. if (!status && attr_mask & IB_QP_STATE && attr->qp_state == IB_QPS_RTR)
  1010. ocrdma_flush_rq_db(qp);
  1011. return status;
  1012. }
  1013. int ocrdma_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
  1014. int attr_mask, struct ib_udata *udata)
  1015. {
  1016. unsigned long flags;
  1017. int status = -EINVAL;
  1018. struct ocrdma_qp *qp;
  1019. struct ocrdma_dev *dev;
  1020. enum ib_qp_state old_qps, new_qps;
  1021. qp = get_ocrdma_qp(ibqp);
  1022. dev = qp->dev;
  1023. /* syncronize with multiple context trying to change, retrive qps */
  1024. mutex_lock(&dev->dev_lock);
  1025. /* syncronize with wqe, rqe posting and cqe processing contexts */
  1026. spin_lock_irqsave(&qp->q_lock, flags);
  1027. old_qps = get_ibqp_state(qp->state);
  1028. if (attr_mask & IB_QP_STATE)
  1029. new_qps = attr->qp_state;
  1030. else
  1031. new_qps = old_qps;
  1032. spin_unlock_irqrestore(&qp->q_lock, flags);
  1033. if (!ib_modify_qp_is_ok(old_qps, new_qps, ibqp->qp_type, attr_mask)) {
  1034. pr_err("%s(%d) invalid attribute mask=0x%x specified for\n"
  1035. "qpn=0x%x of type=0x%x old_qps=0x%x, new_qps=0x%x\n",
  1036. __func__, dev->id, attr_mask, qp->id, ibqp->qp_type,
  1037. old_qps, new_qps);
  1038. goto param_err;
  1039. }
  1040. status = _ocrdma_modify_qp(ibqp, attr, attr_mask);
  1041. if (status > 0)
  1042. status = 0;
  1043. param_err:
  1044. mutex_unlock(&dev->dev_lock);
  1045. return status;
  1046. }
  1047. static enum ib_mtu ocrdma_mtu_int_to_enum(u16 mtu)
  1048. {
  1049. switch (mtu) {
  1050. case 256:
  1051. return IB_MTU_256;
  1052. case 512:
  1053. return IB_MTU_512;
  1054. case 1024:
  1055. return IB_MTU_1024;
  1056. case 2048:
  1057. return IB_MTU_2048;
  1058. case 4096:
  1059. return IB_MTU_4096;
  1060. default:
  1061. return IB_MTU_1024;
  1062. }
  1063. }
  1064. static int ocrdma_to_ib_qp_acc_flags(int qp_cap_flags)
  1065. {
  1066. int ib_qp_acc_flags = 0;
  1067. if (qp_cap_flags & OCRDMA_QP_INB_WR)
  1068. ib_qp_acc_flags |= IB_ACCESS_REMOTE_WRITE;
  1069. if (qp_cap_flags & OCRDMA_QP_INB_RD)
  1070. ib_qp_acc_flags |= IB_ACCESS_LOCAL_WRITE;
  1071. return ib_qp_acc_flags;
  1072. }
  1073. int ocrdma_query_qp(struct ib_qp *ibqp,
  1074. struct ib_qp_attr *qp_attr,
  1075. int attr_mask, struct ib_qp_init_attr *qp_init_attr)
  1076. {
  1077. int status;
  1078. u32 qp_state;
  1079. struct ocrdma_qp_params params;
  1080. struct ocrdma_qp *qp = get_ocrdma_qp(ibqp);
  1081. struct ocrdma_dev *dev = qp->dev;
  1082. memset(&params, 0, sizeof(params));
  1083. mutex_lock(&dev->dev_lock);
  1084. status = ocrdma_mbx_query_qp(dev, qp, &params);
  1085. mutex_unlock(&dev->dev_lock);
  1086. if (status)
  1087. goto mbx_err;
  1088. qp_attr->qp_state = get_ibqp_state(IB_QPS_INIT);
  1089. qp_attr->cur_qp_state = get_ibqp_state(IB_QPS_INIT);
  1090. qp_attr->path_mtu =
  1091. ocrdma_mtu_int_to_enum(params.path_mtu_pkey_indx &
  1092. OCRDMA_QP_PARAMS_PATH_MTU_MASK) >>
  1093. OCRDMA_QP_PARAMS_PATH_MTU_SHIFT;
  1094. qp_attr->path_mig_state = IB_MIG_MIGRATED;
  1095. qp_attr->rq_psn = params.hop_lmt_rq_psn & OCRDMA_QP_PARAMS_RQ_PSN_MASK;
  1096. qp_attr->sq_psn = params.tclass_sq_psn & OCRDMA_QP_PARAMS_SQ_PSN_MASK;
  1097. qp_attr->dest_qp_num =
  1098. params.ack_to_rnr_rtc_dest_qpn & OCRDMA_QP_PARAMS_DEST_QPN_MASK;
  1099. qp_attr->qp_access_flags = ocrdma_to_ib_qp_acc_flags(qp->cap_flags);
  1100. qp_attr->cap.max_send_wr = qp->sq.max_cnt - 1;
  1101. qp_attr->cap.max_recv_wr = qp->rq.max_cnt - 1;
  1102. qp_attr->cap.max_send_sge = qp->sq.max_sges;
  1103. qp_attr->cap.max_recv_sge = qp->rq.max_sges;
  1104. qp_attr->cap.max_inline_data = dev->attr.max_inline_data;
  1105. qp_init_attr->cap = qp_attr->cap;
  1106. memcpy(&qp_attr->ah_attr.grh.dgid, &params.dgid[0],
  1107. sizeof(params.dgid));
  1108. qp_attr->ah_attr.grh.flow_label = params.rnt_rc_sl_fl &
  1109. OCRDMA_QP_PARAMS_FLOW_LABEL_MASK;
  1110. qp_attr->ah_attr.grh.sgid_index = qp->sgid_idx;
  1111. qp_attr->ah_attr.grh.hop_limit = (params.hop_lmt_rq_psn &
  1112. OCRDMA_QP_PARAMS_HOP_LMT_MASK) >>
  1113. OCRDMA_QP_PARAMS_HOP_LMT_SHIFT;
  1114. qp_attr->ah_attr.grh.traffic_class = (params.tclass_sq_psn &
  1115. OCRDMA_QP_PARAMS_SQ_PSN_MASK) >>
  1116. OCRDMA_QP_PARAMS_TCLASS_SHIFT;
  1117. qp_attr->ah_attr.ah_flags = IB_AH_GRH;
  1118. qp_attr->ah_attr.port_num = 1;
  1119. qp_attr->ah_attr.sl = (params.rnt_rc_sl_fl &
  1120. OCRDMA_QP_PARAMS_SL_MASK) >>
  1121. OCRDMA_QP_PARAMS_SL_SHIFT;
  1122. qp_attr->timeout = (params.ack_to_rnr_rtc_dest_qpn &
  1123. OCRDMA_QP_PARAMS_ACK_TIMEOUT_MASK) >>
  1124. OCRDMA_QP_PARAMS_ACK_TIMEOUT_SHIFT;
  1125. qp_attr->rnr_retry = (params.ack_to_rnr_rtc_dest_qpn &
  1126. OCRDMA_QP_PARAMS_RNR_RETRY_CNT_MASK) >>
  1127. OCRDMA_QP_PARAMS_RNR_RETRY_CNT_SHIFT;
  1128. qp_attr->retry_cnt =
  1129. (params.rnt_rc_sl_fl & OCRDMA_QP_PARAMS_RETRY_CNT_MASK) >>
  1130. OCRDMA_QP_PARAMS_RETRY_CNT_SHIFT;
  1131. qp_attr->min_rnr_timer = 0;
  1132. qp_attr->pkey_index = 0;
  1133. qp_attr->port_num = 1;
  1134. qp_attr->ah_attr.src_path_bits = 0;
  1135. qp_attr->ah_attr.static_rate = 0;
  1136. qp_attr->alt_pkey_index = 0;
  1137. qp_attr->alt_port_num = 0;
  1138. qp_attr->alt_timeout = 0;
  1139. memset(&qp_attr->alt_ah_attr, 0, sizeof(qp_attr->alt_ah_attr));
  1140. qp_state = (params.max_sge_recv_flags & OCRDMA_QP_PARAMS_STATE_MASK) >>
  1141. OCRDMA_QP_PARAMS_STATE_SHIFT;
  1142. qp_attr->sq_draining = (qp_state == OCRDMA_QPS_SQ_DRAINING) ? 1 : 0;
  1143. qp_attr->max_dest_rd_atomic =
  1144. params.max_ord_ird >> OCRDMA_QP_PARAMS_MAX_ORD_SHIFT;
  1145. qp_attr->max_rd_atomic =
  1146. params.max_ord_ird & OCRDMA_QP_PARAMS_MAX_IRD_MASK;
  1147. qp_attr->en_sqd_async_notify = (params.max_sge_recv_flags &
  1148. OCRDMA_QP_PARAMS_FLAGS_SQD_ASYNC) ? 1 : 0;
  1149. mbx_err:
  1150. return status;
  1151. }
  1152. static void ocrdma_srq_toggle_bit(struct ocrdma_srq *srq, int idx)
  1153. {
  1154. int i = idx / 32;
  1155. unsigned int mask = (1 << (idx % 32));
  1156. if (srq->idx_bit_fields[i] & mask)
  1157. srq->idx_bit_fields[i] &= ~mask;
  1158. else
  1159. srq->idx_bit_fields[i] |= mask;
  1160. }
  1161. static int ocrdma_hwq_free_cnt(struct ocrdma_qp_hwq_info *q)
  1162. {
  1163. return ((q->max_wqe_idx - q->head) + q->tail) % q->max_cnt;
  1164. }
  1165. static int is_hw_sq_empty(struct ocrdma_qp *qp)
  1166. {
  1167. return (qp->sq.tail == qp->sq.head);
  1168. }
  1169. static int is_hw_rq_empty(struct ocrdma_qp *qp)
  1170. {
  1171. return (qp->rq.tail == qp->rq.head);
  1172. }
  1173. static void *ocrdma_hwq_head(struct ocrdma_qp_hwq_info *q)
  1174. {
  1175. return q->va + (q->head * q->entry_size);
  1176. }
  1177. static void *ocrdma_hwq_head_from_idx(struct ocrdma_qp_hwq_info *q,
  1178. u32 idx)
  1179. {
  1180. return q->va + (idx * q->entry_size);
  1181. }
  1182. static void ocrdma_hwq_inc_head(struct ocrdma_qp_hwq_info *q)
  1183. {
  1184. q->head = (q->head + 1) & q->max_wqe_idx;
  1185. }
  1186. static void ocrdma_hwq_inc_tail(struct ocrdma_qp_hwq_info *q)
  1187. {
  1188. q->tail = (q->tail + 1) & q->max_wqe_idx;
  1189. }
  1190. /* discard the cqe for a given QP */
  1191. static void ocrdma_discard_cqes(struct ocrdma_qp *qp, struct ocrdma_cq *cq)
  1192. {
  1193. unsigned long cq_flags;
  1194. unsigned long flags;
  1195. int discard_cnt = 0;
  1196. u32 cur_getp, stop_getp;
  1197. struct ocrdma_cqe *cqe;
  1198. u32 qpn = 0;
  1199. spin_lock_irqsave(&cq->cq_lock, cq_flags);
  1200. /* traverse through the CQEs in the hw CQ,
  1201. * find the matching CQE for a given qp,
  1202. * mark the matching one discarded by clearing qpn.
  1203. * ring the doorbell in the poll_cq() as
  1204. * we don't complete out of order cqe.
  1205. */
  1206. cur_getp = cq->getp;
  1207. /* find upto when do we reap the cq. */
  1208. stop_getp = cur_getp;
  1209. do {
  1210. if (is_hw_sq_empty(qp) && (!qp->srq && is_hw_rq_empty(qp)))
  1211. break;
  1212. cqe = cq->va + cur_getp;
  1213. /* if (a) done reaping whole hw cq, or
  1214. * (b) qp_xq becomes empty.
  1215. * then exit
  1216. */
  1217. qpn = cqe->cmn.qpn & OCRDMA_CQE_QPN_MASK;
  1218. /* if previously discarded cqe found, skip that too. */
  1219. /* check for matching qp */
  1220. if (qpn == 0 || qpn != qp->id)
  1221. goto skip_cqe;
  1222. /* mark cqe discarded so that it is not picked up later
  1223. * in the poll_cq().
  1224. */
  1225. discard_cnt += 1;
  1226. cqe->cmn.qpn = 0;
  1227. if (is_cqe_for_sq(cqe)) {
  1228. ocrdma_hwq_inc_tail(&qp->sq);
  1229. } else {
  1230. if (qp->srq) {
  1231. spin_lock_irqsave(&qp->srq->q_lock, flags);
  1232. ocrdma_hwq_inc_tail(&qp->srq->rq);
  1233. ocrdma_srq_toggle_bit(qp->srq, cur_getp);
  1234. spin_unlock_irqrestore(&qp->srq->q_lock, flags);
  1235. } else {
  1236. ocrdma_hwq_inc_tail(&qp->rq);
  1237. }
  1238. }
  1239. skip_cqe:
  1240. cur_getp = (cur_getp + 1) % cq->max_hw_cqe;
  1241. } while (cur_getp != stop_getp);
  1242. spin_unlock_irqrestore(&cq->cq_lock, cq_flags);
  1243. }
  1244. void ocrdma_del_flush_qp(struct ocrdma_qp *qp)
  1245. {
  1246. int found = false;
  1247. unsigned long flags;
  1248. struct ocrdma_dev *dev = qp->dev;
  1249. /* sync with any active CQ poll */
  1250. spin_lock_irqsave(&dev->flush_q_lock, flags);
  1251. found = ocrdma_is_qp_in_sq_flushlist(qp->sq_cq, qp);
  1252. if (found)
  1253. list_del(&qp->sq_entry);
  1254. if (!qp->srq) {
  1255. found = ocrdma_is_qp_in_rq_flushlist(qp->rq_cq, qp);
  1256. if (found)
  1257. list_del(&qp->rq_entry);
  1258. }
  1259. spin_unlock_irqrestore(&dev->flush_q_lock, flags);
  1260. }
  1261. int ocrdma_destroy_qp(struct ib_qp *ibqp)
  1262. {
  1263. int status;
  1264. struct ocrdma_pd *pd;
  1265. struct ocrdma_qp *qp;
  1266. struct ocrdma_dev *dev;
  1267. struct ib_qp_attr attrs;
  1268. int attr_mask = IB_QP_STATE;
  1269. unsigned long flags;
  1270. qp = get_ocrdma_qp(ibqp);
  1271. dev = qp->dev;
  1272. attrs.qp_state = IB_QPS_ERR;
  1273. pd = qp->pd;
  1274. /* change the QP state to ERROR */
  1275. _ocrdma_modify_qp(ibqp, &attrs, attr_mask);
  1276. /* ensure that CQEs for newly created QP (whose id may be same with
  1277. * one which just getting destroyed are same), dont get
  1278. * discarded until the old CQEs are discarded.
  1279. */
  1280. mutex_lock(&dev->dev_lock);
  1281. status = ocrdma_mbx_destroy_qp(dev, qp);
  1282. /*
  1283. * acquire CQ lock while destroy is in progress, in order to
  1284. * protect against proessing in-flight CQEs for this QP.
  1285. */
  1286. spin_lock_irqsave(&qp->sq_cq->cq_lock, flags);
  1287. if (qp->rq_cq && (qp->rq_cq != qp->sq_cq))
  1288. spin_lock(&qp->rq_cq->cq_lock);
  1289. ocrdma_del_qpn_map(dev, qp);
  1290. if (qp->rq_cq && (qp->rq_cq != qp->sq_cq))
  1291. spin_unlock(&qp->rq_cq->cq_lock);
  1292. spin_unlock_irqrestore(&qp->sq_cq->cq_lock, flags);
  1293. if (!pd->uctx) {
  1294. ocrdma_discard_cqes(qp, qp->sq_cq);
  1295. ocrdma_discard_cqes(qp, qp->rq_cq);
  1296. }
  1297. mutex_unlock(&dev->dev_lock);
  1298. if (pd->uctx) {
  1299. ocrdma_del_mmap(pd->uctx, (u64) qp->sq.pa,
  1300. PAGE_ALIGN(qp->sq.len));
  1301. if (!qp->srq)
  1302. ocrdma_del_mmap(pd->uctx, (u64) qp->rq.pa,
  1303. PAGE_ALIGN(qp->rq.len));
  1304. }
  1305. ocrdma_del_flush_qp(qp);
  1306. kfree(qp->wqe_wr_id_tbl);
  1307. kfree(qp->rqe_wr_id_tbl);
  1308. kfree(qp);
  1309. return status;
  1310. }
  1311. static int ocrdma_copy_srq_uresp(struct ocrdma_dev *dev, struct ocrdma_srq *srq,
  1312. struct ib_udata *udata)
  1313. {
  1314. int status;
  1315. struct ocrdma_create_srq_uresp uresp;
  1316. memset(&uresp, 0, sizeof(uresp));
  1317. uresp.rq_dbid = srq->rq.dbid;
  1318. uresp.num_rq_pages = 1;
  1319. uresp.rq_page_addr[0] = srq->rq.pa;
  1320. uresp.rq_page_size = srq->rq.len;
  1321. uresp.db_page_addr = dev->nic_info.unmapped_db +
  1322. (srq->pd->id * dev->nic_info.db_page_size);
  1323. uresp.db_page_size = dev->nic_info.db_page_size;
  1324. uresp.num_rqe_allocated = srq->rq.max_cnt;
  1325. if (dev->nic_info.dev_family == OCRDMA_GEN2_FAMILY) {
  1326. uresp.db_rq_offset = OCRDMA_DB_GEN2_RQ_OFFSET;
  1327. uresp.db_shift = 24;
  1328. } else {
  1329. uresp.db_rq_offset = OCRDMA_DB_RQ_OFFSET;
  1330. uresp.db_shift = 16;
  1331. }
  1332. status = ib_copy_to_udata(udata, &uresp, sizeof(uresp));
  1333. if (status)
  1334. return status;
  1335. status = ocrdma_add_mmap(srq->pd->uctx, uresp.rq_page_addr[0],
  1336. uresp.rq_page_size);
  1337. if (status)
  1338. return status;
  1339. return status;
  1340. }
  1341. struct ib_srq *ocrdma_create_srq(struct ib_pd *ibpd,
  1342. struct ib_srq_init_attr *init_attr,
  1343. struct ib_udata *udata)
  1344. {
  1345. int status = -ENOMEM;
  1346. struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
  1347. struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
  1348. struct ocrdma_srq *srq;
  1349. if (init_attr->attr.max_sge > dev->attr.max_recv_sge)
  1350. return ERR_PTR(-EINVAL);
  1351. if (init_attr->attr.max_wr > dev->attr.max_rqe)
  1352. return ERR_PTR(-EINVAL);
  1353. srq = kzalloc(sizeof(*srq), GFP_KERNEL);
  1354. if (!srq)
  1355. return ERR_PTR(status);
  1356. spin_lock_init(&srq->q_lock);
  1357. srq->pd = pd;
  1358. srq->db = dev->nic_info.db + (pd->id * dev->nic_info.db_page_size);
  1359. status = ocrdma_mbx_create_srq(dev, srq, init_attr, pd);
  1360. if (status)
  1361. goto err;
  1362. if (udata == NULL) {
  1363. srq->rqe_wr_id_tbl = kzalloc(sizeof(u64) * srq->rq.max_cnt,
  1364. GFP_KERNEL);
  1365. if (srq->rqe_wr_id_tbl == NULL)
  1366. goto arm_err;
  1367. srq->bit_fields_len = (srq->rq.max_cnt / 32) +
  1368. (srq->rq.max_cnt % 32 ? 1 : 0);
  1369. srq->idx_bit_fields =
  1370. kmalloc(srq->bit_fields_len * sizeof(u32), GFP_KERNEL);
  1371. if (srq->idx_bit_fields == NULL)
  1372. goto arm_err;
  1373. memset(srq->idx_bit_fields, 0xff,
  1374. srq->bit_fields_len * sizeof(u32));
  1375. }
  1376. if (init_attr->attr.srq_limit) {
  1377. status = ocrdma_mbx_modify_srq(srq, &init_attr->attr);
  1378. if (status)
  1379. goto arm_err;
  1380. }
  1381. if (udata) {
  1382. status = ocrdma_copy_srq_uresp(dev, srq, udata);
  1383. if (status)
  1384. goto arm_err;
  1385. }
  1386. return &srq->ibsrq;
  1387. arm_err:
  1388. ocrdma_mbx_destroy_srq(dev, srq);
  1389. err:
  1390. kfree(srq->rqe_wr_id_tbl);
  1391. kfree(srq->idx_bit_fields);
  1392. kfree(srq);
  1393. return ERR_PTR(status);
  1394. }
  1395. int ocrdma_modify_srq(struct ib_srq *ibsrq,
  1396. struct ib_srq_attr *srq_attr,
  1397. enum ib_srq_attr_mask srq_attr_mask,
  1398. struct ib_udata *udata)
  1399. {
  1400. int status = 0;
  1401. struct ocrdma_srq *srq;
  1402. srq = get_ocrdma_srq(ibsrq);
  1403. if (srq_attr_mask & IB_SRQ_MAX_WR)
  1404. status = -EINVAL;
  1405. else
  1406. status = ocrdma_mbx_modify_srq(srq, srq_attr);
  1407. return status;
  1408. }
  1409. int ocrdma_query_srq(struct ib_srq *ibsrq, struct ib_srq_attr *srq_attr)
  1410. {
  1411. int status;
  1412. struct ocrdma_srq *srq;
  1413. srq = get_ocrdma_srq(ibsrq);
  1414. status = ocrdma_mbx_query_srq(srq, srq_attr);
  1415. return status;
  1416. }
  1417. int ocrdma_destroy_srq(struct ib_srq *ibsrq)
  1418. {
  1419. int status;
  1420. struct ocrdma_srq *srq;
  1421. struct ocrdma_dev *dev = get_ocrdma_dev(ibsrq->device);
  1422. srq = get_ocrdma_srq(ibsrq);
  1423. status = ocrdma_mbx_destroy_srq(dev, srq);
  1424. if (srq->pd->uctx)
  1425. ocrdma_del_mmap(srq->pd->uctx, (u64) srq->rq.pa,
  1426. PAGE_ALIGN(srq->rq.len));
  1427. kfree(srq->idx_bit_fields);
  1428. kfree(srq->rqe_wr_id_tbl);
  1429. kfree(srq);
  1430. return status;
  1431. }
  1432. /* unprivileged verbs and their support functions. */
  1433. static void ocrdma_build_ud_hdr(struct ocrdma_qp *qp,
  1434. struct ocrdma_hdr_wqe *hdr,
  1435. struct ib_send_wr *wr)
  1436. {
  1437. struct ocrdma_ewqe_ud_hdr *ud_hdr =
  1438. (struct ocrdma_ewqe_ud_hdr *)(hdr + 1);
  1439. struct ocrdma_ah *ah = get_ocrdma_ah(wr->wr.ud.ah);
  1440. ud_hdr->rsvd_dest_qpn = wr->wr.ud.remote_qpn;
  1441. if (qp->qp_type == IB_QPT_GSI)
  1442. ud_hdr->qkey = qp->qkey;
  1443. else
  1444. ud_hdr->qkey = wr->wr.ud.remote_qkey;
  1445. ud_hdr->rsvd_ahid = ah->id;
  1446. }
  1447. static void ocrdma_build_sges(struct ocrdma_hdr_wqe *hdr,
  1448. struct ocrdma_sge *sge, int num_sge,
  1449. struct ib_sge *sg_list)
  1450. {
  1451. int i;
  1452. for (i = 0; i < num_sge; i++) {
  1453. sge[i].lrkey = sg_list[i].lkey;
  1454. sge[i].addr_lo = sg_list[i].addr;
  1455. sge[i].addr_hi = upper_32_bits(sg_list[i].addr);
  1456. sge[i].len = sg_list[i].length;
  1457. hdr->total_len += sg_list[i].length;
  1458. }
  1459. if (num_sge == 0)
  1460. memset(sge, 0, sizeof(*sge));
  1461. }
  1462. static int ocrdma_build_inline_sges(struct ocrdma_qp *qp,
  1463. struct ocrdma_hdr_wqe *hdr,
  1464. struct ocrdma_sge *sge,
  1465. struct ib_send_wr *wr, u32 wqe_size)
  1466. {
  1467. if (wr->send_flags & IB_SEND_INLINE && qp->qp_type != IB_QPT_UD) {
  1468. if (wr->sg_list[0].length > qp->max_inline_data) {
  1469. pr_err("%s() supported_len=0x%x,\n"
  1470. " unspported len req=0x%x\n", __func__,
  1471. qp->max_inline_data, wr->sg_list[0].length);
  1472. return -EINVAL;
  1473. }
  1474. memcpy(sge,
  1475. (void *)(unsigned long)wr->sg_list[0].addr,
  1476. wr->sg_list[0].length);
  1477. hdr->total_len = wr->sg_list[0].length;
  1478. wqe_size += roundup(hdr->total_len, OCRDMA_WQE_ALIGN_BYTES);
  1479. if (0 == wr->sg_list[0].length)
  1480. wqe_size += sizeof(struct ocrdma_sge);
  1481. hdr->cw |= (OCRDMA_TYPE_INLINE << OCRDMA_WQE_TYPE_SHIFT);
  1482. } else {
  1483. ocrdma_build_sges(hdr, sge, wr->num_sge, wr->sg_list);
  1484. if (wr->num_sge)
  1485. wqe_size += (wr->num_sge * sizeof(struct ocrdma_sge));
  1486. else
  1487. wqe_size += sizeof(struct ocrdma_sge);
  1488. hdr->cw |= (OCRDMA_TYPE_LKEY << OCRDMA_WQE_TYPE_SHIFT);
  1489. }
  1490. hdr->cw |= ((wqe_size / OCRDMA_WQE_STRIDE) << OCRDMA_WQE_SIZE_SHIFT);
  1491. return 0;
  1492. }
  1493. static int ocrdma_build_send(struct ocrdma_qp *qp, struct ocrdma_hdr_wqe *hdr,
  1494. struct ib_send_wr *wr)
  1495. {
  1496. int status;
  1497. struct ocrdma_sge *sge;
  1498. u32 wqe_size = sizeof(*hdr);
  1499. if (qp->qp_type == IB_QPT_UD || qp->qp_type == IB_QPT_GSI) {
  1500. ocrdma_build_ud_hdr(qp, hdr, wr);
  1501. sge = (struct ocrdma_sge *)(hdr + 2);
  1502. wqe_size += sizeof(struct ocrdma_ewqe_ud_hdr);
  1503. } else {
  1504. sge = (struct ocrdma_sge *)(hdr + 1);
  1505. }
  1506. status = ocrdma_build_inline_sges(qp, hdr, sge, wr, wqe_size);
  1507. return status;
  1508. }
  1509. static int ocrdma_build_write(struct ocrdma_qp *qp, struct ocrdma_hdr_wqe *hdr,
  1510. struct ib_send_wr *wr)
  1511. {
  1512. int status;
  1513. struct ocrdma_sge *ext_rw = (struct ocrdma_sge *)(hdr + 1);
  1514. struct ocrdma_sge *sge = ext_rw + 1;
  1515. u32 wqe_size = sizeof(*hdr) + sizeof(*ext_rw);
  1516. status = ocrdma_build_inline_sges(qp, hdr, sge, wr, wqe_size);
  1517. if (status)
  1518. return status;
  1519. ext_rw->addr_lo = wr->wr.rdma.remote_addr;
  1520. ext_rw->addr_hi = upper_32_bits(wr->wr.rdma.remote_addr);
  1521. ext_rw->lrkey = wr->wr.rdma.rkey;
  1522. ext_rw->len = hdr->total_len;
  1523. return 0;
  1524. }
  1525. static void ocrdma_build_read(struct ocrdma_qp *qp, struct ocrdma_hdr_wqe *hdr,
  1526. struct ib_send_wr *wr)
  1527. {
  1528. struct ocrdma_sge *ext_rw = (struct ocrdma_sge *)(hdr + 1);
  1529. struct ocrdma_sge *sge = ext_rw + 1;
  1530. u32 wqe_size = ((wr->num_sge + 1) * sizeof(struct ocrdma_sge)) +
  1531. sizeof(struct ocrdma_hdr_wqe);
  1532. ocrdma_build_sges(hdr, sge, wr->num_sge, wr->sg_list);
  1533. hdr->cw |= ((wqe_size / OCRDMA_WQE_STRIDE) << OCRDMA_WQE_SIZE_SHIFT);
  1534. hdr->cw |= (OCRDMA_READ << OCRDMA_WQE_OPCODE_SHIFT);
  1535. hdr->cw |= (OCRDMA_TYPE_LKEY << OCRDMA_WQE_TYPE_SHIFT);
  1536. ext_rw->addr_lo = wr->wr.rdma.remote_addr;
  1537. ext_rw->addr_hi = upper_32_bits(wr->wr.rdma.remote_addr);
  1538. ext_rw->lrkey = wr->wr.rdma.rkey;
  1539. ext_rw->len = hdr->total_len;
  1540. }
  1541. static void build_frmr_pbes(struct ib_send_wr *wr, struct ocrdma_pbl *pbl_tbl,
  1542. struct ocrdma_hw_mr *hwmr)
  1543. {
  1544. int i;
  1545. u64 buf_addr = 0;
  1546. int num_pbes;
  1547. struct ocrdma_pbe *pbe;
  1548. pbe = (struct ocrdma_pbe *)pbl_tbl->va;
  1549. num_pbes = 0;
  1550. /* go through the OS phy regions & fill hw pbe entries into pbls. */
  1551. for (i = 0; i < wr->wr.fast_reg.page_list_len; i++) {
  1552. /* number of pbes can be more for one OS buf, when
  1553. * buffers are of different sizes.
  1554. * split the ib_buf to one or more pbes.
  1555. */
  1556. buf_addr = wr->wr.fast_reg.page_list->page_list[i];
  1557. pbe->pa_lo = cpu_to_le32((u32) (buf_addr & PAGE_MASK));
  1558. pbe->pa_hi = cpu_to_le32((u32) upper_32_bits(buf_addr));
  1559. num_pbes += 1;
  1560. pbe++;
  1561. /* if the pbl is full storing the pbes,
  1562. * move to next pbl.
  1563. */
  1564. if (num_pbes == (hwmr->pbl_size/sizeof(u64))) {
  1565. pbl_tbl++;
  1566. pbe = (struct ocrdma_pbe *)pbl_tbl->va;
  1567. }
  1568. }
  1569. return;
  1570. }
  1571. static int get_encoded_page_size(int pg_sz)
  1572. {
  1573. /* Max size is 256M 4096 << 16 */
  1574. int i = 0;
  1575. for (; i < 17; i++)
  1576. if (pg_sz == (4096 << i))
  1577. break;
  1578. return i;
  1579. }
  1580. static int ocrdma_build_fr(struct ocrdma_qp *qp, struct ocrdma_hdr_wqe *hdr,
  1581. struct ib_send_wr *wr)
  1582. {
  1583. u64 fbo;
  1584. struct ocrdma_ewqe_fr *fast_reg = (struct ocrdma_ewqe_fr *)(hdr + 1);
  1585. struct ocrdma_mr *mr;
  1586. u32 wqe_size = sizeof(*fast_reg) + sizeof(*hdr);
  1587. wqe_size = roundup(wqe_size, OCRDMA_WQE_ALIGN_BYTES);
  1588. if ((wr->wr.fast_reg.page_list_len >
  1589. qp->dev->attr.max_pages_per_frmr) ||
  1590. (wr->wr.fast_reg.length > 0xffffffffULL))
  1591. return -EINVAL;
  1592. hdr->cw |= (OCRDMA_FR_MR << OCRDMA_WQE_OPCODE_SHIFT);
  1593. hdr->cw |= ((wqe_size / OCRDMA_WQE_STRIDE) << OCRDMA_WQE_SIZE_SHIFT);
  1594. if (wr->wr.fast_reg.page_list_len == 0)
  1595. BUG();
  1596. if (wr->wr.fast_reg.access_flags & IB_ACCESS_LOCAL_WRITE)
  1597. hdr->rsvd_lkey_flags |= OCRDMA_LKEY_FLAG_LOCAL_WR;
  1598. if (wr->wr.fast_reg.access_flags & IB_ACCESS_REMOTE_WRITE)
  1599. hdr->rsvd_lkey_flags |= OCRDMA_LKEY_FLAG_REMOTE_WR;
  1600. if (wr->wr.fast_reg.access_flags & IB_ACCESS_REMOTE_READ)
  1601. hdr->rsvd_lkey_flags |= OCRDMA_LKEY_FLAG_REMOTE_RD;
  1602. hdr->lkey = wr->wr.fast_reg.rkey;
  1603. hdr->total_len = wr->wr.fast_reg.length;
  1604. fbo = wr->wr.fast_reg.iova_start -
  1605. (wr->wr.fast_reg.page_list->page_list[0] & PAGE_MASK);
  1606. fast_reg->va_hi = upper_32_bits(wr->wr.fast_reg.iova_start);
  1607. fast_reg->va_lo = (u32) (wr->wr.fast_reg.iova_start & 0xffffffff);
  1608. fast_reg->fbo_hi = upper_32_bits(fbo);
  1609. fast_reg->fbo_lo = (u32) fbo & 0xffffffff;
  1610. fast_reg->num_sges = wr->wr.fast_reg.page_list_len;
  1611. fast_reg->size_sge =
  1612. get_encoded_page_size(1 << wr->wr.fast_reg.page_shift);
  1613. mr = (struct ocrdma_mr *)qp->dev->stag_arr[(hdr->lkey >> 8) &
  1614. (OCRDMA_MAX_STAG - 1)];
  1615. build_frmr_pbes(wr, mr->hwmr.pbl_table, &mr->hwmr);
  1616. return 0;
  1617. }
  1618. static void ocrdma_ring_sq_db(struct ocrdma_qp *qp)
  1619. {
  1620. u32 val = qp->sq.dbid | (1 << 16);
  1621. iowrite32(val, qp->sq_db);
  1622. }
  1623. int ocrdma_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
  1624. struct ib_send_wr **bad_wr)
  1625. {
  1626. int status = 0;
  1627. struct ocrdma_qp *qp = get_ocrdma_qp(ibqp);
  1628. struct ocrdma_hdr_wqe *hdr;
  1629. unsigned long flags;
  1630. spin_lock_irqsave(&qp->q_lock, flags);
  1631. if (qp->state != OCRDMA_QPS_RTS && qp->state != OCRDMA_QPS_SQD) {
  1632. spin_unlock_irqrestore(&qp->q_lock, flags);
  1633. *bad_wr = wr;
  1634. return -EINVAL;
  1635. }
  1636. while (wr) {
  1637. if (ocrdma_hwq_free_cnt(&qp->sq) == 0 ||
  1638. wr->num_sge > qp->sq.max_sges) {
  1639. *bad_wr = wr;
  1640. status = -ENOMEM;
  1641. break;
  1642. }
  1643. hdr = ocrdma_hwq_head(&qp->sq);
  1644. hdr->cw = 0;
  1645. if (wr->send_flags & IB_SEND_SIGNALED || qp->signaled)
  1646. hdr->cw |= (OCRDMA_FLAG_SIG << OCRDMA_WQE_FLAGS_SHIFT);
  1647. if (wr->send_flags & IB_SEND_FENCE)
  1648. hdr->cw |=
  1649. (OCRDMA_FLAG_FENCE_L << OCRDMA_WQE_FLAGS_SHIFT);
  1650. if (wr->send_flags & IB_SEND_SOLICITED)
  1651. hdr->cw |=
  1652. (OCRDMA_FLAG_SOLICIT << OCRDMA_WQE_FLAGS_SHIFT);
  1653. hdr->total_len = 0;
  1654. switch (wr->opcode) {
  1655. case IB_WR_SEND_WITH_IMM:
  1656. hdr->cw |= (OCRDMA_FLAG_IMM << OCRDMA_WQE_FLAGS_SHIFT);
  1657. hdr->immdt = ntohl(wr->ex.imm_data);
  1658. case IB_WR_SEND:
  1659. hdr->cw |= (OCRDMA_SEND << OCRDMA_WQE_OPCODE_SHIFT);
  1660. ocrdma_build_send(qp, hdr, wr);
  1661. break;
  1662. case IB_WR_SEND_WITH_INV:
  1663. hdr->cw |= (OCRDMA_FLAG_INV << OCRDMA_WQE_FLAGS_SHIFT);
  1664. hdr->cw |= (OCRDMA_SEND << OCRDMA_WQE_OPCODE_SHIFT);
  1665. hdr->lkey = wr->ex.invalidate_rkey;
  1666. status = ocrdma_build_send(qp, hdr, wr);
  1667. break;
  1668. case IB_WR_RDMA_WRITE_WITH_IMM:
  1669. hdr->cw |= (OCRDMA_FLAG_IMM << OCRDMA_WQE_FLAGS_SHIFT);
  1670. hdr->immdt = ntohl(wr->ex.imm_data);
  1671. case IB_WR_RDMA_WRITE:
  1672. hdr->cw |= (OCRDMA_WRITE << OCRDMA_WQE_OPCODE_SHIFT);
  1673. status = ocrdma_build_write(qp, hdr, wr);
  1674. break;
  1675. case IB_WR_RDMA_READ_WITH_INV:
  1676. hdr->cw |= (OCRDMA_FLAG_INV << OCRDMA_WQE_FLAGS_SHIFT);
  1677. case IB_WR_RDMA_READ:
  1678. ocrdma_build_read(qp, hdr, wr);
  1679. break;
  1680. case IB_WR_LOCAL_INV:
  1681. hdr->cw |=
  1682. (OCRDMA_LKEY_INV << OCRDMA_WQE_OPCODE_SHIFT);
  1683. hdr->cw |= ((sizeof(struct ocrdma_hdr_wqe) +
  1684. sizeof(struct ocrdma_sge)) /
  1685. OCRDMA_WQE_STRIDE) << OCRDMA_WQE_SIZE_SHIFT;
  1686. hdr->lkey = wr->ex.invalidate_rkey;
  1687. break;
  1688. case IB_WR_FAST_REG_MR:
  1689. status = ocrdma_build_fr(qp, hdr, wr);
  1690. break;
  1691. default:
  1692. status = -EINVAL;
  1693. break;
  1694. }
  1695. if (status) {
  1696. *bad_wr = wr;
  1697. break;
  1698. }
  1699. if (wr->send_flags & IB_SEND_SIGNALED || qp->signaled)
  1700. qp->wqe_wr_id_tbl[qp->sq.head].signaled = 1;
  1701. else
  1702. qp->wqe_wr_id_tbl[qp->sq.head].signaled = 0;
  1703. qp->wqe_wr_id_tbl[qp->sq.head].wrid = wr->wr_id;
  1704. ocrdma_cpu_to_le32(hdr, ((hdr->cw >> OCRDMA_WQE_SIZE_SHIFT) &
  1705. OCRDMA_WQE_SIZE_MASK) * OCRDMA_WQE_STRIDE);
  1706. /* make sure wqe is written before adapter can access it */
  1707. wmb();
  1708. /* inform hw to start processing it */
  1709. ocrdma_ring_sq_db(qp);
  1710. /* update pointer, counter for next wr */
  1711. ocrdma_hwq_inc_head(&qp->sq);
  1712. wr = wr->next;
  1713. }
  1714. spin_unlock_irqrestore(&qp->q_lock, flags);
  1715. return status;
  1716. }
  1717. static void ocrdma_ring_rq_db(struct ocrdma_qp *qp)
  1718. {
  1719. u32 val = qp->rq.dbid | (1 << ocrdma_get_num_posted_shift(qp));
  1720. if (qp->state != OCRDMA_QPS_INIT)
  1721. iowrite32(val, qp->rq_db);
  1722. else
  1723. qp->db_cache++;
  1724. }
  1725. static void ocrdma_build_rqe(struct ocrdma_hdr_wqe *rqe, struct ib_recv_wr *wr,
  1726. u16 tag)
  1727. {
  1728. u32 wqe_size = 0;
  1729. struct ocrdma_sge *sge;
  1730. if (wr->num_sge)
  1731. wqe_size = (wr->num_sge * sizeof(*sge)) + sizeof(*rqe);
  1732. else
  1733. wqe_size = sizeof(*sge) + sizeof(*rqe);
  1734. rqe->cw = ((wqe_size / OCRDMA_WQE_STRIDE) <<
  1735. OCRDMA_WQE_SIZE_SHIFT);
  1736. rqe->cw |= (OCRDMA_FLAG_SIG << OCRDMA_WQE_FLAGS_SHIFT);
  1737. rqe->cw |= (OCRDMA_TYPE_LKEY << OCRDMA_WQE_TYPE_SHIFT);
  1738. rqe->total_len = 0;
  1739. rqe->rsvd_tag = tag;
  1740. sge = (struct ocrdma_sge *)(rqe + 1);
  1741. ocrdma_build_sges(rqe, sge, wr->num_sge, wr->sg_list);
  1742. ocrdma_cpu_to_le32(rqe, wqe_size);
  1743. }
  1744. int ocrdma_post_recv(struct ib_qp *ibqp, struct ib_recv_wr *wr,
  1745. struct ib_recv_wr **bad_wr)
  1746. {
  1747. int status = 0;
  1748. unsigned long flags;
  1749. struct ocrdma_qp *qp = get_ocrdma_qp(ibqp);
  1750. struct ocrdma_hdr_wqe *rqe;
  1751. spin_lock_irqsave(&qp->q_lock, flags);
  1752. if (qp->state == OCRDMA_QPS_RST || qp->state == OCRDMA_QPS_ERR) {
  1753. spin_unlock_irqrestore(&qp->q_lock, flags);
  1754. *bad_wr = wr;
  1755. return -EINVAL;
  1756. }
  1757. while (wr) {
  1758. if (ocrdma_hwq_free_cnt(&qp->rq) == 0 ||
  1759. wr->num_sge > qp->rq.max_sges) {
  1760. *bad_wr = wr;
  1761. status = -ENOMEM;
  1762. break;
  1763. }
  1764. rqe = ocrdma_hwq_head(&qp->rq);
  1765. ocrdma_build_rqe(rqe, wr, 0);
  1766. qp->rqe_wr_id_tbl[qp->rq.head] = wr->wr_id;
  1767. /* make sure rqe is written before adapter can access it */
  1768. wmb();
  1769. /* inform hw to start processing it */
  1770. ocrdma_ring_rq_db(qp);
  1771. /* update pointer, counter for next wr */
  1772. ocrdma_hwq_inc_head(&qp->rq);
  1773. wr = wr->next;
  1774. }
  1775. spin_unlock_irqrestore(&qp->q_lock, flags);
  1776. return status;
  1777. }
  1778. /* cqe for srq's rqe can potentially arrive out of order.
  1779. * index gives the entry in the shadow table where to store
  1780. * the wr_id. tag/index is returned in cqe to reference back
  1781. * for a given rqe.
  1782. */
  1783. static int ocrdma_srq_get_idx(struct ocrdma_srq *srq)
  1784. {
  1785. int row = 0;
  1786. int indx = 0;
  1787. for (row = 0; row < srq->bit_fields_len; row++) {
  1788. if (srq->idx_bit_fields[row]) {
  1789. indx = ffs(srq->idx_bit_fields[row]);
  1790. indx = (row * 32) + (indx - 1);
  1791. if (indx >= srq->rq.max_cnt)
  1792. BUG();
  1793. ocrdma_srq_toggle_bit(srq, indx);
  1794. break;
  1795. }
  1796. }
  1797. if (row == srq->bit_fields_len)
  1798. BUG();
  1799. return indx;
  1800. }
  1801. static void ocrdma_ring_srq_db(struct ocrdma_srq *srq)
  1802. {
  1803. u32 val = srq->rq.dbid | (1 << 16);
  1804. iowrite32(val, srq->db + OCRDMA_DB_GEN2_SRQ_OFFSET);
  1805. }
  1806. int ocrdma_post_srq_recv(struct ib_srq *ibsrq, struct ib_recv_wr *wr,
  1807. struct ib_recv_wr **bad_wr)
  1808. {
  1809. int status = 0;
  1810. unsigned long flags;
  1811. struct ocrdma_srq *srq;
  1812. struct ocrdma_hdr_wqe *rqe;
  1813. u16 tag;
  1814. srq = get_ocrdma_srq(ibsrq);
  1815. spin_lock_irqsave(&srq->q_lock, flags);
  1816. while (wr) {
  1817. if (ocrdma_hwq_free_cnt(&srq->rq) == 0 ||
  1818. wr->num_sge > srq->rq.max_sges) {
  1819. status = -ENOMEM;
  1820. *bad_wr = wr;
  1821. break;
  1822. }
  1823. tag = ocrdma_srq_get_idx(srq);
  1824. rqe = ocrdma_hwq_head(&srq->rq);
  1825. ocrdma_build_rqe(rqe, wr, tag);
  1826. srq->rqe_wr_id_tbl[tag] = wr->wr_id;
  1827. /* make sure rqe is written before adapter can perform DMA */
  1828. wmb();
  1829. /* inform hw to start processing it */
  1830. ocrdma_ring_srq_db(srq);
  1831. /* update pointer, counter for next wr */
  1832. ocrdma_hwq_inc_head(&srq->rq);
  1833. wr = wr->next;
  1834. }
  1835. spin_unlock_irqrestore(&srq->q_lock, flags);
  1836. return status;
  1837. }
  1838. static enum ib_wc_status ocrdma_to_ibwc_err(u16 status)
  1839. {
  1840. enum ib_wc_status ibwc_status;
  1841. switch (status) {
  1842. case OCRDMA_CQE_GENERAL_ERR:
  1843. ibwc_status = IB_WC_GENERAL_ERR;
  1844. break;
  1845. case OCRDMA_CQE_LOC_LEN_ERR:
  1846. ibwc_status = IB_WC_LOC_LEN_ERR;
  1847. break;
  1848. case OCRDMA_CQE_LOC_QP_OP_ERR:
  1849. ibwc_status = IB_WC_LOC_QP_OP_ERR;
  1850. break;
  1851. case OCRDMA_CQE_LOC_EEC_OP_ERR:
  1852. ibwc_status = IB_WC_LOC_EEC_OP_ERR;
  1853. break;
  1854. case OCRDMA_CQE_LOC_PROT_ERR:
  1855. ibwc_status = IB_WC_LOC_PROT_ERR;
  1856. break;
  1857. case OCRDMA_CQE_WR_FLUSH_ERR:
  1858. ibwc_status = IB_WC_WR_FLUSH_ERR;
  1859. break;
  1860. case OCRDMA_CQE_MW_BIND_ERR:
  1861. ibwc_status = IB_WC_MW_BIND_ERR;
  1862. break;
  1863. case OCRDMA_CQE_BAD_RESP_ERR:
  1864. ibwc_status = IB_WC_BAD_RESP_ERR;
  1865. break;
  1866. case OCRDMA_CQE_LOC_ACCESS_ERR:
  1867. ibwc_status = IB_WC_LOC_ACCESS_ERR;
  1868. break;
  1869. case OCRDMA_CQE_REM_INV_REQ_ERR:
  1870. ibwc_status = IB_WC_REM_INV_REQ_ERR;
  1871. break;
  1872. case OCRDMA_CQE_REM_ACCESS_ERR:
  1873. ibwc_status = IB_WC_REM_ACCESS_ERR;
  1874. break;
  1875. case OCRDMA_CQE_REM_OP_ERR:
  1876. ibwc_status = IB_WC_REM_OP_ERR;
  1877. break;
  1878. case OCRDMA_CQE_RETRY_EXC_ERR:
  1879. ibwc_status = IB_WC_RETRY_EXC_ERR;
  1880. break;
  1881. case OCRDMA_CQE_RNR_RETRY_EXC_ERR:
  1882. ibwc_status = IB_WC_RNR_RETRY_EXC_ERR;
  1883. break;
  1884. case OCRDMA_CQE_LOC_RDD_VIOL_ERR:
  1885. ibwc_status = IB_WC_LOC_RDD_VIOL_ERR;
  1886. break;
  1887. case OCRDMA_CQE_REM_INV_RD_REQ_ERR:
  1888. ibwc_status = IB_WC_REM_INV_RD_REQ_ERR;
  1889. break;
  1890. case OCRDMA_CQE_REM_ABORT_ERR:
  1891. ibwc_status = IB_WC_REM_ABORT_ERR;
  1892. break;
  1893. case OCRDMA_CQE_INV_EECN_ERR:
  1894. ibwc_status = IB_WC_INV_EECN_ERR;
  1895. break;
  1896. case OCRDMA_CQE_INV_EEC_STATE_ERR:
  1897. ibwc_status = IB_WC_INV_EEC_STATE_ERR;
  1898. break;
  1899. case OCRDMA_CQE_FATAL_ERR:
  1900. ibwc_status = IB_WC_FATAL_ERR;
  1901. break;
  1902. case OCRDMA_CQE_RESP_TIMEOUT_ERR:
  1903. ibwc_status = IB_WC_RESP_TIMEOUT_ERR;
  1904. break;
  1905. default:
  1906. ibwc_status = IB_WC_GENERAL_ERR;
  1907. break;
  1908. };
  1909. return ibwc_status;
  1910. }
  1911. static void ocrdma_update_wc(struct ocrdma_qp *qp, struct ib_wc *ibwc,
  1912. u32 wqe_idx)
  1913. {
  1914. struct ocrdma_hdr_wqe *hdr;
  1915. struct ocrdma_sge *rw;
  1916. int opcode;
  1917. hdr = ocrdma_hwq_head_from_idx(&qp->sq, wqe_idx);
  1918. ibwc->wr_id = qp->wqe_wr_id_tbl[wqe_idx].wrid;
  1919. /* Undo the hdr->cw swap */
  1920. opcode = le32_to_cpu(hdr->cw) & OCRDMA_WQE_OPCODE_MASK;
  1921. switch (opcode) {
  1922. case OCRDMA_WRITE:
  1923. ibwc->opcode = IB_WC_RDMA_WRITE;
  1924. break;
  1925. case OCRDMA_READ:
  1926. rw = (struct ocrdma_sge *)(hdr + 1);
  1927. ibwc->opcode = IB_WC_RDMA_READ;
  1928. ibwc->byte_len = rw->len;
  1929. break;
  1930. case OCRDMA_SEND:
  1931. ibwc->opcode = IB_WC_SEND;
  1932. break;
  1933. case OCRDMA_FR_MR:
  1934. ibwc->opcode = IB_WC_FAST_REG_MR;
  1935. break;
  1936. case OCRDMA_LKEY_INV:
  1937. ibwc->opcode = IB_WC_LOCAL_INV;
  1938. break;
  1939. default:
  1940. ibwc->status = IB_WC_GENERAL_ERR;
  1941. pr_err("%s() invalid opcode received = 0x%x\n",
  1942. __func__, hdr->cw & OCRDMA_WQE_OPCODE_MASK);
  1943. break;
  1944. };
  1945. }
  1946. static void ocrdma_set_cqe_status_flushed(struct ocrdma_qp *qp,
  1947. struct ocrdma_cqe *cqe)
  1948. {
  1949. if (is_cqe_for_sq(cqe)) {
  1950. cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
  1951. cqe->flags_status_srcqpn) &
  1952. ~OCRDMA_CQE_STATUS_MASK);
  1953. cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
  1954. cqe->flags_status_srcqpn) |
  1955. (OCRDMA_CQE_WR_FLUSH_ERR <<
  1956. OCRDMA_CQE_STATUS_SHIFT));
  1957. } else {
  1958. if (qp->qp_type == IB_QPT_UD || qp->qp_type == IB_QPT_GSI) {
  1959. cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
  1960. cqe->flags_status_srcqpn) &
  1961. ~OCRDMA_CQE_UD_STATUS_MASK);
  1962. cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
  1963. cqe->flags_status_srcqpn) |
  1964. (OCRDMA_CQE_WR_FLUSH_ERR <<
  1965. OCRDMA_CQE_UD_STATUS_SHIFT));
  1966. } else {
  1967. cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
  1968. cqe->flags_status_srcqpn) &
  1969. ~OCRDMA_CQE_STATUS_MASK);
  1970. cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
  1971. cqe->flags_status_srcqpn) |
  1972. (OCRDMA_CQE_WR_FLUSH_ERR <<
  1973. OCRDMA_CQE_STATUS_SHIFT));
  1974. }
  1975. }
  1976. }
  1977. static bool ocrdma_update_err_cqe(struct ib_wc *ibwc, struct ocrdma_cqe *cqe,
  1978. struct ocrdma_qp *qp, int status)
  1979. {
  1980. bool expand = false;
  1981. ibwc->byte_len = 0;
  1982. ibwc->qp = &qp->ibqp;
  1983. ibwc->status = ocrdma_to_ibwc_err(status);
  1984. ocrdma_flush_qp(qp);
  1985. ocrdma_qp_state_change(qp, IB_QPS_ERR, NULL);
  1986. /* if wqe/rqe pending for which cqe needs to be returned,
  1987. * trigger inflating it.
  1988. */
  1989. if (!is_hw_rq_empty(qp) || !is_hw_sq_empty(qp)) {
  1990. expand = true;
  1991. ocrdma_set_cqe_status_flushed(qp, cqe);
  1992. }
  1993. return expand;
  1994. }
  1995. static int ocrdma_update_err_rcqe(struct ib_wc *ibwc, struct ocrdma_cqe *cqe,
  1996. struct ocrdma_qp *qp, int status)
  1997. {
  1998. ibwc->opcode = IB_WC_RECV;
  1999. ibwc->wr_id = qp->rqe_wr_id_tbl[qp->rq.tail];
  2000. ocrdma_hwq_inc_tail(&qp->rq);
  2001. return ocrdma_update_err_cqe(ibwc, cqe, qp, status);
  2002. }
  2003. static int ocrdma_update_err_scqe(struct ib_wc *ibwc, struct ocrdma_cqe *cqe,
  2004. struct ocrdma_qp *qp, int status)
  2005. {
  2006. ocrdma_update_wc(qp, ibwc, qp->sq.tail);
  2007. ocrdma_hwq_inc_tail(&qp->sq);
  2008. return ocrdma_update_err_cqe(ibwc, cqe, qp, status);
  2009. }
  2010. static bool ocrdma_poll_err_scqe(struct ocrdma_qp *qp,
  2011. struct ocrdma_cqe *cqe, struct ib_wc *ibwc,
  2012. bool *polled, bool *stop)
  2013. {
  2014. bool expand;
  2015. int status = (le32_to_cpu(cqe->flags_status_srcqpn) &
  2016. OCRDMA_CQE_STATUS_MASK) >> OCRDMA_CQE_STATUS_SHIFT;
  2017. /* when hw sq is empty, but rq is not empty, so we continue
  2018. * to keep the cqe in order to get the cq event again.
  2019. */
  2020. if (is_hw_sq_empty(qp) && !is_hw_rq_empty(qp)) {
  2021. /* when cq for rq and sq is same, it is safe to return
  2022. * flush cqe for RQEs.
  2023. */
  2024. if (!qp->srq && (qp->sq_cq == qp->rq_cq)) {
  2025. *polled = true;
  2026. status = OCRDMA_CQE_WR_FLUSH_ERR;
  2027. expand = ocrdma_update_err_rcqe(ibwc, cqe, qp, status);
  2028. } else {
  2029. /* stop processing further cqe as this cqe is used for
  2030. * triggering cq event on buddy cq of RQ.
  2031. * When QP is destroyed, this cqe will be removed
  2032. * from the cq's hardware q.
  2033. */
  2034. *polled = false;
  2035. *stop = true;
  2036. expand = false;
  2037. }
  2038. } else {
  2039. *polled = true;
  2040. expand = ocrdma_update_err_scqe(ibwc, cqe, qp, status);
  2041. }
  2042. return expand;
  2043. }
  2044. static bool ocrdma_poll_success_scqe(struct ocrdma_qp *qp,
  2045. struct ocrdma_cqe *cqe,
  2046. struct ib_wc *ibwc, bool *polled)
  2047. {
  2048. bool expand = false;
  2049. int tail = qp->sq.tail;
  2050. u32 wqe_idx;
  2051. if (!qp->wqe_wr_id_tbl[tail].signaled) {
  2052. *polled = false; /* WC cannot be consumed yet */
  2053. } else {
  2054. ibwc->status = IB_WC_SUCCESS;
  2055. ibwc->wc_flags = 0;
  2056. ibwc->qp = &qp->ibqp;
  2057. ocrdma_update_wc(qp, ibwc, tail);
  2058. *polled = true;
  2059. }
  2060. wqe_idx = (le32_to_cpu(cqe->wq.wqeidx) &
  2061. OCRDMA_CQE_WQEIDX_MASK) & qp->sq.max_wqe_idx;
  2062. if (tail != wqe_idx)
  2063. expand = true; /* Coalesced CQE can't be consumed yet */
  2064. ocrdma_hwq_inc_tail(&qp->sq);
  2065. return expand;
  2066. }
  2067. static bool ocrdma_poll_scqe(struct ocrdma_qp *qp, struct ocrdma_cqe *cqe,
  2068. struct ib_wc *ibwc, bool *polled, bool *stop)
  2069. {
  2070. int status;
  2071. bool expand;
  2072. status = (le32_to_cpu(cqe->flags_status_srcqpn) &
  2073. OCRDMA_CQE_STATUS_MASK) >> OCRDMA_CQE_STATUS_SHIFT;
  2074. if (status == OCRDMA_CQE_SUCCESS)
  2075. expand = ocrdma_poll_success_scqe(qp, cqe, ibwc, polled);
  2076. else
  2077. expand = ocrdma_poll_err_scqe(qp, cqe, ibwc, polled, stop);
  2078. return expand;
  2079. }
  2080. static int ocrdma_update_ud_rcqe(struct ib_wc *ibwc, struct ocrdma_cqe *cqe)
  2081. {
  2082. int status;
  2083. status = (le32_to_cpu(cqe->flags_status_srcqpn) &
  2084. OCRDMA_CQE_UD_STATUS_MASK) >> OCRDMA_CQE_UD_STATUS_SHIFT;
  2085. ibwc->src_qp = le32_to_cpu(cqe->flags_status_srcqpn) &
  2086. OCRDMA_CQE_SRCQP_MASK;
  2087. ibwc->pkey_index = le32_to_cpu(cqe->ud.rxlen_pkey) &
  2088. OCRDMA_CQE_PKEY_MASK;
  2089. ibwc->wc_flags = IB_WC_GRH;
  2090. ibwc->byte_len = (le32_to_cpu(cqe->ud.rxlen_pkey) >>
  2091. OCRDMA_CQE_UD_XFER_LEN_SHIFT);
  2092. return status;
  2093. }
  2094. static void ocrdma_update_free_srq_cqe(struct ib_wc *ibwc,
  2095. struct ocrdma_cqe *cqe,
  2096. struct ocrdma_qp *qp)
  2097. {
  2098. unsigned long flags;
  2099. struct ocrdma_srq *srq;
  2100. u32 wqe_idx;
  2101. srq = get_ocrdma_srq(qp->ibqp.srq);
  2102. wqe_idx = (le32_to_cpu(cqe->rq.buftag_qpn) >>
  2103. OCRDMA_CQE_BUFTAG_SHIFT) & srq->rq.max_wqe_idx;
  2104. ibwc->wr_id = srq->rqe_wr_id_tbl[wqe_idx];
  2105. spin_lock_irqsave(&srq->q_lock, flags);
  2106. ocrdma_srq_toggle_bit(srq, wqe_idx);
  2107. spin_unlock_irqrestore(&srq->q_lock, flags);
  2108. ocrdma_hwq_inc_tail(&srq->rq);
  2109. }
  2110. static bool ocrdma_poll_err_rcqe(struct ocrdma_qp *qp, struct ocrdma_cqe *cqe,
  2111. struct ib_wc *ibwc, bool *polled, bool *stop,
  2112. int status)
  2113. {
  2114. bool expand;
  2115. /* when hw_rq is empty, but wq is not empty, so continue
  2116. * to keep the cqe to get the cq event again.
  2117. */
  2118. if (is_hw_rq_empty(qp) && !is_hw_sq_empty(qp)) {
  2119. if (!qp->srq && (qp->sq_cq == qp->rq_cq)) {
  2120. *polled = true;
  2121. status = OCRDMA_CQE_WR_FLUSH_ERR;
  2122. expand = ocrdma_update_err_scqe(ibwc, cqe, qp, status);
  2123. } else {
  2124. *polled = false;
  2125. *stop = true;
  2126. expand = false;
  2127. }
  2128. } else {
  2129. *polled = true;
  2130. expand = ocrdma_update_err_rcqe(ibwc, cqe, qp, status);
  2131. }
  2132. return expand;
  2133. }
  2134. static void ocrdma_poll_success_rcqe(struct ocrdma_qp *qp,
  2135. struct ocrdma_cqe *cqe, struct ib_wc *ibwc)
  2136. {
  2137. ibwc->opcode = IB_WC_RECV;
  2138. ibwc->qp = &qp->ibqp;
  2139. ibwc->status = IB_WC_SUCCESS;
  2140. if (qp->qp_type == IB_QPT_UD || qp->qp_type == IB_QPT_GSI)
  2141. ocrdma_update_ud_rcqe(ibwc, cqe);
  2142. else
  2143. ibwc->byte_len = le32_to_cpu(cqe->rq.rxlen);
  2144. if (is_cqe_imm(cqe)) {
  2145. ibwc->ex.imm_data = htonl(le32_to_cpu(cqe->rq.lkey_immdt));
  2146. ibwc->wc_flags |= IB_WC_WITH_IMM;
  2147. } else if (is_cqe_wr_imm(cqe)) {
  2148. ibwc->opcode = IB_WC_RECV_RDMA_WITH_IMM;
  2149. ibwc->ex.imm_data = htonl(le32_to_cpu(cqe->rq.lkey_immdt));
  2150. ibwc->wc_flags |= IB_WC_WITH_IMM;
  2151. } else if (is_cqe_invalidated(cqe)) {
  2152. ibwc->ex.invalidate_rkey = le32_to_cpu(cqe->rq.lkey_immdt);
  2153. ibwc->wc_flags |= IB_WC_WITH_INVALIDATE;
  2154. }
  2155. if (qp->ibqp.srq) {
  2156. ocrdma_update_free_srq_cqe(ibwc, cqe, qp);
  2157. } else {
  2158. ibwc->wr_id = qp->rqe_wr_id_tbl[qp->rq.tail];
  2159. ocrdma_hwq_inc_tail(&qp->rq);
  2160. }
  2161. }
  2162. static bool ocrdma_poll_rcqe(struct ocrdma_qp *qp, struct ocrdma_cqe *cqe,
  2163. struct ib_wc *ibwc, bool *polled, bool *stop)
  2164. {
  2165. int status;
  2166. bool expand = false;
  2167. ibwc->wc_flags = 0;
  2168. if (qp->qp_type == IB_QPT_UD || qp->qp_type == IB_QPT_GSI) {
  2169. status = (le32_to_cpu(cqe->flags_status_srcqpn) &
  2170. OCRDMA_CQE_UD_STATUS_MASK) >>
  2171. OCRDMA_CQE_UD_STATUS_SHIFT;
  2172. } else {
  2173. status = (le32_to_cpu(cqe->flags_status_srcqpn) &
  2174. OCRDMA_CQE_STATUS_MASK) >> OCRDMA_CQE_STATUS_SHIFT;
  2175. }
  2176. if (status == OCRDMA_CQE_SUCCESS) {
  2177. *polled = true;
  2178. ocrdma_poll_success_rcqe(qp, cqe, ibwc);
  2179. } else {
  2180. expand = ocrdma_poll_err_rcqe(qp, cqe, ibwc, polled, stop,
  2181. status);
  2182. }
  2183. return expand;
  2184. }
  2185. static void ocrdma_change_cq_phase(struct ocrdma_cq *cq, struct ocrdma_cqe *cqe,
  2186. u16 cur_getp)
  2187. {
  2188. if (cq->phase_change) {
  2189. if (cur_getp == 0)
  2190. cq->phase = (~cq->phase & OCRDMA_CQE_VALID);
  2191. } else {
  2192. /* clear valid bit */
  2193. cqe->flags_status_srcqpn = 0;
  2194. }
  2195. }
  2196. static int ocrdma_poll_hwcq(struct ocrdma_cq *cq, int num_entries,
  2197. struct ib_wc *ibwc)
  2198. {
  2199. u16 qpn = 0;
  2200. int i = 0;
  2201. bool expand = false;
  2202. int polled_hw_cqes = 0;
  2203. struct ocrdma_qp *qp = NULL;
  2204. struct ocrdma_dev *dev = get_ocrdma_dev(cq->ibcq.device);
  2205. struct ocrdma_cqe *cqe;
  2206. u16 cur_getp; bool polled = false; bool stop = false;
  2207. cur_getp = cq->getp;
  2208. while (num_entries) {
  2209. cqe = cq->va + cur_getp;
  2210. /* check whether valid cqe or not */
  2211. if (!is_cqe_valid(cq, cqe))
  2212. break;
  2213. qpn = (le32_to_cpu(cqe->cmn.qpn) & OCRDMA_CQE_QPN_MASK);
  2214. /* ignore discarded cqe */
  2215. if (qpn == 0)
  2216. goto skip_cqe;
  2217. qp = dev->qp_tbl[qpn];
  2218. BUG_ON(qp == NULL);
  2219. if (is_cqe_for_sq(cqe)) {
  2220. expand = ocrdma_poll_scqe(qp, cqe, ibwc, &polled,
  2221. &stop);
  2222. } else {
  2223. expand = ocrdma_poll_rcqe(qp, cqe, ibwc, &polled,
  2224. &stop);
  2225. }
  2226. if (expand)
  2227. goto expand_cqe;
  2228. if (stop)
  2229. goto stop_cqe;
  2230. /* clear qpn to avoid duplicate processing by discard_cqe() */
  2231. cqe->cmn.qpn = 0;
  2232. skip_cqe:
  2233. polled_hw_cqes += 1;
  2234. cur_getp = (cur_getp + 1) % cq->max_hw_cqe;
  2235. ocrdma_change_cq_phase(cq, cqe, cur_getp);
  2236. expand_cqe:
  2237. if (polled) {
  2238. num_entries -= 1;
  2239. i += 1;
  2240. ibwc = ibwc + 1;
  2241. polled = false;
  2242. }
  2243. }
  2244. stop_cqe:
  2245. cq->getp = cur_getp;
  2246. if (polled_hw_cqes || expand || stop) {
  2247. ocrdma_ring_cq_db(dev, cq->id, cq->armed, cq->solicited,
  2248. polled_hw_cqes);
  2249. }
  2250. return i;
  2251. }
  2252. /* insert error cqe if the QP's SQ or RQ's CQ matches the CQ under poll. */
  2253. static int ocrdma_add_err_cqe(struct ocrdma_cq *cq, int num_entries,
  2254. struct ocrdma_qp *qp, struct ib_wc *ibwc)
  2255. {
  2256. int err_cqes = 0;
  2257. while (num_entries) {
  2258. if (is_hw_sq_empty(qp) && is_hw_rq_empty(qp))
  2259. break;
  2260. if (!is_hw_sq_empty(qp) && qp->sq_cq == cq) {
  2261. ocrdma_update_wc(qp, ibwc, qp->sq.tail);
  2262. ocrdma_hwq_inc_tail(&qp->sq);
  2263. } else if (!is_hw_rq_empty(qp) && qp->rq_cq == cq) {
  2264. ibwc->wr_id = qp->rqe_wr_id_tbl[qp->rq.tail];
  2265. ocrdma_hwq_inc_tail(&qp->rq);
  2266. } else {
  2267. return err_cqes;
  2268. }
  2269. ibwc->byte_len = 0;
  2270. ibwc->status = IB_WC_WR_FLUSH_ERR;
  2271. ibwc = ibwc + 1;
  2272. err_cqes += 1;
  2273. num_entries -= 1;
  2274. }
  2275. return err_cqes;
  2276. }
  2277. int ocrdma_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *wc)
  2278. {
  2279. int cqes_to_poll = num_entries;
  2280. struct ocrdma_cq *cq = get_ocrdma_cq(ibcq);
  2281. struct ocrdma_dev *dev = get_ocrdma_dev(ibcq->device);
  2282. int num_os_cqe = 0, err_cqes = 0;
  2283. struct ocrdma_qp *qp;
  2284. unsigned long flags;
  2285. /* poll cqes from adapter CQ */
  2286. spin_lock_irqsave(&cq->cq_lock, flags);
  2287. num_os_cqe = ocrdma_poll_hwcq(cq, cqes_to_poll, wc);
  2288. spin_unlock_irqrestore(&cq->cq_lock, flags);
  2289. cqes_to_poll -= num_os_cqe;
  2290. if (cqes_to_poll) {
  2291. wc = wc + num_os_cqe;
  2292. /* adapter returns single error cqe when qp moves to
  2293. * error state. So insert error cqes with wc_status as
  2294. * FLUSHED for pending WQEs and RQEs of QP's SQ and RQ
  2295. * respectively which uses this CQ.
  2296. */
  2297. spin_lock_irqsave(&dev->flush_q_lock, flags);
  2298. list_for_each_entry(qp, &cq->sq_head, sq_entry) {
  2299. if (cqes_to_poll == 0)
  2300. break;
  2301. err_cqes = ocrdma_add_err_cqe(cq, cqes_to_poll, qp, wc);
  2302. cqes_to_poll -= err_cqes;
  2303. num_os_cqe += err_cqes;
  2304. wc = wc + err_cqes;
  2305. }
  2306. spin_unlock_irqrestore(&dev->flush_q_lock, flags);
  2307. }
  2308. return num_os_cqe;
  2309. }
  2310. int ocrdma_arm_cq(struct ib_cq *ibcq, enum ib_cq_notify_flags cq_flags)
  2311. {
  2312. struct ocrdma_cq *cq = get_ocrdma_cq(ibcq);
  2313. struct ocrdma_dev *dev = get_ocrdma_dev(ibcq->device);
  2314. u16 cq_id;
  2315. u16 cur_getp;
  2316. struct ocrdma_cqe *cqe;
  2317. unsigned long flags;
  2318. cq_id = cq->id;
  2319. spin_lock_irqsave(&cq->cq_lock, flags);
  2320. if (cq_flags & IB_CQ_NEXT_COMP || cq_flags & IB_CQ_SOLICITED)
  2321. cq->armed = true;
  2322. if (cq_flags & IB_CQ_SOLICITED)
  2323. cq->solicited = true;
  2324. cur_getp = cq->getp;
  2325. cqe = cq->va + cur_getp;
  2326. /* check whether any valid cqe exist or not, if not then safe to
  2327. * arm. If cqe is not yet consumed, then let it get consumed and then
  2328. * we arm it to avoid false interrupts.
  2329. */
  2330. if (!is_cqe_valid(cq, cqe) || cq->arm_needed) {
  2331. cq->arm_needed = false;
  2332. ocrdma_ring_cq_db(dev, cq_id, cq->armed, cq->solicited, 0);
  2333. }
  2334. spin_unlock_irqrestore(&cq->cq_lock, flags);
  2335. return 0;
  2336. }
  2337. struct ib_mr *ocrdma_alloc_frmr(struct ib_pd *ibpd, int max_page_list_len)
  2338. {
  2339. int status;
  2340. struct ocrdma_mr *mr;
  2341. struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
  2342. struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
  2343. if (max_page_list_len > dev->attr.max_pages_per_frmr)
  2344. return ERR_PTR(-EINVAL);
  2345. mr = kzalloc(sizeof(*mr), GFP_KERNEL);
  2346. if (!mr)
  2347. return ERR_PTR(-ENOMEM);
  2348. status = ocrdma_get_pbl_info(dev, mr, max_page_list_len);
  2349. if (status)
  2350. goto pbl_err;
  2351. mr->hwmr.fr_mr = 1;
  2352. mr->hwmr.remote_rd = 0;
  2353. mr->hwmr.remote_wr = 0;
  2354. mr->hwmr.local_rd = 0;
  2355. mr->hwmr.local_wr = 0;
  2356. mr->hwmr.mw_bind = 0;
  2357. status = ocrdma_build_pbl_tbl(dev, &mr->hwmr);
  2358. if (status)
  2359. goto pbl_err;
  2360. status = ocrdma_reg_mr(dev, &mr->hwmr, pd->id, 0);
  2361. if (status)
  2362. goto mbx_err;
  2363. mr->ibmr.rkey = mr->hwmr.lkey;
  2364. mr->ibmr.lkey = mr->hwmr.lkey;
  2365. dev->stag_arr[(mr->hwmr.lkey >> 8) & (OCRDMA_MAX_STAG - 1)] = (u64) mr;
  2366. return &mr->ibmr;
  2367. mbx_err:
  2368. ocrdma_free_mr_pbl_tbl(dev, &mr->hwmr);
  2369. pbl_err:
  2370. kfree(mr);
  2371. return ERR_PTR(-ENOMEM);
  2372. }
  2373. struct ib_fast_reg_page_list *ocrdma_alloc_frmr_page_list(struct ib_device
  2374. *ibdev,
  2375. int page_list_len)
  2376. {
  2377. struct ib_fast_reg_page_list *frmr_list;
  2378. int size;
  2379. size = sizeof(*frmr_list) + (page_list_len * sizeof(u64));
  2380. frmr_list = kzalloc(size, GFP_KERNEL);
  2381. if (!frmr_list)
  2382. return ERR_PTR(-ENOMEM);
  2383. frmr_list->page_list = (u64 *)(frmr_list + 1);
  2384. return frmr_list;
  2385. }
  2386. void ocrdma_free_frmr_page_list(struct ib_fast_reg_page_list *page_list)
  2387. {
  2388. kfree(page_list);
  2389. }