acpi.c 15 KB

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  1. #include <linux/pci.h>
  2. #include <linux/acpi.h>
  3. #include <linux/init.h>
  4. #include <linux/irq.h>
  5. #include <linux/dmi.h>
  6. #include <linux/slab.h>
  7. #include <asm/numa.h>
  8. #include <asm/pci_x86.h>
  9. struct pci_root_info {
  10. struct acpi_device *bridge;
  11. char name[16];
  12. unsigned int res_num;
  13. struct resource *res;
  14. resource_size_t *res_offset;
  15. struct pci_sysdata sd;
  16. #ifdef CONFIG_PCI_MMCONFIG
  17. bool mcfg_added;
  18. u16 segment;
  19. u8 start_bus;
  20. u8 end_bus;
  21. #endif
  22. };
  23. static bool pci_use_crs = true;
  24. static bool pci_ignore_seg = false;
  25. static int __init set_use_crs(const struct dmi_system_id *id)
  26. {
  27. pci_use_crs = true;
  28. return 0;
  29. }
  30. static int __init set_nouse_crs(const struct dmi_system_id *id)
  31. {
  32. pci_use_crs = false;
  33. return 0;
  34. }
  35. static int __init set_ignore_seg(const struct dmi_system_id *id)
  36. {
  37. printk(KERN_INFO "PCI: %s detected: ignoring ACPI _SEG\n", id->ident);
  38. pci_ignore_seg = true;
  39. return 0;
  40. }
  41. static const struct dmi_system_id pci_crs_quirks[] __initconst = {
  42. /* http://bugzilla.kernel.org/show_bug.cgi?id=14183 */
  43. {
  44. .callback = set_use_crs,
  45. .ident = "IBM System x3800",
  46. .matches = {
  47. DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
  48. DMI_MATCH(DMI_PRODUCT_NAME, "x3800"),
  49. },
  50. },
  51. /* https://bugzilla.kernel.org/show_bug.cgi?id=16007 */
  52. /* 2006 AMD HT/VIA system with two host bridges */
  53. {
  54. .callback = set_use_crs,
  55. .ident = "ASRock ALiveSATA2-GLAN",
  56. .matches = {
  57. DMI_MATCH(DMI_PRODUCT_NAME, "ALiveSATA2-GLAN"),
  58. },
  59. },
  60. /* https://bugzilla.kernel.org/show_bug.cgi?id=30552 */
  61. /* 2006 AMD HT/VIA system with two host bridges */
  62. {
  63. .callback = set_use_crs,
  64. .ident = "ASUS M2V-MX SE",
  65. .matches = {
  66. DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
  67. DMI_MATCH(DMI_BOARD_NAME, "M2V-MX SE"),
  68. DMI_MATCH(DMI_BIOS_VENDOR, "American Megatrends Inc."),
  69. },
  70. },
  71. /* https://bugzilla.kernel.org/show_bug.cgi?id=42619 */
  72. {
  73. .callback = set_use_crs,
  74. .ident = "MSI MS-7253",
  75. .matches = {
  76. DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
  77. DMI_MATCH(DMI_BOARD_NAME, "MS-7253"),
  78. DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies, LTD"),
  79. },
  80. },
  81. /* Now for the blacklist.. */
  82. /* https://bugzilla.redhat.com/show_bug.cgi?id=769657 */
  83. {
  84. .callback = set_nouse_crs,
  85. .ident = "Dell Studio 1557",
  86. .matches = {
  87. DMI_MATCH(DMI_BOARD_VENDOR, "Dell Inc."),
  88. DMI_MATCH(DMI_PRODUCT_NAME, "Studio 1557"),
  89. DMI_MATCH(DMI_BIOS_VERSION, "A09"),
  90. },
  91. },
  92. /* https://bugzilla.redhat.com/show_bug.cgi?id=769657 */
  93. {
  94. .callback = set_nouse_crs,
  95. .ident = "Thinkpad SL510",
  96. .matches = {
  97. DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"),
  98. DMI_MATCH(DMI_BOARD_NAME, "2847DFG"),
  99. DMI_MATCH(DMI_BIOS_VERSION, "6JET85WW (1.43 )"),
  100. },
  101. },
  102. /* https://bugzilla.kernel.org/show_bug.cgi?id=15362 */
  103. {
  104. .callback = set_ignore_seg,
  105. .ident = "HP xw9300",
  106. .matches = {
  107. DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
  108. DMI_MATCH(DMI_PRODUCT_NAME, "HP xw9300 Workstation"),
  109. },
  110. },
  111. {}
  112. };
  113. void __init pci_acpi_crs_quirks(void)
  114. {
  115. int year;
  116. if (dmi_get_date(DMI_BIOS_DATE, &year, NULL, NULL) && year < 2008)
  117. pci_use_crs = false;
  118. dmi_check_system(pci_crs_quirks);
  119. /*
  120. * If the user specifies "pci=use_crs" or "pci=nocrs" explicitly, that
  121. * takes precedence over anything we figured out above.
  122. */
  123. if (pci_probe & PCI_ROOT_NO_CRS)
  124. pci_use_crs = false;
  125. else if (pci_probe & PCI_USE__CRS)
  126. pci_use_crs = true;
  127. printk(KERN_INFO "PCI: %s host bridge windows from ACPI; "
  128. "if necessary, use \"pci=%s\" and report a bug\n",
  129. pci_use_crs ? "Using" : "Ignoring",
  130. pci_use_crs ? "nocrs" : "use_crs");
  131. }
  132. #ifdef CONFIG_PCI_MMCONFIG
  133. static int check_segment(u16 seg, struct device *dev, char *estr)
  134. {
  135. if (seg) {
  136. dev_err(dev,
  137. "%s can't access PCI configuration "
  138. "space under this host bridge.\n",
  139. estr);
  140. return -EIO;
  141. }
  142. /*
  143. * Failure in adding MMCFG information is not fatal,
  144. * just can't access extended configuration space of
  145. * devices under this host bridge.
  146. */
  147. dev_warn(dev,
  148. "%s can't access extended PCI configuration "
  149. "space under this bridge.\n",
  150. estr);
  151. return 0;
  152. }
  153. static int setup_mcfg_map(struct pci_root_info *info, u16 seg, u8 start,
  154. u8 end, phys_addr_t addr)
  155. {
  156. int result;
  157. struct device *dev = &info->bridge->dev;
  158. info->start_bus = start;
  159. info->end_bus = end;
  160. info->mcfg_added = false;
  161. /* return success if MMCFG is not in use */
  162. if (raw_pci_ext_ops && raw_pci_ext_ops != &pci_mmcfg)
  163. return 0;
  164. if (!(pci_probe & PCI_PROBE_MMCONF))
  165. return check_segment(seg, dev, "MMCONFIG is disabled,");
  166. result = pci_mmconfig_insert(dev, seg, start, end, addr);
  167. if (result == 0) {
  168. /* enable MMCFG if it hasn't been enabled yet */
  169. if (raw_pci_ext_ops == NULL)
  170. raw_pci_ext_ops = &pci_mmcfg;
  171. info->mcfg_added = true;
  172. } else if (result != -EEXIST)
  173. return check_segment(seg, dev,
  174. "fail to add MMCONFIG information,");
  175. return 0;
  176. }
  177. static void teardown_mcfg_map(struct pci_root_info *info)
  178. {
  179. if (info->mcfg_added) {
  180. pci_mmconfig_delete(info->segment, info->start_bus,
  181. info->end_bus);
  182. info->mcfg_added = false;
  183. }
  184. }
  185. #else
  186. static int setup_mcfg_map(struct pci_root_info *info,
  187. u16 seg, u8 start, u8 end,
  188. phys_addr_t addr)
  189. {
  190. return 0;
  191. }
  192. static void teardown_mcfg_map(struct pci_root_info *info)
  193. {
  194. }
  195. #endif
  196. static acpi_status
  197. resource_to_addr(struct acpi_resource *resource,
  198. struct acpi_resource_address64 *addr)
  199. {
  200. acpi_status status;
  201. struct acpi_resource_memory24 *memory24;
  202. struct acpi_resource_memory32 *memory32;
  203. struct acpi_resource_fixed_memory32 *fixed_memory32;
  204. memset(addr, 0, sizeof(*addr));
  205. switch (resource->type) {
  206. case ACPI_RESOURCE_TYPE_MEMORY24:
  207. memory24 = &resource->data.memory24;
  208. addr->resource_type = ACPI_MEMORY_RANGE;
  209. addr->minimum = memory24->minimum;
  210. addr->address_length = memory24->address_length;
  211. addr->maximum = addr->minimum + addr->address_length - 1;
  212. return AE_OK;
  213. case ACPI_RESOURCE_TYPE_MEMORY32:
  214. memory32 = &resource->data.memory32;
  215. addr->resource_type = ACPI_MEMORY_RANGE;
  216. addr->minimum = memory32->minimum;
  217. addr->address_length = memory32->address_length;
  218. addr->maximum = addr->minimum + addr->address_length - 1;
  219. return AE_OK;
  220. case ACPI_RESOURCE_TYPE_FIXED_MEMORY32:
  221. fixed_memory32 = &resource->data.fixed_memory32;
  222. addr->resource_type = ACPI_MEMORY_RANGE;
  223. addr->minimum = fixed_memory32->address;
  224. addr->address_length = fixed_memory32->address_length;
  225. addr->maximum = addr->minimum + addr->address_length - 1;
  226. return AE_OK;
  227. case ACPI_RESOURCE_TYPE_ADDRESS16:
  228. case ACPI_RESOURCE_TYPE_ADDRESS32:
  229. case ACPI_RESOURCE_TYPE_ADDRESS64:
  230. status = acpi_resource_to_address64(resource, addr);
  231. if (ACPI_SUCCESS(status) &&
  232. (addr->resource_type == ACPI_MEMORY_RANGE ||
  233. addr->resource_type == ACPI_IO_RANGE) &&
  234. addr->address_length > 0) {
  235. return AE_OK;
  236. }
  237. break;
  238. }
  239. return AE_ERROR;
  240. }
  241. static acpi_status
  242. count_resource(struct acpi_resource *acpi_res, void *data)
  243. {
  244. struct pci_root_info *info = data;
  245. struct acpi_resource_address64 addr;
  246. acpi_status status;
  247. status = resource_to_addr(acpi_res, &addr);
  248. if (ACPI_SUCCESS(status))
  249. info->res_num++;
  250. return AE_OK;
  251. }
  252. static acpi_status
  253. setup_resource(struct acpi_resource *acpi_res, void *data)
  254. {
  255. struct pci_root_info *info = data;
  256. struct resource *res;
  257. struct acpi_resource_address64 addr;
  258. acpi_status status;
  259. unsigned long flags;
  260. u64 start, orig_end, end;
  261. status = resource_to_addr(acpi_res, &addr);
  262. if (!ACPI_SUCCESS(status))
  263. return AE_OK;
  264. if (addr.resource_type == ACPI_MEMORY_RANGE) {
  265. flags = IORESOURCE_MEM;
  266. if (addr.info.mem.caching == ACPI_PREFETCHABLE_MEMORY)
  267. flags |= IORESOURCE_PREFETCH;
  268. } else if (addr.resource_type == ACPI_IO_RANGE) {
  269. flags = IORESOURCE_IO;
  270. } else
  271. return AE_OK;
  272. start = addr.minimum + addr.translation_offset;
  273. orig_end = end = addr.maximum + addr.translation_offset;
  274. /* Exclude non-addressable range or non-addressable portion of range */
  275. end = min(end, (u64)iomem_resource.end);
  276. if (end <= start) {
  277. dev_info(&info->bridge->dev,
  278. "host bridge window [%#llx-%#llx] "
  279. "(ignored, not CPU addressable)\n", start, orig_end);
  280. return AE_OK;
  281. } else if (orig_end != end) {
  282. dev_info(&info->bridge->dev,
  283. "host bridge window [%#llx-%#llx] "
  284. "([%#llx-%#llx] ignored, not CPU addressable)\n",
  285. start, orig_end, end + 1, orig_end);
  286. }
  287. res = &info->res[info->res_num];
  288. res->name = info->name;
  289. res->flags = flags;
  290. res->start = start;
  291. res->end = end;
  292. info->res_offset[info->res_num] = addr.translation_offset;
  293. info->res_num++;
  294. if (!pci_use_crs)
  295. dev_printk(KERN_DEBUG, &info->bridge->dev,
  296. "host bridge window %pR (ignored)\n", res);
  297. return AE_OK;
  298. }
  299. static void coalesce_windows(struct pci_root_info *info, unsigned long type)
  300. {
  301. int i, j;
  302. struct resource *res1, *res2;
  303. for (i = 0; i < info->res_num; i++) {
  304. res1 = &info->res[i];
  305. if (!(res1->flags & type))
  306. continue;
  307. for (j = i + 1; j < info->res_num; j++) {
  308. res2 = &info->res[j];
  309. if (!(res2->flags & type))
  310. continue;
  311. /*
  312. * I don't like throwing away windows because then
  313. * our resources no longer match the ACPI _CRS, but
  314. * the kernel resource tree doesn't allow overlaps.
  315. */
  316. if (resource_overlaps(res1, res2)) {
  317. res1->start = min(res1->start, res2->start);
  318. res1->end = max(res1->end, res2->end);
  319. dev_info(&info->bridge->dev,
  320. "host bridge window expanded to %pR; %pR ignored\n",
  321. res1, res2);
  322. res2->flags = 0;
  323. }
  324. }
  325. }
  326. }
  327. static void add_resources(struct pci_root_info *info,
  328. struct list_head *resources)
  329. {
  330. int i;
  331. struct resource *res, *root, *conflict;
  332. coalesce_windows(info, IORESOURCE_MEM);
  333. coalesce_windows(info, IORESOURCE_IO);
  334. for (i = 0; i < info->res_num; i++) {
  335. res = &info->res[i];
  336. if (res->flags & IORESOURCE_MEM)
  337. root = &iomem_resource;
  338. else if (res->flags & IORESOURCE_IO)
  339. root = &ioport_resource;
  340. else
  341. continue;
  342. conflict = insert_resource_conflict(root, res);
  343. if (conflict)
  344. dev_info(&info->bridge->dev,
  345. "ignoring host bridge window %pR (conflicts with %s %pR)\n",
  346. res, conflict->name, conflict);
  347. else
  348. pci_add_resource_offset(resources, res,
  349. info->res_offset[i]);
  350. }
  351. }
  352. static void free_pci_root_info_res(struct pci_root_info *info)
  353. {
  354. kfree(info->res);
  355. info->res = NULL;
  356. kfree(info->res_offset);
  357. info->res_offset = NULL;
  358. info->res_num = 0;
  359. }
  360. static void __release_pci_root_info(struct pci_root_info *info)
  361. {
  362. int i;
  363. struct resource *res;
  364. for (i = 0; i < info->res_num; i++) {
  365. res = &info->res[i];
  366. if (!res->parent)
  367. continue;
  368. if (!(res->flags & (IORESOURCE_MEM | IORESOURCE_IO)))
  369. continue;
  370. release_resource(res);
  371. }
  372. free_pci_root_info_res(info);
  373. teardown_mcfg_map(info);
  374. kfree(info);
  375. }
  376. static void release_pci_root_info(struct pci_host_bridge *bridge)
  377. {
  378. struct pci_root_info *info = bridge->release_data;
  379. __release_pci_root_info(info);
  380. }
  381. static void
  382. probe_pci_root_info(struct pci_root_info *info, struct acpi_device *device,
  383. int busnum, int domain)
  384. {
  385. size_t size;
  386. sprintf(info->name, "PCI Bus %04x:%02x", domain, busnum);
  387. info->bridge = device;
  388. info->res_num = 0;
  389. acpi_walk_resources(device->handle, METHOD_NAME__CRS, count_resource,
  390. info);
  391. if (!info->res_num)
  392. return;
  393. size = sizeof(*info->res) * info->res_num;
  394. info->res = kzalloc(size, GFP_KERNEL);
  395. if (!info->res) {
  396. info->res_num = 0;
  397. return;
  398. }
  399. size = sizeof(*info->res_offset) * info->res_num;
  400. info->res_num = 0;
  401. info->res_offset = kzalloc(size, GFP_KERNEL);
  402. if (!info->res_offset) {
  403. kfree(info->res);
  404. info->res = NULL;
  405. return;
  406. }
  407. acpi_walk_resources(device->handle, METHOD_NAME__CRS, setup_resource,
  408. info);
  409. }
  410. struct pci_bus *pci_acpi_scan_root(struct acpi_pci_root *root)
  411. {
  412. struct acpi_device *device = root->device;
  413. struct pci_root_info *info = NULL;
  414. int domain = root->segment;
  415. int busnum = root->secondary.start;
  416. LIST_HEAD(resources);
  417. struct pci_bus *bus = NULL;
  418. struct pci_sysdata *sd;
  419. int node;
  420. #ifdef CONFIG_ACPI_NUMA
  421. int pxm;
  422. #endif
  423. if (pci_ignore_seg)
  424. domain = 0;
  425. if (domain && !pci_domains_supported) {
  426. printk(KERN_WARNING "pci_bus %04x:%02x: "
  427. "ignored (multiple domains not supported)\n",
  428. domain, busnum);
  429. return NULL;
  430. }
  431. node = -1;
  432. #ifdef CONFIG_ACPI_NUMA
  433. pxm = acpi_get_pxm(device->handle);
  434. if (pxm >= 0)
  435. node = pxm_to_node(pxm);
  436. if (node != -1)
  437. set_mp_bus_to_node(busnum, node);
  438. else
  439. #endif
  440. node = get_mp_bus_to_node(busnum);
  441. if (node != -1 && !node_online(node))
  442. node = -1;
  443. info = kzalloc(sizeof(*info), GFP_KERNEL);
  444. if (!info) {
  445. printk(KERN_WARNING "pci_bus %04x:%02x: "
  446. "ignored (out of memory)\n", domain, busnum);
  447. return NULL;
  448. }
  449. sd = &info->sd;
  450. sd->domain = domain;
  451. sd->node = node;
  452. sd->acpi = device->handle;
  453. /*
  454. * Maybe the desired pci bus has been already scanned. In such case
  455. * it is unnecessary to scan the pci bus with the given domain,busnum.
  456. */
  457. bus = pci_find_bus(domain, busnum);
  458. if (bus) {
  459. /*
  460. * If the desired bus exits, the content of bus->sysdata will
  461. * be replaced by sd.
  462. */
  463. memcpy(bus->sysdata, sd, sizeof(*sd));
  464. kfree(info);
  465. } else {
  466. probe_pci_root_info(info, device, busnum, domain);
  467. /* insert busn res at first */
  468. pci_add_resource(&resources, &root->secondary);
  469. /*
  470. * _CRS with no apertures is normal, so only fall back to
  471. * defaults or native bridge info if we're ignoring _CRS.
  472. */
  473. if (pci_use_crs)
  474. add_resources(info, &resources);
  475. else {
  476. free_pci_root_info_res(info);
  477. x86_pci_root_bus_resources(busnum, &resources);
  478. }
  479. if (!setup_mcfg_map(info, domain, (u8)root->secondary.start,
  480. (u8)root->secondary.end, root->mcfg_addr))
  481. bus = pci_create_root_bus(NULL, busnum, &pci_root_ops,
  482. sd, &resources);
  483. if (bus) {
  484. pci_scan_child_bus(bus);
  485. pci_set_host_bridge_release(
  486. to_pci_host_bridge(bus->bridge),
  487. release_pci_root_info, info);
  488. } else {
  489. pci_free_resource_list(&resources);
  490. __release_pci_root_info(info);
  491. }
  492. }
  493. /* After the PCI-E bus has been walked and all devices discovered,
  494. * configure any settings of the fabric that might be necessary.
  495. */
  496. if (bus) {
  497. struct pci_bus *child;
  498. list_for_each_entry(child, &bus->children, node) {
  499. struct pci_dev *self = child->self;
  500. if (!self)
  501. continue;
  502. pcie_bus_configure_settings(child, self->pcie_mpss);
  503. }
  504. }
  505. if (bus && node != -1) {
  506. #ifdef CONFIG_ACPI_NUMA
  507. if (pxm >= 0)
  508. dev_printk(KERN_DEBUG, &bus->dev,
  509. "on NUMA node %d (pxm %d)\n", node, pxm);
  510. #else
  511. dev_printk(KERN_DEBUG, &bus->dev, "on NUMA node %d\n", node);
  512. #endif
  513. }
  514. return bus;
  515. }
  516. int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge)
  517. {
  518. struct pci_sysdata *sd = bridge->bus->sysdata;
  519. ACPI_HANDLE_SET(&bridge->dev, sd->acpi);
  520. return 0;
  521. }
  522. int __init pci_acpi_init(void)
  523. {
  524. struct pci_dev *dev = NULL;
  525. if (acpi_noirq)
  526. return -ENODEV;
  527. printk(KERN_INFO "PCI: Using ACPI for IRQ routing\n");
  528. acpi_irq_penalty_init();
  529. pcibios_enable_irq = acpi_pci_irq_enable;
  530. pcibios_disable_irq = acpi_pci_irq_disable;
  531. x86_init.pci.init_irq = x86_init_noop;
  532. if (pci_routeirq) {
  533. /*
  534. * PCI IRQ routing is set up by pci_enable_device(), but we
  535. * also do it here in case there are still broken drivers that
  536. * don't use pci_enable_device().
  537. */
  538. printk(KERN_INFO "PCI: Routing PCI interrupts for all devices because \"pci=routeirq\" specified\n");
  539. for_each_pci_dev(dev)
  540. acpi_pci_irq_enable(dev);
  541. }
  542. return 0;
  543. }