aesni-intel_glue.c 38 KB

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  1. /*
  2. * Support for Intel AES-NI instructions. This file contains glue
  3. * code, the real AES implementation is in intel-aes_asm.S.
  4. *
  5. * Copyright (C) 2008, Intel Corp.
  6. * Author: Huang Ying <ying.huang@intel.com>
  7. *
  8. * Added RFC4106 AES-GCM support for 128-bit keys under the AEAD
  9. * interface for 64-bit kernels.
  10. * Authors: Adrian Hoban <adrian.hoban@intel.com>
  11. * Gabriele Paoloni <gabriele.paoloni@intel.com>
  12. * Tadeusz Struk (tadeusz.struk@intel.com)
  13. * Aidan O'Mahony (aidan.o.mahony@intel.com)
  14. * Copyright (c) 2010, Intel Corporation.
  15. *
  16. * This program is free software; you can redistribute it and/or modify
  17. * it under the terms of the GNU General Public License as published by
  18. * the Free Software Foundation; either version 2 of the License, or
  19. * (at your option) any later version.
  20. */
  21. #include <linux/hardirq.h>
  22. #include <linux/types.h>
  23. #include <linux/crypto.h>
  24. #include <linux/module.h>
  25. #include <linux/err.h>
  26. #include <crypto/algapi.h>
  27. #include <crypto/aes.h>
  28. #include <crypto/cryptd.h>
  29. #include <crypto/ctr.h>
  30. #include <crypto/b128ops.h>
  31. #include <crypto/lrw.h>
  32. #include <crypto/xts.h>
  33. #include <asm/cpu_device_id.h>
  34. #include <asm/i387.h>
  35. #include <asm/crypto/aes.h>
  36. #include <asm/crypto/ablk_helper.h>
  37. #include <crypto/scatterwalk.h>
  38. #include <crypto/internal/aead.h>
  39. #include <linux/workqueue.h>
  40. #include <linux/spinlock.h>
  41. #ifdef CONFIG_X86_64
  42. #include <asm/crypto/glue_helper.h>
  43. #endif
  44. #if defined(CONFIG_CRYPTO_PCBC) || defined(CONFIG_CRYPTO_PCBC_MODULE)
  45. #define HAS_PCBC
  46. #endif
  47. /* This data is stored at the end of the crypto_tfm struct.
  48. * It's a type of per "session" data storage location.
  49. * This needs to be 16 byte aligned.
  50. */
  51. struct aesni_rfc4106_gcm_ctx {
  52. u8 hash_subkey[16];
  53. struct crypto_aes_ctx aes_key_expanded;
  54. u8 nonce[4];
  55. struct cryptd_aead *cryptd_tfm;
  56. };
  57. struct aesni_gcm_set_hash_subkey_result {
  58. int err;
  59. struct completion completion;
  60. };
  61. struct aesni_hash_subkey_req_data {
  62. u8 iv[16];
  63. struct aesni_gcm_set_hash_subkey_result result;
  64. struct scatterlist sg;
  65. };
  66. #define AESNI_ALIGN (16)
  67. #define AES_BLOCK_MASK (~(AES_BLOCK_SIZE-1))
  68. #define RFC4106_HASH_SUBKEY_SIZE 16
  69. struct aesni_lrw_ctx {
  70. struct lrw_table_ctx lrw_table;
  71. u8 raw_aes_ctx[sizeof(struct crypto_aes_ctx) + AESNI_ALIGN - 1];
  72. };
  73. struct aesni_xts_ctx {
  74. u8 raw_tweak_ctx[sizeof(struct crypto_aes_ctx) + AESNI_ALIGN - 1];
  75. u8 raw_crypt_ctx[sizeof(struct crypto_aes_ctx) + AESNI_ALIGN - 1];
  76. };
  77. asmlinkage int aesni_set_key(struct crypto_aes_ctx *ctx, const u8 *in_key,
  78. unsigned int key_len);
  79. asmlinkage void aesni_enc(struct crypto_aes_ctx *ctx, u8 *out,
  80. const u8 *in);
  81. asmlinkage void aesni_dec(struct crypto_aes_ctx *ctx, u8 *out,
  82. const u8 *in);
  83. asmlinkage void aesni_ecb_enc(struct crypto_aes_ctx *ctx, u8 *out,
  84. const u8 *in, unsigned int len);
  85. asmlinkage void aesni_ecb_dec(struct crypto_aes_ctx *ctx, u8 *out,
  86. const u8 *in, unsigned int len);
  87. asmlinkage void aesni_cbc_enc(struct crypto_aes_ctx *ctx, u8 *out,
  88. const u8 *in, unsigned int len, u8 *iv);
  89. asmlinkage void aesni_cbc_dec(struct crypto_aes_ctx *ctx, u8 *out,
  90. const u8 *in, unsigned int len, u8 *iv);
  91. int crypto_fpu_init(void);
  92. void crypto_fpu_exit(void);
  93. #ifdef CONFIG_X86_64
  94. asmlinkage void aesni_ctr_enc(struct crypto_aes_ctx *ctx, u8 *out,
  95. const u8 *in, unsigned int len, u8 *iv);
  96. asmlinkage void aesni_xts_crypt8(struct crypto_aes_ctx *ctx, u8 *out,
  97. const u8 *in, bool enc, u8 *iv);
  98. /* asmlinkage void aesni_gcm_enc()
  99. * void *ctx, AES Key schedule. Starts on a 16 byte boundary.
  100. * u8 *out, Ciphertext output. Encrypt in-place is allowed.
  101. * const u8 *in, Plaintext input
  102. * unsigned long plaintext_len, Length of data in bytes for encryption.
  103. * u8 *iv, Pre-counter block j0: 4 byte salt (from Security Association)
  104. * concatenated with 8 byte Initialisation Vector (from IPSec ESP
  105. * Payload) concatenated with 0x00000001. 16-byte aligned pointer.
  106. * u8 *hash_subkey, the Hash sub key input. Data starts on a 16-byte boundary.
  107. * const u8 *aad, Additional Authentication Data (AAD)
  108. * unsigned long aad_len, Length of AAD in bytes. With RFC4106 this
  109. * is going to be 8 or 12 bytes
  110. * u8 *auth_tag, Authenticated Tag output.
  111. * unsigned long auth_tag_len), Authenticated Tag Length in bytes.
  112. * Valid values are 16 (most likely), 12 or 8.
  113. */
  114. asmlinkage void aesni_gcm_enc(void *ctx, u8 *out,
  115. const u8 *in, unsigned long plaintext_len, u8 *iv,
  116. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  117. u8 *auth_tag, unsigned long auth_tag_len);
  118. /* asmlinkage void aesni_gcm_dec()
  119. * void *ctx, AES Key schedule. Starts on a 16 byte boundary.
  120. * u8 *out, Plaintext output. Decrypt in-place is allowed.
  121. * const u8 *in, Ciphertext input
  122. * unsigned long ciphertext_len, Length of data in bytes for decryption.
  123. * u8 *iv, Pre-counter block j0: 4 byte salt (from Security Association)
  124. * concatenated with 8 byte Initialisation Vector (from IPSec ESP
  125. * Payload) concatenated with 0x00000001. 16-byte aligned pointer.
  126. * u8 *hash_subkey, the Hash sub key input. Data starts on a 16-byte boundary.
  127. * const u8 *aad, Additional Authentication Data (AAD)
  128. * unsigned long aad_len, Length of AAD in bytes. With RFC4106 this is going
  129. * to be 8 or 12 bytes
  130. * u8 *auth_tag, Authenticated Tag output.
  131. * unsigned long auth_tag_len) Authenticated Tag Length in bytes.
  132. * Valid values are 16 (most likely), 12 or 8.
  133. */
  134. asmlinkage void aesni_gcm_dec(void *ctx, u8 *out,
  135. const u8 *in, unsigned long ciphertext_len, u8 *iv,
  136. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  137. u8 *auth_tag, unsigned long auth_tag_len);
  138. static inline struct
  139. aesni_rfc4106_gcm_ctx *aesni_rfc4106_gcm_ctx_get(struct crypto_aead *tfm)
  140. {
  141. return
  142. (struct aesni_rfc4106_gcm_ctx *)
  143. PTR_ALIGN((u8 *)
  144. crypto_tfm_ctx(crypto_aead_tfm(tfm)), AESNI_ALIGN);
  145. }
  146. #endif
  147. static inline struct crypto_aes_ctx *aes_ctx(void *raw_ctx)
  148. {
  149. unsigned long addr = (unsigned long)raw_ctx;
  150. unsigned long align = AESNI_ALIGN;
  151. if (align <= crypto_tfm_ctx_alignment())
  152. align = 1;
  153. return (struct crypto_aes_ctx *)ALIGN(addr, align);
  154. }
  155. static int aes_set_key_common(struct crypto_tfm *tfm, void *raw_ctx,
  156. const u8 *in_key, unsigned int key_len)
  157. {
  158. struct crypto_aes_ctx *ctx = aes_ctx(raw_ctx);
  159. u32 *flags = &tfm->crt_flags;
  160. int err;
  161. if (key_len != AES_KEYSIZE_128 && key_len != AES_KEYSIZE_192 &&
  162. key_len != AES_KEYSIZE_256) {
  163. *flags |= CRYPTO_TFM_RES_BAD_KEY_LEN;
  164. return -EINVAL;
  165. }
  166. if (!irq_fpu_usable())
  167. err = crypto_aes_expand_key(ctx, in_key, key_len);
  168. else {
  169. kernel_fpu_begin();
  170. err = aesni_set_key(ctx, in_key, key_len);
  171. kernel_fpu_end();
  172. }
  173. return err;
  174. }
  175. static int aes_set_key(struct crypto_tfm *tfm, const u8 *in_key,
  176. unsigned int key_len)
  177. {
  178. return aes_set_key_common(tfm, crypto_tfm_ctx(tfm), in_key, key_len);
  179. }
  180. static void aes_encrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
  181. {
  182. struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
  183. if (!irq_fpu_usable())
  184. crypto_aes_encrypt_x86(ctx, dst, src);
  185. else {
  186. kernel_fpu_begin();
  187. aesni_enc(ctx, dst, src);
  188. kernel_fpu_end();
  189. }
  190. }
  191. static void aes_decrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
  192. {
  193. struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
  194. if (!irq_fpu_usable())
  195. crypto_aes_decrypt_x86(ctx, dst, src);
  196. else {
  197. kernel_fpu_begin();
  198. aesni_dec(ctx, dst, src);
  199. kernel_fpu_end();
  200. }
  201. }
  202. static void __aes_encrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
  203. {
  204. struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
  205. aesni_enc(ctx, dst, src);
  206. }
  207. static void __aes_decrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
  208. {
  209. struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
  210. aesni_dec(ctx, dst, src);
  211. }
  212. static int ecb_encrypt(struct blkcipher_desc *desc,
  213. struct scatterlist *dst, struct scatterlist *src,
  214. unsigned int nbytes)
  215. {
  216. struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
  217. struct blkcipher_walk walk;
  218. int err;
  219. blkcipher_walk_init(&walk, dst, src, nbytes);
  220. err = blkcipher_walk_virt(desc, &walk);
  221. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  222. kernel_fpu_begin();
  223. while ((nbytes = walk.nbytes)) {
  224. aesni_ecb_enc(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  225. nbytes & AES_BLOCK_MASK);
  226. nbytes &= AES_BLOCK_SIZE - 1;
  227. err = blkcipher_walk_done(desc, &walk, nbytes);
  228. }
  229. kernel_fpu_end();
  230. return err;
  231. }
  232. static int ecb_decrypt(struct blkcipher_desc *desc,
  233. struct scatterlist *dst, struct scatterlist *src,
  234. unsigned int nbytes)
  235. {
  236. struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
  237. struct blkcipher_walk walk;
  238. int err;
  239. blkcipher_walk_init(&walk, dst, src, nbytes);
  240. err = blkcipher_walk_virt(desc, &walk);
  241. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  242. kernel_fpu_begin();
  243. while ((nbytes = walk.nbytes)) {
  244. aesni_ecb_dec(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  245. nbytes & AES_BLOCK_MASK);
  246. nbytes &= AES_BLOCK_SIZE - 1;
  247. err = blkcipher_walk_done(desc, &walk, nbytes);
  248. }
  249. kernel_fpu_end();
  250. return err;
  251. }
  252. static int cbc_encrypt(struct blkcipher_desc *desc,
  253. struct scatterlist *dst, struct scatterlist *src,
  254. unsigned int nbytes)
  255. {
  256. struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
  257. struct blkcipher_walk walk;
  258. int err;
  259. blkcipher_walk_init(&walk, dst, src, nbytes);
  260. err = blkcipher_walk_virt(desc, &walk);
  261. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  262. kernel_fpu_begin();
  263. while ((nbytes = walk.nbytes)) {
  264. aesni_cbc_enc(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  265. nbytes & AES_BLOCK_MASK, walk.iv);
  266. nbytes &= AES_BLOCK_SIZE - 1;
  267. err = blkcipher_walk_done(desc, &walk, nbytes);
  268. }
  269. kernel_fpu_end();
  270. return err;
  271. }
  272. static int cbc_decrypt(struct blkcipher_desc *desc,
  273. struct scatterlist *dst, struct scatterlist *src,
  274. unsigned int nbytes)
  275. {
  276. struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
  277. struct blkcipher_walk walk;
  278. int err;
  279. blkcipher_walk_init(&walk, dst, src, nbytes);
  280. err = blkcipher_walk_virt(desc, &walk);
  281. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  282. kernel_fpu_begin();
  283. while ((nbytes = walk.nbytes)) {
  284. aesni_cbc_dec(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  285. nbytes & AES_BLOCK_MASK, walk.iv);
  286. nbytes &= AES_BLOCK_SIZE - 1;
  287. err = blkcipher_walk_done(desc, &walk, nbytes);
  288. }
  289. kernel_fpu_end();
  290. return err;
  291. }
  292. #ifdef CONFIG_X86_64
  293. static void ctr_crypt_final(struct crypto_aes_ctx *ctx,
  294. struct blkcipher_walk *walk)
  295. {
  296. u8 *ctrblk = walk->iv;
  297. u8 keystream[AES_BLOCK_SIZE];
  298. u8 *src = walk->src.virt.addr;
  299. u8 *dst = walk->dst.virt.addr;
  300. unsigned int nbytes = walk->nbytes;
  301. aesni_enc(ctx, keystream, ctrblk);
  302. crypto_xor(keystream, src, nbytes);
  303. memcpy(dst, keystream, nbytes);
  304. crypto_inc(ctrblk, AES_BLOCK_SIZE);
  305. }
  306. static int ctr_crypt(struct blkcipher_desc *desc,
  307. struct scatterlist *dst, struct scatterlist *src,
  308. unsigned int nbytes)
  309. {
  310. struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
  311. struct blkcipher_walk walk;
  312. int err;
  313. blkcipher_walk_init(&walk, dst, src, nbytes);
  314. err = blkcipher_walk_virt_block(desc, &walk, AES_BLOCK_SIZE);
  315. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  316. kernel_fpu_begin();
  317. while ((nbytes = walk.nbytes) >= AES_BLOCK_SIZE) {
  318. aesni_ctr_enc(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  319. nbytes & AES_BLOCK_MASK, walk.iv);
  320. nbytes &= AES_BLOCK_SIZE - 1;
  321. err = blkcipher_walk_done(desc, &walk, nbytes);
  322. }
  323. if (walk.nbytes) {
  324. ctr_crypt_final(ctx, &walk);
  325. err = blkcipher_walk_done(desc, &walk, 0);
  326. }
  327. kernel_fpu_end();
  328. return err;
  329. }
  330. #endif
  331. static int ablk_ecb_init(struct crypto_tfm *tfm)
  332. {
  333. return ablk_init_common(tfm, "__driver-ecb-aes-aesni");
  334. }
  335. static int ablk_cbc_init(struct crypto_tfm *tfm)
  336. {
  337. return ablk_init_common(tfm, "__driver-cbc-aes-aesni");
  338. }
  339. #ifdef CONFIG_X86_64
  340. static int ablk_ctr_init(struct crypto_tfm *tfm)
  341. {
  342. return ablk_init_common(tfm, "__driver-ctr-aes-aesni");
  343. }
  344. #endif
  345. #ifdef HAS_PCBC
  346. static int ablk_pcbc_init(struct crypto_tfm *tfm)
  347. {
  348. return ablk_init_common(tfm, "fpu(pcbc(__driver-aes-aesni))");
  349. }
  350. #endif
  351. static void lrw_xts_encrypt_callback(void *ctx, u8 *blks, unsigned int nbytes)
  352. {
  353. aesni_ecb_enc(ctx, blks, blks, nbytes);
  354. }
  355. static void lrw_xts_decrypt_callback(void *ctx, u8 *blks, unsigned int nbytes)
  356. {
  357. aesni_ecb_dec(ctx, blks, blks, nbytes);
  358. }
  359. static int lrw_aesni_setkey(struct crypto_tfm *tfm, const u8 *key,
  360. unsigned int keylen)
  361. {
  362. struct aesni_lrw_ctx *ctx = crypto_tfm_ctx(tfm);
  363. int err;
  364. err = aes_set_key_common(tfm, ctx->raw_aes_ctx, key,
  365. keylen - AES_BLOCK_SIZE);
  366. if (err)
  367. return err;
  368. return lrw_init_table(&ctx->lrw_table, key + keylen - AES_BLOCK_SIZE);
  369. }
  370. static void lrw_aesni_exit_tfm(struct crypto_tfm *tfm)
  371. {
  372. struct aesni_lrw_ctx *ctx = crypto_tfm_ctx(tfm);
  373. lrw_free_table(&ctx->lrw_table);
  374. }
  375. static int lrw_encrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
  376. struct scatterlist *src, unsigned int nbytes)
  377. {
  378. struct aesni_lrw_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
  379. be128 buf[8];
  380. struct lrw_crypt_req req = {
  381. .tbuf = buf,
  382. .tbuflen = sizeof(buf),
  383. .table_ctx = &ctx->lrw_table,
  384. .crypt_ctx = aes_ctx(ctx->raw_aes_ctx),
  385. .crypt_fn = lrw_xts_encrypt_callback,
  386. };
  387. int ret;
  388. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  389. kernel_fpu_begin();
  390. ret = lrw_crypt(desc, dst, src, nbytes, &req);
  391. kernel_fpu_end();
  392. return ret;
  393. }
  394. static int lrw_decrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
  395. struct scatterlist *src, unsigned int nbytes)
  396. {
  397. struct aesni_lrw_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
  398. be128 buf[8];
  399. struct lrw_crypt_req req = {
  400. .tbuf = buf,
  401. .tbuflen = sizeof(buf),
  402. .table_ctx = &ctx->lrw_table,
  403. .crypt_ctx = aes_ctx(ctx->raw_aes_ctx),
  404. .crypt_fn = lrw_xts_decrypt_callback,
  405. };
  406. int ret;
  407. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  408. kernel_fpu_begin();
  409. ret = lrw_crypt(desc, dst, src, nbytes, &req);
  410. kernel_fpu_end();
  411. return ret;
  412. }
  413. static int xts_aesni_setkey(struct crypto_tfm *tfm, const u8 *key,
  414. unsigned int keylen)
  415. {
  416. struct aesni_xts_ctx *ctx = crypto_tfm_ctx(tfm);
  417. u32 *flags = &tfm->crt_flags;
  418. int err;
  419. /* key consists of keys of equal size concatenated, therefore
  420. * the length must be even
  421. */
  422. if (keylen % 2) {
  423. *flags |= CRYPTO_TFM_RES_BAD_KEY_LEN;
  424. return -EINVAL;
  425. }
  426. /* first half of xts-key is for crypt */
  427. err = aes_set_key_common(tfm, ctx->raw_crypt_ctx, key, keylen / 2);
  428. if (err)
  429. return err;
  430. /* second half of xts-key is for tweak */
  431. return aes_set_key_common(tfm, ctx->raw_tweak_ctx, key + keylen / 2,
  432. keylen / 2);
  433. }
  434. static void aesni_xts_tweak(void *ctx, u8 *out, const u8 *in)
  435. {
  436. aesni_enc(ctx, out, in);
  437. }
  438. #ifdef CONFIG_X86_64
  439. static void aesni_xts_enc(void *ctx, u128 *dst, const u128 *src, le128 *iv)
  440. {
  441. glue_xts_crypt_128bit_one(ctx, dst, src, iv, GLUE_FUNC_CAST(aesni_enc));
  442. }
  443. static void aesni_xts_dec(void *ctx, u128 *dst, const u128 *src, le128 *iv)
  444. {
  445. glue_xts_crypt_128bit_one(ctx, dst, src, iv, GLUE_FUNC_CAST(aesni_dec));
  446. }
  447. static void aesni_xts_enc8(void *ctx, u128 *dst, const u128 *src, le128 *iv)
  448. {
  449. aesni_xts_crypt8(ctx, (u8 *)dst, (const u8 *)src, true, (u8 *)iv);
  450. }
  451. static void aesni_xts_dec8(void *ctx, u128 *dst, const u128 *src, le128 *iv)
  452. {
  453. aesni_xts_crypt8(ctx, (u8 *)dst, (const u8 *)src, false, (u8 *)iv);
  454. }
  455. static const struct common_glue_ctx aesni_enc_xts = {
  456. .num_funcs = 2,
  457. .fpu_blocks_limit = 1,
  458. .funcs = { {
  459. .num_blocks = 8,
  460. .fn_u = { .xts = GLUE_XTS_FUNC_CAST(aesni_xts_enc8) }
  461. }, {
  462. .num_blocks = 1,
  463. .fn_u = { .xts = GLUE_XTS_FUNC_CAST(aesni_xts_enc) }
  464. } }
  465. };
  466. static const struct common_glue_ctx aesni_dec_xts = {
  467. .num_funcs = 2,
  468. .fpu_blocks_limit = 1,
  469. .funcs = { {
  470. .num_blocks = 8,
  471. .fn_u = { .xts = GLUE_XTS_FUNC_CAST(aesni_xts_dec8) }
  472. }, {
  473. .num_blocks = 1,
  474. .fn_u = { .xts = GLUE_XTS_FUNC_CAST(aesni_xts_dec) }
  475. } }
  476. };
  477. static int xts_encrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
  478. struct scatterlist *src, unsigned int nbytes)
  479. {
  480. struct aesni_xts_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
  481. return glue_xts_crypt_128bit(&aesni_enc_xts, desc, dst, src, nbytes,
  482. XTS_TWEAK_CAST(aesni_xts_tweak),
  483. aes_ctx(ctx->raw_tweak_ctx),
  484. aes_ctx(ctx->raw_crypt_ctx));
  485. }
  486. static int xts_decrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
  487. struct scatterlist *src, unsigned int nbytes)
  488. {
  489. struct aesni_xts_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
  490. return glue_xts_crypt_128bit(&aesni_dec_xts, desc, dst, src, nbytes,
  491. XTS_TWEAK_CAST(aesni_xts_tweak),
  492. aes_ctx(ctx->raw_tweak_ctx),
  493. aes_ctx(ctx->raw_crypt_ctx));
  494. }
  495. #else
  496. static int xts_encrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
  497. struct scatterlist *src, unsigned int nbytes)
  498. {
  499. struct aesni_xts_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
  500. be128 buf[8];
  501. struct xts_crypt_req req = {
  502. .tbuf = buf,
  503. .tbuflen = sizeof(buf),
  504. .tweak_ctx = aes_ctx(ctx->raw_tweak_ctx),
  505. .tweak_fn = aesni_xts_tweak,
  506. .crypt_ctx = aes_ctx(ctx->raw_crypt_ctx),
  507. .crypt_fn = lrw_xts_encrypt_callback,
  508. };
  509. int ret;
  510. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  511. kernel_fpu_begin();
  512. ret = xts_crypt(desc, dst, src, nbytes, &req);
  513. kernel_fpu_end();
  514. return ret;
  515. }
  516. static int xts_decrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
  517. struct scatterlist *src, unsigned int nbytes)
  518. {
  519. struct aesni_xts_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
  520. be128 buf[8];
  521. struct xts_crypt_req req = {
  522. .tbuf = buf,
  523. .tbuflen = sizeof(buf),
  524. .tweak_ctx = aes_ctx(ctx->raw_tweak_ctx),
  525. .tweak_fn = aesni_xts_tweak,
  526. .crypt_ctx = aes_ctx(ctx->raw_crypt_ctx),
  527. .crypt_fn = lrw_xts_decrypt_callback,
  528. };
  529. int ret;
  530. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  531. kernel_fpu_begin();
  532. ret = xts_crypt(desc, dst, src, nbytes, &req);
  533. kernel_fpu_end();
  534. return ret;
  535. }
  536. #endif
  537. #ifdef CONFIG_X86_64
  538. static int rfc4106_init(struct crypto_tfm *tfm)
  539. {
  540. struct cryptd_aead *cryptd_tfm;
  541. struct aesni_rfc4106_gcm_ctx *ctx = (struct aesni_rfc4106_gcm_ctx *)
  542. PTR_ALIGN((u8 *)crypto_tfm_ctx(tfm), AESNI_ALIGN);
  543. struct crypto_aead *cryptd_child;
  544. struct aesni_rfc4106_gcm_ctx *child_ctx;
  545. cryptd_tfm = cryptd_alloc_aead("__driver-gcm-aes-aesni", 0, 0);
  546. if (IS_ERR(cryptd_tfm))
  547. return PTR_ERR(cryptd_tfm);
  548. cryptd_child = cryptd_aead_child(cryptd_tfm);
  549. child_ctx = aesni_rfc4106_gcm_ctx_get(cryptd_child);
  550. memcpy(child_ctx, ctx, sizeof(*ctx));
  551. ctx->cryptd_tfm = cryptd_tfm;
  552. tfm->crt_aead.reqsize = sizeof(struct aead_request)
  553. + crypto_aead_reqsize(&cryptd_tfm->base);
  554. return 0;
  555. }
  556. static void rfc4106_exit(struct crypto_tfm *tfm)
  557. {
  558. struct aesni_rfc4106_gcm_ctx *ctx =
  559. (struct aesni_rfc4106_gcm_ctx *)
  560. PTR_ALIGN((u8 *)crypto_tfm_ctx(tfm), AESNI_ALIGN);
  561. if (!IS_ERR(ctx->cryptd_tfm))
  562. cryptd_free_aead(ctx->cryptd_tfm);
  563. return;
  564. }
  565. static void
  566. rfc4106_set_hash_subkey_done(struct crypto_async_request *req, int err)
  567. {
  568. struct aesni_gcm_set_hash_subkey_result *result = req->data;
  569. if (err == -EINPROGRESS)
  570. return;
  571. result->err = err;
  572. complete(&result->completion);
  573. }
  574. static int
  575. rfc4106_set_hash_subkey(u8 *hash_subkey, const u8 *key, unsigned int key_len)
  576. {
  577. struct crypto_ablkcipher *ctr_tfm;
  578. struct ablkcipher_request *req;
  579. int ret = -EINVAL;
  580. struct aesni_hash_subkey_req_data *req_data;
  581. ctr_tfm = crypto_alloc_ablkcipher("ctr(aes)", 0, 0);
  582. if (IS_ERR(ctr_tfm))
  583. return PTR_ERR(ctr_tfm);
  584. crypto_ablkcipher_clear_flags(ctr_tfm, ~0);
  585. ret = crypto_ablkcipher_setkey(ctr_tfm, key, key_len);
  586. if (ret)
  587. goto out_free_ablkcipher;
  588. ret = -ENOMEM;
  589. req = ablkcipher_request_alloc(ctr_tfm, GFP_KERNEL);
  590. if (!req)
  591. goto out_free_ablkcipher;
  592. req_data = kmalloc(sizeof(*req_data), GFP_KERNEL);
  593. if (!req_data)
  594. goto out_free_request;
  595. memset(req_data->iv, 0, sizeof(req_data->iv));
  596. /* Clear the data in the hash sub key container to zero.*/
  597. /* We want to cipher all zeros to create the hash sub key. */
  598. memset(hash_subkey, 0, RFC4106_HASH_SUBKEY_SIZE);
  599. init_completion(&req_data->result.completion);
  600. sg_init_one(&req_data->sg, hash_subkey, RFC4106_HASH_SUBKEY_SIZE);
  601. ablkcipher_request_set_tfm(req, ctr_tfm);
  602. ablkcipher_request_set_callback(req, CRYPTO_TFM_REQ_MAY_SLEEP |
  603. CRYPTO_TFM_REQ_MAY_BACKLOG,
  604. rfc4106_set_hash_subkey_done,
  605. &req_data->result);
  606. ablkcipher_request_set_crypt(req, &req_data->sg,
  607. &req_data->sg, RFC4106_HASH_SUBKEY_SIZE, req_data->iv);
  608. ret = crypto_ablkcipher_encrypt(req);
  609. if (ret == -EINPROGRESS || ret == -EBUSY) {
  610. ret = wait_for_completion_interruptible
  611. (&req_data->result.completion);
  612. if (!ret)
  613. ret = req_data->result.err;
  614. }
  615. kfree(req_data);
  616. out_free_request:
  617. ablkcipher_request_free(req);
  618. out_free_ablkcipher:
  619. crypto_free_ablkcipher(ctr_tfm);
  620. return ret;
  621. }
  622. static int rfc4106_set_key(struct crypto_aead *parent, const u8 *key,
  623. unsigned int key_len)
  624. {
  625. int ret = 0;
  626. struct crypto_tfm *tfm = crypto_aead_tfm(parent);
  627. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(parent);
  628. struct crypto_aead *cryptd_child = cryptd_aead_child(ctx->cryptd_tfm);
  629. struct aesni_rfc4106_gcm_ctx *child_ctx =
  630. aesni_rfc4106_gcm_ctx_get(cryptd_child);
  631. u8 *new_key_align, *new_key_mem = NULL;
  632. if (key_len < 4) {
  633. crypto_tfm_set_flags(tfm, CRYPTO_TFM_RES_BAD_KEY_LEN);
  634. return -EINVAL;
  635. }
  636. /*Account for 4 byte nonce at the end.*/
  637. key_len -= 4;
  638. if (key_len != AES_KEYSIZE_128) {
  639. crypto_tfm_set_flags(tfm, CRYPTO_TFM_RES_BAD_KEY_LEN);
  640. return -EINVAL;
  641. }
  642. memcpy(ctx->nonce, key + key_len, sizeof(ctx->nonce));
  643. /*This must be on a 16 byte boundary!*/
  644. if ((unsigned long)(&(ctx->aes_key_expanded.key_enc[0])) % AESNI_ALIGN)
  645. return -EINVAL;
  646. if ((unsigned long)key % AESNI_ALIGN) {
  647. /*key is not aligned: use an auxuliar aligned pointer*/
  648. new_key_mem = kmalloc(key_len+AESNI_ALIGN, GFP_KERNEL);
  649. if (!new_key_mem)
  650. return -ENOMEM;
  651. new_key_align = PTR_ALIGN(new_key_mem, AESNI_ALIGN);
  652. memcpy(new_key_align, key, key_len);
  653. key = new_key_align;
  654. }
  655. if (!irq_fpu_usable())
  656. ret = crypto_aes_expand_key(&(ctx->aes_key_expanded),
  657. key, key_len);
  658. else {
  659. kernel_fpu_begin();
  660. ret = aesni_set_key(&(ctx->aes_key_expanded), key, key_len);
  661. kernel_fpu_end();
  662. }
  663. /*This must be on a 16 byte boundary!*/
  664. if ((unsigned long)(&(ctx->hash_subkey[0])) % AESNI_ALIGN) {
  665. ret = -EINVAL;
  666. goto exit;
  667. }
  668. ret = rfc4106_set_hash_subkey(ctx->hash_subkey, key, key_len);
  669. memcpy(child_ctx, ctx, sizeof(*ctx));
  670. exit:
  671. kfree(new_key_mem);
  672. return ret;
  673. }
  674. /* This is the Integrity Check Value (aka the authentication tag length and can
  675. * be 8, 12 or 16 bytes long. */
  676. static int rfc4106_set_authsize(struct crypto_aead *parent,
  677. unsigned int authsize)
  678. {
  679. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(parent);
  680. struct crypto_aead *cryptd_child = cryptd_aead_child(ctx->cryptd_tfm);
  681. switch (authsize) {
  682. case 8:
  683. case 12:
  684. case 16:
  685. break;
  686. default:
  687. return -EINVAL;
  688. }
  689. crypto_aead_crt(parent)->authsize = authsize;
  690. crypto_aead_crt(cryptd_child)->authsize = authsize;
  691. return 0;
  692. }
  693. static int rfc4106_encrypt(struct aead_request *req)
  694. {
  695. int ret;
  696. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  697. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(tfm);
  698. if (!irq_fpu_usable()) {
  699. struct aead_request *cryptd_req =
  700. (struct aead_request *) aead_request_ctx(req);
  701. memcpy(cryptd_req, req, sizeof(*req));
  702. aead_request_set_tfm(cryptd_req, &ctx->cryptd_tfm->base);
  703. return crypto_aead_encrypt(cryptd_req);
  704. } else {
  705. struct crypto_aead *cryptd_child = cryptd_aead_child(ctx->cryptd_tfm);
  706. kernel_fpu_begin();
  707. ret = cryptd_child->base.crt_aead.encrypt(req);
  708. kernel_fpu_end();
  709. return ret;
  710. }
  711. }
  712. static int rfc4106_decrypt(struct aead_request *req)
  713. {
  714. int ret;
  715. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  716. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(tfm);
  717. if (!irq_fpu_usable()) {
  718. struct aead_request *cryptd_req =
  719. (struct aead_request *) aead_request_ctx(req);
  720. memcpy(cryptd_req, req, sizeof(*req));
  721. aead_request_set_tfm(cryptd_req, &ctx->cryptd_tfm->base);
  722. return crypto_aead_decrypt(cryptd_req);
  723. } else {
  724. struct crypto_aead *cryptd_child = cryptd_aead_child(ctx->cryptd_tfm);
  725. kernel_fpu_begin();
  726. ret = cryptd_child->base.crt_aead.decrypt(req);
  727. kernel_fpu_end();
  728. return ret;
  729. }
  730. }
  731. static int __driver_rfc4106_encrypt(struct aead_request *req)
  732. {
  733. u8 one_entry_in_sg = 0;
  734. u8 *src, *dst, *assoc;
  735. __be32 counter = cpu_to_be32(1);
  736. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  737. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(tfm);
  738. void *aes_ctx = &(ctx->aes_key_expanded);
  739. unsigned long auth_tag_len = crypto_aead_authsize(tfm);
  740. u8 iv_tab[16+AESNI_ALIGN];
  741. u8* iv = (u8 *) PTR_ALIGN((u8 *)iv_tab, AESNI_ALIGN);
  742. struct scatter_walk src_sg_walk;
  743. struct scatter_walk assoc_sg_walk;
  744. struct scatter_walk dst_sg_walk;
  745. unsigned int i;
  746. /* Assuming we are supporting rfc4106 64-bit extended */
  747. /* sequence numbers We need to have the AAD length equal */
  748. /* to 8 or 12 bytes */
  749. if (unlikely(req->assoclen != 8 && req->assoclen != 12))
  750. return -EINVAL;
  751. /* IV below built */
  752. for (i = 0; i < 4; i++)
  753. *(iv+i) = ctx->nonce[i];
  754. for (i = 0; i < 8; i++)
  755. *(iv+4+i) = req->iv[i];
  756. *((__be32 *)(iv+12)) = counter;
  757. if ((sg_is_last(req->src)) && (sg_is_last(req->assoc))) {
  758. one_entry_in_sg = 1;
  759. scatterwalk_start(&src_sg_walk, req->src);
  760. scatterwalk_start(&assoc_sg_walk, req->assoc);
  761. src = scatterwalk_map(&src_sg_walk);
  762. assoc = scatterwalk_map(&assoc_sg_walk);
  763. dst = src;
  764. if (unlikely(req->src != req->dst)) {
  765. scatterwalk_start(&dst_sg_walk, req->dst);
  766. dst = scatterwalk_map(&dst_sg_walk);
  767. }
  768. } else {
  769. /* Allocate memory for src, dst, assoc */
  770. src = kmalloc(req->cryptlen + auth_tag_len + req->assoclen,
  771. GFP_ATOMIC);
  772. if (unlikely(!src))
  773. return -ENOMEM;
  774. assoc = (src + req->cryptlen + auth_tag_len);
  775. scatterwalk_map_and_copy(src, req->src, 0, req->cryptlen, 0);
  776. scatterwalk_map_and_copy(assoc, req->assoc, 0,
  777. req->assoclen, 0);
  778. dst = src;
  779. }
  780. aesni_gcm_enc(aes_ctx, dst, src, (unsigned long)req->cryptlen, iv,
  781. ctx->hash_subkey, assoc, (unsigned long)req->assoclen, dst
  782. + ((unsigned long)req->cryptlen), auth_tag_len);
  783. /* The authTag (aka the Integrity Check Value) needs to be written
  784. * back to the packet. */
  785. if (one_entry_in_sg) {
  786. if (unlikely(req->src != req->dst)) {
  787. scatterwalk_unmap(dst);
  788. scatterwalk_done(&dst_sg_walk, 0, 0);
  789. }
  790. scatterwalk_unmap(src);
  791. scatterwalk_unmap(assoc);
  792. scatterwalk_done(&src_sg_walk, 0, 0);
  793. scatterwalk_done(&assoc_sg_walk, 0, 0);
  794. } else {
  795. scatterwalk_map_and_copy(dst, req->dst, 0,
  796. req->cryptlen + auth_tag_len, 1);
  797. kfree(src);
  798. }
  799. return 0;
  800. }
  801. static int __driver_rfc4106_decrypt(struct aead_request *req)
  802. {
  803. u8 one_entry_in_sg = 0;
  804. u8 *src, *dst, *assoc;
  805. unsigned long tempCipherLen = 0;
  806. __be32 counter = cpu_to_be32(1);
  807. int retval = 0;
  808. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  809. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(tfm);
  810. void *aes_ctx = &(ctx->aes_key_expanded);
  811. unsigned long auth_tag_len = crypto_aead_authsize(tfm);
  812. u8 iv_and_authTag[32+AESNI_ALIGN];
  813. u8 *iv = (u8 *) PTR_ALIGN((u8 *)iv_and_authTag, AESNI_ALIGN);
  814. u8 *authTag = iv + 16;
  815. struct scatter_walk src_sg_walk;
  816. struct scatter_walk assoc_sg_walk;
  817. struct scatter_walk dst_sg_walk;
  818. unsigned int i;
  819. if (unlikely((req->cryptlen < auth_tag_len) ||
  820. (req->assoclen != 8 && req->assoclen != 12)))
  821. return -EINVAL;
  822. /* Assuming we are supporting rfc4106 64-bit extended */
  823. /* sequence numbers We need to have the AAD length */
  824. /* equal to 8 or 12 bytes */
  825. tempCipherLen = (unsigned long)(req->cryptlen - auth_tag_len);
  826. /* IV below built */
  827. for (i = 0; i < 4; i++)
  828. *(iv+i) = ctx->nonce[i];
  829. for (i = 0; i < 8; i++)
  830. *(iv+4+i) = req->iv[i];
  831. *((__be32 *)(iv+12)) = counter;
  832. if ((sg_is_last(req->src)) && (sg_is_last(req->assoc))) {
  833. one_entry_in_sg = 1;
  834. scatterwalk_start(&src_sg_walk, req->src);
  835. scatterwalk_start(&assoc_sg_walk, req->assoc);
  836. src = scatterwalk_map(&src_sg_walk);
  837. assoc = scatterwalk_map(&assoc_sg_walk);
  838. dst = src;
  839. if (unlikely(req->src != req->dst)) {
  840. scatterwalk_start(&dst_sg_walk, req->dst);
  841. dst = scatterwalk_map(&dst_sg_walk);
  842. }
  843. } else {
  844. /* Allocate memory for src, dst, assoc */
  845. src = kmalloc(req->cryptlen + req->assoclen, GFP_ATOMIC);
  846. if (!src)
  847. return -ENOMEM;
  848. assoc = (src + req->cryptlen + auth_tag_len);
  849. scatterwalk_map_and_copy(src, req->src, 0, req->cryptlen, 0);
  850. scatterwalk_map_and_copy(assoc, req->assoc, 0,
  851. req->assoclen, 0);
  852. dst = src;
  853. }
  854. aesni_gcm_dec(aes_ctx, dst, src, tempCipherLen, iv,
  855. ctx->hash_subkey, assoc, (unsigned long)req->assoclen,
  856. authTag, auth_tag_len);
  857. /* Compare generated tag with passed in tag. */
  858. retval = memcmp(src + tempCipherLen, authTag, auth_tag_len) ?
  859. -EBADMSG : 0;
  860. if (one_entry_in_sg) {
  861. if (unlikely(req->src != req->dst)) {
  862. scatterwalk_unmap(dst);
  863. scatterwalk_done(&dst_sg_walk, 0, 0);
  864. }
  865. scatterwalk_unmap(src);
  866. scatterwalk_unmap(assoc);
  867. scatterwalk_done(&src_sg_walk, 0, 0);
  868. scatterwalk_done(&assoc_sg_walk, 0, 0);
  869. } else {
  870. scatterwalk_map_and_copy(dst, req->dst, 0, req->cryptlen, 1);
  871. kfree(src);
  872. }
  873. return retval;
  874. }
  875. #endif
  876. static struct crypto_alg aesni_algs[] = { {
  877. .cra_name = "aes",
  878. .cra_driver_name = "aes-aesni",
  879. .cra_priority = 300,
  880. .cra_flags = CRYPTO_ALG_TYPE_CIPHER,
  881. .cra_blocksize = AES_BLOCK_SIZE,
  882. .cra_ctxsize = sizeof(struct crypto_aes_ctx) +
  883. AESNI_ALIGN - 1,
  884. .cra_alignmask = 0,
  885. .cra_module = THIS_MODULE,
  886. .cra_u = {
  887. .cipher = {
  888. .cia_min_keysize = AES_MIN_KEY_SIZE,
  889. .cia_max_keysize = AES_MAX_KEY_SIZE,
  890. .cia_setkey = aes_set_key,
  891. .cia_encrypt = aes_encrypt,
  892. .cia_decrypt = aes_decrypt
  893. }
  894. }
  895. }, {
  896. .cra_name = "__aes-aesni",
  897. .cra_driver_name = "__driver-aes-aesni",
  898. .cra_priority = 0,
  899. .cra_flags = CRYPTO_ALG_TYPE_CIPHER,
  900. .cra_blocksize = AES_BLOCK_SIZE,
  901. .cra_ctxsize = sizeof(struct crypto_aes_ctx) +
  902. AESNI_ALIGN - 1,
  903. .cra_alignmask = 0,
  904. .cra_module = THIS_MODULE,
  905. .cra_u = {
  906. .cipher = {
  907. .cia_min_keysize = AES_MIN_KEY_SIZE,
  908. .cia_max_keysize = AES_MAX_KEY_SIZE,
  909. .cia_setkey = aes_set_key,
  910. .cia_encrypt = __aes_encrypt,
  911. .cia_decrypt = __aes_decrypt
  912. }
  913. }
  914. }, {
  915. .cra_name = "__ecb-aes-aesni",
  916. .cra_driver_name = "__driver-ecb-aes-aesni",
  917. .cra_priority = 0,
  918. .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
  919. .cra_blocksize = AES_BLOCK_SIZE,
  920. .cra_ctxsize = sizeof(struct crypto_aes_ctx) +
  921. AESNI_ALIGN - 1,
  922. .cra_alignmask = 0,
  923. .cra_type = &crypto_blkcipher_type,
  924. .cra_module = THIS_MODULE,
  925. .cra_u = {
  926. .blkcipher = {
  927. .min_keysize = AES_MIN_KEY_SIZE,
  928. .max_keysize = AES_MAX_KEY_SIZE,
  929. .setkey = aes_set_key,
  930. .encrypt = ecb_encrypt,
  931. .decrypt = ecb_decrypt,
  932. },
  933. },
  934. }, {
  935. .cra_name = "__cbc-aes-aesni",
  936. .cra_driver_name = "__driver-cbc-aes-aesni",
  937. .cra_priority = 0,
  938. .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
  939. .cra_blocksize = AES_BLOCK_SIZE,
  940. .cra_ctxsize = sizeof(struct crypto_aes_ctx) +
  941. AESNI_ALIGN - 1,
  942. .cra_alignmask = 0,
  943. .cra_type = &crypto_blkcipher_type,
  944. .cra_module = THIS_MODULE,
  945. .cra_u = {
  946. .blkcipher = {
  947. .min_keysize = AES_MIN_KEY_SIZE,
  948. .max_keysize = AES_MAX_KEY_SIZE,
  949. .setkey = aes_set_key,
  950. .encrypt = cbc_encrypt,
  951. .decrypt = cbc_decrypt,
  952. },
  953. },
  954. }, {
  955. .cra_name = "ecb(aes)",
  956. .cra_driver_name = "ecb-aes-aesni",
  957. .cra_priority = 400,
  958. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
  959. .cra_blocksize = AES_BLOCK_SIZE,
  960. .cra_ctxsize = sizeof(struct async_helper_ctx),
  961. .cra_alignmask = 0,
  962. .cra_type = &crypto_ablkcipher_type,
  963. .cra_module = THIS_MODULE,
  964. .cra_init = ablk_ecb_init,
  965. .cra_exit = ablk_exit,
  966. .cra_u = {
  967. .ablkcipher = {
  968. .min_keysize = AES_MIN_KEY_SIZE,
  969. .max_keysize = AES_MAX_KEY_SIZE,
  970. .setkey = ablk_set_key,
  971. .encrypt = ablk_encrypt,
  972. .decrypt = ablk_decrypt,
  973. },
  974. },
  975. }, {
  976. .cra_name = "cbc(aes)",
  977. .cra_driver_name = "cbc-aes-aesni",
  978. .cra_priority = 400,
  979. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
  980. .cra_blocksize = AES_BLOCK_SIZE,
  981. .cra_ctxsize = sizeof(struct async_helper_ctx),
  982. .cra_alignmask = 0,
  983. .cra_type = &crypto_ablkcipher_type,
  984. .cra_module = THIS_MODULE,
  985. .cra_init = ablk_cbc_init,
  986. .cra_exit = ablk_exit,
  987. .cra_u = {
  988. .ablkcipher = {
  989. .min_keysize = AES_MIN_KEY_SIZE,
  990. .max_keysize = AES_MAX_KEY_SIZE,
  991. .ivsize = AES_BLOCK_SIZE,
  992. .setkey = ablk_set_key,
  993. .encrypt = ablk_encrypt,
  994. .decrypt = ablk_decrypt,
  995. },
  996. },
  997. #ifdef CONFIG_X86_64
  998. }, {
  999. .cra_name = "__ctr-aes-aesni",
  1000. .cra_driver_name = "__driver-ctr-aes-aesni",
  1001. .cra_priority = 0,
  1002. .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
  1003. .cra_blocksize = 1,
  1004. .cra_ctxsize = sizeof(struct crypto_aes_ctx) +
  1005. AESNI_ALIGN - 1,
  1006. .cra_alignmask = 0,
  1007. .cra_type = &crypto_blkcipher_type,
  1008. .cra_module = THIS_MODULE,
  1009. .cra_u = {
  1010. .blkcipher = {
  1011. .min_keysize = AES_MIN_KEY_SIZE,
  1012. .max_keysize = AES_MAX_KEY_SIZE,
  1013. .ivsize = AES_BLOCK_SIZE,
  1014. .setkey = aes_set_key,
  1015. .encrypt = ctr_crypt,
  1016. .decrypt = ctr_crypt,
  1017. },
  1018. },
  1019. }, {
  1020. .cra_name = "ctr(aes)",
  1021. .cra_driver_name = "ctr-aes-aesni",
  1022. .cra_priority = 400,
  1023. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
  1024. .cra_blocksize = 1,
  1025. .cra_ctxsize = sizeof(struct async_helper_ctx),
  1026. .cra_alignmask = 0,
  1027. .cra_type = &crypto_ablkcipher_type,
  1028. .cra_module = THIS_MODULE,
  1029. .cra_init = ablk_ctr_init,
  1030. .cra_exit = ablk_exit,
  1031. .cra_u = {
  1032. .ablkcipher = {
  1033. .min_keysize = AES_MIN_KEY_SIZE,
  1034. .max_keysize = AES_MAX_KEY_SIZE,
  1035. .ivsize = AES_BLOCK_SIZE,
  1036. .setkey = ablk_set_key,
  1037. .encrypt = ablk_encrypt,
  1038. .decrypt = ablk_encrypt,
  1039. .geniv = "chainiv",
  1040. },
  1041. },
  1042. }, {
  1043. .cra_name = "__gcm-aes-aesni",
  1044. .cra_driver_name = "__driver-gcm-aes-aesni",
  1045. .cra_priority = 0,
  1046. .cra_flags = CRYPTO_ALG_TYPE_AEAD,
  1047. .cra_blocksize = 1,
  1048. .cra_ctxsize = sizeof(struct aesni_rfc4106_gcm_ctx) +
  1049. AESNI_ALIGN,
  1050. .cra_alignmask = 0,
  1051. .cra_type = &crypto_aead_type,
  1052. .cra_module = THIS_MODULE,
  1053. .cra_u = {
  1054. .aead = {
  1055. .encrypt = __driver_rfc4106_encrypt,
  1056. .decrypt = __driver_rfc4106_decrypt,
  1057. },
  1058. },
  1059. }, {
  1060. .cra_name = "rfc4106(gcm(aes))",
  1061. .cra_driver_name = "rfc4106-gcm-aesni",
  1062. .cra_priority = 400,
  1063. .cra_flags = CRYPTO_ALG_TYPE_AEAD | CRYPTO_ALG_ASYNC,
  1064. .cra_blocksize = 1,
  1065. .cra_ctxsize = sizeof(struct aesni_rfc4106_gcm_ctx) +
  1066. AESNI_ALIGN,
  1067. .cra_alignmask = 0,
  1068. .cra_type = &crypto_nivaead_type,
  1069. .cra_module = THIS_MODULE,
  1070. .cra_init = rfc4106_init,
  1071. .cra_exit = rfc4106_exit,
  1072. .cra_u = {
  1073. .aead = {
  1074. .setkey = rfc4106_set_key,
  1075. .setauthsize = rfc4106_set_authsize,
  1076. .encrypt = rfc4106_encrypt,
  1077. .decrypt = rfc4106_decrypt,
  1078. .geniv = "seqiv",
  1079. .ivsize = 8,
  1080. .maxauthsize = 16,
  1081. },
  1082. },
  1083. #endif
  1084. #ifdef HAS_PCBC
  1085. }, {
  1086. .cra_name = "pcbc(aes)",
  1087. .cra_driver_name = "pcbc-aes-aesni",
  1088. .cra_priority = 400,
  1089. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
  1090. .cra_blocksize = AES_BLOCK_SIZE,
  1091. .cra_ctxsize = sizeof(struct async_helper_ctx),
  1092. .cra_alignmask = 0,
  1093. .cra_type = &crypto_ablkcipher_type,
  1094. .cra_module = THIS_MODULE,
  1095. .cra_init = ablk_pcbc_init,
  1096. .cra_exit = ablk_exit,
  1097. .cra_u = {
  1098. .ablkcipher = {
  1099. .min_keysize = AES_MIN_KEY_SIZE,
  1100. .max_keysize = AES_MAX_KEY_SIZE,
  1101. .ivsize = AES_BLOCK_SIZE,
  1102. .setkey = ablk_set_key,
  1103. .encrypt = ablk_encrypt,
  1104. .decrypt = ablk_decrypt,
  1105. },
  1106. },
  1107. #endif
  1108. }, {
  1109. .cra_name = "__lrw-aes-aesni",
  1110. .cra_driver_name = "__driver-lrw-aes-aesni",
  1111. .cra_priority = 0,
  1112. .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
  1113. .cra_blocksize = AES_BLOCK_SIZE,
  1114. .cra_ctxsize = sizeof(struct aesni_lrw_ctx),
  1115. .cra_alignmask = 0,
  1116. .cra_type = &crypto_blkcipher_type,
  1117. .cra_module = THIS_MODULE,
  1118. .cra_exit = lrw_aesni_exit_tfm,
  1119. .cra_u = {
  1120. .blkcipher = {
  1121. .min_keysize = AES_MIN_KEY_SIZE + AES_BLOCK_SIZE,
  1122. .max_keysize = AES_MAX_KEY_SIZE + AES_BLOCK_SIZE,
  1123. .ivsize = AES_BLOCK_SIZE,
  1124. .setkey = lrw_aesni_setkey,
  1125. .encrypt = lrw_encrypt,
  1126. .decrypt = lrw_decrypt,
  1127. },
  1128. },
  1129. }, {
  1130. .cra_name = "__xts-aes-aesni",
  1131. .cra_driver_name = "__driver-xts-aes-aesni",
  1132. .cra_priority = 0,
  1133. .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
  1134. .cra_blocksize = AES_BLOCK_SIZE,
  1135. .cra_ctxsize = sizeof(struct aesni_xts_ctx),
  1136. .cra_alignmask = 0,
  1137. .cra_type = &crypto_blkcipher_type,
  1138. .cra_module = THIS_MODULE,
  1139. .cra_u = {
  1140. .blkcipher = {
  1141. .min_keysize = 2 * AES_MIN_KEY_SIZE,
  1142. .max_keysize = 2 * AES_MAX_KEY_SIZE,
  1143. .ivsize = AES_BLOCK_SIZE,
  1144. .setkey = xts_aesni_setkey,
  1145. .encrypt = xts_encrypt,
  1146. .decrypt = xts_decrypt,
  1147. },
  1148. },
  1149. }, {
  1150. .cra_name = "lrw(aes)",
  1151. .cra_driver_name = "lrw-aes-aesni",
  1152. .cra_priority = 400,
  1153. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
  1154. .cra_blocksize = AES_BLOCK_SIZE,
  1155. .cra_ctxsize = sizeof(struct async_helper_ctx),
  1156. .cra_alignmask = 0,
  1157. .cra_type = &crypto_ablkcipher_type,
  1158. .cra_module = THIS_MODULE,
  1159. .cra_init = ablk_init,
  1160. .cra_exit = ablk_exit,
  1161. .cra_u = {
  1162. .ablkcipher = {
  1163. .min_keysize = AES_MIN_KEY_SIZE + AES_BLOCK_SIZE,
  1164. .max_keysize = AES_MAX_KEY_SIZE + AES_BLOCK_SIZE,
  1165. .ivsize = AES_BLOCK_SIZE,
  1166. .setkey = ablk_set_key,
  1167. .encrypt = ablk_encrypt,
  1168. .decrypt = ablk_decrypt,
  1169. },
  1170. },
  1171. }, {
  1172. .cra_name = "xts(aes)",
  1173. .cra_driver_name = "xts-aes-aesni",
  1174. .cra_priority = 400,
  1175. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
  1176. .cra_blocksize = AES_BLOCK_SIZE,
  1177. .cra_ctxsize = sizeof(struct async_helper_ctx),
  1178. .cra_alignmask = 0,
  1179. .cra_type = &crypto_ablkcipher_type,
  1180. .cra_module = THIS_MODULE,
  1181. .cra_init = ablk_init,
  1182. .cra_exit = ablk_exit,
  1183. .cra_u = {
  1184. .ablkcipher = {
  1185. .min_keysize = 2 * AES_MIN_KEY_SIZE,
  1186. .max_keysize = 2 * AES_MAX_KEY_SIZE,
  1187. .ivsize = AES_BLOCK_SIZE,
  1188. .setkey = ablk_set_key,
  1189. .encrypt = ablk_encrypt,
  1190. .decrypt = ablk_decrypt,
  1191. },
  1192. },
  1193. } };
  1194. static const struct x86_cpu_id aesni_cpu_id[] = {
  1195. X86_FEATURE_MATCH(X86_FEATURE_AES),
  1196. {}
  1197. };
  1198. MODULE_DEVICE_TABLE(x86cpu, aesni_cpu_id);
  1199. static int __init aesni_init(void)
  1200. {
  1201. int err;
  1202. if (!x86_match_cpu(aesni_cpu_id))
  1203. return -ENODEV;
  1204. err = crypto_fpu_init();
  1205. if (err)
  1206. return err;
  1207. return crypto_register_algs(aesni_algs, ARRAY_SIZE(aesni_algs));
  1208. }
  1209. static void __exit aesni_exit(void)
  1210. {
  1211. crypto_unregister_algs(aesni_algs, ARRAY_SIZE(aesni_algs));
  1212. crypto_fpu_exit();
  1213. }
  1214. module_init(aesni_init);
  1215. module_exit(aesni_exit);
  1216. MODULE_DESCRIPTION("Rijndael (AES) Cipher Algorithm, Intel AES-NI instructions optimized");
  1217. MODULE_LICENSE("GPL");
  1218. MODULE_ALIAS("aes");