icp-native.c 6.8 KB

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  1. /*
  2. * Copyright 2011 IBM Corporation.
  3. *
  4. * This program is free software; you can redistribute it and/or
  5. * modify it under the terms of the GNU General Public License
  6. * as published by the Free Software Foundation; either version
  7. * 2 of the License, or (at your option) any later version.
  8. *
  9. */
  10. #include <linux/types.h>
  11. #include <linux/kernel.h>
  12. #include <linux/irq.h>
  13. #include <linux/smp.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/init.h>
  16. #include <linux/cpu.h>
  17. #include <linux/of.h>
  18. #include <linux/spinlock.h>
  19. #include <linux/module.h>
  20. #include <asm/prom.h>
  21. #include <asm/io.h>
  22. #include <asm/smp.h>
  23. #include <asm/irq.h>
  24. #include <asm/errno.h>
  25. #include <asm/xics.h>
  26. #include <asm/kvm_ppc.h>
  27. struct icp_ipl {
  28. union {
  29. u32 word;
  30. u8 bytes[4];
  31. } xirr_poll;
  32. union {
  33. u32 word;
  34. u8 bytes[4];
  35. } xirr;
  36. u32 dummy;
  37. union {
  38. u32 word;
  39. u8 bytes[4];
  40. } qirr;
  41. u32 link_a;
  42. u32 link_b;
  43. u32 link_c;
  44. };
  45. static struct icp_ipl __iomem *icp_native_regs[NR_CPUS];
  46. static inline unsigned int icp_native_get_xirr(void)
  47. {
  48. int cpu = smp_processor_id();
  49. unsigned int xirr;
  50. /* Handled an interrupt latched by KVM */
  51. xirr = kvmppc_get_xics_latch();
  52. if (xirr)
  53. return xirr;
  54. return in_be32(&icp_native_regs[cpu]->xirr.word);
  55. }
  56. static inline void icp_native_set_xirr(unsigned int value)
  57. {
  58. int cpu = smp_processor_id();
  59. out_be32(&icp_native_regs[cpu]->xirr.word, value);
  60. }
  61. static inline void icp_native_set_cppr(u8 value)
  62. {
  63. int cpu = smp_processor_id();
  64. out_8(&icp_native_regs[cpu]->xirr.bytes[0], value);
  65. }
  66. static inline void icp_native_set_qirr(int n_cpu, u8 value)
  67. {
  68. out_8(&icp_native_regs[n_cpu]->qirr.bytes[0], value);
  69. }
  70. static void icp_native_set_cpu_priority(unsigned char cppr)
  71. {
  72. xics_set_base_cppr(cppr);
  73. icp_native_set_cppr(cppr);
  74. iosync();
  75. }
  76. void icp_native_eoi(struct irq_data *d)
  77. {
  78. unsigned int hw_irq = (unsigned int)irqd_to_hwirq(d);
  79. iosync();
  80. icp_native_set_xirr((xics_pop_cppr() << 24) | hw_irq);
  81. }
  82. static void icp_native_teardown_cpu(void)
  83. {
  84. int cpu = smp_processor_id();
  85. /* Clear any pending IPI */
  86. icp_native_set_qirr(cpu, 0xff);
  87. }
  88. static void icp_native_flush_ipi(void)
  89. {
  90. /* We take the ipi irq but and never return so we
  91. * need to EOI the IPI, but want to leave our priority 0
  92. *
  93. * should we check all the other interrupts too?
  94. * should we be flagging idle loop instead?
  95. * or creating some task to be scheduled?
  96. */
  97. icp_native_set_xirr((0x00 << 24) | XICS_IPI);
  98. }
  99. static unsigned int icp_native_get_irq(void)
  100. {
  101. unsigned int xirr = icp_native_get_xirr();
  102. unsigned int vec = xirr & 0x00ffffff;
  103. unsigned int irq;
  104. if (vec == XICS_IRQ_SPURIOUS)
  105. return NO_IRQ;
  106. irq = irq_find_mapping(xics_host, vec);
  107. if (likely(irq != NO_IRQ)) {
  108. xics_push_cppr(vec);
  109. return irq;
  110. }
  111. /* We don't have a linux mapping, so have rtas mask it. */
  112. xics_mask_unknown_vec(vec);
  113. /* We might learn about it later, so EOI it */
  114. icp_native_set_xirr(xirr);
  115. return NO_IRQ;
  116. }
  117. #ifdef CONFIG_SMP
  118. static void icp_native_cause_ipi(int cpu, unsigned long data)
  119. {
  120. kvmppc_set_host_ipi(cpu, 1);
  121. icp_native_set_qirr(cpu, IPI_PRIORITY);
  122. }
  123. void xics_wake_cpu(int cpu)
  124. {
  125. icp_native_set_qirr(cpu, IPI_PRIORITY);
  126. }
  127. EXPORT_SYMBOL_GPL(xics_wake_cpu);
  128. static irqreturn_t icp_native_ipi_action(int irq, void *dev_id)
  129. {
  130. int cpu = smp_processor_id();
  131. kvmppc_set_host_ipi(cpu, 0);
  132. icp_native_set_qirr(cpu, 0xff);
  133. return smp_ipi_demux();
  134. }
  135. #endif /* CONFIG_SMP */
  136. static int __init icp_native_map_one_cpu(int hw_id, unsigned long addr,
  137. unsigned long size)
  138. {
  139. char *rname;
  140. int i, cpu = -1;
  141. /* This may look gross but it's good enough for now, we don't quite
  142. * have a hard -> linux processor id matching.
  143. */
  144. for_each_possible_cpu(i) {
  145. if (!cpu_present(i))
  146. continue;
  147. if (hw_id == get_hard_smp_processor_id(i)) {
  148. cpu = i;
  149. break;
  150. }
  151. }
  152. /* Fail, skip that CPU. Don't print, it's normal, some XICS come up
  153. * with way more entries in there than you have CPUs
  154. */
  155. if (cpu == -1)
  156. return 0;
  157. rname = kasprintf(GFP_KERNEL, "CPU %d [0x%x] Interrupt Presentation",
  158. cpu, hw_id);
  159. if (!request_mem_region(addr, size, rname)) {
  160. pr_warning("icp_native: Could not reserve ICP MMIO"
  161. " for CPU %d, interrupt server #0x%x\n",
  162. cpu, hw_id);
  163. return -EBUSY;
  164. }
  165. icp_native_regs[cpu] = ioremap(addr, size);
  166. kvmppc_set_xics_phys(cpu, addr);
  167. if (!icp_native_regs[cpu]) {
  168. pr_warning("icp_native: Failed ioremap for CPU %d, "
  169. "interrupt server #0x%x, addr %#lx\n",
  170. cpu, hw_id, addr);
  171. release_mem_region(addr, size);
  172. return -ENOMEM;
  173. }
  174. return 0;
  175. }
  176. static int __init icp_native_init_one_node(struct device_node *np,
  177. unsigned int *indx)
  178. {
  179. unsigned int ilen;
  180. const u32 *ireg;
  181. int i;
  182. int reg_tuple_size;
  183. int num_servers = 0;
  184. /* This code does the theorically broken assumption that the interrupt
  185. * server numbers are the same as the hard CPU numbers.
  186. * This happens to be the case so far but we are playing with fire...
  187. * should be fixed one of these days. -BenH.
  188. */
  189. ireg = of_get_property(np, "ibm,interrupt-server-ranges", &ilen);
  190. /* Do that ever happen ? we'll know soon enough... but even good'old
  191. * f80 does have that property ..
  192. */
  193. WARN_ON((ireg == NULL) || (ilen != 2*sizeof(u32)));
  194. if (ireg) {
  195. *indx = of_read_number(ireg, 1);
  196. if (ilen >= 2*sizeof(u32))
  197. num_servers = of_read_number(ireg + 1, 1);
  198. }
  199. ireg = of_get_property(np, "reg", &ilen);
  200. if (!ireg) {
  201. pr_err("icp_native: Can't find interrupt reg property");
  202. return -1;
  203. }
  204. reg_tuple_size = (of_n_addr_cells(np) + of_n_size_cells(np)) * 4;
  205. if (((ilen % reg_tuple_size) != 0)
  206. || (num_servers && (num_servers != (ilen / reg_tuple_size)))) {
  207. pr_err("icp_native: ICP reg len (%d) != num servers (%d)",
  208. ilen / reg_tuple_size, num_servers);
  209. return -1;
  210. }
  211. for (i = 0; i < (ilen / reg_tuple_size); i++) {
  212. struct resource r;
  213. int err;
  214. err = of_address_to_resource(np, i, &r);
  215. if (err) {
  216. pr_err("icp_native: Could not translate ICP MMIO"
  217. " for interrupt server 0x%x (%d)\n", *indx, err);
  218. return -1;
  219. }
  220. if (icp_native_map_one_cpu(*indx, r.start, resource_size(&r)))
  221. return -1;
  222. (*indx)++;
  223. }
  224. return 0;
  225. }
  226. static const struct icp_ops icp_native_ops = {
  227. .get_irq = icp_native_get_irq,
  228. .eoi = icp_native_eoi,
  229. .set_priority = icp_native_set_cpu_priority,
  230. .teardown_cpu = icp_native_teardown_cpu,
  231. .flush_ipi = icp_native_flush_ipi,
  232. #ifdef CONFIG_SMP
  233. .ipi_action = icp_native_ipi_action,
  234. .cause_ipi = icp_native_cause_ipi,
  235. #endif
  236. };
  237. int __init icp_native_init(void)
  238. {
  239. struct device_node *np;
  240. u32 indx = 0;
  241. int found = 0;
  242. for_each_compatible_node(np, NULL, "ibm,ppc-xicp")
  243. if (icp_native_init_one_node(np, &indx) == 0)
  244. found = 1;
  245. if (!found) {
  246. for_each_node_by_type(np,
  247. "PowerPC-External-Interrupt-Presentation") {
  248. if (icp_native_init_one_node(np, &indx) == 0)
  249. found = 1;
  250. }
  251. }
  252. if (found == 0)
  253. return -ENODEV;
  254. icp_ops = &icp_native_ops;
  255. return 0;
  256. }