eeh_pseries.c 19 KB

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  1. /*
  2. * The file intends to implement the platform dependent EEH operations on pseries.
  3. * Actually, the pseries platform is built based on RTAS heavily. That means the
  4. * pseries platform dependent EEH operations will be built on RTAS calls. The functions
  5. * are devired from arch/powerpc/platforms/pseries/eeh.c and necessary cleanup has
  6. * been done.
  7. *
  8. * Copyright Benjamin Herrenschmidt & Gavin Shan, IBM Corporation 2011.
  9. * Copyright IBM Corporation 2001, 2005, 2006
  10. * Copyright Dave Engebretsen & Todd Inglett 2001
  11. * Copyright Linas Vepstas 2005, 2006
  12. *
  13. * This program is free software; you can redistribute it and/or modify
  14. * it under the terms of the GNU General Public License as published by
  15. * the Free Software Foundation; either version 2 of the License, or
  16. * (at your option) any later version.
  17. *
  18. * This program is distributed in the hope that it will be useful,
  19. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  21. * GNU General Public License for more details.
  22. *
  23. * You should have received a copy of the GNU General Public License
  24. * along with this program; if not, write to the Free Software
  25. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  26. */
  27. #include <linux/atomic.h>
  28. #include <linux/delay.h>
  29. #include <linux/export.h>
  30. #include <linux/init.h>
  31. #include <linux/list.h>
  32. #include <linux/of.h>
  33. #include <linux/pci.h>
  34. #include <linux/proc_fs.h>
  35. #include <linux/rbtree.h>
  36. #include <linux/sched.h>
  37. #include <linux/seq_file.h>
  38. #include <linux/spinlock.h>
  39. #include <asm/eeh.h>
  40. #include <asm/eeh_event.h>
  41. #include <asm/io.h>
  42. #include <asm/machdep.h>
  43. #include <asm/ppc-pci.h>
  44. #include <asm/rtas.h>
  45. /* RTAS tokens */
  46. static int ibm_set_eeh_option;
  47. static int ibm_set_slot_reset;
  48. static int ibm_read_slot_reset_state;
  49. static int ibm_read_slot_reset_state2;
  50. static int ibm_slot_error_detail;
  51. static int ibm_get_config_addr_info;
  52. static int ibm_get_config_addr_info2;
  53. static int ibm_configure_bridge;
  54. static int ibm_configure_pe;
  55. /*
  56. * Buffer for reporting slot-error-detail rtas calls. Its here
  57. * in BSS, and not dynamically alloced, so that it ends up in
  58. * RMO where RTAS can access it.
  59. */
  60. static unsigned char slot_errbuf[RTAS_ERROR_LOG_MAX];
  61. static DEFINE_SPINLOCK(slot_errbuf_lock);
  62. static int eeh_error_buf_size;
  63. /**
  64. * pseries_eeh_init - EEH platform dependent initialization
  65. *
  66. * EEH platform dependent initialization on pseries.
  67. */
  68. static int pseries_eeh_init(void)
  69. {
  70. /* figure out EEH RTAS function call tokens */
  71. ibm_set_eeh_option = rtas_token("ibm,set-eeh-option");
  72. ibm_set_slot_reset = rtas_token("ibm,set-slot-reset");
  73. ibm_read_slot_reset_state2 = rtas_token("ibm,read-slot-reset-state2");
  74. ibm_read_slot_reset_state = rtas_token("ibm,read-slot-reset-state");
  75. ibm_slot_error_detail = rtas_token("ibm,slot-error-detail");
  76. ibm_get_config_addr_info2 = rtas_token("ibm,get-config-addr-info2");
  77. ibm_get_config_addr_info = rtas_token("ibm,get-config-addr-info");
  78. ibm_configure_pe = rtas_token("ibm,configure-pe");
  79. ibm_configure_bridge = rtas_token("ibm,configure-bridge");
  80. /*
  81. * Necessary sanity check. We needn't check "get-config-addr-info"
  82. * and its variant since the old firmware probably support address
  83. * of domain/bus/slot/function for EEH RTAS operations.
  84. */
  85. if (ibm_set_eeh_option == RTAS_UNKNOWN_SERVICE) {
  86. pr_warning("%s: RTAS service <ibm,set-eeh-option> invalid\n",
  87. __func__);
  88. return -EINVAL;
  89. } else if (ibm_set_slot_reset == RTAS_UNKNOWN_SERVICE) {
  90. pr_warning("%s: RTAS service <ibm,set-slot-reset> invalid\n",
  91. __func__);
  92. return -EINVAL;
  93. } else if (ibm_read_slot_reset_state2 == RTAS_UNKNOWN_SERVICE &&
  94. ibm_read_slot_reset_state == RTAS_UNKNOWN_SERVICE) {
  95. pr_warning("%s: RTAS service <ibm,read-slot-reset-state2> and "
  96. "<ibm,read-slot-reset-state> invalid\n",
  97. __func__);
  98. return -EINVAL;
  99. } else if (ibm_slot_error_detail == RTAS_UNKNOWN_SERVICE) {
  100. pr_warning("%s: RTAS service <ibm,slot-error-detail> invalid\n",
  101. __func__);
  102. return -EINVAL;
  103. } else if (ibm_configure_pe == RTAS_UNKNOWN_SERVICE &&
  104. ibm_configure_bridge == RTAS_UNKNOWN_SERVICE) {
  105. pr_warning("%s: RTAS service <ibm,configure-pe> and "
  106. "<ibm,configure-bridge> invalid\n",
  107. __func__);
  108. return -EINVAL;
  109. }
  110. /* Initialize error log lock and size */
  111. spin_lock_init(&slot_errbuf_lock);
  112. eeh_error_buf_size = rtas_token("rtas-error-log-max");
  113. if (eeh_error_buf_size == RTAS_UNKNOWN_SERVICE) {
  114. pr_warning("%s: unknown EEH error log size\n",
  115. __func__);
  116. eeh_error_buf_size = 1024;
  117. } else if (eeh_error_buf_size > RTAS_ERROR_LOG_MAX) {
  118. pr_warning("%s: EEH error log size %d exceeds the maximal %d\n",
  119. __func__, eeh_error_buf_size, RTAS_ERROR_LOG_MAX);
  120. eeh_error_buf_size = RTAS_ERROR_LOG_MAX;
  121. }
  122. /* Set EEH probe mode */
  123. eeh_probe_mode_set(EEH_PROBE_MODE_DEVTREE);
  124. return 0;
  125. }
  126. static int pseries_eeh_cap_start(struct device_node *dn)
  127. {
  128. struct pci_dn *pdn = PCI_DN(dn);
  129. u32 status;
  130. if (!pdn)
  131. return 0;
  132. rtas_read_config(pdn, PCI_STATUS, 2, &status);
  133. if (!(status & PCI_STATUS_CAP_LIST))
  134. return 0;
  135. return PCI_CAPABILITY_LIST;
  136. }
  137. static int pseries_eeh_find_cap(struct device_node *dn, int cap)
  138. {
  139. struct pci_dn *pdn = PCI_DN(dn);
  140. int pos = pseries_eeh_cap_start(dn);
  141. int cnt = 48; /* Maximal number of capabilities */
  142. u32 id;
  143. if (!pos)
  144. return 0;
  145. while (cnt--) {
  146. rtas_read_config(pdn, pos, 1, &pos);
  147. if (pos < 0x40)
  148. break;
  149. pos &= ~3;
  150. rtas_read_config(pdn, pos + PCI_CAP_LIST_ID, 1, &id);
  151. if (id == 0xff)
  152. break;
  153. if (id == cap)
  154. return pos;
  155. pos += PCI_CAP_LIST_NEXT;
  156. }
  157. return 0;
  158. }
  159. /**
  160. * pseries_eeh_of_probe - EEH probe on the given device
  161. * @dn: OF node
  162. * @flag: Unused
  163. *
  164. * When EEH module is installed during system boot, all PCI devices
  165. * are checked one by one to see if it supports EEH. The function
  166. * is introduced for the purpose.
  167. */
  168. static void *pseries_eeh_of_probe(struct device_node *dn, void *flag)
  169. {
  170. struct eeh_dev *edev;
  171. struct eeh_pe pe;
  172. struct pci_dn *pdn = PCI_DN(dn);
  173. const u32 *class_code, *vendor_id, *device_id;
  174. const u32 *regs;
  175. u32 pcie_flags;
  176. int enable = 0;
  177. int ret;
  178. /* Retrieve OF node and eeh device */
  179. edev = of_node_to_eeh_dev(dn);
  180. if (edev->pe || !of_device_is_available(dn))
  181. return NULL;
  182. /* Retrieve class/vendor/device IDs */
  183. class_code = of_get_property(dn, "class-code", NULL);
  184. vendor_id = of_get_property(dn, "vendor-id", NULL);
  185. device_id = of_get_property(dn, "device-id", NULL);
  186. /* Skip for bad OF node or PCI-ISA bridge */
  187. if (!class_code || !vendor_id || !device_id)
  188. return NULL;
  189. if (dn->type && !strcmp(dn->type, "isa"))
  190. return NULL;
  191. /*
  192. * Update class code and mode of eeh device. We need
  193. * correctly reflects that current device is root port
  194. * or PCIe switch downstream port.
  195. */
  196. edev->class_code = *class_code;
  197. edev->pcie_cap = pseries_eeh_find_cap(dn, PCI_CAP_ID_EXP);
  198. edev->mode &= 0xFFFFFF00;
  199. if ((edev->class_code >> 8) == PCI_CLASS_BRIDGE_PCI) {
  200. edev->mode |= EEH_DEV_BRIDGE;
  201. if (edev->pcie_cap) {
  202. rtas_read_config(pdn, edev->pcie_cap + PCI_EXP_FLAGS,
  203. 2, &pcie_flags);
  204. pcie_flags = (pcie_flags & PCI_EXP_FLAGS_TYPE) >> 4;
  205. if (pcie_flags == PCI_EXP_TYPE_ROOT_PORT)
  206. edev->mode |= EEH_DEV_ROOT_PORT;
  207. else if (pcie_flags == PCI_EXP_TYPE_DOWNSTREAM)
  208. edev->mode |= EEH_DEV_DS_PORT;
  209. }
  210. }
  211. /* Retrieve the device address */
  212. regs = of_get_property(dn, "reg", NULL);
  213. if (!regs) {
  214. pr_warning("%s: OF node property %s::reg not found\n",
  215. __func__, dn->full_name);
  216. return NULL;
  217. }
  218. /* Initialize the fake PE */
  219. memset(&pe, 0, sizeof(struct eeh_pe));
  220. pe.phb = edev->phb;
  221. pe.config_addr = regs[0];
  222. /* Enable EEH on the device */
  223. ret = eeh_ops->set_option(&pe, EEH_OPT_ENABLE);
  224. if (!ret) {
  225. edev->config_addr = regs[0];
  226. /* Retrieve PE address */
  227. edev->pe_config_addr = eeh_ops->get_pe_addr(&pe);
  228. pe.addr = edev->pe_config_addr;
  229. /* Some older systems (Power4) allow the ibm,set-eeh-option
  230. * call to succeed even on nodes where EEH is not supported.
  231. * Verify support explicitly.
  232. */
  233. ret = eeh_ops->get_state(&pe, NULL);
  234. if (ret > 0 && ret != EEH_STATE_NOT_SUPPORT)
  235. enable = 1;
  236. if (enable) {
  237. eeh_subsystem_enabled = 1;
  238. eeh_add_to_parent_pe(edev);
  239. pr_debug("%s: EEH enabled on %s PHB#%d-PE#%x, config addr#%x\n",
  240. __func__, dn->full_name, pe.phb->global_number,
  241. pe.addr, pe.config_addr);
  242. } else if (dn->parent && of_node_to_eeh_dev(dn->parent) &&
  243. (of_node_to_eeh_dev(dn->parent))->pe) {
  244. /* This device doesn't support EEH, but it may have an
  245. * EEH parent, in which case we mark it as supported.
  246. */
  247. edev->config_addr = of_node_to_eeh_dev(dn->parent)->config_addr;
  248. edev->pe_config_addr = of_node_to_eeh_dev(dn->parent)->pe_config_addr;
  249. eeh_add_to_parent_pe(edev);
  250. }
  251. }
  252. /* Save memory bars */
  253. eeh_save_bars(edev);
  254. return NULL;
  255. }
  256. /**
  257. * pseries_eeh_set_option - Initialize EEH or MMIO/DMA reenable
  258. * @pe: EEH PE
  259. * @option: operation to be issued
  260. *
  261. * The function is used to control the EEH functionality globally.
  262. * Currently, following options are support according to PAPR:
  263. * Enable EEH, Disable EEH, Enable MMIO and Enable DMA
  264. */
  265. static int pseries_eeh_set_option(struct eeh_pe *pe, int option)
  266. {
  267. int ret = 0;
  268. int config_addr;
  269. /*
  270. * When we're enabling or disabling EEH functioality on
  271. * the particular PE, the PE config address is possibly
  272. * unavailable. Therefore, we have to figure it out from
  273. * the FDT node.
  274. */
  275. switch (option) {
  276. case EEH_OPT_DISABLE:
  277. case EEH_OPT_ENABLE:
  278. case EEH_OPT_THAW_MMIO:
  279. case EEH_OPT_THAW_DMA:
  280. config_addr = pe->config_addr;
  281. if (pe->addr)
  282. config_addr = pe->addr;
  283. break;
  284. default:
  285. pr_err("%s: Invalid option %d\n",
  286. __func__, option);
  287. return -EINVAL;
  288. }
  289. ret = rtas_call(ibm_set_eeh_option, 4, 1, NULL,
  290. config_addr, BUID_HI(pe->phb->buid),
  291. BUID_LO(pe->phb->buid), option);
  292. return ret;
  293. }
  294. /**
  295. * pseries_eeh_get_pe_addr - Retrieve PE address
  296. * @pe: EEH PE
  297. *
  298. * Retrieve the assocated PE address. Actually, there're 2 RTAS
  299. * function calls dedicated for the purpose. We need implement
  300. * it through the new function and then the old one. Besides,
  301. * you should make sure the config address is figured out from
  302. * FDT node before calling the function.
  303. *
  304. * It's notable that zero'ed return value means invalid PE config
  305. * address.
  306. */
  307. static int pseries_eeh_get_pe_addr(struct eeh_pe *pe)
  308. {
  309. int ret = 0;
  310. int rets[3];
  311. if (ibm_get_config_addr_info2 != RTAS_UNKNOWN_SERVICE) {
  312. /*
  313. * First of all, we need to make sure there has one PE
  314. * associated with the device. Otherwise, PE address is
  315. * meaningless.
  316. */
  317. ret = rtas_call(ibm_get_config_addr_info2, 4, 2, rets,
  318. pe->config_addr, BUID_HI(pe->phb->buid),
  319. BUID_LO(pe->phb->buid), 1);
  320. if (ret || (rets[0] == 0))
  321. return 0;
  322. /* Retrieve the associated PE config address */
  323. ret = rtas_call(ibm_get_config_addr_info2, 4, 2, rets,
  324. pe->config_addr, BUID_HI(pe->phb->buid),
  325. BUID_LO(pe->phb->buid), 0);
  326. if (ret) {
  327. pr_warning("%s: Failed to get address for PHB#%d-PE#%x\n",
  328. __func__, pe->phb->global_number, pe->config_addr);
  329. return 0;
  330. }
  331. return rets[0];
  332. }
  333. if (ibm_get_config_addr_info != RTAS_UNKNOWN_SERVICE) {
  334. ret = rtas_call(ibm_get_config_addr_info, 4, 2, rets,
  335. pe->config_addr, BUID_HI(pe->phb->buid),
  336. BUID_LO(pe->phb->buid), 0);
  337. if (ret) {
  338. pr_warning("%s: Failed to get address for PHB#%d-PE#%x\n",
  339. __func__, pe->phb->global_number, pe->config_addr);
  340. return 0;
  341. }
  342. return rets[0];
  343. }
  344. return ret;
  345. }
  346. /**
  347. * pseries_eeh_get_state - Retrieve PE state
  348. * @pe: EEH PE
  349. * @state: return value
  350. *
  351. * Retrieve the state of the specified PE. On RTAS compliant
  352. * pseries platform, there already has one dedicated RTAS function
  353. * for the purpose. It's notable that the associated PE config address
  354. * might be ready when calling the function. Therefore, endeavour to
  355. * use the PE config address if possible. Further more, there're 2
  356. * RTAS calls for the purpose, we need to try the new one and back
  357. * to the old one if the new one couldn't work properly.
  358. */
  359. static int pseries_eeh_get_state(struct eeh_pe *pe, int *state)
  360. {
  361. int config_addr;
  362. int ret;
  363. int rets[4];
  364. int result;
  365. /* Figure out PE config address if possible */
  366. config_addr = pe->config_addr;
  367. if (pe->addr)
  368. config_addr = pe->addr;
  369. if (ibm_read_slot_reset_state2 != RTAS_UNKNOWN_SERVICE) {
  370. ret = rtas_call(ibm_read_slot_reset_state2, 3, 4, rets,
  371. config_addr, BUID_HI(pe->phb->buid),
  372. BUID_LO(pe->phb->buid));
  373. } else if (ibm_read_slot_reset_state != RTAS_UNKNOWN_SERVICE) {
  374. /* Fake PE unavailable info */
  375. rets[2] = 0;
  376. ret = rtas_call(ibm_read_slot_reset_state, 3, 3, rets,
  377. config_addr, BUID_HI(pe->phb->buid),
  378. BUID_LO(pe->phb->buid));
  379. } else {
  380. return EEH_STATE_NOT_SUPPORT;
  381. }
  382. if (ret)
  383. return ret;
  384. /* Parse the result out */
  385. result = 0;
  386. if (rets[1]) {
  387. switch(rets[0]) {
  388. case 0:
  389. result &= ~EEH_STATE_RESET_ACTIVE;
  390. result |= EEH_STATE_MMIO_ACTIVE;
  391. result |= EEH_STATE_DMA_ACTIVE;
  392. break;
  393. case 1:
  394. result |= EEH_STATE_RESET_ACTIVE;
  395. result |= EEH_STATE_MMIO_ACTIVE;
  396. result |= EEH_STATE_DMA_ACTIVE;
  397. break;
  398. case 2:
  399. result &= ~EEH_STATE_RESET_ACTIVE;
  400. result &= ~EEH_STATE_MMIO_ACTIVE;
  401. result &= ~EEH_STATE_DMA_ACTIVE;
  402. break;
  403. case 4:
  404. result &= ~EEH_STATE_RESET_ACTIVE;
  405. result &= ~EEH_STATE_MMIO_ACTIVE;
  406. result &= ~EEH_STATE_DMA_ACTIVE;
  407. result |= EEH_STATE_MMIO_ENABLED;
  408. break;
  409. case 5:
  410. if (rets[2]) {
  411. if (state) *state = rets[2];
  412. result = EEH_STATE_UNAVAILABLE;
  413. } else {
  414. result = EEH_STATE_NOT_SUPPORT;
  415. }
  416. default:
  417. result = EEH_STATE_NOT_SUPPORT;
  418. }
  419. } else {
  420. result = EEH_STATE_NOT_SUPPORT;
  421. }
  422. return result;
  423. }
  424. /**
  425. * pseries_eeh_reset - Reset the specified PE
  426. * @pe: EEH PE
  427. * @option: reset option
  428. *
  429. * Reset the specified PE
  430. */
  431. static int pseries_eeh_reset(struct eeh_pe *pe, int option)
  432. {
  433. int config_addr;
  434. int ret;
  435. /* Figure out PE address */
  436. config_addr = pe->config_addr;
  437. if (pe->addr)
  438. config_addr = pe->addr;
  439. /* Reset PE through RTAS call */
  440. ret = rtas_call(ibm_set_slot_reset, 4, 1, NULL,
  441. config_addr, BUID_HI(pe->phb->buid),
  442. BUID_LO(pe->phb->buid), option);
  443. /* If fundamental-reset not supported, try hot-reset */
  444. if (option == EEH_RESET_FUNDAMENTAL &&
  445. ret == -8) {
  446. ret = rtas_call(ibm_set_slot_reset, 4, 1, NULL,
  447. config_addr, BUID_HI(pe->phb->buid),
  448. BUID_LO(pe->phb->buid), EEH_RESET_HOT);
  449. }
  450. return ret;
  451. }
  452. /**
  453. * pseries_eeh_wait_state - Wait for PE state
  454. * @pe: EEH PE
  455. * @max_wait: maximal period in microsecond
  456. *
  457. * Wait for the state of associated PE. It might take some time
  458. * to retrieve the PE's state.
  459. */
  460. static int pseries_eeh_wait_state(struct eeh_pe *pe, int max_wait)
  461. {
  462. int ret;
  463. int mwait;
  464. /*
  465. * According to PAPR, the state of PE might be temporarily
  466. * unavailable. Under the circumstance, we have to wait
  467. * for indicated time determined by firmware. The maximal
  468. * wait time is 5 minutes, which is acquired from the original
  469. * EEH implementation. Also, the original implementation
  470. * also defined the minimal wait time as 1 second.
  471. */
  472. #define EEH_STATE_MIN_WAIT_TIME (1000)
  473. #define EEH_STATE_MAX_WAIT_TIME (300 * 1000)
  474. while (1) {
  475. ret = pseries_eeh_get_state(pe, &mwait);
  476. /*
  477. * If the PE's state is temporarily unavailable,
  478. * we have to wait for the specified time. Otherwise,
  479. * the PE's state will be returned immediately.
  480. */
  481. if (ret != EEH_STATE_UNAVAILABLE)
  482. return ret;
  483. if (max_wait <= 0) {
  484. pr_warning("%s: Timeout when getting PE's state (%d)\n",
  485. __func__, max_wait);
  486. return EEH_STATE_NOT_SUPPORT;
  487. }
  488. if (mwait <= 0) {
  489. pr_warning("%s: Firmware returned bad wait value %d\n",
  490. __func__, mwait);
  491. mwait = EEH_STATE_MIN_WAIT_TIME;
  492. } else if (mwait > EEH_STATE_MAX_WAIT_TIME) {
  493. pr_warning("%s: Firmware returned too long wait value %d\n",
  494. __func__, mwait);
  495. mwait = EEH_STATE_MAX_WAIT_TIME;
  496. }
  497. max_wait -= mwait;
  498. msleep(mwait);
  499. }
  500. return EEH_STATE_NOT_SUPPORT;
  501. }
  502. /**
  503. * pseries_eeh_get_log - Retrieve error log
  504. * @pe: EEH PE
  505. * @severity: temporary or permanent error log
  506. * @drv_log: driver log to be combined with retrieved error log
  507. * @len: length of driver log
  508. *
  509. * Retrieve the temporary or permanent error from the PE.
  510. * Actually, the error will be retrieved through the dedicated
  511. * RTAS call.
  512. */
  513. static int pseries_eeh_get_log(struct eeh_pe *pe, int severity, char *drv_log, unsigned long len)
  514. {
  515. int config_addr;
  516. unsigned long flags;
  517. int ret;
  518. spin_lock_irqsave(&slot_errbuf_lock, flags);
  519. memset(slot_errbuf, 0, eeh_error_buf_size);
  520. /* Figure out the PE address */
  521. config_addr = pe->config_addr;
  522. if (pe->addr)
  523. config_addr = pe->addr;
  524. ret = rtas_call(ibm_slot_error_detail, 8, 1, NULL, config_addr,
  525. BUID_HI(pe->phb->buid), BUID_LO(pe->phb->buid),
  526. virt_to_phys(drv_log), len,
  527. virt_to_phys(slot_errbuf), eeh_error_buf_size,
  528. severity);
  529. if (!ret)
  530. log_error(slot_errbuf, ERR_TYPE_RTAS_LOG, 0);
  531. spin_unlock_irqrestore(&slot_errbuf_lock, flags);
  532. return ret;
  533. }
  534. /**
  535. * pseries_eeh_configure_bridge - Configure PCI bridges in the indicated PE
  536. * @pe: EEH PE
  537. *
  538. * The function will be called to reconfigure the bridges included
  539. * in the specified PE so that the mulfunctional PE would be recovered
  540. * again.
  541. */
  542. static int pseries_eeh_configure_bridge(struct eeh_pe *pe)
  543. {
  544. int config_addr;
  545. int ret;
  546. /* Figure out the PE address */
  547. config_addr = pe->config_addr;
  548. if (pe->addr)
  549. config_addr = pe->addr;
  550. /* Use new configure-pe function, if supported */
  551. if (ibm_configure_pe != RTAS_UNKNOWN_SERVICE) {
  552. ret = rtas_call(ibm_configure_pe, 3, 1, NULL,
  553. config_addr, BUID_HI(pe->phb->buid),
  554. BUID_LO(pe->phb->buid));
  555. } else if (ibm_configure_bridge != RTAS_UNKNOWN_SERVICE) {
  556. ret = rtas_call(ibm_configure_bridge, 3, 1, NULL,
  557. config_addr, BUID_HI(pe->phb->buid),
  558. BUID_LO(pe->phb->buid));
  559. } else {
  560. return -EFAULT;
  561. }
  562. if (ret)
  563. pr_warning("%s: Unable to configure bridge PHB#%d-PE#%x (%d)\n",
  564. __func__, pe->phb->global_number, pe->addr, ret);
  565. return ret;
  566. }
  567. /**
  568. * pseries_eeh_read_config - Read PCI config space
  569. * @dn: device node
  570. * @where: PCI address
  571. * @size: size to read
  572. * @val: return value
  573. *
  574. * Read config space from the speicifed device
  575. */
  576. static int pseries_eeh_read_config(struct device_node *dn, int where, int size, u32 *val)
  577. {
  578. struct pci_dn *pdn;
  579. pdn = PCI_DN(dn);
  580. return rtas_read_config(pdn, where, size, val);
  581. }
  582. /**
  583. * pseries_eeh_write_config - Write PCI config space
  584. * @dn: device node
  585. * @where: PCI address
  586. * @size: size to write
  587. * @val: value to be written
  588. *
  589. * Write config space to the specified device
  590. */
  591. static int pseries_eeh_write_config(struct device_node *dn, int where, int size, u32 val)
  592. {
  593. struct pci_dn *pdn;
  594. pdn = PCI_DN(dn);
  595. return rtas_write_config(pdn, where, size, val);
  596. }
  597. static struct eeh_ops pseries_eeh_ops = {
  598. .name = "pseries",
  599. .init = pseries_eeh_init,
  600. .of_probe = pseries_eeh_of_probe,
  601. .dev_probe = NULL,
  602. .set_option = pseries_eeh_set_option,
  603. .get_pe_addr = pseries_eeh_get_pe_addr,
  604. .get_state = pseries_eeh_get_state,
  605. .reset = pseries_eeh_reset,
  606. .wait_state = pseries_eeh_wait_state,
  607. .get_log = pseries_eeh_get_log,
  608. .configure_bridge = pseries_eeh_configure_bridge,
  609. .read_config = pseries_eeh_read_config,
  610. .write_config = pseries_eeh_write_config
  611. };
  612. /**
  613. * eeh_pseries_init - Register platform dependent EEH operations
  614. *
  615. * EEH initialization on pseries platform. This function should be
  616. * called before any EEH related functions.
  617. */
  618. static int __init eeh_pseries_init(void)
  619. {
  620. int ret = -EINVAL;
  621. if (!machine_is(pseries))
  622. return ret;
  623. ret = eeh_ops_register(&pseries_eeh_ops);
  624. if (!ret)
  625. pr_info("EEH: pSeries platform initialized\n");
  626. else
  627. pr_info("EEH: pSeries platform initialization failure (%d)\n",
  628. ret);
  629. return ret;
  630. }
  631. early_initcall(eeh_pseries_init);