smp.c 5.6 KB

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  1. /*
  2. * SMP support for PowerNV machines.
  3. *
  4. * Copyright 2011 IBM Corp.
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * as published by the Free Software Foundation; either version
  9. * 2 of the License, or (at your option) any later version.
  10. */
  11. #include <linux/kernel.h>
  12. #include <linux/module.h>
  13. #include <linux/sched.h>
  14. #include <linux/smp.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/delay.h>
  17. #include <linux/init.h>
  18. #include <linux/spinlock.h>
  19. #include <linux/cpu.h>
  20. #include <asm/irq.h>
  21. #include <asm/smp.h>
  22. #include <asm/paca.h>
  23. #include <asm/machdep.h>
  24. #include <asm/cputable.h>
  25. #include <asm/firmware.h>
  26. #include <asm/rtas.h>
  27. #include <asm/vdso_datapage.h>
  28. #include <asm/cputhreads.h>
  29. #include <asm/xics.h>
  30. #include <asm/opal.h>
  31. #include "powernv.h"
  32. #ifdef DEBUG
  33. #include <asm/udbg.h>
  34. #define DBG(fmt...) udbg_printf(fmt)
  35. #else
  36. #define DBG(fmt...)
  37. #endif
  38. static void pnv_smp_setup_cpu(int cpu)
  39. {
  40. if (cpu != boot_cpuid)
  41. xics_setup_cpu();
  42. }
  43. static int pnv_smp_cpu_bootable(unsigned int nr)
  44. {
  45. /* Special case - we inhibit secondary thread startup
  46. * during boot if the user requests it.
  47. */
  48. if (system_state == SYSTEM_BOOTING && cpu_has_feature(CPU_FTR_SMT)) {
  49. if (!smt_enabled_at_boot && cpu_thread_in_core(nr) != 0)
  50. return 0;
  51. if (smt_enabled_at_boot
  52. && cpu_thread_in_core(nr) >= smt_enabled_at_boot)
  53. return 0;
  54. }
  55. return 1;
  56. }
  57. int pnv_smp_kick_cpu(int nr)
  58. {
  59. unsigned int pcpu = get_hard_smp_processor_id(nr);
  60. unsigned long start_here = __pa(*((unsigned long *)
  61. generic_secondary_smp_init));
  62. long rc;
  63. BUG_ON(nr < 0 || nr >= NR_CPUS);
  64. /*
  65. * If we already started or OPALv2 is not supported, we just
  66. * kick the CPU via the PACA
  67. */
  68. if (paca[nr].cpu_start || !firmware_has_feature(FW_FEATURE_OPALv2))
  69. goto kick;
  70. /*
  71. * At this point, the CPU can either be spinning on the way in
  72. * from kexec or be inside OPAL waiting to be started for the
  73. * first time. OPAL v3 allows us to query OPAL to know if it
  74. * has the CPUs, so we do that
  75. */
  76. if (firmware_has_feature(FW_FEATURE_OPALv3)) {
  77. uint8_t status;
  78. rc = opal_query_cpu_status(pcpu, &status);
  79. if (rc != OPAL_SUCCESS) {
  80. pr_warn("OPAL Error %ld querying CPU %d state\n",
  81. rc, nr);
  82. return -ENODEV;
  83. }
  84. /*
  85. * Already started, just kick it, probably coming from
  86. * kexec and spinning
  87. */
  88. if (status == OPAL_THREAD_STARTED)
  89. goto kick;
  90. /*
  91. * Available/inactive, let's kick it
  92. */
  93. if (status == OPAL_THREAD_INACTIVE) {
  94. pr_devel("OPAL: Starting CPU %d (HW 0x%x)...\n",
  95. nr, pcpu);
  96. rc = opal_start_cpu(pcpu, start_here);
  97. if (rc != OPAL_SUCCESS) {
  98. pr_warn("OPAL Error %ld starting CPU %d\n",
  99. rc, nr);
  100. return -ENODEV;
  101. }
  102. } else {
  103. /*
  104. * An unavailable CPU (or any other unknown status)
  105. * shouldn't be started. It should also
  106. * not be in the possible map but currently it can
  107. * happen
  108. */
  109. pr_devel("OPAL: CPU %d (HW 0x%x) is unavailable"
  110. " (status %d)...\n", nr, pcpu, status);
  111. return -ENODEV;
  112. }
  113. } else {
  114. /*
  115. * On OPAL v2, we just kick it and hope for the best,
  116. * we must not test the error from opal_start_cpu() or
  117. * we would fail to get CPUs from kexec.
  118. */
  119. opal_start_cpu(pcpu, start_here);
  120. }
  121. kick:
  122. return smp_generic_kick_cpu(nr);
  123. }
  124. #ifdef CONFIG_HOTPLUG_CPU
  125. static int pnv_smp_cpu_disable(void)
  126. {
  127. int cpu = smp_processor_id();
  128. /* This is identical to pSeries... might consolidate by
  129. * moving migrate_irqs_away to a ppc_md with default to
  130. * the generic fixup_irqs. --BenH.
  131. */
  132. set_cpu_online(cpu, false);
  133. vdso_data->processorCount--;
  134. if (cpu == boot_cpuid)
  135. boot_cpuid = cpumask_any(cpu_online_mask);
  136. xics_migrate_irqs_away();
  137. return 0;
  138. }
  139. static void pnv_smp_cpu_kill_self(void)
  140. {
  141. unsigned int cpu;
  142. /* Standard hot unplug procedure */
  143. local_irq_disable();
  144. idle_task_exit();
  145. current->active_mm = NULL; /* for sanity */
  146. cpu = smp_processor_id();
  147. DBG("CPU%d offline\n", cpu);
  148. generic_set_cpu_dead(cpu);
  149. smp_wmb();
  150. /* We don't want to take decrementer interrupts while we are offline,
  151. * so clear LPCR:PECE1. We keep PECE2 enabled.
  152. */
  153. mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) & ~(u64)LPCR_PECE1);
  154. while (!generic_check_cpu_restart(cpu)) {
  155. power7_nap();
  156. if (!generic_check_cpu_restart(cpu)) {
  157. DBG("CPU%d Unexpected exit while offline !\n", cpu);
  158. /* We may be getting an IPI, so we re-enable
  159. * interrupts to process it, it will be ignored
  160. * since we aren't online (hopefully)
  161. */
  162. local_irq_enable();
  163. local_irq_disable();
  164. }
  165. }
  166. mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) | LPCR_PECE1);
  167. DBG("CPU%d coming online...\n", cpu);
  168. }
  169. #endif /* CONFIG_HOTPLUG_CPU */
  170. static struct smp_ops_t pnv_smp_ops = {
  171. .message_pass = smp_muxed_ipi_message_pass,
  172. .cause_ipi = NULL, /* Filled at runtime by xics_smp_probe() */
  173. .probe = xics_smp_probe,
  174. .kick_cpu = pnv_smp_kick_cpu,
  175. .setup_cpu = pnv_smp_setup_cpu,
  176. .cpu_bootable = pnv_smp_cpu_bootable,
  177. #ifdef CONFIG_HOTPLUG_CPU
  178. .cpu_disable = pnv_smp_cpu_disable,
  179. .cpu_die = generic_cpu_die,
  180. #endif /* CONFIG_HOTPLUG_CPU */
  181. };
  182. /* This is called very early during platform setup_arch */
  183. void __init pnv_smp_init(void)
  184. {
  185. smp_ops = &pnv_smp_ops;
  186. /* XXX We don't yet have a proper entry point from HAL, for
  187. * now we rely on kexec-style entry from BML
  188. */
  189. #ifdef CONFIG_PPC_RTAS
  190. /* Non-lpar has additional take/give timebase */
  191. if (rtas_token("freeze-time-base") != RTAS_UNKNOWN_SERVICE) {
  192. smp_ops->give_timebase = rtas_give_timebase;
  193. smp_ops->take_timebase = rtas_take_timebase;
  194. }
  195. #endif /* CONFIG_PPC_RTAS */
  196. #ifdef CONFIG_HOTPLUG_CPU
  197. ppc_md.cpu_die = pnv_smp_cpu_kill_self;
  198. #endif
  199. }