pgtable_64.c 22 KB

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  1. /*
  2. * This file contains ioremap and related functions for 64-bit machines.
  3. *
  4. * Derived from arch/ppc64/mm/init.c
  5. * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
  6. *
  7. * Modifications by Paul Mackerras (PowerMac) (paulus@samba.org)
  8. * and Cort Dougan (PReP) (cort@cs.nmt.edu)
  9. * Copyright (C) 1996 Paul Mackerras
  10. *
  11. * Derived from "arch/i386/mm/init.c"
  12. * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
  13. *
  14. * Dave Engebretsen <engebret@us.ibm.com>
  15. * Rework for PPC64 port.
  16. *
  17. * This program is free software; you can redistribute it and/or
  18. * modify it under the terms of the GNU General Public License
  19. * as published by the Free Software Foundation; either version
  20. * 2 of the License, or (at your option) any later version.
  21. *
  22. */
  23. #include <linux/signal.h>
  24. #include <linux/sched.h>
  25. #include <linux/kernel.h>
  26. #include <linux/errno.h>
  27. #include <linux/string.h>
  28. #include <linux/export.h>
  29. #include <linux/types.h>
  30. #include <linux/mman.h>
  31. #include <linux/mm.h>
  32. #include <linux/swap.h>
  33. #include <linux/stddef.h>
  34. #include <linux/vmalloc.h>
  35. #include <linux/init.h>
  36. #include <linux/bootmem.h>
  37. #include <linux/memblock.h>
  38. #include <linux/slab.h>
  39. #include <asm/pgalloc.h>
  40. #include <asm/page.h>
  41. #include <asm/prom.h>
  42. #include <asm/io.h>
  43. #include <asm/mmu_context.h>
  44. #include <asm/pgtable.h>
  45. #include <asm/mmu.h>
  46. #include <asm/smp.h>
  47. #include <asm/machdep.h>
  48. #include <asm/tlb.h>
  49. #include <asm/processor.h>
  50. #include <asm/cputable.h>
  51. #include <asm/sections.h>
  52. #include <asm/firmware.h>
  53. #include "mmu_decl.h"
  54. /* Some sanity checking */
  55. #if TASK_SIZE_USER64 > PGTABLE_RANGE
  56. #error TASK_SIZE_USER64 exceeds pagetable range
  57. #endif
  58. #ifdef CONFIG_PPC_STD_MMU_64
  59. #if TASK_SIZE_USER64 > (1UL << (ESID_BITS + SID_SHIFT))
  60. #error TASK_SIZE_USER64 exceeds user VSID range
  61. #endif
  62. #endif
  63. unsigned long ioremap_bot = IOREMAP_BASE;
  64. #ifdef CONFIG_PPC_MMU_NOHASH
  65. static void *early_alloc_pgtable(unsigned long size)
  66. {
  67. void *pt;
  68. if (init_bootmem_done)
  69. pt = __alloc_bootmem(size, size, __pa(MAX_DMA_ADDRESS));
  70. else
  71. pt = __va(memblock_alloc_base(size, size,
  72. __pa(MAX_DMA_ADDRESS)));
  73. memset(pt, 0, size);
  74. return pt;
  75. }
  76. #endif /* CONFIG_PPC_MMU_NOHASH */
  77. /*
  78. * map_kernel_page currently only called by __ioremap
  79. * map_kernel_page adds an entry to the ioremap page table
  80. * and adds an entry to the HPT, possibly bolting it
  81. */
  82. int map_kernel_page(unsigned long ea, unsigned long pa, int flags)
  83. {
  84. pgd_t *pgdp;
  85. pud_t *pudp;
  86. pmd_t *pmdp;
  87. pte_t *ptep;
  88. if (slab_is_available()) {
  89. pgdp = pgd_offset_k(ea);
  90. pudp = pud_alloc(&init_mm, pgdp, ea);
  91. if (!pudp)
  92. return -ENOMEM;
  93. pmdp = pmd_alloc(&init_mm, pudp, ea);
  94. if (!pmdp)
  95. return -ENOMEM;
  96. ptep = pte_alloc_kernel(pmdp, ea);
  97. if (!ptep)
  98. return -ENOMEM;
  99. set_pte_at(&init_mm, ea, ptep, pfn_pte(pa >> PAGE_SHIFT,
  100. __pgprot(flags)));
  101. } else {
  102. #ifdef CONFIG_PPC_MMU_NOHASH
  103. /* Warning ! This will blow up if bootmem is not initialized
  104. * which our ppc64 code is keen to do that, we'll need to
  105. * fix it and/or be more careful
  106. */
  107. pgdp = pgd_offset_k(ea);
  108. #ifdef PUD_TABLE_SIZE
  109. if (pgd_none(*pgdp)) {
  110. pudp = early_alloc_pgtable(PUD_TABLE_SIZE);
  111. BUG_ON(pudp == NULL);
  112. pgd_populate(&init_mm, pgdp, pudp);
  113. }
  114. #endif /* PUD_TABLE_SIZE */
  115. pudp = pud_offset(pgdp, ea);
  116. if (pud_none(*pudp)) {
  117. pmdp = early_alloc_pgtable(PMD_TABLE_SIZE);
  118. BUG_ON(pmdp == NULL);
  119. pud_populate(&init_mm, pudp, pmdp);
  120. }
  121. pmdp = pmd_offset(pudp, ea);
  122. if (!pmd_present(*pmdp)) {
  123. ptep = early_alloc_pgtable(PAGE_SIZE);
  124. BUG_ON(ptep == NULL);
  125. pmd_populate_kernel(&init_mm, pmdp, ptep);
  126. }
  127. ptep = pte_offset_kernel(pmdp, ea);
  128. set_pte_at(&init_mm, ea, ptep, pfn_pte(pa >> PAGE_SHIFT,
  129. __pgprot(flags)));
  130. #else /* CONFIG_PPC_MMU_NOHASH */
  131. /*
  132. * If the mm subsystem is not fully up, we cannot create a
  133. * linux page table entry for this mapping. Simply bolt an
  134. * entry in the hardware page table.
  135. *
  136. */
  137. if (htab_bolt_mapping(ea, ea + PAGE_SIZE, pa, flags,
  138. mmu_io_psize, mmu_kernel_ssize)) {
  139. printk(KERN_ERR "Failed to do bolted mapping IO "
  140. "memory at %016lx !\n", pa);
  141. return -ENOMEM;
  142. }
  143. #endif /* !CONFIG_PPC_MMU_NOHASH */
  144. }
  145. return 0;
  146. }
  147. /**
  148. * __ioremap_at - Low level function to establish the page tables
  149. * for an IO mapping
  150. */
  151. void __iomem * __ioremap_at(phys_addr_t pa, void *ea, unsigned long size,
  152. unsigned long flags)
  153. {
  154. unsigned long i;
  155. /* Make sure we have the base flags */
  156. if ((flags & _PAGE_PRESENT) == 0)
  157. flags |= pgprot_val(PAGE_KERNEL);
  158. /* Non-cacheable page cannot be coherent */
  159. if (flags & _PAGE_NO_CACHE)
  160. flags &= ~_PAGE_COHERENT;
  161. /* We don't support the 4K PFN hack with ioremap */
  162. if (flags & _PAGE_4K_PFN)
  163. return NULL;
  164. WARN_ON(pa & ~PAGE_MASK);
  165. WARN_ON(((unsigned long)ea) & ~PAGE_MASK);
  166. WARN_ON(size & ~PAGE_MASK);
  167. for (i = 0; i < size; i += PAGE_SIZE)
  168. if (map_kernel_page((unsigned long)ea+i, pa+i, flags))
  169. return NULL;
  170. return (void __iomem *)ea;
  171. }
  172. /**
  173. * __iounmap_from - Low level function to tear down the page tables
  174. * for an IO mapping. This is used for mappings that
  175. * are manipulated manually, like partial unmapping of
  176. * PCI IOs or ISA space.
  177. */
  178. void __iounmap_at(void *ea, unsigned long size)
  179. {
  180. WARN_ON(((unsigned long)ea) & ~PAGE_MASK);
  181. WARN_ON(size & ~PAGE_MASK);
  182. unmap_kernel_range((unsigned long)ea, size);
  183. }
  184. void __iomem * __ioremap_caller(phys_addr_t addr, unsigned long size,
  185. unsigned long flags, void *caller)
  186. {
  187. phys_addr_t paligned;
  188. void __iomem *ret;
  189. /*
  190. * Choose an address to map it to.
  191. * Once the imalloc system is running, we use it.
  192. * Before that, we map using addresses going
  193. * up from ioremap_bot. imalloc will use
  194. * the addresses from ioremap_bot through
  195. * IMALLOC_END
  196. *
  197. */
  198. paligned = addr & PAGE_MASK;
  199. size = PAGE_ALIGN(addr + size) - paligned;
  200. if ((size == 0) || (paligned == 0))
  201. return NULL;
  202. if (mem_init_done) {
  203. struct vm_struct *area;
  204. area = __get_vm_area_caller(size, VM_IOREMAP,
  205. ioremap_bot, IOREMAP_END,
  206. caller);
  207. if (area == NULL)
  208. return NULL;
  209. area->phys_addr = paligned;
  210. ret = __ioremap_at(paligned, area->addr, size, flags);
  211. if (!ret)
  212. vunmap(area->addr);
  213. } else {
  214. ret = __ioremap_at(paligned, (void *)ioremap_bot, size, flags);
  215. if (ret)
  216. ioremap_bot += size;
  217. }
  218. if (ret)
  219. ret += addr & ~PAGE_MASK;
  220. return ret;
  221. }
  222. void __iomem * __ioremap(phys_addr_t addr, unsigned long size,
  223. unsigned long flags)
  224. {
  225. return __ioremap_caller(addr, size, flags, __builtin_return_address(0));
  226. }
  227. void __iomem * ioremap(phys_addr_t addr, unsigned long size)
  228. {
  229. unsigned long flags = _PAGE_NO_CACHE | _PAGE_GUARDED;
  230. void *caller = __builtin_return_address(0);
  231. if (ppc_md.ioremap)
  232. return ppc_md.ioremap(addr, size, flags, caller);
  233. return __ioremap_caller(addr, size, flags, caller);
  234. }
  235. void __iomem * ioremap_wc(phys_addr_t addr, unsigned long size)
  236. {
  237. unsigned long flags = _PAGE_NO_CACHE;
  238. void *caller = __builtin_return_address(0);
  239. if (ppc_md.ioremap)
  240. return ppc_md.ioremap(addr, size, flags, caller);
  241. return __ioremap_caller(addr, size, flags, caller);
  242. }
  243. void __iomem * ioremap_prot(phys_addr_t addr, unsigned long size,
  244. unsigned long flags)
  245. {
  246. void *caller = __builtin_return_address(0);
  247. /* writeable implies dirty for kernel addresses */
  248. if (flags & _PAGE_RW)
  249. flags |= _PAGE_DIRTY;
  250. /* we don't want to let _PAGE_USER and _PAGE_EXEC leak out */
  251. flags &= ~(_PAGE_USER | _PAGE_EXEC);
  252. #ifdef _PAGE_BAP_SR
  253. /* _PAGE_USER contains _PAGE_BAP_SR on BookE using the new PTE format
  254. * which means that we just cleared supervisor access... oops ;-) This
  255. * restores it
  256. */
  257. flags |= _PAGE_BAP_SR;
  258. #endif
  259. if (ppc_md.ioremap)
  260. return ppc_md.ioremap(addr, size, flags, caller);
  261. return __ioremap_caller(addr, size, flags, caller);
  262. }
  263. /*
  264. * Unmap an IO region and remove it from imalloc'd list.
  265. * Access to IO memory should be serialized by driver.
  266. */
  267. void __iounmap(volatile void __iomem *token)
  268. {
  269. void *addr;
  270. if (!mem_init_done)
  271. return;
  272. addr = (void *) ((unsigned long __force)
  273. PCI_FIX_ADDR(token) & PAGE_MASK);
  274. if ((unsigned long)addr < ioremap_bot) {
  275. printk(KERN_WARNING "Attempt to iounmap early bolted mapping"
  276. " at 0x%p\n", addr);
  277. return;
  278. }
  279. vunmap(addr);
  280. }
  281. void iounmap(volatile void __iomem *token)
  282. {
  283. if (ppc_md.iounmap)
  284. ppc_md.iounmap(token);
  285. else
  286. __iounmap(token);
  287. }
  288. EXPORT_SYMBOL(ioremap);
  289. EXPORT_SYMBOL(ioremap_wc);
  290. EXPORT_SYMBOL(ioremap_prot);
  291. EXPORT_SYMBOL(__ioremap);
  292. EXPORT_SYMBOL(__ioremap_at);
  293. EXPORT_SYMBOL(iounmap);
  294. EXPORT_SYMBOL(__iounmap);
  295. EXPORT_SYMBOL(__iounmap_at);
  296. /*
  297. * For hugepage we have pfn in the pmd, we use PTE_RPN_SHIFT bits for flags
  298. * For PTE page, we have a PTE_FRAG_SIZE (4K) aligned virtual address.
  299. */
  300. struct page *pmd_page(pmd_t pmd)
  301. {
  302. #ifdef CONFIG_TRANSPARENT_HUGEPAGE
  303. if (pmd_trans_huge(pmd))
  304. return pfn_to_page(pmd_pfn(pmd));
  305. #endif
  306. return virt_to_page(pmd_page_vaddr(pmd));
  307. }
  308. #ifdef CONFIG_PPC_64K_PAGES
  309. static pte_t *get_from_cache(struct mm_struct *mm)
  310. {
  311. void *pte_frag, *ret;
  312. spin_lock(&mm->page_table_lock);
  313. ret = mm->context.pte_frag;
  314. if (ret) {
  315. pte_frag = ret + PTE_FRAG_SIZE;
  316. /*
  317. * If we have taken up all the fragments mark PTE page NULL
  318. */
  319. if (((unsigned long)pte_frag & ~PAGE_MASK) == 0)
  320. pte_frag = NULL;
  321. mm->context.pte_frag = pte_frag;
  322. }
  323. spin_unlock(&mm->page_table_lock);
  324. return (pte_t *)ret;
  325. }
  326. static pte_t *__alloc_for_cache(struct mm_struct *mm, int kernel)
  327. {
  328. void *ret = NULL;
  329. struct page *page = alloc_page(GFP_KERNEL | __GFP_NOTRACK |
  330. __GFP_REPEAT | __GFP_ZERO);
  331. if (!page)
  332. return NULL;
  333. ret = page_address(page);
  334. spin_lock(&mm->page_table_lock);
  335. /*
  336. * If we find pgtable_page set, we return
  337. * the allocated page with single fragement
  338. * count.
  339. */
  340. if (likely(!mm->context.pte_frag)) {
  341. atomic_set(&page->_count, PTE_FRAG_NR);
  342. mm->context.pte_frag = ret + PTE_FRAG_SIZE;
  343. }
  344. spin_unlock(&mm->page_table_lock);
  345. if (!kernel)
  346. pgtable_page_ctor(page);
  347. return (pte_t *)ret;
  348. }
  349. pte_t *page_table_alloc(struct mm_struct *mm, unsigned long vmaddr, int kernel)
  350. {
  351. pte_t *pte;
  352. pte = get_from_cache(mm);
  353. if (pte)
  354. return pte;
  355. return __alloc_for_cache(mm, kernel);
  356. }
  357. void page_table_free(struct mm_struct *mm, unsigned long *table, int kernel)
  358. {
  359. struct page *page = virt_to_page(table);
  360. if (put_page_testzero(page)) {
  361. if (!kernel)
  362. pgtable_page_dtor(page);
  363. free_hot_cold_page(page, 0);
  364. }
  365. }
  366. #ifdef CONFIG_SMP
  367. static void page_table_free_rcu(void *table)
  368. {
  369. struct page *page = virt_to_page(table);
  370. if (put_page_testzero(page)) {
  371. pgtable_page_dtor(page);
  372. free_hot_cold_page(page, 0);
  373. }
  374. }
  375. void pgtable_free_tlb(struct mmu_gather *tlb, void *table, int shift)
  376. {
  377. unsigned long pgf = (unsigned long)table;
  378. BUG_ON(shift > MAX_PGTABLE_INDEX_SIZE);
  379. pgf |= shift;
  380. tlb_remove_table(tlb, (void *)pgf);
  381. }
  382. void __tlb_remove_table(void *_table)
  383. {
  384. void *table = (void *)((unsigned long)_table & ~MAX_PGTABLE_INDEX_SIZE);
  385. unsigned shift = (unsigned long)_table & MAX_PGTABLE_INDEX_SIZE;
  386. if (!shift)
  387. /* PTE page needs special handling */
  388. page_table_free_rcu(table);
  389. else {
  390. BUG_ON(shift > MAX_PGTABLE_INDEX_SIZE);
  391. kmem_cache_free(PGT_CACHE(shift), table);
  392. }
  393. }
  394. #else
  395. void pgtable_free_tlb(struct mmu_gather *tlb, void *table, int shift)
  396. {
  397. if (!shift) {
  398. /* PTE page needs special handling */
  399. struct page *page = virt_to_page(table);
  400. if (put_page_testzero(page)) {
  401. pgtable_page_dtor(page);
  402. free_hot_cold_page(page, 0);
  403. }
  404. } else {
  405. BUG_ON(shift > MAX_PGTABLE_INDEX_SIZE);
  406. kmem_cache_free(PGT_CACHE(shift), table);
  407. }
  408. }
  409. #endif
  410. #endif /* CONFIG_PPC_64K_PAGES */
  411. #ifdef CONFIG_TRANSPARENT_HUGEPAGE
  412. /*
  413. * This is called when relaxing access to a hugepage. It's also called in the page
  414. * fault path when we don't hit any of the major fault cases, ie, a minor
  415. * update of _PAGE_ACCESSED, _PAGE_DIRTY, etc... The generic code will have
  416. * handled those two for us, we additionally deal with missing execute
  417. * permission here on some processors
  418. */
  419. int pmdp_set_access_flags(struct vm_area_struct *vma, unsigned long address,
  420. pmd_t *pmdp, pmd_t entry, int dirty)
  421. {
  422. int changed;
  423. #ifdef CONFIG_DEBUG_VM
  424. WARN_ON(!pmd_trans_huge(*pmdp));
  425. assert_spin_locked(&vma->vm_mm->page_table_lock);
  426. #endif
  427. changed = !pmd_same(*(pmdp), entry);
  428. if (changed) {
  429. __ptep_set_access_flags(pmdp_ptep(pmdp), pmd_pte(entry));
  430. /*
  431. * Since we are not supporting SW TLB systems, we don't
  432. * have any thing similar to flush_tlb_page_nohash()
  433. */
  434. }
  435. return changed;
  436. }
  437. unsigned long pmd_hugepage_update(struct mm_struct *mm, unsigned long addr,
  438. pmd_t *pmdp, unsigned long clr)
  439. {
  440. unsigned long old, tmp;
  441. #ifdef CONFIG_DEBUG_VM
  442. WARN_ON(!pmd_trans_huge(*pmdp));
  443. assert_spin_locked(&mm->page_table_lock);
  444. #endif
  445. #ifdef PTE_ATOMIC_UPDATES
  446. __asm__ __volatile__(
  447. "1: ldarx %0,0,%3\n\
  448. andi. %1,%0,%6\n\
  449. bne- 1b \n\
  450. andc %1,%0,%4 \n\
  451. stdcx. %1,0,%3 \n\
  452. bne- 1b"
  453. : "=&r" (old), "=&r" (tmp), "=m" (*pmdp)
  454. : "r" (pmdp), "r" (clr), "m" (*pmdp), "i" (_PAGE_BUSY)
  455. : "cc" );
  456. #else
  457. old = pmd_val(*pmdp);
  458. *pmdp = __pmd(old & ~clr);
  459. #endif
  460. if (old & _PAGE_HASHPTE)
  461. hpte_do_hugepage_flush(mm, addr, pmdp);
  462. return old;
  463. }
  464. pmd_t pmdp_clear_flush(struct vm_area_struct *vma, unsigned long address,
  465. pmd_t *pmdp)
  466. {
  467. pmd_t pmd;
  468. VM_BUG_ON(address & ~HPAGE_PMD_MASK);
  469. if (pmd_trans_huge(*pmdp)) {
  470. pmd = pmdp_get_and_clear(vma->vm_mm, address, pmdp);
  471. } else {
  472. /*
  473. * khugepaged calls this for normal pmd
  474. */
  475. pmd = *pmdp;
  476. pmd_clear(pmdp);
  477. /*
  478. * Wait for all pending hash_page to finish. This is needed
  479. * in case of subpage collapse. When we collapse normal pages
  480. * to hugepage, we first clear the pmd, then invalidate all
  481. * the PTE entries. The assumption here is that any low level
  482. * page fault will see a none pmd and take the slow path that
  483. * will wait on mmap_sem. But we could very well be in a
  484. * hash_page with local ptep pointer value. Such a hash page
  485. * can result in adding new HPTE entries for normal subpages.
  486. * That means we could be modifying the page content as we
  487. * copy them to a huge page. So wait for parallel hash_page
  488. * to finish before invalidating HPTE entries. We can do this
  489. * by sending an IPI to all the cpus and executing a dummy
  490. * function there.
  491. */
  492. kick_all_cpus_sync();
  493. /*
  494. * Now invalidate the hpte entries in the range
  495. * covered by pmd. This make sure we take a
  496. * fault and will find the pmd as none, which will
  497. * result in a major fault which takes mmap_sem and
  498. * hence wait for collapse to complete. Without this
  499. * the __collapse_huge_page_copy can result in copying
  500. * the old content.
  501. */
  502. flush_tlb_pmd_range(vma->vm_mm, &pmd, address);
  503. }
  504. return pmd;
  505. }
  506. int pmdp_test_and_clear_young(struct vm_area_struct *vma,
  507. unsigned long address, pmd_t *pmdp)
  508. {
  509. return __pmdp_test_and_clear_young(vma->vm_mm, address, pmdp);
  510. }
  511. /*
  512. * We currently remove entries from the hashtable regardless of whether
  513. * the entry was young or dirty. The generic routines only flush if the
  514. * entry was young or dirty which is not good enough.
  515. *
  516. * We should be more intelligent about this but for the moment we override
  517. * these functions and force a tlb flush unconditionally
  518. */
  519. int pmdp_clear_flush_young(struct vm_area_struct *vma,
  520. unsigned long address, pmd_t *pmdp)
  521. {
  522. return __pmdp_test_and_clear_young(vma->vm_mm, address, pmdp);
  523. }
  524. /*
  525. * We mark the pmd splitting and invalidate all the hpte
  526. * entries for this hugepage.
  527. */
  528. void pmdp_splitting_flush(struct vm_area_struct *vma,
  529. unsigned long address, pmd_t *pmdp)
  530. {
  531. unsigned long old, tmp;
  532. VM_BUG_ON(address & ~HPAGE_PMD_MASK);
  533. #ifdef CONFIG_DEBUG_VM
  534. WARN_ON(!pmd_trans_huge(*pmdp));
  535. assert_spin_locked(&vma->vm_mm->page_table_lock);
  536. #endif
  537. #ifdef PTE_ATOMIC_UPDATES
  538. __asm__ __volatile__(
  539. "1: ldarx %0,0,%3\n\
  540. andi. %1,%0,%6\n\
  541. bne- 1b \n\
  542. ori %1,%0,%4 \n\
  543. stdcx. %1,0,%3 \n\
  544. bne- 1b"
  545. : "=&r" (old), "=&r" (tmp), "=m" (*pmdp)
  546. : "r" (pmdp), "i" (_PAGE_SPLITTING), "m" (*pmdp), "i" (_PAGE_BUSY)
  547. : "cc" );
  548. #else
  549. old = pmd_val(*pmdp);
  550. *pmdp = __pmd(old | _PAGE_SPLITTING);
  551. #endif
  552. /*
  553. * If we didn't had the splitting flag set, go and flush the
  554. * HPTE entries.
  555. */
  556. if (!(old & _PAGE_SPLITTING)) {
  557. /* We need to flush the hpte */
  558. if (old & _PAGE_HASHPTE)
  559. hpte_do_hugepage_flush(vma->vm_mm, address, pmdp);
  560. }
  561. }
  562. /*
  563. * We want to put the pgtable in pmd and use pgtable for tracking
  564. * the base page size hptes
  565. */
  566. void pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp,
  567. pgtable_t pgtable)
  568. {
  569. pgtable_t *pgtable_slot;
  570. assert_spin_locked(&mm->page_table_lock);
  571. /*
  572. * we store the pgtable in the second half of PMD
  573. */
  574. pgtable_slot = (pgtable_t *)pmdp + PTRS_PER_PMD;
  575. *pgtable_slot = pgtable;
  576. /*
  577. * expose the deposited pgtable to other cpus.
  578. * before we set the hugepage PTE at pmd level
  579. * hash fault code looks at the deposted pgtable
  580. * to store hash index values.
  581. */
  582. smp_wmb();
  583. }
  584. pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp)
  585. {
  586. pgtable_t pgtable;
  587. pgtable_t *pgtable_slot;
  588. assert_spin_locked(&mm->page_table_lock);
  589. pgtable_slot = (pgtable_t *)pmdp + PTRS_PER_PMD;
  590. pgtable = *pgtable_slot;
  591. /*
  592. * Once we withdraw, mark the entry NULL.
  593. */
  594. *pgtable_slot = NULL;
  595. /*
  596. * We store HPTE information in the deposited PTE fragment.
  597. * zero out the content on withdraw.
  598. */
  599. memset(pgtable, 0, PTE_FRAG_SIZE);
  600. return pgtable;
  601. }
  602. /*
  603. * set a new huge pmd. We should not be called for updating
  604. * an existing pmd entry. That should go via pmd_hugepage_update.
  605. */
  606. void set_pmd_at(struct mm_struct *mm, unsigned long addr,
  607. pmd_t *pmdp, pmd_t pmd)
  608. {
  609. #ifdef CONFIG_DEBUG_VM
  610. WARN_ON(!pmd_none(*pmdp));
  611. assert_spin_locked(&mm->page_table_lock);
  612. WARN_ON(!pmd_trans_huge(pmd));
  613. #endif
  614. return set_pte_at(mm, addr, pmdp_ptep(pmdp), pmd_pte(pmd));
  615. }
  616. void pmdp_invalidate(struct vm_area_struct *vma, unsigned long address,
  617. pmd_t *pmdp)
  618. {
  619. pmd_hugepage_update(vma->vm_mm, address, pmdp, _PAGE_PRESENT);
  620. }
  621. /*
  622. * A linux hugepage PMD was changed and the corresponding hash table entries
  623. * neesd to be flushed.
  624. */
  625. void hpte_do_hugepage_flush(struct mm_struct *mm, unsigned long addr,
  626. pmd_t *pmdp)
  627. {
  628. int ssize, i;
  629. unsigned long s_addr;
  630. int max_hpte_count;
  631. unsigned int psize, valid;
  632. unsigned char *hpte_slot_array;
  633. unsigned long hidx, vpn, vsid, hash, shift, slot;
  634. /*
  635. * Flush all the hptes mapping this hugepage
  636. */
  637. s_addr = addr & HPAGE_PMD_MASK;
  638. hpte_slot_array = get_hpte_slot_array(pmdp);
  639. /*
  640. * IF we try to do a HUGE PTE update after a withdraw is done.
  641. * we will find the below NULL. This happens when we do
  642. * split_huge_page_pmd
  643. */
  644. if (!hpte_slot_array)
  645. return;
  646. /* get the base page size */
  647. psize = get_slice_psize(mm, s_addr);
  648. if (ppc_md.hugepage_invalidate)
  649. return ppc_md.hugepage_invalidate(mm, hpte_slot_array,
  650. s_addr, psize);
  651. /*
  652. * No bluk hpte removal support, invalidate each entry
  653. */
  654. shift = mmu_psize_defs[psize].shift;
  655. max_hpte_count = HPAGE_PMD_SIZE >> shift;
  656. for (i = 0; i < max_hpte_count; i++) {
  657. /*
  658. * 8 bits per each hpte entries
  659. * 000| [ secondary group (one bit) | hidx (3 bits) | valid bit]
  660. */
  661. valid = hpte_valid(hpte_slot_array, i);
  662. if (!valid)
  663. continue;
  664. hidx = hpte_hash_index(hpte_slot_array, i);
  665. /* get the vpn */
  666. addr = s_addr + (i * (1ul << shift));
  667. if (!is_kernel_addr(addr)) {
  668. ssize = user_segment_size(addr);
  669. vsid = get_vsid(mm->context.id, addr, ssize);
  670. WARN_ON(vsid == 0);
  671. } else {
  672. vsid = get_kernel_vsid(addr, mmu_kernel_ssize);
  673. ssize = mmu_kernel_ssize;
  674. }
  675. vpn = hpt_vpn(addr, vsid, ssize);
  676. hash = hpt_hash(vpn, shift, ssize);
  677. if (hidx & _PTEIDX_SECONDARY)
  678. hash = ~hash;
  679. slot = (hash & htab_hash_mask) * HPTES_PER_GROUP;
  680. slot += hidx & _PTEIDX_GROUP_IX;
  681. ppc_md.hpte_invalidate(slot, vpn, psize,
  682. MMU_PAGE_16M, ssize, 0);
  683. }
  684. }
  685. static pmd_t pmd_set_protbits(pmd_t pmd, pgprot_t pgprot)
  686. {
  687. pmd_val(pmd) |= pgprot_val(pgprot);
  688. return pmd;
  689. }
  690. pmd_t pfn_pmd(unsigned long pfn, pgprot_t pgprot)
  691. {
  692. pmd_t pmd;
  693. /*
  694. * For a valid pte, we would have _PAGE_PRESENT or _PAGE_FILE always
  695. * set. We use this to check THP page at pmd level.
  696. * leaf pte for huge page, bottom two bits != 00
  697. */
  698. pmd_val(pmd) = pfn << PTE_RPN_SHIFT;
  699. pmd_val(pmd) |= _PAGE_THP_HUGE;
  700. pmd = pmd_set_protbits(pmd, pgprot);
  701. return pmd;
  702. }
  703. pmd_t mk_pmd(struct page *page, pgprot_t pgprot)
  704. {
  705. return pfn_pmd(page_to_pfn(page), pgprot);
  706. }
  707. pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
  708. {
  709. pmd_val(pmd) &= _HPAGE_CHG_MASK;
  710. pmd = pmd_set_protbits(pmd, newprot);
  711. return pmd;
  712. }
  713. /*
  714. * This is called at the end of handling a user page fault, when the
  715. * fault has been handled by updating a HUGE PMD entry in the linux page tables.
  716. * We use it to preload an HPTE into the hash table corresponding to
  717. * the updated linux HUGE PMD entry.
  718. */
  719. void update_mmu_cache_pmd(struct vm_area_struct *vma, unsigned long addr,
  720. pmd_t *pmd)
  721. {
  722. return;
  723. }
  724. pmd_t pmdp_get_and_clear(struct mm_struct *mm,
  725. unsigned long addr, pmd_t *pmdp)
  726. {
  727. pmd_t old_pmd;
  728. pgtable_t pgtable;
  729. unsigned long old;
  730. pgtable_t *pgtable_slot;
  731. old = pmd_hugepage_update(mm, addr, pmdp, ~0UL);
  732. old_pmd = __pmd(old);
  733. /*
  734. * We have pmd == none and we are holding page_table_lock.
  735. * So we can safely go and clear the pgtable hash
  736. * index info.
  737. */
  738. pgtable_slot = (pgtable_t *)pmdp + PTRS_PER_PMD;
  739. pgtable = *pgtable_slot;
  740. /*
  741. * Let's zero out old valid and hash index details
  742. * hash fault look at them.
  743. */
  744. memset(pgtable, 0, PTE_FRAG_SIZE);
  745. return old_pmd;
  746. }
  747. int has_transparent_hugepage(void)
  748. {
  749. if (!mmu_has_feature(MMU_FTR_16M_PAGE))
  750. return 0;
  751. /*
  752. * We support THP only if PMD_SIZE is 16MB.
  753. */
  754. if (mmu_psize_defs[MMU_PAGE_16M].shift != PMD_SHIFT)
  755. return 0;
  756. /*
  757. * We need to make sure that we support 16MB hugepage in a segement
  758. * with base page size 64K or 4K. We only enable THP with a PAGE_SIZE
  759. * of 64K.
  760. */
  761. /*
  762. * If we have 64K HPTE, we will be using that by default
  763. */
  764. if (mmu_psize_defs[MMU_PAGE_64K].shift &&
  765. (mmu_psize_defs[MMU_PAGE_64K].penc[MMU_PAGE_16M] == -1))
  766. return 0;
  767. /*
  768. * Ok we only have 4K HPTE
  769. */
  770. if (mmu_psize_defs[MMU_PAGE_4K].penc[MMU_PAGE_16M] == -1)
  771. return 0;
  772. return 1;
  773. }
  774. #endif /* CONFIG_TRANSPARENT_HUGEPAGE */