setup.c 22 KB

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  1. /*
  2. * Based on linux/arch/mips/txx9/rbtx4938/setup.c,
  3. * and RBTX49xx patch from CELF patch archive.
  4. *
  5. * 2003-2005 (c) MontaVista Software, Inc.
  6. * (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007
  7. *
  8. * This file is subject to the terms and conditions of the GNU General Public
  9. * License. See the file "COPYING" in the main directory of this archive
  10. * for more details.
  11. */
  12. #include <linux/init.h>
  13. #include <linux/kernel.h>
  14. #include <linux/types.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/string.h>
  17. #include <linux/module.h>
  18. #include <linux/clk.h>
  19. #include <linux/err.h>
  20. #include <linux/gpio.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/serial_core.h>
  23. #include <linux/mtd/physmap.h>
  24. #include <linux/leds.h>
  25. #include <linux/device.h>
  26. #include <linux/slab.h>
  27. #include <linux/irq.h>
  28. #include <asm/bootinfo.h>
  29. #include <asm/idle.h>
  30. #include <asm/time.h>
  31. #include <asm/reboot.h>
  32. #include <asm/r4kcache.h>
  33. #include <asm/sections.h>
  34. #include <asm/txx9/generic.h>
  35. #include <asm/txx9/pci.h>
  36. #include <asm/txx9tmr.h>
  37. #include <asm/txx9/ndfmc.h>
  38. #include <asm/txx9/dmac.h>
  39. #ifdef CONFIG_CPU_TX49XX
  40. #include <asm/txx9/tx4938.h>
  41. #endif
  42. /* EBUSC settings of TX4927, etc. */
  43. struct resource txx9_ce_res[8];
  44. static char txx9_ce_res_name[8][4]; /* "CEn" */
  45. /* pcode, internal register */
  46. unsigned int txx9_pcode;
  47. char txx9_pcode_str[8];
  48. static struct resource txx9_reg_res = {
  49. .name = txx9_pcode_str,
  50. .flags = IORESOURCE_MEM,
  51. };
  52. void __init
  53. txx9_reg_res_init(unsigned int pcode, unsigned long base, unsigned long size)
  54. {
  55. int i;
  56. for (i = 0; i < ARRAY_SIZE(txx9_ce_res); i++) {
  57. sprintf(txx9_ce_res_name[i], "CE%d", i);
  58. txx9_ce_res[i].flags = IORESOURCE_MEM;
  59. txx9_ce_res[i].name = txx9_ce_res_name[i];
  60. }
  61. txx9_pcode = pcode;
  62. sprintf(txx9_pcode_str, "TX%x", pcode);
  63. if (base) {
  64. txx9_reg_res.start = base & 0xfffffffffULL;
  65. txx9_reg_res.end = (base & 0xfffffffffULL) + (size - 1);
  66. request_resource(&iomem_resource, &txx9_reg_res);
  67. }
  68. }
  69. /* clocks */
  70. unsigned int txx9_master_clock;
  71. unsigned int txx9_cpu_clock;
  72. unsigned int txx9_gbus_clock;
  73. #ifdef CONFIG_CPU_TX39XX
  74. /* don't enable by default - see errata */
  75. int txx9_ccfg_toeon __initdata;
  76. #else
  77. int txx9_ccfg_toeon __initdata = 1;
  78. #endif
  79. /* Minimum CLK support */
  80. struct clk *clk_get(struct device *dev, const char *id)
  81. {
  82. if (!strcmp(id, "spi-baseclk"))
  83. return (struct clk *)((unsigned long)txx9_gbus_clock / 2 / 2);
  84. if (!strcmp(id, "imbus_clk"))
  85. return (struct clk *)((unsigned long)txx9_gbus_clock / 2);
  86. return ERR_PTR(-ENOENT);
  87. }
  88. EXPORT_SYMBOL(clk_get);
  89. int clk_enable(struct clk *clk)
  90. {
  91. return 0;
  92. }
  93. EXPORT_SYMBOL(clk_enable);
  94. void clk_disable(struct clk *clk)
  95. {
  96. }
  97. EXPORT_SYMBOL(clk_disable);
  98. unsigned long clk_get_rate(struct clk *clk)
  99. {
  100. return (unsigned long)clk;
  101. }
  102. EXPORT_SYMBOL(clk_get_rate);
  103. void clk_put(struct clk *clk)
  104. {
  105. }
  106. EXPORT_SYMBOL(clk_put);
  107. /* GPIO support */
  108. #ifdef CONFIG_GPIOLIB
  109. int gpio_to_irq(unsigned gpio)
  110. {
  111. return -EINVAL;
  112. }
  113. EXPORT_SYMBOL(gpio_to_irq);
  114. int irq_to_gpio(unsigned irq)
  115. {
  116. return -EINVAL;
  117. }
  118. EXPORT_SYMBOL(irq_to_gpio);
  119. #endif
  120. #define BOARD_VEC(board) extern struct txx9_board_vec board;
  121. #include <asm/txx9/boards.h>
  122. #undef BOARD_VEC
  123. struct txx9_board_vec *txx9_board_vec __initdata;
  124. static char txx9_system_type[32];
  125. static struct txx9_board_vec *board_vecs[] __initdata = {
  126. #define BOARD_VEC(board) &board,
  127. #include <asm/txx9/boards.h>
  128. #undef BOARD_VEC
  129. };
  130. static struct txx9_board_vec *__init find_board_byname(const char *name)
  131. {
  132. int i;
  133. /* search board_vecs table */
  134. for (i = 0; i < ARRAY_SIZE(board_vecs); i++) {
  135. if (strstr(board_vecs[i]->system, name))
  136. return board_vecs[i];
  137. }
  138. return NULL;
  139. }
  140. static void __init prom_init_cmdline(void)
  141. {
  142. int argc;
  143. int *argv32;
  144. int i; /* Always ignore the "-c" at argv[0] */
  145. if (fw_arg0 >= CKSEG0 || fw_arg1 < CKSEG0) {
  146. /*
  147. * argc is not a valid number, or argv32 is not a valid
  148. * pointer
  149. */
  150. argc = 0;
  151. argv32 = NULL;
  152. } else {
  153. argc = (int)fw_arg0;
  154. argv32 = (int *)fw_arg1;
  155. }
  156. arcs_cmdline[0] = '\0';
  157. for (i = 1; i < argc; i++) {
  158. char *str = (char *)(long)argv32[i];
  159. if (i != 1)
  160. strcat(arcs_cmdline, " ");
  161. if (strchr(str, ' ')) {
  162. strcat(arcs_cmdline, "\"");
  163. strcat(arcs_cmdline, str);
  164. strcat(arcs_cmdline, "\"");
  165. } else
  166. strcat(arcs_cmdline, str);
  167. }
  168. }
  169. static int txx9_ic_disable __initdata;
  170. static int txx9_dc_disable __initdata;
  171. #if defined(CONFIG_CPU_TX49XX)
  172. /* flush all cache on very early stage (before 4k_cache_init) */
  173. static void __init early_flush_dcache(void)
  174. {
  175. unsigned int conf = read_c0_config();
  176. unsigned int dc_size = 1 << (12 + ((conf & CONF_DC) >> 6));
  177. unsigned int linesz = 32;
  178. unsigned long addr, end;
  179. end = INDEX_BASE + dc_size / 4;
  180. /* 4way, waybit=0 */
  181. for (addr = INDEX_BASE; addr < end; addr += linesz) {
  182. cache_op(Index_Writeback_Inv_D, addr | 0);
  183. cache_op(Index_Writeback_Inv_D, addr | 1);
  184. cache_op(Index_Writeback_Inv_D, addr | 2);
  185. cache_op(Index_Writeback_Inv_D, addr | 3);
  186. }
  187. }
  188. static void __init txx9_cache_fixup(void)
  189. {
  190. unsigned int conf;
  191. conf = read_c0_config();
  192. /* flush and disable */
  193. if (txx9_ic_disable) {
  194. conf |= TX49_CONF_IC;
  195. write_c0_config(conf);
  196. }
  197. if (txx9_dc_disable) {
  198. early_flush_dcache();
  199. conf |= TX49_CONF_DC;
  200. write_c0_config(conf);
  201. }
  202. /* enable cache */
  203. conf = read_c0_config();
  204. if (!txx9_ic_disable)
  205. conf &= ~TX49_CONF_IC;
  206. if (!txx9_dc_disable)
  207. conf &= ~TX49_CONF_DC;
  208. write_c0_config(conf);
  209. if (conf & TX49_CONF_IC)
  210. pr_info("TX49XX I-Cache disabled.\n");
  211. if (conf & TX49_CONF_DC)
  212. pr_info("TX49XX D-Cache disabled.\n");
  213. }
  214. #elif defined(CONFIG_CPU_TX39XX)
  215. /* flush all cache on very early stage (before tx39_cache_init) */
  216. static void __init early_flush_dcache(void)
  217. {
  218. unsigned int conf = read_c0_config();
  219. unsigned int dc_size = 1 << (10 + ((conf & TX39_CONF_DCS_MASK) >>
  220. TX39_CONF_DCS_SHIFT));
  221. unsigned int linesz = 16;
  222. unsigned long addr, end;
  223. end = INDEX_BASE + dc_size / 2;
  224. /* 2way, waybit=0 */
  225. for (addr = INDEX_BASE; addr < end; addr += linesz) {
  226. cache_op(Index_Writeback_Inv_D, addr | 0);
  227. cache_op(Index_Writeback_Inv_D, addr | 1);
  228. }
  229. }
  230. static void __init txx9_cache_fixup(void)
  231. {
  232. unsigned int conf;
  233. conf = read_c0_config();
  234. /* flush and disable */
  235. if (txx9_ic_disable) {
  236. conf &= ~TX39_CONF_ICE;
  237. write_c0_config(conf);
  238. }
  239. if (txx9_dc_disable) {
  240. early_flush_dcache();
  241. conf &= ~TX39_CONF_DCE;
  242. write_c0_config(conf);
  243. }
  244. /* enable cache */
  245. conf = read_c0_config();
  246. if (!txx9_ic_disable)
  247. conf |= TX39_CONF_ICE;
  248. if (!txx9_dc_disable)
  249. conf |= TX39_CONF_DCE;
  250. write_c0_config(conf);
  251. if (!(conf & TX39_CONF_ICE))
  252. pr_info("TX39XX I-Cache disabled.\n");
  253. if (!(conf & TX39_CONF_DCE))
  254. pr_info("TX39XX D-Cache disabled.\n");
  255. }
  256. #else
  257. static inline void txx9_cache_fixup(void)
  258. {
  259. }
  260. #endif
  261. static void __init preprocess_cmdline(void)
  262. {
  263. static char cmdline[COMMAND_LINE_SIZE] __initdata;
  264. char *s;
  265. strcpy(cmdline, arcs_cmdline);
  266. s = cmdline;
  267. arcs_cmdline[0] = '\0';
  268. while (s && *s) {
  269. char *str = strsep(&s, " ");
  270. if (strncmp(str, "board=", 6) == 0) {
  271. txx9_board_vec = find_board_byname(str + 6);
  272. continue;
  273. } else if (strncmp(str, "masterclk=", 10) == 0) {
  274. unsigned long val;
  275. if (strict_strtoul(str + 10, 10, &val) == 0)
  276. txx9_master_clock = val;
  277. continue;
  278. } else if (strcmp(str, "icdisable") == 0) {
  279. txx9_ic_disable = 1;
  280. continue;
  281. } else if (strcmp(str, "dcdisable") == 0) {
  282. txx9_dc_disable = 1;
  283. continue;
  284. } else if (strcmp(str, "toeoff") == 0) {
  285. txx9_ccfg_toeon = 0;
  286. continue;
  287. } else if (strcmp(str, "toeon") == 0) {
  288. txx9_ccfg_toeon = 1;
  289. continue;
  290. }
  291. if (arcs_cmdline[0])
  292. strcat(arcs_cmdline, " ");
  293. strcat(arcs_cmdline, str);
  294. }
  295. txx9_cache_fixup();
  296. }
  297. static void __init select_board(void)
  298. {
  299. const char *envstr;
  300. /* first, determine by "board=" argument in preprocess_cmdline() */
  301. if (txx9_board_vec)
  302. return;
  303. /* next, determine by "board" envvar */
  304. envstr = prom_getenv("board");
  305. if (envstr) {
  306. txx9_board_vec = find_board_byname(envstr);
  307. if (txx9_board_vec)
  308. return;
  309. }
  310. /* select "default" board */
  311. #ifdef CONFIG_CPU_TX39XX
  312. txx9_board_vec = &jmr3927_vec;
  313. #endif
  314. #ifdef CONFIG_CPU_TX49XX
  315. switch (TX4938_REV_PCODE()) {
  316. #ifdef CONFIG_TOSHIBA_RBTX4927
  317. case 0x4927:
  318. txx9_board_vec = &rbtx4927_vec;
  319. break;
  320. case 0x4937:
  321. txx9_board_vec = &rbtx4937_vec;
  322. break;
  323. #endif
  324. #ifdef CONFIG_TOSHIBA_RBTX4938
  325. case 0x4938:
  326. txx9_board_vec = &rbtx4938_vec;
  327. break;
  328. #endif
  329. #ifdef CONFIG_TOSHIBA_RBTX4939
  330. case 0x4939:
  331. txx9_board_vec = &rbtx4939_vec;
  332. break;
  333. #endif
  334. }
  335. #endif
  336. }
  337. void __init prom_init(void)
  338. {
  339. prom_init_cmdline();
  340. preprocess_cmdline();
  341. select_board();
  342. strcpy(txx9_system_type, txx9_board_vec->system);
  343. txx9_board_vec->prom_init();
  344. }
  345. void __init prom_free_prom_memory(void)
  346. {
  347. unsigned long saddr = PAGE_SIZE;
  348. unsigned long eaddr = __pa_symbol(&_text);
  349. if (saddr < eaddr)
  350. free_init_pages("prom memory", saddr, eaddr);
  351. }
  352. const char *get_system_type(void)
  353. {
  354. return txx9_system_type;
  355. }
  356. const char *__init prom_getenv(const char *name)
  357. {
  358. const s32 *str;
  359. if (fw_arg2 < CKSEG0)
  360. return NULL;
  361. str = (const s32 *)fw_arg2;
  362. /* YAMON style ("name", "value" pairs) */
  363. while (str[0] && str[1]) {
  364. if (!strcmp((const char *)(unsigned long)str[0], name))
  365. return (const char *)(unsigned long)str[1];
  366. str += 2;
  367. }
  368. return NULL;
  369. }
  370. static void __noreturn txx9_machine_halt(void)
  371. {
  372. local_irq_disable();
  373. clear_c0_status(ST0_IM);
  374. while (1) {
  375. if (cpu_wait) {
  376. (*cpu_wait)();
  377. if (cpu_has_counter) {
  378. /*
  379. * Clear counter interrupt while it
  380. * breaks WAIT instruction even if
  381. * masked.
  382. */
  383. write_c0_compare(0);
  384. }
  385. }
  386. }
  387. }
  388. /* Watchdog support */
  389. void __init txx9_wdt_init(unsigned long base)
  390. {
  391. struct resource res = {
  392. .start = base,
  393. .end = base + 0x100 - 1,
  394. .flags = IORESOURCE_MEM,
  395. };
  396. platform_device_register_simple("txx9wdt", -1, &res, 1);
  397. }
  398. void txx9_wdt_now(unsigned long base)
  399. {
  400. struct txx9_tmr_reg __iomem *tmrptr =
  401. ioremap(base, sizeof(struct txx9_tmr_reg));
  402. /* disable watch dog timer */
  403. __raw_writel(TXx9_TMWTMR_WDIS | TXx9_TMWTMR_TWC, &tmrptr->wtmr);
  404. __raw_writel(0, &tmrptr->tcr);
  405. /* kick watchdog */
  406. __raw_writel(TXx9_TMWTMR_TWIE, &tmrptr->wtmr);
  407. __raw_writel(1, &tmrptr->cpra); /* immediate */
  408. __raw_writel(TXx9_TMTCR_TCE | TXx9_TMTCR_CCDE | TXx9_TMTCR_TMODE_WDOG,
  409. &tmrptr->tcr);
  410. }
  411. /* SPI support */
  412. void __init txx9_spi_init(int busid, unsigned long base, int irq)
  413. {
  414. struct resource res[] = {
  415. {
  416. .start = base,
  417. .end = base + 0x20 - 1,
  418. .flags = IORESOURCE_MEM,
  419. }, {
  420. .start = irq,
  421. .flags = IORESOURCE_IRQ,
  422. },
  423. };
  424. platform_device_register_simple("spi_txx9", busid,
  425. res, ARRAY_SIZE(res));
  426. }
  427. void __init txx9_ethaddr_init(unsigned int id, unsigned char *ethaddr)
  428. {
  429. struct platform_device *pdev =
  430. platform_device_alloc("tc35815-mac", id);
  431. if (!pdev ||
  432. platform_device_add_data(pdev, ethaddr, 6) ||
  433. platform_device_add(pdev))
  434. platform_device_put(pdev);
  435. }
  436. void __init txx9_sio_init(unsigned long baseaddr, int irq,
  437. unsigned int line, unsigned int sclk, int nocts)
  438. {
  439. #ifdef CONFIG_SERIAL_TXX9
  440. struct uart_port req;
  441. memset(&req, 0, sizeof(req));
  442. req.line = line;
  443. req.iotype = UPIO_MEM;
  444. req.membase = ioremap(baseaddr, 0x24);
  445. req.mapbase = baseaddr;
  446. req.irq = irq;
  447. if (!nocts)
  448. req.flags |= UPF_BUGGY_UART /*HAVE_CTS_LINE*/;
  449. if (sclk) {
  450. req.flags |= UPF_MAGIC_MULTIPLIER /*USE_SCLK*/;
  451. req.uartclk = sclk;
  452. } else
  453. req.uartclk = TXX9_IMCLK;
  454. early_serial_txx9_setup(&req);
  455. #endif /* CONFIG_SERIAL_TXX9 */
  456. }
  457. #ifdef CONFIG_EARLY_PRINTK
  458. static void null_prom_putchar(char c)
  459. {
  460. }
  461. void (*txx9_prom_putchar)(char c) = null_prom_putchar;
  462. void prom_putchar(char c)
  463. {
  464. txx9_prom_putchar(c);
  465. }
  466. static void __iomem *early_txx9_sio_port;
  467. static void early_txx9_sio_putchar(char c)
  468. {
  469. #define TXX9_SICISR 0x0c
  470. #define TXX9_SITFIFO 0x1c
  471. #define TXX9_SICISR_TXALS 0x00000002
  472. while (!(__raw_readl(early_txx9_sio_port + TXX9_SICISR) &
  473. TXX9_SICISR_TXALS))
  474. ;
  475. __raw_writel(c, early_txx9_sio_port + TXX9_SITFIFO);
  476. }
  477. void __init txx9_sio_putchar_init(unsigned long baseaddr)
  478. {
  479. early_txx9_sio_port = ioremap(baseaddr, 0x24);
  480. txx9_prom_putchar = early_txx9_sio_putchar;
  481. }
  482. #endif /* CONFIG_EARLY_PRINTK */
  483. /* wrappers */
  484. void __init plat_mem_setup(void)
  485. {
  486. ioport_resource.start = 0;
  487. ioport_resource.end = ~0UL; /* no limit */
  488. iomem_resource.start = 0;
  489. iomem_resource.end = ~0UL; /* no limit */
  490. /* fallback restart/halt routines */
  491. _machine_restart = (void (*)(char *))txx9_machine_halt;
  492. _machine_halt = txx9_machine_halt;
  493. pm_power_off = txx9_machine_halt;
  494. #ifdef CONFIG_PCI
  495. pcibios_plat_setup = txx9_pcibios_setup;
  496. #endif
  497. txx9_board_vec->mem_setup();
  498. }
  499. void __init arch_init_irq(void)
  500. {
  501. txx9_board_vec->irq_setup();
  502. }
  503. void __init plat_time_init(void)
  504. {
  505. #ifdef CONFIG_CPU_TX49XX
  506. mips_hpt_frequency = txx9_cpu_clock / 2;
  507. #endif
  508. txx9_board_vec->time_init();
  509. }
  510. static int __init _txx9_arch_init(void)
  511. {
  512. if (txx9_board_vec->arch_init)
  513. txx9_board_vec->arch_init();
  514. return 0;
  515. }
  516. arch_initcall(_txx9_arch_init);
  517. static int __init _txx9_device_init(void)
  518. {
  519. if (txx9_board_vec->device_init)
  520. txx9_board_vec->device_init();
  521. return 0;
  522. }
  523. device_initcall(_txx9_device_init);
  524. int (*txx9_irq_dispatch)(int pending);
  525. asmlinkage void plat_irq_dispatch(void)
  526. {
  527. int pending = read_c0_status() & read_c0_cause() & ST0_IM;
  528. int irq = txx9_irq_dispatch(pending);
  529. if (likely(irq >= 0))
  530. do_IRQ(irq);
  531. else
  532. spurious_interrupt();
  533. }
  534. /* see include/asm-mips/mach-tx39xx/mangle-port.h, for example. */
  535. #ifdef NEEDS_TXX9_SWIZZLE_ADDR_B
  536. static unsigned long __swizzle_addr_none(unsigned long port)
  537. {
  538. return port;
  539. }
  540. unsigned long (*__swizzle_addr_b)(unsigned long port) = __swizzle_addr_none;
  541. EXPORT_SYMBOL(__swizzle_addr_b);
  542. #endif
  543. #ifdef NEEDS_TXX9_IOSWABW
  544. static u16 ioswabw_default(volatile u16 *a, u16 x)
  545. {
  546. return le16_to_cpu(x);
  547. }
  548. static u16 __mem_ioswabw_default(volatile u16 *a, u16 x)
  549. {
  550. return x;
  551. }
  552. u16 (*ioswabw)(volatile u16 *a, u16 x) = ioswabw_default;
  553. EXPORT_SYMBOL(ioswabw);
  554. u16 (*__mem_ioswabw)(volatile u16 *a, u16 x) = __mem_ioswabw_default;
  555. EXPORT_SYMBOL(__mem_ioswabw);
  556. #endif
  557. void __init txx9_physmap_flash_init(int no, unsigned long addr,
  558. unsigned long size,
  559. const struct physmap_flash_data *pdata)
  560. {
  561. #if IS_ENABLED(CONFIG_MTD_PHYSMAP)
  562. struct resource res = {
  563. .start = addr,
  564. .end = addr + size - 1,
  565. .flags = IORESOURCE_MEM,
  566. };
  567. struct platform_device *pdev;
  568. static struct mtd_partition parts[2];
  569. struct physmap_flash_data pdata_part;
  570. /* If this area contained boot area, make separate partition */
  571. if (pdata->nr_parts == 0 && !pdata->parts &&
  572. addr < 0x1fc00000 && addr + size > 0x1fc00000 &&
  573. !parts[0].name) {
  574. parts[0].name = "boot";
  575. parts[0].offset = 0x1fc00000 - addr;
  576. parts[0].size = addr + size - 0x1fc00000;
  577. parts[1].name = "user";
  578. parts[1].offset = 0;
  579. parts[1].size = 0x1fc00000 - addr;
  580. pdata_part = *pdata;
  581. pdata_part.nr_parts = ARRAY_SIZE(parts);
  582. pdata_part.parts = parts;
  583. pdata = &pdata_part;
  584. }
  585. pdev = platform_device_alloc("physmap-flash", no);
  586. if (!pdev ||
  587. platform_device_add_resources(pdev, &res, 1) ||
  588. platform_device_add_data(pdev, pdata, sizeof(*pdata)) ||
  589. platform_device_add(pdev))
  590. platform_device_put(pdev);
  591. #endif
  592. }
  593. void __init txx9_ndfmc_init(unsigned long baseaddr,
  594. const struct txx9ndfmc_platform_data *pdata)
  595. {
  596. #if IS_ENABLED(CONFIG_MTD_NAND_TXX9NDFMC)
  597. struct resource res = {
  598. .start = baseaddr,
  599. .end = baseaddr + 0x1000 - 1,
  600. .flags = IORESOURCE_MEM,
  601. };
  602. struct platform_device *pdev = platform_device_alloc("txx9ndfmc", -1);
  603. if (!pdev ||
  604. platform_device_add_resources(pdev, &res, 1) ||
  605. platform_device_add_data(pdev, pdata, sizeof(*pdata)) ||
  606. platform_device_add(pdev))
  607. platform_device_put(pdev);
  608. #endif
  609. }
  610. #if IS_ENABLED(CONFIG_LEDS_GPIO)
  611. static DEFINE_SPINLOCK(txx9_iocled_lock);
  612. #define TXX9_IOCLED_MAXLEDS 8
  613. struct txx9_iocled_data {
  614. struct gpio_chip chip;
  615. u8 cur_val;
  616. void __iomem *mmioaddr;
  617. struct gpio_led_platform_data pdata;
  618. struct gpio_led leds[TXX9_IOCLED_MAXLEDS];
  619. char names[TXX9_IOCLED_MAXLEDS][32];
  620. };
  621. static int txx9_iocled_get(struct gpio_chip *chip, unsigned int offset)
  622. {
  623. struct txx9_iocled_data *data =
  624. container_of(chip, struct txx9_iocled_data, chip);
  625. return data->cur_val & (1 << offset);
  626. }
  627. static void txx9_iocled_set(struct gpio_chip *chip, unsigned int offset,
  628. int value)
  629. {
  630. struct txx9_iocled_data *data =
  631. container_of(chip, struct txx9_iocled_data, chip);
  632. unsigned long flags;
  633. spin_lock_irqsave(&txx9_iocled_lock, flags);
  634. if (value)
  635. data->cur_val |= 1 << offset;
  636. else
  637. data->cur_val &= ~(1 << offset);
  638. writeb(data->cur_val, data->mmioaddr);
  639. mmiowb();
  640. spin_unlock_irqrestore(&txx9_iocled_lock, flags);
  641. }
  642. static int txx9_iocled_dir_in(struct gpio_chip *chip, unsigned int offset)
  643. {
  644. return 0;
  645. }
  646. static int txx9_iocled_dir_out(struct gpio_chip *chip, unsigned int offset,
  647. int value)
  648. {
  649. txx9_iocled_set(chip, offset, value);
  650. return 0;
  651. }
  652. void __init txx9_iocled_init(unsigned long baseaddr,
  653. int basenum, unsigned int num, int lowactive,
  654. const char *color, char **deftriggers)
  655. {
  656. struct txx9_iocled_data *iocled;
  657. struct platform_device *pdev;
  658. int i;
  659. static char *default_triggers[] __initdata = {
  660. "heartbeat",
  661. "ide-disk",
  662. "nand-disk",
  663. NULL,
  664. };
  665. if (!deftriggers)
  666. deftriggers = default_triggers;
  667. iocled = kzalloc(sizeof(*iocled), GFP_KERNEL);
  668. if (!iocled)
  669. return;
  670. iocled->mmioaddr = ioremap(baseaddr, 1);
  671. if (!iocled->mmioaddr)
  672. goto out_free;
  673. iocled->chip.get = txx9_iocled_get;
  674. iocled->chip.set = txx9_iocled_set;
  675. iocled->chip.direction_input = txx9_iocled_dir_in;
  676. iocled->chip.direction_output = txx9_iocled_dir_out;
  677. iocled->chip.label = "iocled";
  678. iocled->chip.base = basenum;
  679. iocled->chip.ngpio = num;
  680. if (gpiochip_add(&iocled->chip))
  681. goto out_unmap;
  682. if (basenum < 0)
  683. basenum = iocled->chip.base;
  684. pdev = platform_device_alloc("leds-gpio", basenum);
  685. if (!pdev)
  686. goto out_gpio;
  687. iocled->pdata.num_leds = num;
  688. iocled->pdata.leds = iocled->leds;
  689. for (i = 0; i < num; i++) {
  690. struct gpio_led *led = &iocled->leds[i];
  691. snprintf(iocled->names[i], sizeof(iocled->names[i]),
  692. "iocled:%s:%u", color, i);
  693. led->name = iocled->names[i];
  694. led->gpio = basenum + i;
  695. led->active_low = lowactive;
  696. if (deftriggers && *deftriggers)
  697. led->default_trigger = *deftriggers++;
  698. }
  699. pdev->dev.platform_data = &iocled->pdata;
  700. if (platform_device_add(pdev))
  701. goto out_pdev;
  702. return;
  703. out_pdev:
  704. platform_device_put(pdev);
  705. out_gpio:
  706. if (gpiochip_remove(&iocled->chip))
  707. return;
  708. out_unmap:
  709. iounmap(iocled->mmioaddr);
  710. out_free:
  711. kfree(iocled);
  712. }
  713. #else /* CONFIG_LEDS_GPIO */
  714. void __init txx9_iocled_init(unsigned long baseaddr,
  715. int basenum, unsigned int num, int lowactive,
  716. const char *color, char **deftriggers)
  717. {
  718. }
  719. #endif /* CONFIG_LEDS_GPIO */
  720. void __init txx9_dmac_init(int id, unsigned long baseaddr, int irq,
  721. const struct txx9dmac_platform_data *pdata)
  722. {
  723. #if IS_ENABLED(CONFIG_TXX9_DMAC)
  724. struct resource res[] = {
  725. {
  726. .start = baseaddr,
  727. .end = baseaddr + 0x800 - 1,
  728. .flags = IORESOURCE_MEM,
  729. #ifndef CONFIG_MACH_TX49XX
  730. }, {
  731. .start = irq,
  732. .flags = IORESOURCE_IRQ,
  733. #endif
  734. }
  735. };
  736. #ifdef CONFIG_MACH_TX49XX
  737. struct resource chan_res[] = {
  738. {
  739. .flags = IORESOURCE_IRQ,
  740. }
  741. };
  742. #endif
  743. struct platform_device *pdev = platform_device_alloc("txx9dmac", id);
  744. struct txx9dmac_chan_platform_data cpdata;
  745. int i;
  746. if (!pdev ||
  747. platform_device_add_resources(pdev, res, ARRAY_SIZE(res)) ||
  748. platform_device_add_data(pdev, pdata, sizeof(*pdata)) ||
  749. platform_device_add(pdev)) {
  750. platform_device_put(pdev);
  751. return;
  752. }
  753. memset(&cpdata, 0, sizeof(cpdata));
  754. cpdata.dmac_dev = pdev;
  755. for (i = 0; i < TXX9_DMA_MAX_NR_CHANNELS; i++) {
  756. #ifdef CONFIG_MACH_TX49XX
  757. chan_res[0].start = irq + i;
  758. #endif
  759. pdev = platform_device_alloc("txx9dmac-chan",
  760. id * TXX9_DMA_MAX_NR_CHANNELS + i);
  761. if (!pdev ||
  762. #ifdef CONFIG_MACH_TX49XX
  763. platform_device_add_resources(pdev, chan_res,
  764. ARRAY_SIZE(chan_res)) ||
  765. #endif
  766. platform_device_add_data(pdev, &cpdata, sizeof(cpdata)) ||
  767. platform_device_add(pdev))
  768. platform_device_put(pdev);
  769. }
  770. #endif
  771. }
  772. void __init txx9_aclc_init(unsigned long baseaddr, int irq,
  773. unsigned int dmac_id,
  774. unsigned int dma_chan_out,
  775. unsigned int dma_chan_in)
  776. {
  777. #if IS_ENABLED(CONFIG_SND_SOC_TXX9ACLC)
  778. unsigned int dma_base = dmac_id * TXX9_DMA_MAX_NR_CHANNELS;
  779. struct resource res[] = {
  780. {
  781. .start = baseaddr,
  782. .end = baseaddr + 0x100 - 1,
  783. .flags = IORESOURCE_MEM,
  784. }, {
  785. .start = irq,
  786. .flags = IORESOURCE_IRQ,
  787. }, {
  788. .name = "txx9dmac-chan",
  789. .start = dma_base + dma_chan_out,
  790. .flags = IORESOURCE_DMA,
  791. }, {
  792. .name = "txx9dmac-chan",
  793. .start = dma_base + dma_chan_in,
  794. .flags = IORESOURCE_DMA,
  795. }
  796. };
  797. struct platform_device *pdev =
  798. platform_device_alloc("txx9aclc-ac97", -1);
  799. if (!pdev ||
  800. platform_device_add_resources(pdev, res, ARRAY_SIZE(res)) ||
  801. platform_device_add(pdev))
  802. platform_device_put(pdev);
  803. #endif
  804. }
  805. static struct bus_type txx9_sramc_subsys = {
  806. .name = "txx9_sram",
  807. .dev_name = "txx9_sram",
  808. };
  809. struct txx9_sramc_dev {
  810. struct device dev;
  811. struct bin_attribute bindata_attr;
  812. void __iomem *base;
  813. };
  814. static ssize_t txx9_sram_read(struct file *filp, struct kobject *kobj,
  815. struct bin_attribute *bin_attr,
  816. char *buf, loff_t pos, size_t size)
  817. {
  818. struct txx9_sramc_dev *dev = bin_attr->private;
  819. size_t ramsize = bin_attr->size;
  820. if (pos >= ramsize)
  821. return 0;
  822. if (pos + size > ramsize)
  823. size = ramsize - pos;
  824. memcpy_fromio(buf, dev->base + pos, size);
  825. return size;
  826. }
  827. static ssize_t txx9_sram_write(struct file *filp, struct kobject *kobj,
  828. struct bin_attribute *bin_attr,
  829. char *buf, loff_t pos, size_t size)
  830. {
  831. struct txx9_sramc_dev *dev = bin_attr->private;
  832. size_t ramsize = bin_attr->size;
  833. if (pos >= ramsize)
  834. return 0;
  835. if (pos + size > ramsize)
  836. size = ramsize - pos;
  837. memcpy_toio(dev->base + pos, buf, size);
  838. return size;
  839. }
  840. void __init txx9_sramc_init(struct resource *r)
  841. {
  842. struct txx9_sramc_dev *dev;
  843. size_t size;
  844. int err;
  845. err = subsys_system_register(&txx9_sramc_subsys, NULL);
  846. if (err)
  847. return;
  848. dev = kzalloc(sizeof(*dev), GFP_KERNEL);
  849. if (!dev)
  850. return;
  851. size = resource_size(r);
  852. dev->base = ioremap(r->start, size);
  853. if (!dev->base)
  854. goto exit;
  855. dev->dev.bus = &txx9_sramc_subsys;
  856. sysfs_bin_attr_init(&dev->bindata_attr);
  857. dev->bindata_attr.attr.name = "bindata";
  858. dev->bindata_attr.attr.mode = S_IRUSR | S_IWUSR;
  859. dev->bindata_attr.read = txx9_sram_read;
  860. dev->bindata_attr.write = txx9_sram_write;
  861. dev->bindata_attr.size = size;
  862. dev->bindata_attr.private = dev;
  863. err = device_register(&dev->dev);
  864. if (err)
  865. goto exit;
  866. err = sysfs_create_bin_file(&dev->dev.kobj, &dev->bindata_attr);
  867. if (err) {
  868. device_unregister(&dev->dev);
  869. goto exit;
  870. }
  871. return;
  872. exit:
  873. if (dev) {
  874. if (dev->base)
  875. iounmap(dev->base);
  876. kfree(dev);
  877. }
  878. }