smpboot.S 4.1 KB

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  1. /*
  2. * Copyright 2003-2011 NetLogic Microsystems, Inc. (NetLogic). All rights
  3. * reserved.
  4. *
  5. * This software is available to you under a choice of one of two
  6. * licenses. You may choose to be licensed under the terms of the GNU
  7. * General Public License (GPL) Version 2, available from the file
  8. * COPYING in the main directory of this source tree, or the NetLogic
  9. * license below:
  10. *
  11. * Redistribution and use in source and binary forms, with or without
  12. * modification, are permitted provided that the following conditions
  13. * are met:
  14. *
  15. * 1. Redistributions of source code must retain the above copyright
  16. * notice, this list of conditions and the following disclaimer.
  17. * 2. Redistributions in binary form must reproduce the above copyright
  18. * notice, this list of conditions and the following disclaimer in
  19. * the documentation and/or other materials provided with the
  20. * distribution.
  21. *
  22. * THIS SOFTWARE IS PROVIDED BY NETLOGIC ``AS IS'' AND ANY EXPRESS OR
  23. * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  24. * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  25. * ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE LIABLE
  26. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  27. * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  28. * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
  29. * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
  30. * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
  31. * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
  32. * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  33. */
  34. #include <linux/init.h>
  35. #include <asm/asm.h>
  36. #include <asm/asm-offsets.h>
  37. #include <asm/regdef.h>
  38. #include <asm/mipsregs.h>
  39. #include <asm/stackframe.h>
  40. #include <asm/asmmacro.h>
  41. #include <asm/addrspace.h>
  42. #include <asm/netlogic/common.h>
  43. #include <asm/netlogic/xlp-hal/iomap.h>
  44. #include <asm/netlogic/xlp-hal/xlp.h>
  45. #include <asm/netlogic/xlp-hal/sys.h>
  46. #include <asm/netlogic/xlp-hal/cpucontrol.h>
  47. #define CP0_EBASE $15
  48. .set noreorder
  49. .set noat
  50. .set arch=xlr /* for mfcr/mtcr, XLR is sufficient */
  51. FEXPORT(xlp_boot_core0_siblings) /* "Master" cpu starts from here */
  52. dmtc0 sp, $4, 2 /* SP saved in UserLocal */
  53. SAVE_ALL
  54. sync
  55. /* find the location to which nlm_boot_siblings was relocated */
  56. li t0, CKSEG1ADDR(RESET_VEC_PHYS)
  57. dla t1, nlm_reset_entry
  58. dla t2, nlm_boot_siblings
  59. dsubu t2, t1
  60. daddu t2, t0
  61. /* call it */
  62. jr t2
  63. nop
  64. /* not reached */
  65. NESTED(nlm_boot_secondary_cpus, 16, sp)
  66. /* Initialize CP0 Status */
  67. move t1, zero
  68. #ifdef CONFIG_64BIT
  69. ori t1, ST0_KX
  70. #endif
  71. mtc0 t1, CP0_STATUS
  72. PTR_LA t1, nlm_next_sp
  73. PTR_L sp, 0(t1)
  74. PTR_LA t1, nlm_next_gp
  75. PTR_L gp, 0(t1)
  76. /* a0 has the processor id */
  77. mfc0 a0, CP0_EBASE, 1
  78. andi a0, 0x3ff /* a0 <- node/core */
  79. PTR_LA t0, nlm_early_init_secondary
  80. jalr t0
  81. nop
  82. PTR_LA t0, smp_bootstrap
  83. jr t0
  84. nop
  85. END(nlm_boot_secondary_cpus)
  86. /*
  87. * In case of RMIboot bootloader which is used on XLR boards, the CPUs
  88. * be already woken up and waiting in bootloader code.
  89. * This will get them out of the bootloader code and into linux. Needed
  90. * because the bootloader area will be taken and initialized by linux.
  91. */
  92. NESTED(nlm_rmiboot_preboot, 16, sp)
  93. mfc0 t0, $15, 1 /* read ebase */
  94. andi t0, 0x1f /* t0 has the processor_id() */
  95. andi t2, t0, 0x3 /* thread num */
  96. sll t0, 2 /* offset in cpu array */
  97. li t3, CKSEG1ADDR(RESET_DATA_PHYS)
  98. ADDIU t1, t3, BOOT_CPU_READY
  99. ADDU t1, t0
  100. li t3, 1
  101. sw t3, 0(t1)
  102. bnez t2, 1f /* skip thread programming */
  103. nop /* for thread id != 0 */
  104. /*
  105. * XLR MMU setup only for first thread in core
  106. */
  107. li t0, 0x400
  108. mfcr t1, t0
  109. li t2, 6 /* XLR thread mode mask */
  110. nor t3, t2, zero
  111. and t2, t1, t2 /* t2 - current thread mode */
  112. li v0, CKSEG1ADDR(RESET_DATA_PHYS)
  113. lw v1, BOOT_THREAD_MODE(v0) /* v1 - new thread mode */
  114. sll v1, 1
  115. beq v1, t2, 1f /* same as request value */
  116. nop /* nothing to do */
  117. and t2, t1, t3 /* mask out old thread mode */
  118. or t1, t2, v1 /* put in new value */
  119. mtcr t1, t0 /* update core control */
  120. 1: wait
  121. b 1b
  122. nop
  123. END(nlm_rmiboot_preboot)