smp.c 9.3 KB

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  1. /*
  2. * This program is free software; you can redistribute it and/or
  3. * modify it under the terms of the GNU General Public License
  4. * as published by the Free Software Foundation; either version 2
  5. * of the License, or (at your option) any later version.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. *
  12. * You should have received a copy of the GNU General Public License
  13. * along with this program; if not, write to the Free Software
  14. * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  15. *
  16. * Copyright (C) 2000, 2001 Kanoj Sarcar
  17. * Copyright (C) 2000, 2001 Ralf Baechle
  18. * Copyright (C) 2000, 2001 Silicon Graphics, Inc.
  19. * Copyright (C) 2000, 2001, 2003 Broadcom Corporation
  20. */
  21. #include <linux/cache.h>
  22. #include <linux/delay.h>
  23. #include <linux/init.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/smp.h>
  26. #include <linux/spinlock.h>
  27. #include <linux/threads.h>
  28. #include <linux/module.h>
  29. #include <linux/time.h>
  30. #include <linux/timex.h>
  31. #include <linux/sched.h>
  32. #include <linux/cpumask.h>
  33. #include <linux/cpu.h>
  34. #include <linux/err.h>
  35. #include <linux/ftrace.h>
  36. #include <linux/atomic.h>
  37. #include <asm/cpu.h>
  38. #include <asm/processor.h>
  39. #include <asm/idle.h>
  40. #include <asm/r4k-timer.h>
  41. #include <asm/mmu_context.h>
  42. #include <asm/time.h>
  43. #include <asm/setup.h>
  44. #ifdef CONFIG_MIPS_MT_SMTC
  45. #include <asm/mipsmtregs.h>
  46. #endif /* CONFIG_MIPS_MT_SMTC */
  47. volatile cpumask_t cpu_callin_map; /* Bitmask of started secondaries */
  48. int __cpu_number_map[NR_CPUS]; /* Map physical to logical */
  49. EXPORT_SYMBOL(__cpu_number_map);
  50. int __cpu_logical_map[NR_CPUS]; /* Map logical to physical */
  51. EXPORT_SYMBOL(__cpu_logical_map);
  52. /* Number of TCs (or siblings in Intel speak) per CPU core */
  53. int smp_num_siblings = 1;
  54. EXPORT_SYMBOL(smp_num_siblings);
  55. /* representing the TCs (or siblings in Intel speak) of each logical CPU */
  56. cpumask_t cpu_sibling_map[NR_CPUS] __read_mostly;
  57. EXPORT_SYMBOL(cpu_sibling_map);
  58. /* representing cpus for which sibling maps can be computed */
  59. static cpumask_t cpu_sibling_setup_map;
  60. static inline void set_cpu_sibling_map(int cpu)
  61. {
  62. int i;
  63. cpu_set(cpu, cpu_sibling_setup_map);
  64. if (smp_num_siblings > 1) {
  65. for_each_cpu_mask(i, cpu_sibling_setup_map) {
  66. if (cpu_data[cpu].core == cpu_data[i].core) {
  67. cpu_set(i, cpu_sibling_map[cpu]);
  68. cpu_set(cpu, cpu_sibling_map[i]);
  69. }
  70. }
  71. } else
  72. cpu_set(cpu, cpu_sibling_map[cpu]);
  73. }
  74. struct plat_smp_ops *mp_ops;
  75. EXPORT_SYMBOL(mp_ops);
  76. void register_smp_ops(struct plat_smp_ops *ops)
  77. {
  78. if (mp_ops)
  79. printk(KERN_WARNING "Overriding previously set SMP ops\n");
  80. mp_ops = ops;
  81. }
  82. /*
  83. * First C code run on the secondary CPUs after being started up by
  84. * the master.
  85. */
  86. asmlinkage void start_secondary(void)
  87. {
  88. unsigned int cpu;
  89. #ifdef CONFIG_MIPS_MT_SMTC
  90. /* Only do cpu_probe for first TC of CPU */
  91. if ((read_c0_tcbind() & TCBIND_CURTC) != 0)
  92. __cpu_name[smp_processor_id()] = __cpu_name[0];
  93. else
  94. #endif /* CONFIG_MIPS_MT_SMTC */
  95. cpu_probe();
  96. cpu_report();
  97. per_cpu_trap_init(false);
  98. mips_clockevent_init();
  99. mp_ops->init_secondary();
  100. /*
  101. * XXX parity protection should be folded in here when it's converted
  102. * to an option instead of something based on .cputype
  103. */
  104. calibrate_delay();
  105. preempt_disable();
  106. cpu = smp_processor_id();
  107. cpu_data[cpu].udelay_val = loops_per_jiffy;
  108. notify_cpu_starting(cpu);
  109. set_cpu_online(cpu, true);
  110. set_cpu_sibling_map(cpu);
  111. cpu_set(cpu, cpu_callin_map);
  112. synchronise_count_slave(cpu);
  113. /*
  114. * irq will be enabled in ->smp_finish(), enabling it too early
  115. * is dangerous.
  116. */
  117. WARN_ON_ONCE(!irqs_disabled());
  118. mp_ops->smp_finish();
  119. cpu_startup_entry(CPUHP_ONLINE);
  120. }
  121. /*
  122. * Call into both interrupt handlers, as we share the IPI for them
  123. */
  124. void __irq_entry smp_call_function_interrupt(void)
  125. {
  126. irq_enter();
  127. generic_smp_call_function_single_interrupt();
  128. generic_smp_call_function_interrupt();
  129. irq_exit();
  130. }
  131. static void stop_this_cpu(void *dummy)
  132. {
  133. /*
  134. * Remove this CPU:
  135. */
  136. set_cpu_online(smp_processor_id(), false);
  137. for (;;) {
  138. if (cpu_wait)
  139. (*cpu_wait)(); /* Wait if available. */
  140. }
  141. }
  142. void smp_send_stop(void)
  143. {
  144. smp_call_function(stop_this_cpu, NULL, 0);
  145. }
  146. void __init smp_cpus_done(unsigned int max_cpus)
  147. {
  148. mp_ops->cpus_done();
  149. }
  150. /* called from main before smp_init() */
  151. void __init smp_prepare_cpus(unsigned int max_cpus)
  152. {
  153. init_new_context(current, &init_mm);
  154. current_thread_info()->cpu = 0;
  155. mp_ops->prepare_cpus(max_cpus);
  156. set_cpu_sibling_map(0);
  157. #ifndef CONFIG_HOTPLUG_CPU
  158. init_cpu_present(cpu_possible_mask);
  159. #endif
  160. }
  161. /* preload SMP state for boot cpu */
  162. void smp_prepare_boot_cpu(void)
  163. {
  164. set_cpu_possible(0, true);
  165. set_cpu_online(0, true);
  166. cpu_set(0, cpu_callin_map);
  167. }
  168. int __cpu_up(unsigned int cpu, struct task_struct *tidle)
  169. {
  170. mp_ops->boot_secondary(cpu, tidle);
  171. /*
  172. * Trust is futile. We should really have timeouts ...
  173. */
  174. while (!cpu_isset(cpu, cpu_callin_map))
  175. udelay(100);
  176. synchronise_count_master(cpu);
  177. return 0;
  178. }
  179. /* Not really SMP stuff ... */
  180. int setup_profiling_timer(unsigned int multiplier)
  181. {
  182. return 0;
  183. }
  184. static void flush_tlb_all_ipi(void *info)
  185. {
  186. local_flush_tlb_all();
  187. }
  188. void flush_tlb_all(void)
  189. {
  190. on_each_cpu(flush_tlb_all_ipi, NULL, 1);
  191. }
  192. static void flush_tlb_mm_ipi(void *mm)
  193. {
  194. local_flush_tlb_mm((struct mm_struct *)mm);
  195. }
  196. /*
  197. * Special Variant of smp_call_function for use by TLB functions:
  198. *
  199. * o No return value
  200. * o collapses to normal function call on UP kernels
  201. * o collapses to normal function call on systems with a single shared
  202. * primary cache.
  203. * o CONFIG_MIPS_MT_SMTC currently implies there is only one physical core.
  204. */
  205. static inline void smp_on_other_tlbs(void (*func) (void *info), void *info)
  206. {
  207. #ifndef CONFIG_MIPS_MT_SMTC
  208. smp_call_function(func, info, 1);
  209. #endif
  210. }
  211. static inline void smp_on_each_tlb(void (*func) (void *info), void *info)
  212. {
  213. preempt_disable();
  214. smp_on_other_tlbs(func, info);
  215. func(info);
  216. preempt_enable();
  217. }
  218. /*
  219. * The following tlb flush calls are invoked when old translations are
  220. * being torn down, or pte attributes are changing. For single threaded
  221. * address spaces, a new context is obtained on the current cpu, and tlb
  222. * context on other cpus are invalidated to force a new context allocation
  223. * at switch_mm time, should the mm ever be used on other cpus. For
  224. * multithreaded address spaces, intercpu interrupts have to be sent.
  225. * Another case where intercpu interrupts are required is when the target
  226. * mm might be active on another cpu (eg debuggers doing the flushes on
  227. * behalf of debugees, kswapd stealing pages from another process etc).
  228. * Kanoj 07/00.
  229. */
  230. void flush_tlb_mm(struct mm_struct *mm)
  231. {
  232. preempt_disable();
  233. if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) {
  234. smp_on_other_tlbs(flush_tlb_mm_ipi, mm);
  235. } else {
  236. unsigned int cpu;
  237. for_each_online_cpu(cpu) {
  238. if (cpu != smp_processor_id() && cpu_context(cpu, mm))
  239. cpu_context(cpu, mm) = 0;
  240. }
  241. }
  242. local_flush_tlb_mm(mm);
  243. preempt_enable();
  244. }
  245. struct flush_tlb_data {
  246. struct vm_area_struct *vma;
  247. unsigned long addr1;
  248. unsigned long addr2;
  249. };
  250. static void flush_tlb_range_ipi(void *info)
  251. {
  252. struct flush_tlb_data *fd = info;
  253. local_flush_tlb_range(fd->vma, fd->addr1, fd->addr2);
  254. }
  255. void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, unsigned long end)
  256. {
  257. struct mm_struct *mm = vma->vm_mm;
  258. preempt_disable();
  259. if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) {
  260. struct flush_tlb_data fd = {
  261. .vma = vma,
  262. .addr1 = start,
  263. .addr2 = end,
  264. };
  265. smp_on_other_tlbs(flush_tlb_range_ipi, &fd);
  266. } else {
  267. unsigned int cpu;
  268. for_each_online_cpu(cpu) {
  269. if (cpu != smp_processor_id() && cpu_context(cpu, mm))
  270. cpu_context(cpu, mm) = 0;
  271. }
  272. }
  273. local_flush_tlb_range(vma, start, end);
  274. preempt_enable();
  275. }
  276. static void flush_tlb_kernel_range_ipi(void *info)
  277. {
  278. struct flush_tlb_data *fd = info;
  279. local_flush_tlb_kernel_range(fd->addr1, fd->addr2);
  280. }
  281. void flush_tlb_kernel_range(unsigned long start, unsigned long end)
  282. {
  283. struct flush_tlb_data fd = {
  284. .addr1 = start,
  285. .addr2 = end,
  286. };
  287. on_each_cpu(flush_tlb_kernel_range_ipi, &fd, 1);
  288. }
  289. static void flush_tlb_page_ipi(void *info)
  290. {
  291. struct flush_tlb_data *fd = info;
  292. local_flush_tlb_page(fd->vma, fd->addr1);
  293. }
  294. void flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
  295. {
  296. preempt_disable();
  297. if ((atomic_read(&vma->vm_mm->mm_users) != 1) || (current->mm != vma->vm_mm)) {
  298. struct flush_tlb_data fd = {
  299. .vma = vma,
  300. .addr1 = page,
  301. };
  302. smp_on_other_tlbs(flush_tlb_page_ipi, &fd);
  303. } else {
  304. unsigned int cpu;
  305. for_each_online_cpu(cpu) {
  306. if (cpu != smp_processor_id() && cpu_context(cpu, vma->vm_mm))
  307. cpu_context(cpu, vma->vm_mm) = 0;
  308. }
  309. }
  310. local_flush_tlb_page(vma, page);
  311. preempt_enable();
  312. }
  313. static void flush_tlb_one_ipi(void *info)
  314. {
  315. unsigned long vaddr = (unsigned long) info;
  316. local_flush_tlb_one(vaddr);
  317. }
  318. void flush_tlb_one(unsigned long vaddr)
  319. {
  320. smp_on_each_tlb(flush_tlb_one_ipi, (void *) vaddr);
  321. }
  322. EXPORT_SYMBOL(flush_tlb_page);
  323. EXPORT_SYMBOL(flush_tlb_one);
  324. #if defined(CONFIG_KEXEC)
  325. void (*dump_ipi_function_ptr)(void *) = NULL;
  326. void dump_send_ipi(void (*dump_ipi_callback)(void *))
  327. {
  328. int i;
  329. int cpu = smp_processor_id();
  330. dump_ipi_function_ptr = dump_ipi_callback;
  331. smp_mb();
  332. for_each_online_cpu(i)
  333. if (i != cpu)
  334. mp_ops->send_ipi_single(i, SMP_DUMP);
  335. }
  336. EXPORT_SYMBOL(dump_send_ipi);
  337. #endif