flush.c 9.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379
  1. /*
  2. * linux/arch/arm/mm/flush.c
  3. *
  4. * Copyright (C) 1995-2002 Russell King
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/module.h>
  11. #include <linux/mm.h>
  12. #include <linux/pagemap.h>
  13. #include <linux/highmem.h>
  14. #include <asm/cacheflush.h>
  15. #include <asm/cachetype.h>
  16. #include <asm/highmem.h>
  17. #include <asm/smp_plat.h>
  18. #include <asm/tlbflush.h>
  19. #include <linux/hugetlb.h>
  20. #include "mm.h"
  21. #ifdef CONFIG_CPU_CACHE_VIPT
  22. static void flush_pfn_alias(unsigned long pfn, unsigned long vaddr)
  23. {
  24. unsigned long to = FLUSH_ALIAS_START + (CACHE_COLOUR(vaddr) << PAGE_SHIFT);
  25. const int zero = 0;
  26. set_top_pte(to, pfn_pte(pfn, PAGE_KERNEL));
  27. asm( "mcrr p15, 0, %1, %0, c14\n"
  28. " mcr p15, 0, %2, c7, c10, 4"
  29. :
  30. : "r" (to), "r" (to + PAGE_SIZE - L1_CACHE_BYTES), "r" (zero)
  31. : "cc");
  32. }
  33. static void flush_icache_alias(unsigned long pfn, unsigned long vaddr, unsigned long len)
  34. {
  35. unsigned long va = FLUSH_ALIAS_START + (CACHE_COLOUR(vaddr) << PAGE_SHIFT);
  36. unsigned long offset = vaddr & (PAGE_SIZE - 1);
  37. unsigned long to;
  38. set_top_pte(va, pfn_pte(pfn, PAGE_KERNEL));
  39. to = va + offset;
  40. flush_icache_range(to, to + len);
  41. }
  42. void flush_cache_mm(struct mm_struct *mm)
  43. {
  44. if (cache_is_vivt()) {
  45. vivt_flush_cache_mm(mm);
  46. return;
  47. }
  48. if (cache_is_vipt_aliasing()) {
  49. asm( "mcr p15, 0, %0, c7, c14, 0\n"
  50. " mcr p15, 0, %0, c7, c10, 4"
  51. :
  52. : "r" (0)
  53. : "cc");
  54. }
  55. }
  56. void flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long end)
  57. {
  58. if (cache_is_vivt()) {
  59. vivt_flush_cache_range(vma, start, end);
  60. return;
  61. }
  62. if (cache_is_vipt_aliasing()) {
  63. asm( "mcr p15, 0, %0, c7, c14, 0\n"
  64. " mcr p15, 0, %0, c7, c10, 4"
  65. :
  66. : "r" (0)
  67. : "cc");
  68. }
  69. if (vma->vm_flags & VM_EXEC)
  70. __flush_icache_all();
  71. }
  72. void flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr, unsigned long pfn)
  73. {
  74. if (cache_is_vivt()) {
  75. vivt_flush_cache_page(vma, user_addr, pfn);
  76. return;
  77. }
  78. if (cache_is_vipt_aliasing()) {
  79. flush_pfn_alias(pfn, user_addr);
  80. __flush_icache_all();
  81. }
  82. if (vma->vm_flags & VM_EXEC && icache_is_vivt_asid_tagged())
  83. __flush_icache_all();
  84. }
  85. #else
  86. #define flush_pfn_alias(pfn,vaddr) do { } while (0)
  87. #define flush_icache_alias(pfn,vaddr,len) do { } while (0)
  88. #endif
  89. static void flush_ptrace_access_other(void *args)
  90. {
  91. __flush_icache_all();
  92. }
  93. static
  94. void flush_ptrace_access(struct vm_area_struct *vma, struct page *page,
  95. unsigned long uaddr, void *kaddr, unsigned long len)
  96. {
  97. if (cache_is_vivt()) {
  98. if (cpumask_test_cpu(smp_processor_id(), mm_cpumask(vma->vm_mm))) {
  99. unsigned long addr = (unsigned long)kaddr;
  100. __cpuc_coherent_kern_range(addr, addr + len);
  101. }
  102. return;
  103. }
  104. if (cache_is_vipt_aliasing()) {
  105. flush_pfn_alias(page_to_pfn(page), uaddr);
  106. __flush_icache_all();
  107. return;
  108. }
  109. /* VIPT non-aliasing D-cache */
  110. if (vma->vm_flags & VM_EXEC) {
  111. unsigned long addr = (unsigned long)kaddr;
  112. if (icache_is_vipt_aliasing())
  113. flush_icache_alias(page_to_pfn(page), uaddr, len);
  114. else
  115. __cpuc_coherent_kern_range(addr, addr + len);
  116. if (cache_ops_need_broadcast())
  117. smp_call_function(flush_ptrace_access_other,
  118. NULL, 1);
  119. }
  120. }
  121. /*
  122. * Copy user data from/to a page which is mapped into a different
  123. * processes address space. Really, we want to allow our "user
  124. * space" model to handle this.
  125. *
  126. * Note that this code needs to run on the current CPU.
  127. */
  128. void copy_to_user_page(struct vm_area_struct *vma, struct page *page,
  129. unsigned long uaddr, void *dst, const void *src,
  130. unsigned long len)
  131. {
  132. #ifdef CONFIG_SMP
  133. preempt_disable();
  134. #endif
  135. memcpy(dst, src, len);
  136. flush_ptrace_access(vma, page, uaddr, dst, len);
  137. #ifdef CONFIG_SMP
  138. preempt_enable();
  139. #endif
  140. }
  141. void __flush_dcache_page(struct address_space *mapping, struct page *page)
  142. {
  143. /*
  144. * Writeback any data associated with the kernel mapping of this
  145. * page. This ensures that data in the physical page is mutually
  146. * coherent with the kernels mapping.
  147. */
  148. if (!PageHighMem(page)) {
  149. size_t page_size = PAGE_SIZE << compound_order(page);
  150. __cpuc_flush_dcache_area(page_address(page), page_size);
  151. } else {
  152. unsigned long i;
  153. if (cache_is_vipt_nonaliasing()) {
  154. for (i = 0; i < (1 << compound_order(page)); i++) {
  155. void *addr = kmap_atomic(page);
  156. __cpuc_flush_dcache_area(addr, PAGE_SIZE);
  157. kunmap_atomic(addr);
  158. }
  159. } else {
  160. for (i = 0; i < (1 << compound_order(page)); i++) {
  161. void *addr = kmap_high_get(page);
  162. if (addr) {
  163. __cpuc_flush_dcache_area(addr, PAGE_SIZE);
  164. kunmap_high(page);
  165. }
  166. }
  167. }
  168. }
  169. /*
  170. * If this is a page cache page, and we have an aliasing VIPT cache,
  171. * we only need to do one flush - which would be at the relevant
  172. * userspace colour, which is congruent with page->index.
  173. */
  174. if (mapping && cache_is_vipt_aliasing())
  175. flush_pfn_alias(page_to_pfn(page),
  176. page->index << PAGE_CACHE_SHIFT);
  177. }
  178. static void __flush_dcache_aliases(struct address_space *mapping, struct page *page)
  179. {
  180. struct mm_struct *mm = current->active_mm;
  181. struct vm_area_struct *mpnt;
  182. pgoff_t pgoff;
  183. /*
  184. * There are possible user space mappings of this page:
  185. * - VIVT cache: we need to also write back and invalidate all user
  186. * data in the current VM view associated with this page.
  187. * - aliasing VIPT: we only need to find one mapping of this page.
  188. */
  189. pgoff = page->index << (PAGE_CACHE_SHIFT - PAGE_SHIFT);
  190. flush_dcache_mmap_lock(mapping);
  191. vma_interval_tree_foreach(mpnt, &mapping->i_mmap, pgoff, pgoff) {
  192. unsigned long offset;
  193. /*
  194. * If this VMA is not in our MM, we can ignore it.
  195. */
  196. if (mpnt->vm_mm != mm)
  197. continue;
  198. if (!(mpnt->vm_flags & VM_MAYSHARE))
  199. continue;
  200. offset = (pgoff - mpnt->vm_pgoff) << PAGE_SHIFT;
  201. flush_cache_page(mpnt, mpnt->vm_start + offset, page_to_pfn(page));
  202. }
  203. flush_dcache_mmap_unlock(mapping);
  204. }
  205. #if __LINUX_ARM_ARCH__ >= 6
  206. void __sync_icache_dcache(pte_t pteval)
  207. {
  208. unsigned long pfn;
  209. struct page *page;
  210. struct address_space *mapping;
  211. if (cache_is_vipt_nonaliasing() && !pte_exec(pteval))
  212. /* only flush non-aliasing VIPT caches for exec mappings */
  213. return;
  214. pfn = pte_pfn(pteval);
  215. if (!pfn_valid(pfn))
  216. return;
  217. page = pfn_to_page(pfn);
  218. if (cache_is_vipt_aliasing())
  219. mapping = page_mapping(page);
  220. else
  221. mapping = NULL;
  222. if (!test_and_set_bit(PG_dcache_clean, &page->flags))
  223. __flush_dcache_page(mapping, page);
  224. if (pte_exec(pteval))
  225. __flush_icache_all();
  226. }
  227. #endif
  228. /*
  229. * Ensure cache coherency between kernel mapping and userspace mapping
  230. * of this page.
  231. *
  232. * We have three cases to consider:
  233. * - VIPT non-aliasing cache: fully coherent so nothing required.
  234. * - VIVT: fully aliasing, so we need to handle every alias in our
  235. * current VM view.
  236. * - VIPT aliasing: need to handle one alias in our current VM view.
  237. *
  238. * If we need to handle aliasing:
  239. * If the page only exists in the page cache and there are no user
  240. * space mappings, we can be lazy and remember that we may have dirty
  241. * kernel cache lines for later. Otherwise, we assume we have
  242. * aliasing mappings.
  243. *
  244. * Note that we disable the lazy flush for SMP configurations where
  245. * the cache maintenance operations are not automatically broadcasted.
  246. */
  247. void flush_dcache_page(struct page *page)
  248. {
  249. struct address_space *mapping;
  250. /*
  251. * The zero page is never written to, so never has any dirty
  252. * cache lines, and therefore never needs to be flushed.
  253. */
  254. if (page == ZERO_PAGE(0))
  255. return;
  256. mapping = page_mapping(page);
  257. if (!cache_ops_need_broadcast() &&
  258. mapping && !page_mapped(page))
  259. clear_bit(PG_dcache_clean, &page->flags);
  260. else {
  261. __flush_dcache_page(mapping, page);
  262. if (mapping && cache_is_vivt())
  263. __flush_dcache_aliases(mapping, page);
  264. else if (mapping)
  265. __flush_icache_all();
  266. set_bit(PG_dcache_clean, &page->flags);
  267. }
  268. }
  269. EXPORT_SYMBOL(flush_dcache_page);
  270. /*
  271. * Ensure cache coherency for the kernel mapping of this page. We can
  272. * assume that the page is pinned via kmap.
  273. *
  274. * If the page only exists in the page cache and there are no user
  275. * space mappings, this is a no-op since the page was already marked
  276. * dirty at creation. Otherwise, we need to flush the dirty kernel
  277. * cache lines directly.
  278. */
  279. void flush_kernel_dcache_page(struct page *page)
  280. {
  281. if (cache_is_vivt() || cache_is_vipt_aliasing()) {
  282. struct address_space *mapping;
  283. mapping = page_mapping(page);
  284. if (!mapping || mapping_mapped(mapping)) {
  285. void *addr;
  286. addr = page_address(page);
  287. /*
  288. * kmap_atomic() doesn't set the page virtual
  289. * address for highmem pages, and
  290. * kunmap_atomic() takes care of cache
  291. * flushing already.
  292. */
  293. if (!IS_ENABLED(CONFIG_HIGHMEM) || addr)
  294. __cpuc_flush_dcache_area(addr, PAGE_SIZE);
  295. }
  296. }
  297. }
  298. EXPORT_SYMBOL(flush_kernel_dcache_page);
  299. /*
  300. * Flush an anonymous page so that users of get_user_pages()
  301. * can safely access the data. The expected sequence is:
  302. *
  303. * get_user_pages()
  304. * -> flush_anon_page
  305. * memcpy() to/from page
  306. * if written to page, flush_dcache_page()
  307. */
  308. void __flush_anon_page(struct vm_area_struct *vma, struct page *page, unsigned long vmaddr)
  309. {
  310. unsigned long pfn;
  311. /* VIPT non-aliasing caches need do nothing */
  312. if (cache_is_vipt_nonaliasing())
  313. return;
  314. /*
  315. * Write back and invalidate userspace mapping.
  316. */
  317. pfn = page_to_pfn(page);
  318. if (cache_is_vivt()) {
  319. flush_cache_page(vma, vmaddr, pfn);
  320. } else {
  321. /*
  322. * For aliasing VIPT, we can flush an alias of the
  323. * userspace address only.
  324. */
  325. flush_pfn_alias(pfn, vmaddr);
  326. __flush_icache_all();
  327. }
  328. /*
  329. * Invalidate kernel mapping. No data should be contained
  330. * in this mapping of the page. FIXME: this is overkill
  331. * since we actually ask for a write-back and invalidate.
  332. */
  333. __cpuc_flush_dcache_area(page_address(page), PAGE_SIZE);
  334. }