common.c 2.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111
  1. /*
  2. * This file contains common code that is intended to be used across
  3. * boards so that it's not replicated.
  4. *
  5. * Copyright (C) 2011 Xilinx
  6. *
  7. * This software is licensed under the terms of the GNU General Public
  8. * License version 2, as published by the Free Software Foundation, and
  9. * may be copied, distributed, and modified under those terms.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. */
  16. #include <linux/init.h>
  17. #include <linux/kernel.h>
  18. #include <linux/cpumask.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/clk.h>
  21. #include <linux/clk/zynq.h>
  22. #include <linux/clocksource.h>
  23. #include <linux/of_address.h>
  24. #include <linux/of_irq.h>
  25. #include <linux/of_platform.h>
  26. #include <linux/of.h>
  27. #include <asm/mach/arch.h>
  28. #include <asm/mach/map.h>
  29. #include <asm/mach/time.h>
  30. #include <asm/mach-types.h>
  31. #include <asm/page.h>
  32. #include <asm/pgtable.h>
  33. #include <asm/smp_scu.h>
  34. #include <asm/hardware/cache-l2x0.h>
  35. #include "common.h"
  36. void __iomem *zynq_scu_base;
  37. static struct of_device_id zynq_of_bus_ids[] __initdata = {
  38. { .compatible = "simple-bus", },
  39. {}
  40. };
  41. /**
  42. * zynq_init_machine - System specific initialization, intended to be
  43. * called from board specific initialization.
  44. */
  45. static void __init zynq_init_machine(void)
  46. {
  47. /*
  48. * 64KB way size, 8-way associativity, parity disabled
  49. */
  50. l2x0_of_init(0x02060000, 0xF0F0FFFF);
  51. of_platform_bus_probe(NULL, zynq_of_bus_ids, NULL);
  52. }
  53. static void __init zynq_timer_init(void)
  54. {
  55. zynq_slcr_init();
  56. clocksource_of_init();
  57. }
  58. static struct map_desc zynq_cortex_a9_scu_map __initdata = {
  59. .length = SZ_256,
  60. .type = MT_DEVICE,
  61. };
  62. static void __init zynq_scu_map_io(void)
  63. {
  64. unsigned long base;
  65. base = scu_a9_get_base();
  66. zynq_cortex_a9_scu_map.pfn = __phys_to_pfn(base);
  67. /* Expected address is in vmalloc area that's why simple assign here */
  68. zynq_cortex_a9_scu_map.virtual = base;
  69. iotable_init(&zynq_cortex_a9_scu_map, 1);
  70. zynq_scu_base = (void __iomem *)base;
  71. BUG_ON(!zynq_scu_base);
  72. }
  73. /**
  74. * zynq_map_io - Create memory mappings needed for early I/O.
  75. */
  76. static void __init zynq_map_io(void)
  77. {
  78. debug_ll_io_init();
  79. zynq_scu_map_io();
  80. }
  81. static void zynq_system_reset(enum reboot_mode mode, const char *cmd)
  82. {
  83. zynq_slcr_system_reset();
  84. }
  85. static const char * const zynq_dt_match[] = {
  86. "xlnx,zynq-7000",
  87. NULL
  88. };
  89. DT_MACHINE_START(XILINX_EP107, "Xilinx Zynq Platform")
  90. .smp = smp_ops(zynq_smp_ops),
  91. .map_io = zynq_map_io,
  92. .init_machine = zynq_init_machine,
  93. .init_time = zynq_timer_init,
  94. .dt_compat = zynq_dt_match,
  95. .restart = zynq_system_reset,
  96. MACHINE_END