cpu.c 4.3 KB

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  1. /*
  2. * Copyright (C) ST-Ericsson SA 2010
  3. *
  4. * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
  5. * Author: Lee Jones <lee.jones@linaro.org> for ST-Ericsson
  6. * License terms: GNU General Public License (GPL) version 2
  7. */
  8. #include <linux/platform_device.h>
  9. #include <linux/io.h>
  10. #include <linux/mfd/dbx500-prcmu.h>
  11. #include <linux/clksrc-dbx500-prcmu.h>
  12. #include <linux/sys_soc.h>
  13. #include <linux/err.h>
  14. #include <linux/slab.h>
  15. #include <linux/stat.h>
  16. #include <linux/of.h>
  17. #include <linux/of_irq.h>
  18. #include <linux/irq.h>
  19. #include <linux/irqchip.h>
  20. #include <linux/irqchip/arm-gic.h>
  21. #include <linux/platform_data/clk-ux500.h>
  22. #include <linux/platform_data/arm-ux500-pm.h>
  23. #include <asm/mach/map.h>
  24. #include "setup.h"
  25. #include "devices.h"
  26. #include "board-mop500.h"
  27. #include "db8500-regs.h"
  28. #include "id.h"
  29. /*
  30. * FIXME: Should we set up the GPIO domain here?
  31. *
  32. * The problem is that we cannot put the interrupt resources into the platform
  33. * device until the irqdomain has been added. Right now, we set the GIC interrupt
  34. * domain from init_irq(), then load the gpio driver from
  35. * core_initcall(nmk_gpio_init) and add the platform devices from
  36. * arch_initcall(customize_machine).
  37. *
  38. * This feels fragile because it depends on the gpio device getting probed
  39. * _before_ any device uses the gpio interrupts.
  40. */
  41. void __init ux500_init_irq(void)
  42. {
  43. void __iomem *dist_base;
  44. void __iomem *cpu_base;
  45. gic_arch_extn.flags = IRQCHIP_SKIP_SET_WAKE | IRQCHIP_MASK_ON_SUSPEND;
  46. if (cpu_is_u8500_family() || cpu_is_ux540_family()) {
  47. dist_base = __io_address(U8500_GIC_DIST_BASE);
  48. cpu_base = __io_address(U8500_GIC_CPU_BASE);
  49. } else
  50. ux500_unknown_soc();
  51. #ifdef CONFIG_OF
  52. if (of_have_populated_dt())
  53. irqchip_init();
  54. else
  55. #endif
  56. gic_init(0, 29, dist_base, cpu_base);
  57. /*
  58. * Init clocks here so that they are available for system timer
  59. * initialization.
  60. */
  61. if (cpu_is_u8500_family()) {
  62. prcmu_early_init(U8500_PRCMU_BASE, SZ_8K - 1);
  63. ux500_pm_init(U8500_PRCMU_BASE, SZ_8K - 1);
  64. u8500_clk_init(U8500_CLKRST1_BASE, U8500_CLKRST2_BASE,
  65. U8500_CLKRST3_BASE, U8500_CLKRST5_BASE,
  66. U8500_CLKRST6_BASE);
  67. } else if (cpu_is_u9540()) {
  68. prcmu_early_init(U8500_PRCMU_BASE, SZ_8K - 1);
  69. ux500_pm_init(U8500_PRCMU_BASE, SZ_8K - 1);
  70. u9540_clk_init(U8500_CLKRST1_BASE, U8500_CLKRST2_BASE,
  71. U8500_CLKRST3_BASE, U8500_CLKRST5_BASE,
  72. U8500_CLKRST6_BASE);
  73. } else if (cpu_is_u8540()) {
  74. prcmu_early_init(U8500_PRCMU_BASE, SZ_8K + SZ_4K - 1);
  75. ux500_pm_init(U8500_PRCMU_BASE, SZ_8K + SZ_4K - 1);
  76. u8540_clk_init(U8500_CLKRST1_BASE, U8500_CLKRST2_BASE,
  77. U8500_CLKRST3_BASE, U8500_CLKRST5_BASE,
  78. U8500_CLKRST6_BASE);
  79. }
  80. }
  81. void __init ux500_init_late(void)
  82. {
  83. mop500_uib_init();
  84. }
  85. static const char * __init ux500_get_machine(void)
  86. {
  87. return kasprintf(GFP_KERNEL, "DB%4x", dbx500_partnumber());
  88. }
  89. static const char * __init ux500_get_family(void)
  90. {
  91. return kasprintf(GFP_KERNEL, "ux500");
  92. }
  93. static const char * __init ux500_get_revision(void)
  94. {
  95. unsigned int rev = dbx500_revision();
  96. if (rev == 0x01)
  97. return kasprintf(GFP_KERNEL, "%s", "ED");
  98. else if (rev >= 0xA0)
  99. return kasprintf(GFP_KERNEL, "%d.%d",
  100. (rev >> 4) - 0xA + 1, rev & 0xf);
  101. return kasprintf(GFP_KERNEL, "%s", "Unknown");
  102. }
  103. static ssize_t ux500_get_process(struct device *dev,
  104. struct device_attribute *attr,
  105. char *buf)
  106. {
  107. if (dbx500_id.process == 0x00)
  108. return sprintf(buf, "Standard\n");
  109. return sprintf(buf, "%02xnm\n", dbx500_id.process);
  110. }
  111. static void __init soc_info_populate(struct soc_device_attribute *soc_dev_attr,
  112. const char *soc_id)
  113. {
  114. soc_dev_attr->soc_id = soc_id;
  115. soc_dev_attr->machine = ux500_get_machine();
  116. soc_dev_attr->family = ux500_get_family();
  117. soc_dev_attr->revision = ux500_get_revision();
  118. }
  119. struct device_attribute ux500_soc_attr =
  120. __ATTR(process, S_IRUGO, ux500_get_process, NULL);
  121. struct device * __init ux500_soc_device_init(const char *soc_id)
  122. {
  123. struct device *parent;
  124. struct soc_device *soc_dev;
  125. struct soc_device_attribute *soc_dev_attr;
  126. soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
  127. if (!soc_dev_attr)
  128. return ERR_PTR(-ENOMEM);
  129. soc_info_populate(soc_dev_attr, soc_id);
  130. soc_dev = soc_device_register(soc_dev_attr);
  131. if (IS_ERR(soc_dev)) {
  132. kfree(soc_dev_attr);
  133. return NULL;
  134. }
  135. parent = soc_device_to_device(soc_dev);
  136. device_create_file(parent, &ux500_soc_attr);
  137. return parent;
  138. }