cpu-db8500.c 10 KB

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  1. /*
  2. * Copyright (C) 2008-2009 ST-Ericsson SA
  3. *
  4. * Author: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2, as
  8. * published by the Free Software Foundation.
  9. *
  10. */
  11. #include <linux/types.h>
  12. #include <linux/init.h>
  13. #include <linux/device.h>
  14. #include <linux/amba/bus.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/irq.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/io.h>
  19. #include <linux/mfd/abx500/ab8500.h>
  20. #include <linux/mfd/dbx500-prcmu.h>
  21. #include <linux/of.h>
  22. #include <linux/of_platform.h>
  23. #include <linux/regulator/machine.h>
  24. #include <linux/platform_data/pinctrl-nomadik.h>
  25. #include <linux/random.h>
  26. #include <asm/pmu.h>
  27. #include <asm/mach/map.h>
  28. #include <asm/mach/arch.h>
  29. #include "setup.h"
  30. #include "devices.h"
  31. #include "irqs.h"
  32. #include "devices-db8500.h"
  33. #include "ste-dma40-db8500.h"
  34. #include "db8500-regs.h"
  35. #include "board-mop500.h"
  36. #include "id.h"
  37. /* minimum static i/o mapping required to boot U8500 platforms */
  38. static struct map_desc u8500_uart_io_desc[] __initdata = {
  39. __IO_DEV_DESC(U8500_UART0_BASE, SZ_4K),
  40. __IO_DEV_DESC(U8500_UART2_BASE, SZ_4K),
  41. };
  42. /* U8500 and U9540 common io_desc */
  43. static struct map_desc u8500_common_io_desc[] __initdata = {
  44. /* SCU base also covers GIC CPU BASE and TWD with its 4K page */
  45. __IO_DEV_DESC(U8500_SCU_BASE, SZ_4K),
  46. __IO_DEV_DESC(U8500_GIC_DIST_BASE, SZ_4K),
  47. __IO_DEV_DESC(U8500_L2CC_BASE, SZ_4K),
  48. __IO_DEV_DESC(U8500_MTU0_BASE, SZ_4K),
  49. __IO_DEV_DESC(U8500_BACKUPRAM0_BASE, SZ_8K),
  50. __IO_DEV_DESC(U8500_CLKRST1_BASE, SZ_4K),
  51. __IO_DEV_DESC(U8500_CLKRST2_BASE, SZ_4K),
  52. __IO_DEV_DESC(U8500_CLKRST3_BASE, SZ_4K),
  53. __IO_DEV_DESC(U8500_CLKRST5_BASE, SZ_4K),
  54. __IO_DEV_DESC(U8500_CLKRST6_BASE, SZ_4K),
  55. __IO_DEV_DESC(U8500_GPIO0_BASE, SZ_4K),
  56. __IO_DEV_DESC(U8500_GPIO1_BASE, SZ_4K),
  57. __IO_DEV_DESC(U8500_GPIO2_BASE, SZ_4K),
  58. __IO_DEV_DESC(U8500_GPIO3_BASE, SZ_4K),
  59. };
  60. /* U8500 IO map specific description */
  61. static struct map_desc u8500_io_desc[] __initdata = {
  62. __IO_DEV_DESC(U8500_PRCMU_BASE, SZ_4K),
  63. __IO_DEV_DESC(U8500_PRCMU_TCDM_BASE, SZ_4K),
  64. };
  65. /* U9540 IO map specific description */
  66. static struct map_desc u9540_io_desc[] __initdata = {
  67. __IO_DEV_DESC(U8500_PRCMU_BASE, SZ_4K + SZ_8K),
  68. __IO_DEV_DESC(U8500_PRCMU_TCDM_BASE, SZ_4K + SZ_8K),
  69. };
  70. void __init u8500_map_io(void)
  71. {
  72. /*
  73. * Map the UARTs early so that the DEBUG_LL stuff continues to work.
  74. */
  75. iotable_init(u8500_uart_io_desc, ARRAY_SIZE(u8500_uart_io_desc));
  76. ux500_map_io();
  77. iotable_init(u8500_common_io_desc, ARRAY_SIZE(u8500_common_io_desc));
  78. if (cpu_is_ux540_family())
  79. iotable_init(u9540_io_desc, ARRAY_SIZE(u9540_io_desc));
  80. else
  81. iotable_init(u8500_io_desc, ARRAY_SIZE(u8500_io_desc));
  82. }
  83. static struct resource db8500_pmu_resources[] = {
  84. [0] = {
  85. .start = IRQ_DB8500_PMU,
  86. .end = IRQ_DB8500_PMU,
  87. .flags = IORESOURCE_IRQ,
  88. },
  89. };
  90. /*
  91. * The PMU IRQ lines of two cores are wired together into a single interrupt.
  92. * Bounce the interrupt to the other core if it's not ours.
  93. */
  94. static irqreturn_t db8500_pmu_handler(int irq, void *dev, irq_handler_t handler)
  95. {
  96. irqreturn_t ret = handler(irq, dev);
  97. int other = !smp_processor_id();
  98. if (ret == IRQ_NONE && cpu_online(other))
  99. irq_set_affinity(irq, cpumask_of(other));
  100. /*
  101. * We should be able to get away with the amount of IRQ_NONEs we give,
  102. * while still having the spurious IRQ detection code kick in if the
  103. * interrupt really starts hitting spuriously.
  104. */
  105. return ret;
  106. }
  107. struct arm_pmu_platdata db8500_pmu_platdata = {
  108. .handle_irq = db8500_pmu_handler,
  109. };
  110. static struct platform_device db8500_pmu_device = {
  111. .name = "arm-pmu",
  112. .id = -1,
  113. .num_resources = ARRAY_SIZE(db8500_pmu_resources),
  114. .resource = db8500_pmu_resources,
  115. .dev.platform_data = &db8500_pmu_platdata,
  116. };
  117. static struct platform_device *platform_devs[] __initdata = {
  118. &u8500_dma40_device,
  119. &db8500_pmu_device,
  120. };
  121. static resource_size_t __initdata db8500_gpio_base[] = {
  122. U8500_GPIOBANK0_BASE,
  123. U8500_GPIOBANK1_BASE,
  124. U8500_GPIOBANK2_BASE,
  125. U8500_GPIOBANK3_BASE,
  126. U8500_GPIOBANK4_BASE,
  127. U8500_GPIOBANK5_BASE,
  128. U8500_GPIOBANK6_BASE,
  129. U8500_GPIOBANK7_BASE,
  130. U8500_GPIOBANK8_BASE,
  131. };
  132. static void __init db8500_add_gpios(struct device *parent)
  133. {
  134. struct nmk_gpio_platform_data pdata = {
  135. .supports_sleepmode = true,
  136. };
  137. dbx500_add_gpios(parent, ARRAY_AND_SIZE(db8500_gpio_base),
  138. IRQ_DB8500_GPIO0, &pdata);
  139. dbx500_add_pinctrl(parent, "pinctrl-db8500", U8500_PRCMU_BASE);
  140. }
  141. static int usb_db8500_dma_cfg[] = {
  142. DB8500_DMA_DEV38_USB_OTG_IEP_AND_OEP_1_9,
  143. DB8500_DMA_DEV37_USB_OTG_IEP_AND_OEP_2_10,
  144. DB8500_DMA_DEV36_USB_OTG_IEP_AND_OEP_3_11,
  145. DB8500_DMA_DEV19_USB_OTG_IEP_AND_OEP_4_12,
  146. DB8500_DMA_DEV18_USB_OTG_IEP_AND_OEP_5_13,
  147. DB8500_DMA_DEV17_USB_OTG_IEP_AND_OEP_6_14,
  148. DB8500_DMA_DEV16_USB_OTG_IEP_AND_OEP_7_15,
  149. DB8500_DMA_DEV39_USB_OTG_IEP_AND_OEP_8
  150. };
  151. static const char *db8500_read_soc_id(void)
  152. {
  153. void __iomem *uid = __io_address(U8500_BB_UID_BASE);
  154. /* Throw these device-specific numbers into the entropy pool */
  155. add_device_randomness(uid, 0x14);
  156. return kasprintf(GFP_KERNEL, "%08x%08x%08x%08x%08x",
  157. readl((u32 *)uid+0),
  158. readl((u32 *)uid+1), readl((u32 *)uid+2),
  159. readl((u32 *)uid+3), readl((u32 *)uid+4));
  160. }
  161. static struct device * __init db8500_soc_device_init(void)
  162. {
  163. const char *soc_id = db8500_read_soc_id();
  164. return ux500_soc_device_init(soc_id);
  165. }
  166. /*
  167. * This function is called from the board init
  168. */
  169. struct device * __init u8500_init_devices(void)
  170. {
  171. struct device *parent;
  172. int i;
  173. parent = db8500_soc_device_init();
  174. db8500_add_rtc(parent);
  175. db8500_add_gpios(parent);
  176. db8500_add_usb(parent, usb_db8500_dma_cfg, usb_db8500_dma_cfg);
  177. for (i = 0; i < ARRAY_SIZE(platform_devs); i++)
  178. platform_devs[i]->dev.parent = parent;
  179. platform_add_devices(platform_devs, ARRAY_SIZE(platform_devs));
  180. return parent;
  181. }
  182. #ifdef CONFIG_MACH_UX500_DT
  183. static struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
  184. /* Requires call-back bindings. */
  185. OF_DEV_AUXDATA("arm,cortex-a9-pmu", 0, "arm-pmu", &db8500_pmu_platdata),
  186. /* Requires DMA bindings. */
  187. OF_DEV_AUXDATA("arm,pl011", 0x80120000, "uart0", NULL),
  188. OF_DEV_AUXDATA("arm,pl011", 0x80121000, "uart1", NULL),
  189. OF_DEV_AUXDATA("arm,pl011", 0x80007000, "uart2", NULL),
  190. OF_DEV_AUXDATA("arm,pl022", 0x80002000, "ssp0", &ssp0_plat),
  191. OF_DEV_AUXDATA("arm,pl18x", 0x80126000, "sdi0", &mop500_sdi0_data),
  192. OF_DEV_AUXDATA("arm,pl18x", 0x80118000, "sdi1", &mop500_sdi1_data),
  193. OF_DEV_AUXDATA("arm,pl18x", 0x80005000, "sdi2", &mop500_sdi2_data),
  194. OF_DEV_AUXDATA("arm,pl18x", 0x80114000, "sdi4", &mop500_sdi4_data),
  195. /* Requires clock name bindings. */
  196. OF_DEV_AUXDATA("st,nomadik-gpio", 0x8012e000, "gpio.0", NULL),
  197. OF_DEV_AUXDATA("st,nomadik-gpio", 0x8012e080, "gpio.1", NULL),
  198. OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e000, "gpio.2", NULL),
  199. OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e080, "gpio.3", NULL),
  200. OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e100, "gpio.4", NULL),
  201. OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e180, "gpio.5", NULL),
  202. OF_DEV_AUXDATA("st,nomadik-gpio", 0x8011e000, "gpio.6", NULL),
  203. OF_DEV_AUXDATA("st,nomadik-gpio", 0x8011e080, "gpio.7", NULL),
  204. OF_DEV_AUXDATA("st,nomadik-gpio", 0xa03fe000, "gpio.8", NULL),
  205. OF_DEV_AUXDATA("st,nomadik-i2c", 0x80004000, "nmk-i2c.0", NULL),
  206. OF_DEV_AUXDATA("st,nomadik-i2c", 0x80122000, "nmk-i2c.1", NULL),
  207. OF_DEV_AUXDATA("st,nomadik-i2c", 0x80128000, "nmk-i2c.2", NULL),
  208. OF_DEV_AUXDATA("st,nomadik-i2c", 0x80110000, "nmk-i2c.3", NULL),
  209. OF_DEV_AUXDATA("st,nomadik-i2c", 0x8012a000, "nmk-i2c.4", NULL),
  210. OF_DEV_AUXDATA("stericsson,db8500-musb", 0xa03e0000, "musb-ux500.0", NULL),
  211. OF_DEV_AUXDATA("stericsson,db8500-prcmu", 0x80157000, "db8500-prcmu",
  212. &db8500_prcmu_pdata),
  213. OF_DEV_AUXDATA("smsc,lan9115", 0x50000000, "smsc911x.0", NULL),
  214. OF_DEV_AUXDATA("stericsson,ux500-cryp", 0xa03cb000, "cryp1", NULL),
  215. OF_DEV_AUXDATA("stericsson,ux500-hash", 0xa03c2000, "hash1", NULL),
  216. OF_DEV_AUXDATA("stericsson,snd-soc-mop500", 0, "snd-soc-mop500.0",
  217. NULL),
  218. /* Requires device name bindings. */
  219. OF_DEV_AUXDATA("stericsson,db8500-pinctrl", U8500_PRCMU_BASE,
  220. "pinctrl-db8500", NULL),
  221. /* Requires clock name and DMA bindings. */
  222. OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80123000,
  223. "ux500-msp-i2s.0", &msp0_platform_data),
  224. OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80124000,
  225. "ux500-msp-i2s.1", &msp1_platform_data),
  226. OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80117000,
  227. "ux500-msp-i2s.2", &msp2_platform_data),
  228. OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80125000,
  229. "ux500-msp-i2s.3", &msp3_platform_data),
  230. /* Requires clock name bindings and channel address lookup table. */
  231. OF_DEV_AUXDATA("stericsson,db8500-dma40", 0x801C0000, "dma40.0", NULL),
  232. {},
  233. };
  234. static struct of_dev_auxdata u8540_auxdata_lookup[] __initdata = {
  235. /* Requires DMA bindings. */
  236. OF_DEV_AUXDATA("arm,pl011", 0x80120000, "uart0", NULL),
  237. OF_DEV_AUXDATA("arm,pl011", 0x80121000, "uart1", NULL),
  238. OF_DEV_AUXDATA("arm,pl011", 0x80007000, "uart2", NULL),
  239. OF_DEV_AUXDATA("stericsson,db8500-prcmu", 0x80157000, "db8500-prcmu",
  240. &db8500_prcmu_pdata),
  241. {},
  242. };
  243. static const struct of_device_id u8500_local_bus_nodes[] = {
  244. /* only create devices below soc node */
  245. { .compatible = "stericsson,db8500", },
  246. { .compatible = "stericsson,db8500-prcmu", },
  247. { .compatible = "simple-bus"},
  248. { },
  249. };
  250. static void __init u8500_init_machine(void)
  251. {
  252. struct device *parent = db8500_soc_device_init();
  253. /* Pinmaps must be in place before devices register */
  254. if (of_machine_is_compatible("st-ericsson,mop500"))
  255. mop500_pinmaps_init();
  256. else if (of_machine_is_compatible("calaosystems,snowball-a9500")) {
  257. snowball_pinmaps_init();
  258. } else if (of_machine_is_compatible("st-ericsson,hrefv60+"))
  259. hrefv60_pinmaps_init();
  260. else if (of_machine_is_compatible("st-ericsson,ccu9540")) {}
  261. /* TODO: Add pinmaps for ccu9540 board. */
  262. /* automatically probe child nodes of dbx5x0 devices */
  263. if (of_machine_is_compatible("st-ericsson,u8540"))
  264. of_platform_populate(NULL, u8500_local_bus_nodes,
  265. u8540_auxdata_lookup, parent);
  266. else
  267. of_platform_populate(NULL, u8500_local_bus_nodes,
  268. u8500_auxdata_lookup, parent);
  269. }
  270. static const char * stericsson_dt_platform_compat[] = {
  271. "st-ericsson,u8500",
  272. "st-ericsson,u8540",
  273. "st-ericsson,u9500",
  274. "st-ericsson,u9540",
  275. NULL,
  276. };
  277. DT_MACHINE_START(U8500_DT, "ST-Ericsson Ux5x0 platform (Device Tree Support)")
  278. .smp = smp_ops(ux500_smp_ops),
  279. .map_io = u8500_map_io,
  280. .init_irq = ux500_init_irq,
  281. /* we re-use nomadik timer here */
  282. .init_time = ux500_timer_init,
  283. .init_machine = u8500_init_machine,
  284. .init_late = NULL,
  285. .dt_compat = stericsson_dt_platform_compat,
  286. MACHINE_END
  287. #endif