platsmp.c 2.7 KB

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  1. /*
  2. * Copyright 2010-2011 Calxeda, Inc.
  3. * Copyright 2012 Pavel Machek <pavel@denx.de>
  4. * Based on platsmp.c, Copyright (C) 2002 ARM Ltd.
  5. * Copyright (C) 2012 Altera Corporation
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms and conditions of the GNU General Public License,
  9. * version 2, as published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope it will be useful, but WITHOUT
  12. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  14. * more details.
  15. *
  16. * You should have received a copy of the GNU General Public License along with
  17. * this program. If not, see <http://www.gnu.org/licenses/>.
  18. */
  19. #include <linux/delay.h>
  20. #include <linux/init.h>
  21. #include <linux/smp.h>
  22. #include <linux/io.h>
  23. #include <linux/of.h>
  24. #include <linux/of_address.h>
  25. #include <asm/cacheflush.h>
  26. #include <asm/smp_scu.h>
  27. #include <asm/smp_plat.h>
  28. #include "core.h"
  29. static int socfpga_boot_secondary(unsigned int cpu, struct task_struct *idle)
  30. {
  31. int trampoline_size = &secondary_trampoline_end - &secondary_trampoline;
  32. if (cpu1start_addr) {
  33. memcpy(phys_to_virt(0), &secondary_trampoline, trampoline_size);
  34. __raw_writel(virt_to_phys(socfpga_secondary_startup),
  35. (sys_manager_base_addr + (cpu1start_addr & 0x000000ff)));
  36. flush_cache_all();
  37. smp_wmb();
  38. outer_clean_range(0, trampoline_size);
  39. /* This will release CPU #1 out of reset.*/
  40. __raw_writel(0, rst_manager_base_addr + 0x10);
  41. }
  42. return 0;
  43. }
  44. /*
  45. * Initialise the CPU possible map early - this describes the CPUs
  46. * which may be present or become present in the system.
  47. */
  48. static void __init socfpga_smp_init_cpus(void)
  49. {
  50. unsigned int i, ncores;
  51. ncores = scu_get_core_count(socfpga_scu_base_addr);
  52. for (i = 0; i < ncores; i++)
  53. set_cpu_possible(i, true);
  54. /* sanity check */
  55. if (ncores > num_possible_cpus()) {
  56. pr_warn("socfpga: no. of cores (%d) greater than configured"
  57. "maximum of %d - clipping\n", ncores, num_possible_cpus());
  58. ncores = num_possible_cpus();
  59. }
  60. for (i = 0; i < ncores; i++)
  61. set_cpu_possible(i, true);
  62. }
  63. static void __init socfpga_smp_prepare_cpus(unsigned int max_cpus)
  64. {
  65. scu_enable(socfpga_scu_base_addr);
  66. }
  67. /*
  68. * platform-specific code to shutdown a CPU
  69. *
  70. * Called with IRQs disabled
  71. */
  72. static void socfpga_cpu_die(unsigned int cpu)
  73. {
  74. cpu_do_idle();
  75. /* We should have never returned from idle */
  76. panic("cpu %d unexpectedly exit from shutdown\n", cpu);
  77. }
  78. struct smp_operations socfpga_smp_ops __initdata = {
  79. .smp_init_cpus = socfpga_smp_init_cpus,
  80. .smp_prepare_cpus = socfpga_smp_prepare_cpus,
  81. .smp_boot_secondary = socfpga_boot_secondary,
  82. #ifdef CONFIG_HOTPLUG_CPU
  83. .cpu_die = socfpga_cpu_die,
  84. #endif
  85. };