setup-r8a7779.c 16 KB

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  1. /*
  2. * r8a7779 processor support
  3. *
  4. * Copyright (C) 2011, 2013 Renesas Solutions Corp.
  5. * Copyright (C) 2011 Magnus Damm
  6. * Copyright (C) 2013 Cogent Embedded, Inc.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; version 2 of the License.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  20. */
  21. #include <linux/kernel.h>
  22. #include <linux/init.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/irq.h>
  25. #include <linux/of_platform.h>
  26. #include <linux/platform_data/gpio-rcar.h>
  27. #include <linux/platform_device.h>
  28. #include <linux/delay.h>
  29. #include <linux/input.h>
  30. #include <linux/io.h>
  31. #include <linux/serial_sci.h>
  32. #include <linux/sh_intc.h>
  33. #include <linux/sh_timer.h>
  34. #include <linux/dma-mapping.h>
  35. #include <linux/usb/otg.h>
  36. #include <linux/usb/hcd.h>
  37. #include <linux/usb/ehci_pdriver.h>
  38. #include <linux/usb/ohci_pdriver.h>
  39. #include <linux/pm_runtime.h>
  40. #include <mach/hardware.h>
  41. #include <mach/irqs.h>
  42. #include <mach/r8a7779.h>
  43. #include <mach/common.h>
  44. #include <asm/mach-types.h>
  45. #include <asm/mach/arch.h>
  46. #include <asm/mach/time.h>
  47. #include <asm/mach/map.h>
  48. #include <asm/hardware/cache-l2x0.h>
  49. static struct map_desc r8a7779_io_desc[] __initdata = {
  50. /* 2M entity map for 0xf0000000 (MPCORE) */
  51. {
  52. .virtual = 0xf0000000,
  53. .pfn = __phys_to_pfn(0xf0000000),
  54. .length = SZ_2M,
  55. .type = MT_DEVICE_NONSHARED
  56. },
  57. /* 16M entity map for 0xfexxxxxx (DMAC-S/HPBREG/INTC2/LRAM/DBSC) */
  58. {
  59. .virtual = 0xfe000000,
  60. .pfn = __phys_to_pfn(0xfe000000),
  61. .length = SZ_16M,
  62. .type = MT_DEVICE_NONSHARED
  63. },
  64. };
  65. void __init r8a7779_map_io(void)
  66. {
  67. iotable_init(r8a7779_io_desc, ARRAY_SIZE(r8a7779_io_desc));
  68. }
  69. static struct resource r8a7779_pfc_resources[] = {
  70. DEFINE_RES_MEM(0xfffc0000, 0x023c),
  71. };
  72. static struct platform_device r8a7779_pfc_device = {
  73. .name = "pfc-r8a7779",
  74. .id = -1,
  75. .resource = r8a7779_pfc_resources,
  76. .num_resources = ARRAY_SIZE(r8a7779_pfc_resources),
  77. };
  78. #define R8A7779_GPIO(idx, npins) \
  79. static struct resource r8a7779_gpio##idx##_resources[] = { \
  80. DEFINE_RES_MEM(0xffc40000 + (0x1000 * (idx)), 0x002c), \
  81. DEFINE_RES_IRQ(gic_iid(0xad + (idx))), \
  82. }; \
  83. \
  84. static struct gpio_rcar_config r8a7779_gpio##idx##_platform_data = { \
  85. .gpio_base = 32 * (idx), \
  86. .irq_base = 0, \
  87. .number_of_pins = npins, \
  88. .pctl_name = "pfc-r8a7779", \
  89. }; \
  90. \
  91. static struct platform_device r8a7779_gpio##idx##_device = { \
  92. .name = "gpio_rcar", \
  93. .id = idx, \
  94. .resource = r8a7779_gpio##idx##_resources, \
  95. .num_resources = ARRAY_SIZE(r8a7779_gpio##idx##_resources), \
  96. .dev = { \
  97. .platform_data = &r8a7779_gpio##idx##_platform_data, \
  98. }, \
  99. }
  100. R8A7779_GPIO(0, 32);
  101. R8A7779_GPIO(1, 32);
  102. R8A7779_GPIO(2, 32);
  103. R8A7779_GPIO(3, 32);
  104. R8A7779_GPIO(4, 32);
  105. R8A7779_GPIO(5, 32);
  106. R8A7779_GPIO(6, 9);
  107. static struct platform_device *r8a7779_pinctrl_devices[] __initdata = {
  108. &r8a7779_pfc_device,
  109. &r8a7779_gpio0_device,
  110. &r8a7779_gpio1_device,
  111. &r8a7779_gpio2_device,
  112. &r8a7779_gpio3_device,
  113. &r8a7779_gpio4_device,
  114. &r8a7779_gpio5_device,
  115. &r8a7779_gpio6_device,
  116. };
  117. void __init r8a7779_pinmux_init(void)
  118. {
  119. platform_add_devices(r8a7779_pinctrl_devices,
  120. ARRAY_SIZE(r8a7779_pinctrl_devices));
  121. }
  122. static struct plat_sci_port scif0_platform_data = {
  123. .mapbase = 0xffe40000,
  124. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  125. .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
  126. .scbrr_algo_id = SCBRR_ALGO_2,
  127. .type = PORT_SCIF,
  128. .irqs = SCIx_IRQ_MUXED(gic_iid(0x78)),
  129. };
  130. static struct platform_device scif0_device = {
  131. .name = "sh-sci",
  132. .id = 0,
  133. .dev = {
  134. .platform_data = &scif0_platform_data,
  135. },
  136. };
  137. static struct plat_sci_port scif1_platform_data = {
  138. .mapbase = 0xffe41000,
  139. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  140. .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
  141. .scbrr_algo_id = SCBRR_ALGO_2,
  142. .type = PORT_SCIF,
  143. .irqs = SCIx_IRQ_MUXED(gic_iid(0x79)),
  144. };
  145. static struct platform_device scif1_device = {
  146. .name = "sh-sci",
  147. .id = 1,
  148. .dev = {
  149. .platform_data = &scif1_platform_data,
  150. },
  151. };
  152. static struct plat_sci_port scif2_platform_data = {
  153. .mapbase = 0xffe42000,
  154. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  155. .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
  156. .scbrr_algo_id = SCBRR_ALGO_2,
  157. .type = PORT_SCIF,
  158. .irqs = SCIx_IRQ_MUXED(gic_iid(0x7a)),
  159. };
  160. static struct platform_device scif2_device = {
  161. .name = "sh-sci",
  162. .id = 2,
  163. .dev = {
  164. .platform_data = &scif2_platform_data,
  165. },
  166. };
  167. static struct plat_sci_port scif3_platform_data = {
  168. .mapbase = 0xffe43000,
  169. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  170. .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
  171. .scbrr_algo_id = SCBRR_ALGO_2,
  172. .type = PORT_SCIF,
  173. .irqs = SCIx_IRQ_MUXED(gic_iid(0x7b)),
  174. };
  175. static struct platform_device scif3_device = {
  176. .name = "sh-sci",
  177. .id = 3,
  178. .dev = {
  179. .platform_data = &scif3_platform_data,
  180. },
  181. };
  182. static struct plat_sci_port scif4_platform_data = {
  183. .mapbase = 0xffe44000,
  184. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  185. .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
  186. .scbrr_algo_id = SCBRR_ALGO_2,
  187. .type = PORT_SCIF,
  188. .irqs = SCIx_IRQ_MUXED(gic_iid(0x7c)),
  189. };
  190. static struct platform_device scif4_device = {
  191. .name = "sh-sci",
  192. .id = 4,
  193. .dev = {
  194. .platform_data = &scif4_platform_data,
  195. },
  196. };
  197. static struct plat_sci_port scif5_platform_data = {
  198. .mapbase = 0xffe45000,
  199. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  200. .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
  201. .scbrr_algo_id = SCBRR_ALGO_2,
  202. .type = PORT_SCIF,
  203. .irqs = SCIx_IRQ_MUXED(gic_iid(0x7d)),
  204. };
  205. static struct platform_device scif5_device = {
  206. .name = "sh-sci",
  207. .id = 5,
  208. .dev = {
  209. .platform_data = &scif5_platform_data,
  210. },
  211. };
  212. /* TMU */
  213. static struct sh_timer_config tmu00_platform_data = {
  214. .name = "TMU00",
  215. .channel_offset = 0x4,
  216. .timer_bit = 0,
  217. .clockevent_rating = 200,
  218. };
  219. static struct resource tmu00_resources[] = {
  220. [0] = {
  221. .name = "TMU00",
  222. .start = 0xffd80008,
  223. .end = 0xffd80013,
  224. .flags = IORESOURCE_MEM,
  225. },
  226. [1] = {
  227. .start = gic_iid(0x40),
  228. .flags = IORESOURCE_IRQ,
  229. },
  230. };
  231. static struct platform_device tmu00_device = {
  232. .name = "sh_tmu",
  233. .id = 0,
  234. .dev = {
  235. .platform_data = &tmu00_platform_data,
  236. },
  237. .resource = tmu00_resources,
  238. .num_resources = ARRAY_SIZE(tmu00_resources),
  239. };
  240. static struct sh_timer_config tmu01_platform_data = {
  241. .name = "TMU01",
  242. .channel_offset = 0x10,
  243. .timer_bit = 1,
  244. .clocksource_rating = 200,
  245. };
  246. static struct resource tmu01_resources[] = {
  247. [0] = {
  248. .name = "TMU01",
  249. .start = 0xffd80014,
  250. .end = 0xffd8001f,
  251. .flags = IORESOURCE_MEM,
  252. },
  253. [1] = {
  254. .start = gic_iid(0x41),
  255. .flags = IORESOURCE_IRQ,
  256. },
  257. };
  258. static struct platform_device tmu01_device = {
  259. .name = "sh_tmu",
  260. .id = 1,
  261. .dev = {
  262. .platform_data = &tmu01_platform_data,
  263. },
  264. .resource = tmu01_resources,
  265. .num_resources = ARRAY_SIZE(tmu01_resources),
  266. };
  267. /* I2C */
  268. static struct resource rcar_i2c0_res[] = {
  269. {
  270. .start = 0xffc70000,
  271. .end = 0xffc70fff,
  272. .flags = IORESOURCE_MEM,
  273. }, {
  274. .start = gic_iid(0x6f),
  275. .flags = IORESOURCE_IRQ,
  276. },
  277. };
  278. static struct platform_device i2c0_device = {
  279. .name = "i2c-rcar",
  280. .id = 0,
  281. .resource = rcar_i2c0_res,
  282. .num_resources = ARRAY_SIZE(rcar_i2c0_res),
  283. };
  284. static struct resource rcar_i2c1_res[] = {
  285. {
  286. .start = 0xffc71000,
  287. .end = 0xffc71fff,
  288. .flags = IORESOURCE_MEM,
  289. }, {
  290. .start = gic_iid(0x72),
  291. .flags = IORESOURCE_IRQ,
  292. },
  293. };
  294. static struct platform_device i2c1_device = {
  295. .name = "i2c-rcar",
  296. .id = 1,
  297. .resource = rcar_i2c1_res,
  298. .num_resources = ARRAY_SIZE(rcar_i2c1_res),
  299. };
  300. static struct resource rcar_i2c2_res[] = {
  301. {
  302. .start = 0xffc72000,
  303. .end = 0xffc72fff,
  304. .flags = IORESOURCE_MEM,
  305. }, {
  306. .start = gic_iid(0x70),
  307. .flags = IORESOURCE_IRQ,
  308. },
  309. };
  310. static struct platform_device i2c2_device = {
  311. .name = "i2c-rcar",
  312. .id = 2,
  313. .resource = rcar_i2c2_res,
  314. .num_resources = ARRAY_SIZE(rcar_i2c2_res),
  315. };
  316. static struct resource rcar_i2c3_res[] = {
  317. {
  318. .start = 0xffc73000,
  319. .end = 0xffc73fff,
  320. .flags = IORESOURCE_MEM,
  321. }, {
  322. .start = gic_iid(0x71),
  323. .flags = IORESOURCE_IRQ,
  324. },
  325. };
  326. static struct platform_device i2c3_device = {
  327. .name = "i2c-rcar",
  328. .id = 3,
  329. .resource = rcar_i2c3_res,
  330. .num_resources = ARRAY_SIZE(rcar_i2c3_res),
  331. };
  332. static struct resource sata_resources[] = {
  333. [0] = {
  334. .name = "rcar-sata",
  335. .start = 0xfc600000,
  336. .end = 0xfc601fff,
  337. .flags = IORESOURCE_MEM,
  338. },
  339. [1] = {
  340. .start = gic_iid(0x84),
  341. .flags = IORESOURCE_IRQ,
  342. },
  343. };
  344. static struct platform_device sata_device = {
  345. .name = "sata_rcar",
  346. .id = -1,
  347. .resource = sata_resources,
  348. .num_resources = ARRAY_SIZE(sata_resources),
  349. .dev = {
  350. .dma_mask = &sata_device.dev.coherent_dma_mask,
  351. .coherent_dma_mask = DMA_BIT_MASK(32),
  352. },
  353. };
  354. /* USB PHY */
  355. static struct resource usb_phy_resources[] __initdata = {
  356. [0] = {
  357. .start = 0xffe70800,
  358. .end = 0xffe70900 - 1,
  359. .flags = IORESOURCE_MEM,
  360. },
  361. };
  362. /* USB */
  363. static struct usb_phy *phy;
  364. static int usb_power_on(struct platform_device *pdev)
  365. {
  366. if (IS_ERR(phy))
  367. return PTR_ERR(phy);
  368. pm_runtime_enable(&pdev->dev);
  369. pm_runtime_get_sync(&pdev->dev);
  370. usb_phy_init(phy);
  371. return 0;
  372. }
  373. static void usb_power_off(struct platform_device *pdev)
  374. {
  375. if (IS_ERR(phy))
  376. return;
  377. usb_phy_shutdown(phy);
  378. pm_runtime_put_sync(&pdev->dev);
  379. pm_runtime_disable(&pdev->dev);
  380. }
  381. static int ehci_init_internal_buffer(struct usb_hcd *hcd)
  382. {
  383. /*
  384. * Below are recommended values from the datasheet;
  385. * see [USB :: Setting of EHCI Internal Buffer].
  386. */
  387. /* EHCI IP internal buffer setting */
  388. iowrite32(0x00ff0040, hcd->regs + 0x0094);
  389. /* EHCI IP internal buffer enable */
  390. iowrite32(0x00000001, hcd->regs + 0x009C);
  391. return 0;
  392. }
  393. static struct usb_ehci_pdata ehcix_pdata = {
  394. .power_on = usb_power_on,
  395. .power_off = usb_power_off,
  396. .power_suspend = usb_power_off,
  397. .pre_setup = ehci_init_internal_buffer,
  398. };
  399. static struct resource ehci0_resources[] = {
  400. [0] = {
  401. .start = 0xffe70000,
  402. .end = 0xffe70400 - 1,
  403. .flags = IORESOURCE_MEM,
  404. },
  405. [1] = {
  406. .start = gic_iid(0x4c),
  407. .flags = IORESOURCE_IRQ,
  408. },
  409. };
  410. static struct platform_device ehci0_device = {
  411. .name = "ehci-platform",
  412. .id = 0,
  413. .dev = {
  414. .dma_mask = &ehci0_device.dev.coherent_dma_mask,
  415. .coherent_dma_mask = 0xffffffff,
  416. .platform_data = &ehcix_pdata,
  417. },
  418. .num_resources = ARRAY_SIZE(ehci0_resources),
  419. .resource = ehci0_resources,
  420. };
  421. static struct resource ehci1_resources[] = {
  422. [0] = {
  423. .start = 0xfff70000,
  424. .end = 0xfff70400 - 1,
  425. .flags = IORESOURCE_MEM,
  426. },
  427. [1] = {
  428. .start = gic_iid(0x4d),
  429. .flags = IORESOURCE_IRQ,
  430. },
  431. };
  432. static struct platform_device ehci1_device = {
  433. .name = "ehci-platform",
  434. .id = 1,
  435. .dev = {
  436. .dma_mask = &ehci1_device.dev.coherent_dma_mask,
  437. .coherent_dma_mask = 0xffffffff,
  438. .platform_data = &ehcix_pdata,
  439. },
  440. .num_resources = ARRAY_SIZE(ehci1_resources),
  441. .resource = ehci1_resources,
  442. };
  443. static struct usb_ohci_pdata ohcix_pdata = {
  444. .power_on = usb_power_on,
  445. .power_off = usb_power_off,
  446. .power_suspend = usb_power_off,
  447. };
  448. static struct resource ohci0_resources[] = {
  449. [0] = {
  450. .start = 0xffe70400,
  451. .end = 0xffe70800 - 1,
  452. .flags = IORESOURCE_MEM,
  453. },
  454. [1] = {
  455. .start = gic_iid(0x4c),
  456. .flags = IORESOURCE_IRQ,
  457. },
  458. };
  459. static struct platform_device ohci0_device = {
  460. .name = "ohci-platform",
  461. .id = 0,
  462. .dev = {
  463. .dma_mask = &ohci0_device.dev.coherent_dma_mask,
  464. .coherent_dma_mask = 0xffffffff,
  465. .platform_data = &ohcix_pdata,
  466. },
  467. .num_resources = ARRAY_SIZE(ohci0_resources),
  468. .resource = ohci0_resources,
  469. };
  470. static struct resource ohci1_resources[] = {
  471. [0] = {
  472. .start = 0xfff70400,
  473. .end = 0xfff70800 - 1,
  474. .flags = IORESOURCE_MEM,
  475. },
  476. [1] = {
  477. .start = gic_iid(0x4d),
  478. .flags = IORESOURCE_IRQ,
  479. },
  480. };
  481. static struct platform_device ohci1_device = {
  482. .name = "ohci-platform",
  483. .id = 1,
  484. .dev = {
  485. .dma_mask = &ohci1_device.dev.coherent_dma_mask,
  486. .coherent_dma_mask = 0xffffffff,
  487. .platform_data = &ohcix_pdata,
  488. },
  489. .num_resources = ARRAY_SIZE(ohci1_resources),
  490. .resource = ohci1_resources,
  491. };
  492. /* Ether */
  493. static struct resource ether_resources[] = {
  494. {
  495. .start = 0xfde00000,
  496. .end = 0xfde003ff,
  497. .flags = IORESOURCE_MEM,
  498. }, {
  499. .start = gic_iid(0xb4),
  500. .flags = IORESOURCE_IRQ,
  501. },
  502. };
  503. static struct platform_device *r8a7779_devices_dt[] __initdata = {
  504. &scif0_device,
  505. &scif1_device,
  506. &scif2_device,
  507. &scif3_device,
  508. &scif4_device,
  509. &scif5_device,
  510. &tmu00_device,
  511. &tmu01_device,
  512. };
  513. static struct platform_device *r8a7779_standard_devices[] __initdata = {
  514. &i2c0_device,
  515. &i2c1_device,
  516. &i2c2_device,
  517. &i2c3_device,
  518. &sata_device,
  519. };
  520. void __init r8a7779_add_standard_devices(void)
  521. {
  522. #ifdef CONFIG_CACHE_L2X0
  523. /* Early BRESP enable, Shared attribute override enable, 64K*16way */
  524. l2x0_init(IOMEM(0xf0100000), 0x40470000, 0x82000fff);
  525. #endif
  526. r8a7779_pm_init();
  527. r8a7779_init_pm_domains();
  528. platform_add_devices(r8a7779_devices_dt,
  529. ARRAY_SIZE(r8a7779_devices_dt));
  530. platform_add_devices(r8a7779_standard_devices,
  531. ARRAY_SIZE(r8a7779_standard_devices));
  532. }
  533. void __init r8a7779_add_ether_device(struct sh_eth_plat_data *pdata)
  534. {
  535. platform_device_register_resndata(&platform_bus, "r8a777x-ether", -1,
  536. ether_resources,
  537. ARRAY_SIZE(ether_resources),
  538. pdata, sizeof(*pdata));
  539. }
  540. void __init r8a7779_add_usb_phy_device(struct rcar_phy_platform_data *pdata)
  541. {
  542. platform_device_register_resndata(&platform_bus, "rcar_usb_phy", -1,
  543. usb_phy_resources,
  544. ARRAY_SIZE(usb_phy_resources),
  545. pdata, sizeof(*pdata));
  546. }
  547. /* do nothing for !CONFIG_SMP or !CONFIG_HAVE_TWD */
  548. void __init __weak r8a7779_register_twd(void) { }
  549. void __init r8a7779_earlytimer_init(void)
  550. {
  551. r8a7779_clock_init();
  552. shmobile_earlytimer_init();
  553. r8a7779_register_twd();
  554. }
  555. void __init r8a7779_add_early_devices(void)
  556. {
  557. early_platform_add_devices(r8a7779_devices_dt,
  558. ARRAY_SIZE(r8a7779_devices_dt));
  559. /* Early serial console setup is not included here due to
  560. * memory map collisions. The SCIF serial ports in r8a7779
  561. * are difficult to entity map 1:1 due to collision with the
  562. * virtual memory range used by the coherent DMA code on ARM.
  563. *
  564. * Anyone wanting to debug early can remove UPF_IOREMAP from
  565. * the sh-sci serial console platform data, adjust mapbase
  566. * to a static M:N virt:phys mapping that needs to be added to
  567. * the mappings passed with iotable_init() above.
  568. *
  569. * Then add a call to shmobile_setup_console() from this function.
  570. *
  571. * As a final step pass earlyprint=sh-sci.2,115200 on the kernel
  572. * command line in case of the marzen board.
  573. */
  574. }
  575. static struct platform_device *r8a7779_late_devices[] __initdata = {
  576. &ehci0_device,
  577. &ehci1_device,
  578. &ohci0_device,
  579. &ohci1_device,
  580. };
  581. void __init r8a7779_init_late(void)
  582. {
  583. /* get USB PHY */
  584. phy = usb_get_phy(USB_PHY_TYPE_USB2);
  585. shmobile_init_late();
  586. platform_add_devices(r8a7779_late_devices,
  587. ARRAY_SIZE(r8a7779_late_devices));
  588. }
  589. #ifdef CONFIG_USE_OF
  590. void __init r8a7779_init_delay(void)
  591. {
  592. shmobile_setup_delay(1000, 2, 4); /* Cortex-A9 @ 1000MHz */
  593. }
  594. static const struct of_dev_auxdata r8a7779_auxdata_lookup[] __initconst = {
  595. {},
  596. };
  597. void __init r8a7779_add_standard_devices_dt(void)
  598. {
  599. /* clocks are setup late during boot in the case of DT */
  600. r8a7779_clock_init();
  601. platform_add_devices(r8a7779_devices_dt,
  602. ARRAY_SIZE(r8a7779_devices_dt));
  603. of_platform_populate(NULL, of_default_bus_match_table,
  604. r8a7779_auxdata_lookup, NULL);
  605. }
  606. static const char *r8a7779_compat_dt[] __initdata = {
  607. "renesas,r8a7779",
  608. NULL,
  609. };
  610. DT_MACHINE_START(R8A7779_DT, "Generic R8A7779 (Flattened Device Tree)")
  611. .map_io = r8a7779_map_io,
  612. .init_early = r8a7779_init_delay,
  613. .nr_irqs = NR_IRQS_LEGACY,
  614. .init_irq = r8a7779_init_irq_dt,
  615. .init_machine = r8a7779_add_standard_devices_dt,
  616. .init_time = shmobile_timer_init,
  617. .init_late = r8a7779_init_late,
  618. .dt_compat = r8a7779_compat_dt,
  619. MACHINE_END
  620. #endif /* CONFIG_USE_OF */