mainstone.c 17 KB

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  1. /*
  2. * linux/arch/arm/mach-pxa/mainstone.c
  3. *
  4. * Support for the Intel HCDDBBVA0 Development Platform.
  5. * (go figure how they came up with such name...)
  6. *
  7. * Author: Nicolas Pitre
  8. * Created: Nov 05, 2002
  9. * Copyright: MontaVista Software Inc.
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License version 2 as
  13. * published by the Free Software Foundation.
  14. */
  15. #include <linux/gpio.h>
  16. #include <linux/init.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/syscore_ops.h>
  19. #include <linux/interrupt.h>
  20. #include <linux/sched.h>
  21. #include <linux/bitops.h>
  22. #include <linux/fb.h>
  23. #include <linux/ioport.h>
  24. #include <linux/mtd/mtd.h>
  25. #include <linux/mtd/partitions.h>
  26. #include <linux/input.h>
  27. #include <linux/gpio_keys.h>
  28. #include <linux/pwm_backlight.h>
  29. #include <linux/smc91x.h>
  30. #include <linux/i2c/pxa-i2c.h>
  31. #include <linux/slab.h>
  32. #include <linux/leds.h>
  33. #include <asm/types.h>
  34. #include <asm/setup.h>
  35. #include <asm/memory.h>
  36. #include <asm/mach-types.h>
  37. #include <mach/hardware.h>
  38. #include <asm/irq.h>
  39. #include <asm/sizes.h>
  40. #include <asm/mach/arch.h>
  41. #include <asm/mach/map.h>
  42. #include <asm/mach/irq.h>
  43. #include <asm/mach/flash.h>
  44. #include <mach/pxa27x.h>
  45. #include <mach/mainstone.h>
  46. #include <mach/audio.h>
  47. #include <linux/platform_data/video-pxafb.h>
  48. #include <linux/platform_data/mmc-pxamci.h>
  49. #include <linux/platform_data/irda-pxaficp.h>
  50. #include <linux/platform_data/usb-ohci-pxa27x.h>
  51. #include <linux/platform_data/keypad-pxa27x.h>
  52. #include <mach/smemc.h>
  53. #include "generic.h"
  54. #include "devices.h"
  55. static unsigned long mainstone_pin_config[] = {
  56. /* Chip Select */
  57. GPIO15_nCS_1,
  58. /* LCD - 16bpp Active TFT */
  59. GPIOxx_LCD_TFT_16BPP,
  60. GPIO16_PWM0_OUT, /* Backlight */
  61. /* MMC */
  62. GPIO32_MMC_CLK,
  63. GPIO112_MMC_CMD,
  64. GPIO92_MMC_DAT_0,
  65. GPIO109_MMC_DAT_1,
  66. GPIO110_MMC_DAT_2,
  67. GPIO111_MMC_DAT_3,
  68. /* USB Host Port 1 */
  69. GPIO88_USBH1_PWR,
  70. GPIO89_USBH1_PEN,
  71. /* PC Card */
  72. GPIO48_nPOE,
  73. GPIO49_nPWE,
  74. GPIO50_nPIOR,
  75. GPIO51_nPIOW,
  76. GPIO85_nPCE_1,
  77. GPIO54_nPCE_2,
  78. GPIO79_PSKTSEL,
  79. GPIO55_nPREG,
  80. GPIO56_nPWAIT,
  81. GPIO57_nIOIS16,
  82. /* AC97 */
  83. GPIO28_AC97_BITCLK,
  84. GPIO29_AC97_SDATA_IN_0,
  85. GPIO30_AC97_SDATA_OUT,
  86. GPIO31_AC97_SYNC,
  87. GPIO45_AC97_SYSCLK,
  88. /* Keypad */
  89. GPIO93_KP_DKIN_0,
  90. GPIO94_KP_DKIN_1,
  91. GPIO95_KP_DKIN_2,
  92. GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH,
  93. GPIO101_KP_MKIN_1 | WAKEUP_ON_LEVEL_HIGH,
  94. GPIO102_KP_MKIN_2 | WAKEUP_ON_LEVEL_HIGH,
  95. GPIO97_KP_MKIN_3 | WAKEUP_ON_LEVEL_HIGH,
  96. GPIO98_KP_MKIN_4 | WAKEUP_ON_LEVEL_HIGH,
  97. GPIO99_KP_MKIN_5 | WAKEUP_ON_LEVEL_HIGH,
  98. GPIO103_KP_MKOUT_0,
  99. GPIO104_KP_MKOUT_1,
  100. GPIO105_KP_MKOUT_2,
  101. GPIO106_KP_MKOUT_3,
  102. GPIO107_KP_MKOUT_4,
  103. GPIO108_KP_MKOUT_5,
  104. GPIO96_KP_MKOUT_6,
  105. /* I2C */
  106. GPIO117_I2C_SCL,
  107. GPIO118_I2C_SDA,
  108. /* GPIO */
  109. GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH,
  110. };
  111. static unsigned long mainstone_irq_enabled;
  112. static void mainstone_mask_irq(struct irq_data *d)
  113. {
  114. int mainstone_irq = (d->irq - MAINSTONE_IRQ(0));
  115. MST_INTMSKENA = (mainstone_irq_enabled &= ~(1 << mainstone_irq));
  116. }
  117. static void mainstone_unmask_irq(struct irq_data *d)
  118. {
  119. int mainstone_irq = (d->irq - MAINSTONE_IRQ(0));
  120. /* the irq can be acknowledged only if deasserted, so it's done here */
  121. MST_INTSETCLR &= ~(1 << mainstone_irq);
  122. MST_INTMSKENA = (mainstone_irq_enabled |= (1 << mainstone_irq));
  123. }
  124. static struct irq_chip mainstone_irq_chip = {
  125. .name = "FPGA",
  126. .irq_ack = mainstone_mask_irq,
  127. .irq_mask = mainstone_mask_irq,
  128. .irq_unmask = mainstone_unmask_irq,
  129. };
  130. static void mainstone_irq_handler(unsigned int irq, struct irq_desc *desc)
  131. {
  132. unsigned long pending = MST_INTSETCLR & mainstone_irq_enabled;
  133. do {
  134. /* clear useless edge notification */
  135. desc->irq_data.chip->irq_ack(&desc->irq_data);
  136. if (likely(pending)) {
  137. irq = MAINSTONE_IRQ(0) + __ffs(pending);
  138. generic_handle_irq(irq);
  139. }
  140. pending = MST_INTSETCLR & mainstone_irq_enabled;
  141. } while (pending);
  142. }
  143. static void __init mainstone_init_irq(void)
  144. {
  145. int irq;
  146. pxa27x_init_irq();
  147. /* setup extra Mainstone irqs */
  148. for(irq = MAINSTONE_IRQ(0); irq <= MAINSTONE_IRQ(15); irq++) {
  149. irq_set_chip_and_handler(irq, &mainstone_irq_chip,
  150. handle_level_irq);
  151. if (irq == MAINSTONE_IRQ(10) || irq == MAINSTONE_IRQ(14))
  152. set_irq_flags(irq, IRQF_VALID | IRQF_PROBE | IRQF_NOAUTOEN);
  153. else
  154. set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
  155. }
  156. set_irq_flags(MAINSTONE_IRQ(8), 0);
  157. set_irq_flags(MAINSTONE_IRQ(12), 0);
  158. MST_INTMSKENA = 0;
  159. MST_INTSETCLR = 0;
  160. irq_set_chained_handler(PXA_GPIO_TO_IRQ(0), mainstone_irq_handler);
  161. irq_set_irq_type(PXA_GPIO_TO_IRQ(0), IRQ_TYPE_EDGE_FALLING);
  162. }
  163. #ifdef CONFIG_PM
  164. static void mainstone_irq_resume(void)
  165. {
  166. MST_INTMSKENA = mainstone_irq_enabled;
  167. }
  168. static struct syscore_ops mainstone_irq_syscore_ops = {
  169. .resume = mainstone_irq_resume,
  170. };
  171. static int __init mainstone_irq_device_init(void)
  172. {
  173. if (machine_is_mainstone())
  174. register_syscore_ops(&mainstone_irq_syscore_ops);
  175. return 0;
  176. }
  177. device_initcall(mainstone_irq_device_init);
  178. #endif
  179. static struct resource smc91x_resources[] = {
  180. [0] = {
  181. .start = (MST_ETH_PHYS + 0x300),
  182. .end = (MST_ETH_PHYS + 0xfffff),
  183. .flags = IORESOURCE_MEM,
  184. },
  185. [1] = {
  186. .start = MAINSTONE_IRQ(3),
  187. .end = MAINSTONE_IRQ(3),
  188. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
  189. }
  190. };
  191. static struct smc91x_platdata mainstone_smc91x_info = {
  192. .flags = SMC91X_USE_8BIT | SMC91X_USE_16BIT | SMC91X_USE_32BIT |
  193. SMC91X_NOWAIT | SMC91X_USE_DMA,
  194. };
  195. static struct platform_device smc91x_device = {
  196. .name = "smc91x",
  197. .id = 0,
  198. .num_resources = ARRAY_SIZE(smc91x_resources),
  199. .resource = smc91x_resources,
  200. .dev = {
  201. .platform_data = &mainstone_smc91x_info,
  202. },
  203. };
  204. static int mst_audio_startup(struct snd_pcm_substream *substream, void *priv)
  205. {
  206. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  207. MST_MSCWR2 &= ~MST_MSCWR2_AC97_SPKROFF;
  208. return 0;
  209. }
  210. static void mst_audio_shutdown(struct snd_pcm_substream *substream, void *priv)
  211. {
  212. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  213. MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF;
  214. }
  215. static long mst_audio_suspend_mask;
  216. static void mst_audio_suspend(void *priv)
  217. {
  218. mst_audio_suspend_mask = MST_MSCWR2;
  219. MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF;
  220. }
  221. static void mst_audio_resume(void *priv)
  222. {
  223. MST_MSCWR2 &= mst_audio_suspend_mask | ~MST_MSCWR2_AC97_SPKROFF;
  224. }
  225. static pxa2xx_audio_ops_t mst_audio_ops = {
  226. .startup = mst_audio_startup,
  227. .shutdown = mst_audio_shutdown,
  228. .suspend = mst_audio_suspend,
  229. .resume = mst_audio_resume,
  230. };
  231. static struct resource flash_resources[] = {
  232. [0] = {
  233. .start = PXA_CS0_PHYS,
  234. .end = PXA_CS0_PHYS + SZ_64M - 1,
  235. .flags = IORESOURCE_MEM,
  236. },
  237. [1] = {
  238. .start = PXA_CS1_PHYS,
  239. .end = PXA_CS1_PHYS + SZ_64M - 1,
  240. .flags = IORESOURCE_MEM,
  241. },
  242. };
  243. static struct mtd_partition mainstoneflash0_partitions[] = {
  244. {
  245. .name = "Bootloader",
  246. .size = 0x00040000,
  247. .offset = 0,
  248. .mask_flags = MTD_WRITEABLE /* force read-only */
  249. },{
  250. .name = "Kernel",
  251. .size = 0x00400000,
  252. .offset = 0x00040000,
  253. },{
  254. .name = "Filesystem",
  255. .size = MTDPART_SIZ_FULL,
  256. .offset = 0x00440000
  257. }
  258. };
  259. static struct flash_platform_data mst_flash_data[2] = {
  260. {
  261. .map_name = "cfi_probe",
  262. .parts = mainstoneflash0_partitions,
  263. .nr_parts = ARRAY_SIZE(mainstoneflash0_partitions),
  264. }, {
  265. .map_name = "cfi_probe",
  266. .parts = NULL,
  267. .nr_parts = 0,
  268. }
  269. };
  270. static struct platform_device mst_flash_device[2] = {
  271. {
  272. .name = "pxa2xx-flash",
  273. .id = 0,
  274. .dev = {
  275. .platform_data = &mst_flash_data[0],
  276. },
  277. .resource = &flash_resources[0],
  278. .num_resources = 1,
  279. },
  280. {
  281. .name = "pxa2xx-flash",
  282. .id = 1,
  283. .dev = {
  284. .platform_data = &mst_flash_data[1],
  285. },
  286. .resource = &flash_resources[1],
  287. .num_resources = 1,
  288. },
  289. };
  290. #if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
  291. static struct platform_pwm_backlight_data mainstone_backlight_data = {
  292. .pwm_id = 0,
  293. .max_brightness = 1023,
  294. .dft_brightness = 1023,
  295. .pwm_period_ns = 78770,
  296. };
  297. static struct platform_device mainstone_backlight_device = {
  298. .name = "pwm-backlight",
  299. .dev = {
  300. .parent = &pxa27x_device_pwm0.dev,
  301. .platform_data = &mainstone_backlight_data,
  302. },
  303. };
  304. static void __init mainstone_backlight_register(void)
  305. {
  306. int ret = platform_device_register(&mainstone_backlight_device);
  307. if (ret)
  308. printk(KERN_ERR "mainstone: failed to register backlight device: %d\n", ret);
  309. }
  310. #else
  311. #define mainstone_backlight_register() do { } while (0)
  312. #endif
  313. static struct pxafb_mode_info toshiba_ltm04c380k_mode = {
  314. .pixclock = 50000,
  315. .xres = 640,
  316. .yres = 480,
  317. .bpp = 16,
  318. .hsync_len = 1,
  319. .left_margin = 0x9f,
  320. .right_margin = 1,
  321. .vsync_len = 44,
  322. .upper_margin = 0,
  323. .lower_margin = 0,
  324. .sync = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT,
  325. };
  326. static struct pxafb_mode_info toshiba_ltm035a776c_mode = {
  327. .pixclock = 110000,
  328. .xres = 240,
  329. .yres = 320,
  330. .bpp = 16,
  331. .hsync_len = 4,
  332. .left_margin = 8,
  333. .right_margin = 20,
  334. .vsync_len = 3,
  335. .upper_margin = 1,
  336. .lower_margin = 10,
  337. .sync = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT,
  338. };
  339. static struct pxafb_mach_info mainstone_pxafb_info = {
  340. .num_modes = 1,
  341. .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
  342. };
  343. static int mainstone_mci_init(struct device *dev, irq_handler_t mstone_detect_int, void *data)
  344. {
  345. int err;
  346. /* make sure SD/Memory Stick multiplexer's signals
  347. * are routed to MMC controller
  348. */
  349. MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL;
  350. err = request_irq(MAINSTONE_MMC_IRQ, mstone_detect_int, IRQF_DISABLED,
  351. "MMC card detect", data);
  352. if (err)
  353. printk(KERN_ERR "mainstone_mci_init: MMC/SD: can't request MMC card detect IRQ\n");
  354. return err;
  355. }
  356. static int mainstone_mci_setpower(struct device *dev, unsigned int vdd)
  357. {
  358. struct pxamci_platform_data* p_d = dev->platform_data;
  359. if (( 1 << vdd) & p_d->ocr_mask) {
  360. printk(KERN_DEBUG "%s: on\n", __func__);
  361. MST_MSCWR1 |= MST_MSCWR1_MMC_ON;
  362. MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL;
  363. } else {
  364. printk(KERN_DEBUG "%s: off\n", __func__);
  365. MST_MSCWR1 &= ~MST_MSCWR1_MMC_ON;
  366. }
  367. return 0;
  368. }
  369. static void mainstone_mci_exit(struct device *dev, void *data)
  370. {
  371. free_irq(MAINSTONE_MMC_IRQ, data);
  372. }
  373. static struct pxamci_platform_data mainstone_mci_platform_data = {
  374. .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
  375. .init = mainstone_mci_init,
  376. .setpower = mainstone_mci_setpower,
  377. .exit = mainstone_mci_exit,
  378. .gpio_card_detect = -1,
  379. .gpio_card_ro = -1,
  380. .gpio_power = -1,
  381. };
  382. static void mainstone_irda_transceiver_mode(struct device *dev, int mode)
  383. {
  384. unsigned long flags;
  385. local_irq_save(flags);
  386. if (mode & IR_SIRMODE) {
  387. MST_MSCWR1 &= ~MST_MSCWR1_IRDA_FIR;
  388. } else if (mode & IR_FIRMODE) {
  389. MST_MSCWR1 |= MST_MSCWR1_IRDA_FIR;
  390. }
  391. pxa2xx_transceiver_mode(dev, mode);
  392. if (mode & IR_OFF) {
  393. MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_OFF;
  394. } else {
  395. MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_FULL;
  396. }
  397. local_irq_restore(flags);
  398. }
  399. static struct pxaficp_platform_data mainstone_ficp_platform_data = {
  400. .gpio_pwdown = -1,
  401. .transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF,
  402. .transceiver_mode = mainstone_irda_transceiver_mode,
  403. };
  404. static struct gpio_keys_button gpio_keys_button[] = {
  405. [0] = {
  406. .desc = "wakeup",
  407. .code = KEY_SUSPEND,
  408. .type = EV_KEY,
  409. .gpio = 1,
  410. .wakeup = 1,
  411. },
  412. };
  413. static struct gpio_keys_platform_data mainstone_gpio_keys = {
  414. .buttons = gpio_keys_button,
  415. .nbuttons = 1,
  416. };
  417. static struct platform_device mst_gpio_keys_device = {
  418. .name = "gpio-keys",
  419. .id = -1,
  420. .dev = {
  421. .platform_data = &mainstone_gpio_keys,
  422. },
  423. };
  424. static struct platform_device *platform_devices[] __initdata = {
  425. &smc91x_device,
  426. &mst_flash_device[0],
  427. &mst_flash_device[1],
  428. &mst_gpio_keys_device,
  429. };
  430. static struct pxaohci_platform_data mainstone_ohci_platform_data = {
  431. .port_mode = PMM_PERPORT_MODE,
  432. .flags = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW,
  433. };
  434. #if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE)
  435. static const unsigned int mainstone_matrix_keys[] = {
  436. KEY(0, 0, KEY_A), KEY(1, 0, KEY_B), KEY(2, 0, KEY_C),
  437. KEY(3, 0, KEY_D), KEY(4, 0, KEY_E), KEY(5, 0, KEY_F),
  438. KEY(0, 1, KEY_G), KEY(1, 1, KEY_H), KEY(2, 1, KEY_I),
  439. KEY(3, 1, KEY_J), KEY(4, 1, KEY_K), KEY(5, 1, KEY_L),
  440. KEY(0, 2, KEY_M), KEY(1, 2, KEY_N), KEY(2, 2, KEY_O),
  441. KEY(3, 2, KEY_P), KEY(4, 2, KEY_Q), KEY(5, 2, KEY_R),
  442. KEY(0, 3, KEY_S), KEY(1, 3, KEY_T), KEY(2, 3, KEY_U),
  443. KEY(3, 3, KEY_V), KEY(4, 3, KEY_W), KEY(5, 3, KEY_X),
  444. KEY(2, 4, KEY_Y), KEY(3, 4, KEY_Z),
  445. KEY(0, 4, KEY_DOT), /* . */
  446. KEY(1, 4, KEY_CLOSE), /* @ */
  447. KEY(4, 4, KEY_SLASH),
  448. KEY(5, 4, KEY_BACKSLASH),
  449. KEY(0, 5, KEY_HOME),
  450. KEY(1, 5, KEY_LEFTSHIFT),
  451. KEY(2, 5, KEY_SPACE),
  452. KEY(3, 5, KEY_SPACE),
  453. KEY(4, 5, KEY_ENTER),
  454. KEY(5, 5, KEY_BACKSPACE),
  455. KEY(0, 6, KEY_UP),
  456. KEY(1, 6, KEY_DOWN),
  457. KEY(2, 6, KEY_LEFT),
  458. KEY(3, 6, KEY_RIGHT),
  459. KEY(4, 6, KEY_SELECT),
  460. };
  461. static struct matrix_keymap_data mainstone_matrix_keymap_data = {
  462. .keymap = mainstone_matrix_keys,
  463. .keymap_size = ARRAY_SIZE(mainstone_matrix_keys),
  464. };
  465. struct pxa27x_keypad_platform_data mainstone_keypad_info = {
  466. .matrix_key_rows = 6,
  467. .matrix_key_cols = 7,
  468. .matrix_keymap_data = &mainstone_matrix_keymap_data,
  469. .enable_rotary0 = 1,
  470. .rotary0_up_key = KEY_UP,
  471. .rotary0_down_key = KEY_DOWN,
  472. .debounce_interval = 30,
  473. };
  474. static void __init mainstone_init_keypad(void)
  475. {
  476. pxa_set_keypad_info(&mainstone_keypad_info);
  477. }
  478. #else
  479. static inline void mainstone_init_keypad(void) {}
  480. #endif
  481. static void __init mainstone_init(void)
  482. {
  483. int SW7 = 0; /* FIXME: get from SCR (Mst doc section 3.2.1.1) */
  484. pxa2xx_mfp_config(ARRAY_AND_SIZE(mainstone_pin_config));
  485. pxa_set_ffuart_info(NULL);
  486. pxa_set_btuart_info(NULL);
  487. pxa_set_stuart_info(NULL);
  488. mst_flash_data[0].width = (__raw_readl(BOOT_DEF) & 1) ? 2 : 4;
  489. mst_flash_data[1].width = 4;
  490. /* Compensate for SW7 which swaps the flash banks */
  491. mst_flash_data[SW7].name = "processor-flash";
  492. mst_flash_data[SW7 ^ 1].name = "mainboard-flash";
  493. printk(KERN_NOTICE "Mainstone configured to boot from %s\n",
  494. mst_flash_data[0].name);
  495. /* system bus arbiter setting
  496. * - Core_Park
  497. * - LCD_wt:DMA_wt:CORE_Wt = 2:3:4
  498. */
  499. ARB_CNTRL = ARB_CORE_PARK | 0x234;
  500. platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
  501. /* reading Mainstone's "Virtual Configuration Register"
  502. might be handy to select LCD type here */
  503. if (0)
  504. mainstone_pxafb_info.modes = &toshiba_ltm04c380k_mode;
  505. else
  506. mainstone_pxafb_info.modes = &toshiba_ltm035a776c_mode;
  507. pxa_set_fb_info(NULL, &mainstone_pxafb_info);
  508. mainstone_backlight_register();
  509. pxa_set_mci_info(&mainstone_mci_platform_data);
  510. pxa_set_ficp_info(&mainstone_ficp_platform_data);
  511. pxa_set_ohci_info(&mainstone_ohci_platform_data);
  512. pxa_set_i2c_info(NULL);
  513. pxa_set_ac97_info(&mst_audio_ops);
  514. mainstone_init_keypad();
  515. }
  516. static struct map_desc mainstone_io_desc[] __initdata = {
  517. { /* CPLD */
  518. .virtual = MST_FPGA_VIRT,
  519. .pfn = __phys_to_pfn(MST_FPGA_PHYS),
  520. .length = 0x00100000,
  521. .type = MT_DEVICE
  522. }
  523. };
  524. static void __init mainstone_map_io(void)
  525. {
  526. pxa27x_map_io();
  527. iotable_init(mainstone_io_desc, ARRAY_SIZE(mainstone_io_desc));
  528. /* for use I SRAM as framebuffer. */
  529. PSLR |= 0xF04;
  530. PCFR = 0x66;
  531. }
  532. /*
  533. * Driver for the 8 discrete LEDs available for general use:
  534. * Note: bits [15-8] are used to enable/blank the 8 7 segment hex displays
  535. * so be sure to not monkey with them here.
  536. */
  537. #if defined(CONFIG_NEW_LEDS) && defined(CONFIG_LEDS_CLASS)
  538. struct mainstone_led {
  539. struct led_classdev cdev;
  540. u8 mask;
  541. };
  542. /*
  543. * The triggers lines up below will only be used if the
  544. * LED triggers are compiled in.
  545. */
  546. static const struct {
  547. const char *name;
  548. const char *trigger;
  549. } mainstone_leds[] = {
  550. { "mainstone:D28", "default-on", },
  551. { "mainstone:D27", "cpu0", },
  552. { "mainstone:D26", "heartbeat" },
  553. { "mainstone:D25", },
  554. { "mainstone:D24", },
  555. { "mainstone:D23", },
  556. { "mainstone:D22", },
  557. { "mainstone:D21", },
  558. };
  559. static void mainstone_led_set(struct led_classdev *cdev,
  560. enum led_brightness b)
  561. {
  562. struct mainstone_led *led = container_of(cdev,
  563. struct mainstone_led, cdev);
  564. u32 reg = MST_LEDCTRL;
  565. if (b != LED_OFF)
  566. reg |= led->mask;
  567. else
  568. reg &= ~led->mask;
  569. MST_LEDCTRL = reg;
  570. }
  571. static enum led_brightness mainstone_led_get(struct led_classdev *cdev)
  572. {
  573. struct mainstone_led *led = container_of(cdev,
  574. struct mainstone_led, cdev);
  575. u32 reg = MST_LEDCTRL;
  576. return (reg & led->mask) ? LED_FULL : LED_OFF;
  577. }
  578. static int __init mainstone_leds_init(void)
  579. {
  580. int i;
  581. if (!machine_is_mainstone())
  582. return -ENODEV;
  583. /* All ON */
  584. MST_LEDCTRL |= 0xff;
  585. for (i = 0; i < ARRAY_SIZE(mainstone_leds); i++) {
  586. struct mainstone_led *led;
  587. led = kzalloc(sizeof(*led), GFP_KERNEL);
  588. if (!led)
  589. break;
  590. led->cdev.name = mainstone_leds[i].name;
  591. led->cdev.brightness_set = mainstone_led_set;
  592. led->cdev.brightness_get = mainstone_led_get;
  593. led->cdev.default_trigger = mainstone_leds[i].trigger;
  594. led->mask = BIT(i);
  595. if (led_classdev_register(NULL, &led->cdev) < 0) {
  596. kfree(led);
  597. break;
  598. }
  599. }
  600. return 0;
  601. }
  602. /*
  603. * Since we may have triggers on any subsystem, defer registration
  604. * until after subsystem_init.
  605. */
  606. fs_initcall(mainstone_leds_init);
  607. #endif
  608. MACHINE_START(MAINSTONE, "Intel HCDDBBVA0 Development Platform (aka Mainstone)")
  609. /* Maintainer: MontaVista Software Inc. */
  610. .atag_offset = 0x100, /* BLOB boot parameter setting */
  611. .map_io = mainstone_map_io,
  612. .nr_irqs = MAINSTONE_NR_IRQS,
  613. .init_irq = mainstone_init_irq,
  614. .handle_irq = pxa27x_handle_irq,
  615. .init_time = pxa_timer_init,
  616. .init_machine = mainstone_init,
  617. .restart = pxa_restart,
  618. MACHINE_END