board-zoom.c 4.4 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159
  1. /*
  2. * Copyright (C) 2009-2010 Texas Instruments Inc.
  3. * Mikkel Christensen <mlc@ti.com>
  4. * Felipe Balbi <balbi@ti.com>
  5. *
  6. * Modified from mach-omap2/board-ldp.c
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/kernel.h>
  13. #include <linux/init.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/input.h>
  16. #include <linux/gpio.h>
  17. #include <linux/i2c/twl.h>
  18. #include <linux/mtd/nand.h>
  19. #include <asm/mach-types.h>
  20. #include <asm/mach/arch.h>
  21. #include "common.h"
  22. #include "board-zoom.h"
  23. #include "board-flash.h"
  24. #include "mux.h"
  25. #include "sdram-micron-mt46h32m32lf-6.h"
  26. #include "sdram-hynix-h8mbx00u0mer-0em.h"
  27. #define ZOOM3_EHCI_RESET_GPIO 64
  28. #ifdef CONFIG_OMAP_MUX
  29. static struct omap_board_mux board_mux[] __initdata = {
  30. /* WLAN IRQ - GPIO 162 */
  31. OMAP3_MUX(MCBSP1_CLKX, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
  32. /* WLAN POWER ENABLE - GPIO 101 */
  33. OMAP3_MUX(CAM_D2, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
  34. /* WLAN SDIO: MMC3 CMD */
  35. OMAP3_MUX(MCSPI1_CS1, OMAP_MUX_MODE3 | OMAP_PIN_INPUT_PULLUP),
  36. /* WLAN SDIO: MMC3 CLK */
  37. OMAP3_MUX(ETK_CLK, OMAP_MUX_MODE2 | OMAP_PIN_INPUT_PULLUP),
  38. /* WLAN SDIO: MMC3 DAT[0-3] */
  39. OMAP3_MUX(ETK_D3, OMAP_MUX_MODE2 | OMAP_PIN_INPUT_PULLUP),
  40. OMAP3_MUX(ETK_D4, OMAP_MUX_MODE2 | OMAP_PIN_INPUT_PULLUP),
  41. OMAP3_MUX(ETK_D5, OMAP_MUX_MODE2 | OMAP_PIN_INPUT_PULLUP),
  42. OMAP3_MUX(ETK_D6, OMAP_MUX_MODE2 | OMAP_PIN_INPUT_PULLUP),
  43. { .reg_offset = OMAP_MUX_TERMINATOR },
  44. };
  45. #endif
  46. static struct mtd_partition zoom_nand_partitions[] = {
  47. /* All the partition sizes are listed in terms of NAND block size */
  48. {
  49. .name = "X-Loader-NAND",
  50. .offset = 0,
  51. .size = 4 * (64 * 2048), /* 512KB, 0x80000 */
  52. .mask_flags = MTD_WRITEABLE, /* force read-only */
  53. },
  54. {
  55. .name = "U-Boot-NAND",
  56. .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
  57. .size = 10 * (64 * 2048), /* 1.25MB, 0x140000 */
  58. .mask_flags = MTD_WRITEABLE, /* force read-only */
  59. },
  60. {
  61. .name = "Boot Env-NAND",
  62. .offset = MTDPART_OFS_APPEND, /* Offset = 0x1c0000 */
  63. .size = 2 * (64 * 2048), /* 256KB, 0x40000 */
  64. },
  65. {
  66. .name = "Kernel-NAND",
  67. .offset = MTDPART_OFS_APPEND, /* Offset = 0x0200000*/
  68. .size = 240 * (64 * 2048), /* 30M, 0x1E00000 */
  69. },
  70. {
  71. .name = "system",
  72. .offset = MTDPART_OFS_APPEND, /* Offset = 0x2000000 */
  73. .size = 3328 * (64 * 2048), /* 416M, 0x1A000000 */
  74. },
  75. {
  76. .name = "userdata",
  77. .offset = MTDPART_OFS_APPEND, /* Offset = 0x1C000000*/
  78. .size = 256 * (64 * 2048), /* 32M, 0x2000000 */
  79. },
  80. {
  81. .name = "cache",
  82. .offset = MTDPART_OFS_APPEND, /* Offset = 0x1E000000*/
  83. .size = 256 * (64 * 2048), /* 32M, 0x2000000 */
  84. },
  85. };
  86. static struct usbhs_phy_data phy_data[] __initdata = {
  87. {
  88. .port = 2,
  89. .reset_gpio = ZOOM3_EHCI_RESET_GPIO,
  90. .vcc_gpio = -EINVAL,
  91. },
  92. };
  93. static struct usbhs_omap_platform_data usbhs_bdata __initdata = {
  94. .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
  95. };
  96. static void __init omap_zoom_init(void)
  97. {
  98. if (machine_is_omap_zoom2()) {
  99. omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
  100. } else if (machine_is_omap_zoom3()) {
  101. omap3_mux_init(board_mux, OMAP_PACKAGE_CBP);
  102. omap_mux_init_gpio(ZOOM3_EHCI_RESET_GPIO, OMAP_PIN_OUTPUT);
  103. usbhs_init_phys(phy_data, ARRAY_SIZE(phy_data));
  104. usbhs_init(&usbhs_bdata);
  105. }
  106. board_nand_init(zoom_nand_partitions,
  107. ARRAY_SIZE(zoom_nand_partitions), ZOOM_NAND_CS,
  108. NAND_BUSWIDTH_16, nand_default_timings);
  109. zoom_debugboard_init();
  110. zoom_peripherals_init();
  111. if (machine_is_omap_zoom2())
  112. omap_sdrc_init(mt46h32m32lf6_sdrc_params,
  113. mt46h32m32lf6_sdrc_params);
  114. else if (machine_is_omap_zoom3())
  115. omap_sdrc_init(h8mbx00u0mer0em_sdrc_params,
  116. h8mbx00u0mer0em_sdrc_params);
  117. zoom_display_init();
  118. }
  119. MACHINE_START(OMAP_ZOOM2, "OMAP Zoom2 board")
  120. .atag_offset = 0x100,
  121. .reserve = omap_reserve,
  122. .map_io = omap3_map_io,
  123. .init_early = omap3430_init_early,
  124. .init_irq = omap3_init_irq,
  125. .handle_irq = omap3_intc_handle_irq,
  126. .init_machine = omap_zoom_init,
  127. .init_late = omap3430_init_late,
  128. .init_time = omap3_sync32k_timer_init,
  129. .restart = omap3xxx_restart,
  130. MACHINE_END
  131. MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board")
  132. .atag_offset = 0x100,
  133. .reserve = omap_reserve,
  134. .map_io = omap3_map_io,
  135. .init_early = omap3630_init_early,
  136. .init_irq = omap3_init_irq,
  137. .handle_irq = omap3_intc_handle_irq,
  138. .init_machine = omap_zoom_init,
  139. .init_late = omap3630_init_late,
  140. .init_time = omap3_sync32k_timer_init,
  141. .restart = omap3xxx_restart,
  142. MACHINE_END