board-3430sdp.c 15 KB

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  1. /*
  2. * linux/arch/arm/mach-omap2/board-3430sdp.c
  3. *
  4. * Copyright (C) 2007 Texas Instruments
  5. *
  6. * Modified from mach-omap2/board-generic.c
  7. *
  8. * Initial code: Syed Mohammed Khasim
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/init.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/delay.h>
  18. #include <linux/input.h>
  19. #include <linux/input/matrix_keypad.h>
  20. #include <linux/spi/spi.h>
  21. #include <linux/i2c/twl.h>
  22. #include <linux/regulator/machine.h>
  23. #include <linux/io.h>
  24. #include <linux/gpio.h>
  25. #include <linux/mmc/host.h>
  26. #include <linux/platform_data/spi-omap2-mcspi.h>
  27. #include <linux/platform_data/omap-twl4030.h>
  28. #include <linux/usb/phy.h>
  29. #include <asm/mach-types.h>
  30. #include <asm/mach/arch.h>
  31. #include <asm/mach/map.h>
  32. #include "common.h"
  33. #include <linux/omap-dma.h>
  34. #include <video/omapdss.h>
  35. #include <video/omap-panel-data.h>
  36. #include "gpmc.h"
  37. #include "gpmc-smc91x.h"
  38. #include "soc.h"
  39. #include "board-flash.h"
  40. #include "mux.h"
  41. #include "sdram-qimonda-hyb18m512160af-6.h"
  42. #include "hsmmc.h"
  43. #include "pm.h"
  44. #include "control.h"
  45. #include "common-board-devices.h"
  46. #define CONFIG_DISABLE_HFCLK 1
  47. #define SDP3430_TS_GPIO_IRQ_SDPV1 3
  48. #define SDP3430_TS_GPIO_IRQ_SDPV2 2
  49. #define ENABLE_VAUX3_DEDICATED 0x03
  50. #define ENABLE_VAUX3_DEV_GRP 0x20
  51. #define TWL4030_MSECURE_GPIO 22
  52. static uint32_t board_keymap[] = {
  53. KEY(0, 0, KEY_LEFT),
  54. KEY(0, 1, KEY_RIGHT),
  55. KEY(0, 2, KEY_A),
  56. KEY(0, 3, KEY_B),
  57. KEY(0, 4, KEY_C),
  58. KEY(1, 0, KEY_DOWN),
  59. KEY(1, 1, KEY_UP),
  60. KEY(1, 2, KEY_E),
  61. KEY(1, 3, KEY_F),
  62. KEY(1, 4, KEY_G),
  63. KEY(2, 0, KEY_ENTER),
  64. KEY(2, 1, KEY_I),
  65. KEY(2, 2, KEY_J),
  66. KEY(2, 3, KEY_K),
  67. KEY(2, 4, KEY_3),
  68. KEY(3, 0, KEY_M),
  69. KEY(3, 1, KEY_N),
  70. KEY(3, 2, KEY_O),
  71. KEY(3, 3, KEY_P),
  72. KEY(3, 4, KEY_Q),
  73. KEY(4, 0, KEY_R),
  74. KEY(4, 1, KEY_4),
  75. KEY(4, 2, KEY_T),
  76. KEY(4, 3, KEY_U),
  77. KEY(4, 4, KEY_D),
  78. KEY(5, 0, KEY_V),
  79. KEY(5, 1, KEY_W),
  80. KEY(5, 2, KEY_L),
  81. KEY(5, 3, KEY_S),
  82. KEY(5, 4, KEY_H),
  83. 0
  84. };
  85. static struct matrix_keymap_data board_map_data = {
  86. .keymap = board_keymap,
  87. .keymap_size = ARRAY_SIZE(board_keymap),
  88. };
  89. static struct twl4030_keypad_data sdp3430_kp_data = {
  90. .keymap_data = &board_map_data,
  91. .rows = 5,
  92. .cols = 6,
  93. .rep = 1,
  94. };
  95. #define SDP3430_LCD_PANEL_BACKLIGHT_GPIO 8
  96. #define SDP3430_LCD_PANEL_ENABLE_GPIO 5
  97. static void __init sdp3430_display_init(void)
  98. {
  99. int r;
  100. /*
  101. * the backlight GPIO doesn't directly go to the panel, it enables
  102. * an internal circuit on 3430sdp to create the signal V_BKL_28V,
  103. * this is connected to LED+ pin of the sharp panel. This GPIO
  104. * is left enabled in the board file, and not passed to the panel
  105. * as platform_data.
  106. */
  107. r = gpio_request_one(SDP3430_LCD_PANEL_BACKLIGHT_GPIO,
  108. GPIOF_OUT_INIT_HIGH, "LCD Backlight");
  109. if (r)
  110. pr_err("failed to get LCD Backlight GPIO\n");
  111. }
  112. static struct panel_sharp_ls037v7dw01_data sdp3430_lcd_data = {
  113. .resb_gpio = SDP3430_LCD_PANEL_ENABLE_GPIO,
  114. .ini_gpio = -1,
  115. .mo_gpio = -1,
  116. .lr_gpio = -1,
  117. .ud_gpio = -1,
  118. };
  119. static struct omap_dss_device sdp3430_lcd_device = {
  120. .name = "lcd",
  121. .driver_name = "sharp_ls_panel",
  122. .type = OMAP_DISPLAY_TYPE_DPI,
  123. .phy.dpi.data_lines = 16,
  124. .data = &sdp3430_lcd_data,
  125. };
  126. static struct tfp410_platform_data dvi_panel = {
  127. .power_down_gpio = -1,
  128. .i2c_bus_num = -1,
  129. };
  130. static struct omap_dss_device sdp3430_dvi_device = {
  131. .name = "dvi",
  132. .type = OMAP_DISPLAY_TYPE_DPI,
  133. .driver_name = "tfp410",
  134. .data = &dvi_panel,
  135. .phy.dpi.data_lines = 24,
  136. };
  137. static struct omap_dss_device sdp3430_tv_device = {
  138. .name = "tv",
  139. .driver_name = "venc",
  140. .type = OMAP_DISPLAY_TYPE_VENC,
  141. .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
  142. };
  143. static struct omap_dss_device *sdp3430_dss_devices[] = {
  144. &sdp3430_lcd_device,
  145. &sdp3430_dvi_device,
  146. &sdp3430_tv_device,
  147. };
  148. static struct omap_dss_board_info sdp3430_dss_data = {
  149. .num_devices = ARRAY_SIZE(sdp3430_dss_devices),
  150. .devices = sdp3430_dss_devices,
  151. .default_device = &sdp3430_lcd_device,
  152. };
  153. static struct omap2_hsmmc_info mmc[] = {
  154. {
  155. .mmc = 1,
  156. /* 8 bits (default) requires S6.3 == ON,
  157. * so the SIM card isn't used; else 4 bits.
  158. */
  159. .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
  160. .gpio_wp = 4,
  161. .deferred = true,
  162. },
  163. {
  164. .mmc = 2,
  165. .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
  166. .gpio_wp = 7,
  167. .deferred = true,
  168. },
  169. {} /* Terminator */
  170. };
  171. static struct omap_tw4030_pdata omap_twl4030_audio_data = {
  172. .voice_connected = true,
  173. .custom_routing = true,
  174. .has_hs = OMAP_TWL4030_LEFT | OMAP_TWL4030_RIGHT,
  175. .has_hf = OMAP_TWL4030_LEFT | OMAP_TWL4030_RIGHT,
  176. .has_mainmic = true,
  177. .has_submic = true,
  178. .has_hsmic = true,
  179. .has_linein = OMAP_TWL4030_LEFT | OMAP_TWL4030_RIGHT,
  180. };
  181. static int sdp3430_twl_gpio_setup(struct device *dev,
  182. unsigned gpio, unsigned ngpio)
  183. {
  184. /* gpio + 0 is "mmc0_cd" (input/IRQ),
  185. * gpio + 1 is "mmc1_cd" (input/IRQ)
  186. */
  187. mmc[0].gpio_cd = gpio + 0;
  188. mmc[1].gpio_cd = gpio + 1;
  189. omap_hsmmc_late_init(mmc);
  190. /* gpio + 7 is "sub_lcd_en_bkl" (output/PWM1) */
  191. gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "sub_lcd_en_bkl");
  192. /* gpio + 15 is "sub_lcd_nRST" (output) */
  193. gpio_request_one(gpio + 15, GPIOF_OUT_INIT_LOW, "sub_lcd_nRST");
  194. omap_twl4030_audio_data.jack_detect = gpio + 2;
  195. omap_twl4030_audio_init("SDP3430", &omap_twl4030_audio_data);
  196. return 0;
  197. }
  198. static struct twl4030_gpio_platform_data sdp3430_gpio_data = {
  199. .pulldowns = BIT(2) | BIT(6) | BIT(8) | BIT(13)
  200. | BIT(16) | BIT(17),
  201. .setup = sdp3430_twl_gpio_setup,
  202. };
  203. /* regulator consumer mappings */
  204. /* ads7846 on SPI */
  205. static struct regulator_consumer_supply sdp3430_vaux3_supplies[] = {
  206. REGULATOR_SUPPLY("vcc", "spi1.0"),
  207. };
  208. static struct regulator_consumer_supply sdp3430_vmmc1_supplies[] = {
  209. REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
  210. };
  211. static struct regulator_consumer_supply sdp3430_vsim_supplies[] = {
  212. REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
  213. };
  214. static struct regulator_consumer_supply sdp3430_vmmc2_supplies[] = {
  215. REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
  216. };
  217. /*
  218. * Apply all the fixed voltages since most versions of U-Boot
  219. * don't bother with that initialization.
  220. */
  221. /* VAUX1 for mainboard (irda and sub-lcd) */
  222. static struct regulator_init_data sdp3430_vaux1 = {
  223. .constraints = {
  224. .min_uV = 2800000,
  225. .max_uV = 2800000,
  226. .apply_uV = true,
  227. .valid_modes_mask = REGULATOR_MODE_NORMAL
  228. | REGULATOR_MODE_STANDBY,
  229. .valid_ops_mask = REGULATOR_CHANGE_MODE
  230. | REGULATOR_CHANGE_STATUS,
  231. },
  232. };
  233. /* VAUX2 for camera module */
  234. static struct regulator_init_data sdp3430_vaux2 = {
  235. .constraints = {
  236. .min_uV = 2800000,
  237. .max_uV = 2800000,
  238. .apply_uV = true,
  239. .valid_modes_mask = REGULATOR_MODE_NORMAL
  240. | REGULATOR_MODE_STANDBY,
  241. .valid_ops_mask = REGULATOR_CHANGE_MODE
  242. | REGULATOR_CHANGE_STATUS,
  243. },
  244. };
  245. /* VAUX3 for LCD board */
  246. static struct regulator_init_data sdp3430_vaux3 = {
  247. .constraints = {
  248. .min_uV = 2800000,
  249. .max_uV = 2800000,
  250. .apply_uV = true,
  251. .valid_modes_mask = REGULATOR_MODE_NORMAL
  252. | REGULATOR_MODE_STANDBY,
  253. .valid_ops_mask = REGULATOR_CHANGE_MODE
  254. | REGULATOR_CHANGE_STATUS,
  255. },
  256. .num_consumer_supplies = ARRAY_SIZE(sdp3430_vaux3_supplies),
  257. .consumer_supplies = sdp3430_vaux3_supplies,
  258. };
  259. /* VAUX4 for OMAP VDD_CSI2 (camera) */
  260. static struct regulator_init_data sdp3430_vaux4 = {
  261. .constraints = {
  262. .min_uV = 1800000,
  263. .max_uV = 1800000,
  264. .apply_uV = true,
  265. .valid_modes_mask = REGULATOR_MODE_NORMAL
  266. | REGULATOR_MODE_STANDBY,
  267. .valid_ops_mask = REGULATOR_CHANGE_MODE
  268. | REGULATOR_CHANGE_STATUS,
  269. },
  270. };
  271. /* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */
  272. static struct regulator_init_data sdp3430_vmmc1 = {
  273. .constraints = {
  274. .min_uV = 1850000,
  275. .max_uV = 3150000,
  276. .valid_modes_mask = REGULATOR_MODE_NORMAL
  277. | REGULATOR_MODE_STANDBY,
  278. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
  279. | REGULATOR_CHANGE_MODE
  280. | REGULATOR_CHANGE_STATUS,
  281. },
  282. .num_consumer_supplies = ARRAY_SIZE(sdp3430_vmmc1_supplies),
  283. .consumer_supplies = sdp3430_vmmc1_supplies,
  284. };
  285. /* VMMC2 for MMC2 card */
  286. static struct regulator_init_data sdp3430_vmmc2 = {
  287. .constraints = {
  288. .min_uV = 1850000,
  289. .max_uV = 1850000,
  290. .apply_uV = true,
  291. .valid_modes_mask = REGULATOR_MODE_NORMAL
  292. | REGULATOR_MODE_STANDBY,
  293. .valid_ops_mask = REGULATOR_CHANGE_MODE
  294. | REGULATOR_CHANGE_STATUS,
  295. },
  296. .num_consumer_supplies = ARRAY_SIZE(sdp3430_vmmc2_supplies),
  297. .consumer_supplies = sdp3430_vmmc2_supplies,
  298. };
  299. /* VSIM for OMAP VDD_MMC1A (i/o for DAT4..DAT7) */
  300. static struct regulator_init_data sdp3430_vsim = {
  301. .constraints = {
  302. .min_uV = 1800000,
  303. .max_uV = 3000000,
  304. .valid_modes_mask = REGULATOR_MODE_NORMAL
  305. | REGULATOR_MODE_STANDBY,
  306. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
  307. | REGULATOR_CHANGE_MODE
  308. | REGULATOR_CHANGE_STATUS,
  309. },
  310. .num_consumer_supplies = ARRAY_SIZE(sdp3430_vsim_supplies),
  311. .consumer_supplies = sdp3430_vsim_supplies,
  312. };
  313. static struct twl4030_platform_data sdp3430_twldata = {
  314. /* platform_data for children goes here */
  315. .gpio = &sdp3430_gpio_data,
  316. .keypad = &sdp3430_kp_data,
  317. .vaux1 = &sdp3430_vaux1,
  318. .vaux2 = &sdp3430_vaux2,
  319. .vaux3 = &sdp3430_vaux3,
  320. .vaux4 = &sdp3430_vaux4,
  321. .vmmc1 = &sdp3430_vmmc1,
  322. .vmmc2 = &sdp3430_vmmc2,
  323. .vsim = &sdp3430_vsim,
  324. };
  325. static int __init omap3430_i2c_init(void)
  326. {
  327. /* i2c1 for PMIC only */
  328. omap3_pmic_get_config(&sdp3430_twldata,
  329. TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_BCI |
  330. TWL_COMMON_PDATA_MADC | TWL_COMMON_PDATA_AUDIO,
  331. TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
  332. sdp3430_twldata.vdac->constraints.apply_uV = true;
  333. sdp3430_twldata.vpll2->constraints.apply_uV = true;
  334. sdp3430_twldata.vpll2->constraints.name = "VDVI";
  335. sdp3430_twldata.audio->codec->hs_extmute = 1;
  336. sdp3430_twldata.audio->codec->hs_extmute_gpio = -EINVAL;
  337. omap3_pmic_init("twl4030", &sdp3430_twldata);
  338. /* i2c2 on camera connector (for sensor control) and optional isp1301 */
  339. omap_register_i2c_bus(2, 400, NULL, 0);
  340. /* i2c3 on display connector (for DVI, tfp410) */
  341. omap_register_i2c_bus(3, 400, NULL, 0);
  342. return 0;
  343. }
  344. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  345. static struct omap_smc91x_platform_data board_smc91x_data = {
  346. .cs = 3,
  347. .flags = GPMC_MUX_ADD_DATA | GPMC_TIMINGS_SMC91C96 |
  348. IORESOURCE_IRQ_LOWLEVEL,
  349. };
  350. static void __init board_smc91x_init(void)
  351. {
  352. if (omap_rev() > OMAP3430_REV_ES1_0)
  353. board_smc91x_data.gpio_irq = 6;
  354. else
  355. board_smc91x_data.gpio_irq = 29;
  356. gpmc_smc91x_init(&board_smc91x_data);
  357. }
  358. #else
  359. static inline void board_smc91x_init(void)
  360. {
  361. }
  362. #endif
  363. static void enable_board_wakeup_source(void)
  364. {
  365. /* T2 interrupt line (keypad) */
  366. omap_mux_init_signal("sys_nirq",
  367. OMAP_WAKEUP_EN | OMAP_PIN_INPUT_PULLUP);
  368. }
  369. static struct usbhs_phy_data phy_data[] __initdata = {
  370. {
  371. .port = 1,
  372. .reset_gpio = 57,
  373. .vcc_gpio = -EINVAL,
  374. },
  375. {
  376. .port = 2,
  377. .reset_gpio = 61,
  378. .vcc_gpio = -EINVAL,
  379. },
  380. };
  381. static struct usbhs_omap_platform_data usbhs_bdata __initdata = {
  382. .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
  383. .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
  384. };
  385. #ifdef CONFIG_OMAP_MUX
  386. static struct omap_board_mux board_mux[] __initdata = {
  387. { .reg_offset = OMAP_MUX_TERMINATOR },
  388. };
  389. #else
  390. #define board_mux NULL
  391. #endif
  392. /*
  393. * SDP3430 V2 Board CS organization
  394. * Different from SDP3430 V1. Now 4 switches used to specify CS
  395. *
  396. * See also the Switch S8 settings in the comments.
  397. */
  398. static char chip_sel_3430[][GPMC_CS_NUM] = {
  399. {PDC_NOR, PDC_NAND, PDC_ONENAND, DBG_MPDB, 0, 0, 0, 0}, /* S8:1111 */
  400. {PDC_ONENAND, PDC_NAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1110 */
  401. {PDC_NAND, PDC_ONENAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1101 */
  402. };
  403. static struct mtd_partition sdp_nor_partitions[] = {
  404. /* bootloader (U-Boot, etc) in first sector */
  405. {
  406. .name = "Bootloader-NOR",
  407. .offset = 0,
  408. .size = SZ_256K,
  409. .mask_flags = MTD_WRITEABLE, /* force read-only */
  410. },
  411. /* bootloader params in the next sector */
  412. {
  413. .name = "Params-NOR",
  414. .offset = MTDPART_OFS_APPEND,
  415. .size = SZ_256K,
  416. .mask_flags = 0,
  417. },
  418. /* kernel */
  419. {
  420. .name = "Kernel-NOR",
  421. .offset = MTDPART_OFS_APPEND,
  422. .size = SZ_2M,
  423. .mask_flags = 0
  424. },
  425. /* file system */
  426. {
  427. .name = "Filesystem-NOR",
  428. .offset = MTDPART_OFS_APPEND,
  429. .size = MTDPART_SIZ_FULL,
  430. .mask_flags = 0
  431. }
  432. };
  433. static struct mtd_partition sdp_onenand_partitions[] = {
  434. {
  435. .name = "X-Loader-OneNAND",
  436. .offset = 0,
  437. .size = 4 * (64 * 2048),
  438. .mask_flags = MTD_WRITEABLE /* force read-only */
  439. },
  440. {
  441. .name = "U-Boot-OneNAND",
  442. .offset = MTDPART_OFS_APPEND,
  443. .size = 2 * (64 * 2048),
  444. .mask_flags = MTD_WRITEABLE /* force read-only */
  445. },
  446. {
  447. .name = "U-Boot Environment-OneNAND",
  448. .offset = MTDPART_OFS_APPEND,
  449. .size = 1 * (64 * 2048),
  450. },
  451. {
  452. .name = "Kernel-OneNAND",
  453. .offset = MTDPART_OFS_APPEND,
  454. .size = 16 * (64 * 2048),
  455. },
  456. {
  457. .name = "File System-OneNAND",
  458. .offset = MTDPART_OFS_APPEND,
  459. .size = MTDPART_SIZ_FULL,
  460. },
  461. };
  462. static struct mtd_partition sdp_nand_partitions[] = {
  463. /* All the partition sizes are listed in terms of NAND block size */
  464. {
  465. .name = "X-Loader-NAND",
  466. .offset = 0,
  467. .size = 4 * (64 * 2048),
  468. .mask_flags = MTD_WRITEABLE, /* force read-only */
  469. },
  470. {
  471. .name = "U-Boot-NAND",
  472. .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
  473. .size = 10 * (64 * 2048),
  474. .mask_flags = MTD_WRITEABLE, /* force read-only */
  475. },
  476. {
  477. .name = "Boot Env-NAND",
  478. .offset = MTDPART_OFS_APPEND, /* Offset = 0x1c0000 */
  479. .size = 6 * (64 * 2048),
  480. },
  481. {
  482. .name = "Kernel-NAND",
  483. .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */
  484. .size = 40 * (64 * 2048),
  485. },
  486. {
  487. .name = "File System - NAND",
  488. .size = MTDPART_SIZ_FULL,
  489. .offset = MTDPART_OFS_APPEND, /* Offset = 0x780000 */
  490. },
  491. };
  492. static struct flash_partitions sdp_flash_partitions[] = {
  493. {
  494. .parts = sdp_nor_partitions,
  495. .nr_parts = ARRAY_SIZE(sdp_nor_partitions),
  496. },
  497. {
  498. .parts = sdp_onenand_partitions,
  499. .nr_parts = ARRAY_SIZE(sdp_onenand_partitions),
  500. },
  501. {
  502. .parts = sdp_nand_partitions,
  503. .nr_parts = ARRAY_SIZE(sdp_nand_partitions),
  504. },
  505. };
  506. static void __init omap_3430sdp_init(void)
  507. {
  508. int gpio_pendown;
  509. omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
  510. omap_hsmmc_init(mmc);
  511. omap3430_i2c_init();
  512. omap_display_init(&sdp3430_dss_data);
  513. if (omap_rev() > OMAP3430_REV_ES1_0)
  514. gpio_pendown = SDP3430_TS_GPIO_IRQ_SDPV2;
  515. else
  516. gpio_pendown = SDP3430_TS_GPIO_IRQ_SDPV1;
  517. omap_ads7846_init(1, gpio_pendown, 310, NULL);
  518. omap_serial_init();
  519. omap_sdrc_init(hyb18m512160af6_sdrc_params, NULL);
  520. usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb");
  521. usb_musb_init(NULL);
  522. board_smc91x_init();
  523. board_flash_init(sdp_flash_partitions, chip_sel_3430, 0);
  524. sdp3430_display_init();
  525. enable_board_wakeup_source();
  526. usbhs_init_phys(phy_data, ARRAY_SIZE(phy_data));
  527. usbhs_init(&usbhs_bdata);
  528. }
  529. MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board")
  530. /* Maintainer: Syed Khasim - Texas Instruments Inc */
  531. .atag_offset = 0x100,
  532. .reserve = omap_reserve,
  533. .map_io = omap3_map_io,
  534. .init_early = omap3430_init_early,
  535. .init_irq = omap3_init_irq,
  536. .handle_irq = omap3_intc_handle_irq,
  537. .init_machine = omap_3430sdp_init,
  538. .init_late = omap3430_init_late,
  539. .init_time = omap3_sync32k_timer_init,
  540. .restart = omap3xxx_restart,
  541. MACHINE_END