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arch
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arm
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mach-exynos
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include
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mach
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map.h

map.h 2.1 KB
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  1. /* linux/arch/arm/mach-exynos/include/mach/map.h
    2. 

  2.  *
    3. 

  3.  * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
    4. 

  4.  *		http://www.samsung.com/
    5. 

  5.  *
    6. 

  6.  * EXYNOS4 - Memory map definitions
    7. 

  7.  *
    8. 

  8.  * This program is free software; you can redistribute it and/or modify
    9. 

  9.  * it under the terms of the GNU General Public License version 2 as
    10. 

  10.  * published by the Free Software Foundation.
    11. 

  11. */
    12. 

  12. 

  13. #ifndef __ASM_ARCH_MAP_H
    14. 

  14. #define __ASM_ARCH_MAP_H __FILE__
    15. 

  15. 

  16. #include <plat/map-base.h>
    17. 

  17. 

  18. /*
    19. 

  19.  * EXYNOS4 UART offset is 0x10000 but the older S5P SoCs are 0x400.
    20. 

  20.  * So need to define it, and here is to avoid redefinition warning.
    21. 

  21.  */
    22. 

  22. #define S3C_UART_OFFSET			(0x10000)
    23. 

  23. 

  24. #include <plat/map-s5p.h>
    25. 

  25. 

  26. #define EXYNOS4_PA_SYSRAM0		0x02025000
    27. 

  27. #define EXYNOS4_PA_SYSRAM1		0x02020000
    28. 

  28. #define EXYNOS5_PA_SYSRAM		0x02020000
    29. 

  29. #define EXYNOS4210_PA_SYSRAM_NS		0x0203F000
    30. 

  30. #define EXYNOS4x12_PA_SYSRAM_NS		0x0204F000
    31. 

  31. #define EXYNOS5250_PA_SYSRAM_NS		0x0204F000
    32. 

  32. 

  33. #define EXYNOS_PA_CHIPID		0x10000000
    34. 

  34. 

  35. #define EXYNOS4_PA_SYSCON		0x10010000
    36. 

  36. #define EXYNOS5_PA_SYSCON		0x10050100
    37. 

  37. 

  38. #define EXYNOS4_PA_PMU			0x10020000
    39. 

  39. #define EXYNOS5_PA_PMU			0x10040000
    40. 

  40. 

  41. #define EXYNOS4_PA_CMU			0x10030000
    42. 

  42. #define EXYNOS5_PA_CMU			0x10010000
    43. 

  43. 

  44. #define EXYNOS4_PA_SYSTIMER		0x10050000
    45. 

  45. 

  46. #define EXYNOS4_PA_WATCHDOG		0x10060000
    47. 

  47. #define EXYNOS5_PA_WATCHDOG		0x101D0000
    48. 

  48. 

  49. #define EXYNOS4_PA_DMC0			0x10400000
    50. 

  50. #define EXYNOS4_PA_DMC1			0x10410000
    51. 

  51. 

  52. #define EXYNOS4_PA_COMBINER		0x10440000
    53. 

  53. #define EXYNOS5_PA_COMBINER		0x10440000
    54. 

  54. 

  55. #define EXYNOS4_PA_GIC_CPU		0x10480000
    56. 

  56. #define EXYNOS4_PA_GIC_DIST		0x10490000
    57. 

  57. #define EXYNOS5_PA_GIC_CPU		0x10482000
    58. 

  58. #define EXYNOS5_PA_GIC_DIST		0x10481000
    59. 

  59. 

  60. #define EXYNOS4_PA_COREPERI		0x10500000
    61. 

  61. #define EXYNOS4_PA_L2CC			0x10502000
    62. 

  62. 

  63. #define EXYNOS4_PA_SROMC		0x12570000
    64. 

  64. #define EXYNOS5_PA_SROMC		0x12250000
    65. 

  65. 

  66. #define EXYNOS4_PA_HSPHY		0x125B0000
    67. 

  67. 

  68. #define EXYNOS4_PA_UART			0x13800000
    69. 

  69. #define EXYNOS5_PA_UART			0x12C00000
    70. 

  70. 

  71. #define EXYNOS4_PA_TIMER		0x139D0000
    72. 

  72. #define EXYNOS5_PA_TIMER		0x12DD0000
    73. 

  73. 

  74. /* Compatibility UART */
    75. 

  75. 

  76. #define EXYNOS5440_PA_UART0		0x000B0000
    77. 

  77. 

  78. #define S3C_VA_UARTx(x)			(S3C_VA_UART + ((x) * S3C_UART_OFFSET))
    79. 

  79. 

  80. #endif /* __ASM_ARCH_MAP_H */
    81.