devices.c 8.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350
  1. /*
  2. * mach-davinci/devices.c
  3. *
  4. * DaVinci platform device setup/initialization
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. */
  11. #include <linux/init.h>
  12. #include <linux/platform_device.h>
  13. #include <linux/dma-mapping.h>
  14. #include <linux/io.h>
  15. #include <linux/reboot.h>
  16. #include <mach/hardware.h>
  17. #include <linux/platform_data/i2c-davinci.h>
  18. #include <mach/irqs.h>
  19. #include <mach/cputype.h>
  20. #include <mach/mux.h>
  21. #include <linux/platform_data/mmc-davinci.h>
  22. #include <mach/time.h>
  23. #include <linux/platform_data/edma.h>
  24. #include "davinci.h"
  25. #include "clock.h"
  26. #define DAVINCI_I2C_BASE 0x01C21000
  27. #define DAVINCI_ATA_BASE 0x01C66000
  28. #define DAVINCI_MMCSD0_BASE 0x01E10000
  29. #define DM355_MMCSD0_BASE 0x01E11000
  30. #define DM355_MMCSD1_BASE 0x01E00000
  31. #define DM365_MMCSD0_BASE 0x01D11000
  32. #define DM365_MMCSD1_BASE 0x01D00000
  33. #define DAVINCI_DMA_MMCRXEVT 26
  34. #define DAVINCI_DMA_MMCTXEVT 27
  35. void __iomem *davinci_sysmod_base;
  36. void davinci_map_sysmod(void)
  37. {
  38. davinci_sysmod_base = ioremap_nocache(DAVINCI_SYSTEM_MODULE_BASE,
  39. 0x800);
  40. /*
  41. * Throw a bug since a lot of board initialization code depends
  42. * on system module availability. ioremap() failing this early
  43. * need careful looking into anyway.
  44. */
  45. BUG_ON(!davinci_sysmod_base);
  46. }
  47. static struct resource i2c_resources[] = {
  48. {
  49. .start = DAVINCI_I2C_BASE,
  50. .end = DAVINCI_I2C_BASE + 0x40,
  51. .flags = IORESOURCE_MEM,
  52. },
  53. {
  54. .start = IRQ_I2C,
  55. .flags = IORESOURCE_IRQ,
  56. },
  57. };
  58. static struct platform_device davinci_i2c_device = {
  59. .name = "i2c_davinci",
  60. .id = 1,
  61. .num_resources = ARRAY_SIZE(i2c_resources),
  62. .resource = i2c_resources,
  63. };
  64. void __init davinci_init_i2c(struct davinci_i2c_platform_data *pdata)
  65. {
  66. if (cpu_is_davinci_dm644x())
  67. davinci_cfg_reg(DM644X_I2C);
  68. davinci_i2c_device.dev.platform_data = pdata;
  69. (void) platform_device_register(&davinci_i2c_device);
  70. }
  71. static struct resource ide_resources[] = {
  72. {
  73. .start = DAVINCI_ATA_BASE,
  74. .end = DAVINCI_ATA_BASE + 0x7ff,
  75. .flags = IORESOURCE_MEM,
  76. },
  77. {
  78. .start = IRQ_IDE,
  79. .end = IRQ_IDE,
  80. .flags = IORESOURCE_IRQ,
  81. },
  82. };
  83. static u64 ide_dma_mask = DMA_BIT_MASK(32);
  84. static struct platform_device ide_device = {
  85. .name = "palm_bk3710",
  86. .id = -1,
  87. .resource = ide_resources,
  88. .num_resources = ARRAY_SIZE(ide_resources),
  89. .dev = {
  90. .dma_mask = &ide_dma_mask,
  91. .coherent_dma_mask = DMA_BIT_MASK(32),
  92. },
  93. };
  94. void __init davinci_init_ide(void)
  95. {
  96. if (cpu_is_davinci_dm644x()) {
  97. davinci_cfg_reg(DM644X_HPIEN_DISABLE);
  98. davinci_cfg_reg(DM644X_ATAEN);
  99. davinci_cfg_reg(DM644X_HDIREN);
  100. } else if (cpu_is_davinci_dm646x()) {
  101. /* IRQ_DM646X_IDE is the same as IRQ_IDE */
  102. davinci_cfg_reg(DM646X_ATAEN);
  103. } else {
  104. WARN_ON(1);
  105. return;
  106. }
  107. platform_device_register(&ide_device);
  108. }
  109. #if IS_ENABLED(CONFIG_MMC_DAVINCI)
  110. static u64 mmcsd0_dma_mask = DMA_BIT_MASK(32);
  111. static struct resource mmcsd0_resources[] = {
  112. {
  113. /* different on dm355 */
  114. .start = DAVINCI_MMCSD0_BASE,
  115. .end = DAVINCI_MMCSD0_BASE + SZ_4K - 1,
  116. .flags = IORESOURCE_MEM,
  117. },
  118. /* IRQs: MMC/SD, then SDIO */
  119. {
  120. .start = IRQ_MMCINT,
  121. .flags = IORESOURCE_IRQ,
  122. }, {
  123. /* different on dm355 */
  124. .start = IRQ_SDIOINT,
  125. .flags = IORESOURCE_IRQ,
  126. },
  127. /* DMA channels: RX, then TX */
  128. {
  129. .start = EDMA_CTLR_CHAN(0, DAVINCI_DMA_MMCRXEVT),
  130. .flags = IORESOURCE_DMA,
  131. }, {
  132. .start = EDMA_CTLR_CHAN(0, DAVINCI_DMA_MMCTXEVT),
  133. .flags = IORESOURCE_DMA,
  134. },
  135. };
  136. static struct platform_device davinci_mmcsd0_device = {
  137. .name = "dm6441-mmc",
  138. .id = 0,
  139. .dev = {
  140. .dma_mask = &mmcsd0_dma_mask,
  141. .coherent_dma_mask = DMA_BIT_MASK(32),
  142. },
  143. .num_resources = ARRAY_SIZE(mmcsd0_resources),
  144. .resource = mmcsd0_resources,
  145. };
  146. static u64 mmcsd1_dma_mask = DMA_BIT_MASK(32);
  147. static struct resource mmcsd1_resources[] = {
  148. {
  149. .start = DM355_MMCSD1_BASE,
  150. .end = DM355_MMCSD1_BASE + SZ_4K - 1,
  151. .flags = IORESOURCE_MEM,
  152. },
  153. /* IRQs: MMC/SD, then SDIO */
  154. {
  155. .start = IRQ_DM355_MMCINT1,
  156. .flags = IORESOURCE_IRQ,
  157. }, {
  158. .start = IRQ_DM355_SDIOINT1,
  159. .flags = IORESOURCE_IRQ,
  160. },
  161. /* DMA channels: RX, then TX */
  162. {
  163. .start = EDMA_CTLR_CHAN(0, 30), /* rx */
  164. .flags = IORESOURCE_DMA,
  165. }, {
  166. .start = EDMA_CTLR_CHAN(0, 31), /* tx */
  167. .flags = IORESOURCE_DMA,
  168. },
  169. };
  170. static struct platform_device davinci_mmcsd1_device = {
  171. .name = "dm6441-mmc",
  172. .id = 1,
  173. .dev = {
  174. .dma_mask = &mmcsd1_dma_mask,
  175. .coherent_dma_mask = DMA_BIT_MASK(32),
  176. },
  177. .num_resources = ARRAY_SIZE(mmcsd1_resources),
  178. .resource = mmcsd1_resources,
  179. };
  180. void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
  181. {
  182. struct platform_device *pdev = NULL;
  183. if (WARN_ON(cpu_is_davinci_dm646x()))
  184. return;
  185. /* REVISIT: update PINMUX, ARM_IRQMUX, and EDMA_EVTMUX here too;
  186. * for example if MMCSD1 is used for SDIO, maybe DAT2 is unused.
  187. *
  188. * FIXME dm6441 (no MMC/SD), dm357 (one), and dm335 (two) are
  189. * not handled right here ...
  190. */
  191. switch (module) {
  192. case 1:
  193. if (cpu_is_davinci_dm355()) {
  194. /* REVISIT we may not need all these pins if e.g. this
  195. * is a hard-wired SDIO device...
  196. */
  197. davinci_cfg_reg(DM355_SD1_CMD);
  198. davinci_cfg_reg(DM355_SD1_CLK);
  199. davinci_cfg_reg(DM355_SD1_DATA0);
  200. davinci_cfg_reg(DM355_SD1_DATA1);
  201. davinci_cfg_reg(DM355_SD1_DATA2);
  202. davinci_cfg_reg(DM355_SD1_DATA3);
  203. } else if (cpu_is_davinci_dm365()) {
  204. /* Configure pull down control */
  205. unsigned v;
  206. v = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_PUPDCTL1));
  207. __raw_writel(v & ~0xfc0,
  208. DAVINCI_SYSMOD_VIRT(SYSMOD_PUPDCTL1));
  209. mmcsd1_resources[0].start = DM365_MMCSD1_BASE;
  210. mmcsd1_resources[0].end = DM365_MMCSD1_BASE +
  211. SZ_4K - 1;
  212. mmcsd1_resources[2].start = IRQ_DM365_SDIOINT1;
  213. davinci_mmcsd1_device.name = "da830-mmc";
  214. } else
  215. break;
  216. pdev = &davinci_mmcsd1_device;
  217. break;
  218. case 0:
  219. if (cpu_is_davinci_dm355()) {
  220. mmcsd0_resources[0].start = DM355_MMCSD0_BASE;
  221. mmcsd0_resources[0].end = DM355_MMCSD0_BASE + SZ_4K - 1;
  222. mmcsd0_resources[2].start = IRQ_DM355_SDIOINT0;
  223. /* expose all 6 MMC0 signals: CLK, CMD, DATA[0..3] */
  224. davinci_cfg_reg(DM355_MMCSD0);
  225. /* enable RX EDMA */
  226. davinci_cfg_reg(DM355_EVT26_MMC0_RX);
  227. } else if (cpu_is_davinci_dm365()) {
  228. mmcsd0_resources[0].start = DM365_MMCSD0_BASE;
  229. mmcsd0_resources[0].end = DM365_MMCSD0_BASE +
  230. SZ_4K - 1;
  231. mmcsd0_resources[2].start = IRQ_DM365_SDIOINT0;
  232. davinci_mmcsd0_device.name = "da830-mmc";
  233. } else if (cpu_is_davinci_dm644x()) {
  234. /* REVISIT: should this be in board-init code? */
  235. /* Power-on 3.3V IO cells */
  236. __raw_writel(0,
  237. DAVINCI_SYSMOD_VIRT(SYSMOD_VDD3P3VPWDN));
  238. /*Set up the pull regiter for MMC */
  239. davinci_cfg_reg(DM644X_MSTK);
  240. }
  241. pdev = &davinci_mmcsd0_device;
  242. break;
  243. }
  244. if (WARN_ON(!pdev))
  245. return;
  246. pdev->dev.platform_data = config;
  247. platform_device_register(pdev);
  248. }
  249. #else
  250. void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
  251. {
  252. }
  253. #endif
  254. /*-------------------------------------------------------------------------*/
  255. static struct resource wdt_resources[] = {
  256. {
  257. .start = DAVINCI_WDOG_BASE,
  258. .end = DAVINCI_WDOG_BASE + SZ_1K - 1,
  259. .flags = IORESOURCE_MEM,
  260. },
  261. };
  262. struct platform_device davinci_wdt_device = {
  263. .name = "watchdog",
  264. .id = -1,
  265. .num_resources = ARRAY_SIZE(wdt_resources),
  266. .resource = wdt_resources,
  267. };
  268. void davinci_restart(enum reboot_mode mode, const char *cmd)
  269. {
  270. davinci_watchdog_reset(&davinci_wdt_device);
  271. }
  272. static void davinci_init_wdt(void)
  273. {
  274. platform_device_register(&davinci_wdt_device);
  275. }
  276. /*-------------------------------------------------------------------------*/
  277. /*-------------------------------------------------------------------------*/
  278. struct davinci_timer_instance davinci_timer_instance[2] = {
  279. {
  280. .base = DAVINCI_TIMER0_BASE,
  281. .bottom_irq = IRQ_TINT0_TINT12,
  282. .top_irq = IRQ_TINT0_TINT34,
  283. },
  284. {
  285. .base = DAVINCI_TIMER1_BASE,
  286. .bottom_irq = IRQ_TINT1_TINT12,
  287. .top_irq = IRQ_TINT1_TINT34,
  288. },
  289. };
  290. /*-------------------------------------------------------------------------*/
  291. static int __init davinci_init_devices(void)
  292. {
  293. /* please keep these calls, and their implementations above,
  294. * in alphabetical order so they're easier to sort through.
  295. */
  296. davinci_init_wdt();
  297. return 0;
  298. }
  299. arch_initcall(davinci_init_devices);