cpu.h 6.3 KB

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  1. /*
  2. * arch/arm/mach-at91/include/mach/cpu.h
  3. *
  4. * Copyright (C) 2006 SAN People
  5. * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. */
  13. #ifndef __MACH_CPU_H__
  14. #define __MACH_CPU_H__
  15. #define ARCH_ID_AT91RM9200 0x09290780
  16. #define ARCH_ID_AT91SAM9260 0x019803a0
  17. #define ARCH_ID_AT91SAM9261 0x019703a0
  18. #define ARCH_ID_AT91SAM9263 0x019607a0
  19. #define ARCH_ID_AT91SAM9G10 0x019903a0
  20. #define ARCH_ID_AT91SAM9G20 0x019905a0
  21. #define ARCH_ID_AT91SAM9RL64 0x019b03a0
  22. #define ARCH_ID_AT91SAM9G45 0x819b05a0
  23. #define ARCH_ID_AT91SAM9G45MRL 0x819b05a2 /* aka 9G45-ES2 & non ES lots */
  24. #define ARCH_ID_AT91SAM9G45ES 0x819b05a1 /* 9G45-ES (Engineering Sample) */
  25. #define ARCH_ID_AT91SAM9X5 0x819a05a0
  26. #define ARCH_ID_AT91SAM9N12 0x819a07a0
  27. #define ARCH_ID_AT91SAM9XE128 0x329973a0
  28. #define ARCH_ID_AT91SAM9XE256 0x329a93a0
  29. #define ARCH_ID_AT91SAM9XE512 0x329aa3a0
  30. #define ARCH_ID_AT91M40800 0x14080044
  31. #define ARCH_ID_AT91R40807 0x44080746
  32. #define ARCH_ID_AT91M40807 0x14080745
  33. #define ARCH_ID_AT91R40008 0x44000840
  34. #define ARCH_ID_SAMA5D3 0x8A5C07C0
  35. #define ARCH_EXID_AT91SAM9M11 0x00000001
  36. #define ARCH_EXID_AT91SAM9M10 0x00000002
  37. #define ARCH_EXID_AT91SAM9G46 0x00000003
  38. #define ARCH_EXID_AT91SAM9G45 0x00000004
  39. #define ARCH_EXID_AT91SAM9G15 0x00000000
  40. #define ARCH_EXID_AT91SAM9G35 0x00000001
  41. #define ARCH_EXID_AT91SAM9X35 0x00000002
  42. #define ARCH_EXID_AT91SAM9G25 0x00000003
  43. #define ARCH_EXID_AT91SAM9X25 0x00000004
  44. #define ARCH_EXID_SAMA5D31 0x00444300
  45. #define ARCH_EXID_SAMA5D33 0x00414300
  46. #define ARCH_EXID_SAMA5D34 0x00414301
  47. #define ARCH_EXID_SAMA5D35 0x00584300
  48. #define ARCH_FAMILY_AT91X92 0x09200000
  49. #define ARCH_FAMILY_AT91SAM9 0x01900000
  50. #define ARCH_FAMILY_AT91SAM9XE 0x02900000
  51. /* RM9200 type */
  52. #define ARCH_REVISON_9200_BGA (0 << 0)
  53. #define ARCH_REVISON_9200_PQFP (1 << 0)
  54. #ifndef __ASSEMBLY__
  55. enum at91_soc_type {
  56. /* 920T */
  57. AT91_SOC_RM9200,
  58. /* SAM92xx */
  59. AT91_SOC_SAM9260, AT91_SOC_SAM9261, AT91_SOC_SAM9263,
  60. /* SAM9Gxx */
  61. AT91_SOC_SAM9G10, AT91_SOC_SAM9G20, AT91_SOC_SAM9G45,
  62. /* SAM9RL */
  63. AT91_SOC_SAM9RL,
  64. /* SAM9X5 */
  65. AT91_SOC_SAM9X5,
  66. /* SAM9N12 */
  67. AT91_SOC_SAM9N12,
  68. /* SAMA5D3 */
  69. AT91_SOC_SAMA5D3,
  70. /* Unknown type */
  71. AT91_SOC_UNKNOWN,
  72. };
  73. enum at91_soc_subtype {
  74. /* RM9200 */
  75. AT91_SOC_RM9200_BGA, AT91_SOC_RM9200_PQFP,
  76. /* SAM9260 */
  77. AT91_SOC_SAM9XE,
  78. /* SAM9G45 */
  79. AT91_SOC_SAM9G45ES, AT91_SOC_SAM9M10, AT91_SOC_SAM9G46, AT91_SOC_SAM9M11,
  80. /* SAM9X5 */
  81. AT91_SOC_SAM9G15, AT91_SOC_SAM9G35, AT91_SOC_SAM9X35,
  82. AT91_SOC_SAM9G25, AT91_SOC_SAM9X25,
  83. /* SAMA5D3 */
  84. AT91_SOC_SAMA5D31, AT91_SOC_SAMA5D33, AT91_SOC_SAMA5D34,
  85. AT91_SOC_SAMA5D35,
  86. /* No subtype for this SoC */
  87. AT91_SOC_SUBTYPE_NONE,
  88. /* Unknown subtype */
  89. AT91_SOC_SUBTYPE_UNKNOWN,
  90. };
  91. struct at91_socinfo {
  92. unsigned int type, subtype;
  93. unsigned int cidr, exid;
  94. };
  95. extern struct at91_socinfo at91_soc_initdata;
  96. const char *at91_get_soc_type(struct at91_socinfo *c);
  97. const char *at91_get_soc_subtype(struct at91_socinfo *c);
  98. static inline int at91_soc_is_detected(void)
  99. {
  100. return at91_soc_initdata.type != AT91_SOC_UNKNOWN;
  101. }
  102. #ifdef CONFIG_SOC_AT91RM9200
  103. #define cpu_is_at91rm9200() (at91_soc_initdata.type == AT91_SOC_RM9200)
  104. #define cpu_is_at91rm9200_bga() (at91_soc_initdata.subtype == AT91_SOC_RM9200_BGA)
  105. #define cpu_is_at91rm9200_pqfp() (at91_soc_initdata.subtype == AT91_SOC_RM9200_PQFP)
  106. #else
  107. #define cpu_is_at91rm9200() (0)
  108. #define cpu_is_at91rm9200_bga() (0)
  109. #define cpu_is_at91rm9200_pqfp() (0)
  110. #endif
  111. #ifdef CONFIG_SOC_AT91SAM9260
  112. #define cpu_is_at91sam9xe() (at91_soc_initdata.subtype == AT91_SOC_SAM9XE)
  113. #define cpu_is_at91sam9260() (at91_soc_initdata.type == AT91_SOC_SAM9260)
  114. #define cpu_is_at91sam9g20() (at91_soc_initdata.type == AT91_SOC_SAM9G20)
  115. #else
  116. #define cpu_is_at91sam9xe() (0)
  117. #define cpu_is_at91sam9260() (0)
  118. #define cpu_is_at91sam9g20() (0)
  119. #endif
  120. #ifdef CONFIG_SOC_AT91SAM9261
  121. #define cpu_is_at91sam9261() (at91_soc_initdata.type == AT91_SOC_SAM9261)
  122. #define cpu_is_at91sam9g10() (at91_soc_initdata.type == AT91_SOC_SAM9G10)
  123. #else
  124. #define cpu_is_at91sam9261() (0)
  125. #define cpu_is_at91sam9g10() (0)
  126. #endif
  127. #ifdef CONFIG_SOC_AT91SAM9263
  128. #define cpu_is_at91sam9263() (at91_soc_initdata.type == AT91_SOC_SAM9263)
  129. #else
  130. #define cpu_is_at91sam9263() (0)
  131. #endif
  132. #ifdef CONFIG_SOC_AT91SAM9RL
  133. #define cpu_is_at91sam9rl() (at91_soc_initdata.type == AT91_SOC_SAM9RL)
  134. #else
  135. #define cpu_is_at91sam9rl() (0)
  136. #endif
  137. #ifdef CONFIG_SOC_AT91SAM9G45
  138. #define cpu_is_at91sam9g45() (at91_soc_initdata.type == AT91_SOC_SAM9G45)
  139. #define cpu_is_at91sam9g45es() (at91_soc_initdata.subtype == AT91_SOC_SAM9G45ES)
  140. #define cpu_is_at91sam9m10() (at91_soc_initdata.subtype == AT91_SOC_SAM9M10)
  141. #define cpu_is_at91sam9g46() (at91_soc_initdata.subtype == AT91_SOC_SAM9G46)
  142. #define cpu_is_at91sam9m11() (at91_soc_initdata.subtype == AT91_SOC_SAM9M11)
  143. #else
  144. #define cpu_is_at91sam9g45() (0)
  145. #define cpu_is_at91sam9g45es() (0)
  146. #define cpu_is_at91sam9m10() (0)
  147. #define cpu_is_at91sam9g46() (0)
  148. #define cpu_is_at91sam9m11() (0)
  149. #endif
  150. #ifdef CONFIG_SOC_AT91SAM9X5
  151. #define cpu_is_at91sam9x5() (at91_soc_initdata.type == AT91_SOC_SAM9X5)
  152. #define cpu_is_at91sam9g15() (at91_soc_initdata.subtype == AT91_SOC_SAM9G15)
  153. #define cpu_is_at91sam9g35() (at91_soc_initdata.subtype == AT91_SOC_SAM9G35)
  154. #define cpu_is_at91sam9x35() (at91_soc_initdata.subtype == AT91_SOC_SAM9X35)
  155. #define cpu_is_at91sam9g25() (at91_soc_initdata.subtype == AT91_SOC_SAM9G25)
  156. #define cpu_is_at91sam9x25() (at91_soc_initdata.subtype == AT91_SOC_SAM9X25)
  157. #else
  158. #define cpu_is_at91sam9x5() (0)
  159. #define cpu_is_at91sam9g15() (0)
  160. #define cpu_is_at91sam9g35() (0)
  161. #define cpu_is_at91sam9x35() (0)
  162. #define cpu_is_at91sam9g25() (0)
  163. #define cpu_is_at91sam9x25() (0)
  164. #endif
  165. #ifdef CONFIG_SOC_AT91SAM9N12
  166. #define cpu_is_at91sam9n12() (at91_soc_initdata.type == AT91_SOC_SAM9N12)
  167. #else
  168. #define cpu_is_at91sam9n12() (0)
  169. #endif
  170. #ifdef CONFIG_SOC_SAMA5D3
  171. #define cpu_is_sama5d3() (at91_soc_initdata.type == AT91_SOC_SAMA5D3)
  172. #else
  173. #define cpu_is_sama5d3() (0)
  174. #endif
  175. /*
  176. * Since this is ARM, we will never run on any AVR32 CPU. But these
  177. * definitions may reduce clutter in common drivers.
  178. */
  179. #define cpu_is_at32ap7000() (0)
  180. #endif /* __ASSEMBLY__ */
  181. #endif /* __MACH_CPU_H__ */