socfpga_vt.dts 1.5 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677
  1. /*
  2. * Copyright (C) 2013 Altera Corporation <www.altera.com>
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License as published by
  6. * the Free Software Foundation; either version 2 of the License, or
  7. * (at your option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  16. */
  17. /dts-v1/;
  18. /include/ "socfpga.dtsi"
  19. / {
  20. model = "Altera SOCFPGA VT";
  21. compatible = "altr,socfpga-vt", "altr,socfpga";
  22. chosen {
  23. bootargs = "console=ttyS0,57600";
  24. };
  25. memory {
  26. name = "memory";
  27. device_type = "memory";
  28. reg = <0x0 0x40000000>; /* 1 GB */
  29. };
  30. soc {
  31. clkmgr@ffd04000 {
  32. clocks {
  33. osc1 {
  34. clock-frequency = <10000000>;
  35. };
  36. };
  37. };
  38. ethernet@ff700000 {
  39. phy-mode = "gmii";
  40. status = "okay";
  41. };
  42. timer0@ffc08000 {
  43. clock-frequency = <7000000>;
  44. };
  45. timer1@ffc09000 {
  46. clock-frequency = <7000000>;
  47. };
  48. timer2@ffd00000 {
  49. clock-frequency = <7000000>;
  50. };
  51. timer3@ffd01000 {
  52. clock-frequency = <7000000>;
  53. };
  54. serial0@ffc02000 {
  55. clock-frequency = <7372800>;
  56. };
  57. serial1@ffc03000 {
  58. clock-frequency = <7372800>;
  59. };
  60. sysmgr@ffd08000 {
  61. cpu1-start-addr = <0xffd08010>;
  62. };
  63. };
  64. };