msm8960-cdp.dts 1.1 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152
  1. /dts-v1/;
  2. /include/ "skeleton.dtsi"
  3. / {
  4. model = "Qualcomm MSM8960 CDP";
  5. compatible = "qcom,msm8960-cdp", "qcom,msm8960";
  6. interrupt-parent = <&intc>;
  7. intc: interrupt-controller@2000000 {
  8. compatible = "qcom,msm-qgic2";
  9. interrupt-controller;
  10. #interrupt-cells = <3>;
  11. reg = < 0x02000000 0x1000 >,
  12. < 0x02002000 0x1000 >;
  13. };
  14. timer@200a000 {
  15. compatible = "qcom,kpss-timer", "qcom,msm-timer";
  16. interrupts = <1 1 0x301>,
  17. <1 2 0x301>,
  18. <1 3 0x301>;
  19. reg = <0x0200a000 0x100>;
  20. clock-frequency = <27000000>,
  21. <32768>;
  22. cpu-offset = <0x80000>;
  23. };
  24. msmgpio: gpio@fd510000 {
  25. compatible = "qcom,msm-gpio";
  26. gpio-controller;
  27. #gpio-cells = <2>;
  28. ngpio = <150>;
  29. interrupts = <0 32 0x4>;
  30. interrupt-controller;
  31. #interrupt-cells = <2>;
  32. reg = <0xfd510000 0x4000>;
  33. };
  34. serial@16440000 {
  35. compatible = "qcom,msm-hsuart", "qcom,msm-uart";
  36. reg = <0x16440000 0x1000>,
  37. <0x16400000 0x1000>;
  38. interrupts = <0 154 0x0>;
  39. };
  40. qcom,ssbi@500000 {
  41. compatible = "qcom,ssbi";
  42. reg = <0x500000 0x1000>;
  43. qcom,controller-type = "pmic-arbiter";
  44. };
  45. };