keystone.dts 2.2 KB

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  1. /*
  2. * Copyright 2013 Texas Instruments, Inc.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * published by the Free Software Foundation.
  7. */
  8. /dts-v1/;
  9. /include/ "skeleton.dtsi"
  10. / {
  11. model = "Texas Instruments Keystone 2 SoC";
  12. compatible = "ti,keystone-evm";
  13. #address-cells = <2>;
  14. #size-cells = <2>;
  15. interrupt-parent = <&gic>;
  16. aliases {
  17. serial0 = &uart0;
  18. };
  19. memory {
  20. reg = <0x00000000 0x80000000 0x00000000 0x40000000>;
  21. };
  22. cpus {
  23. #address-cells = <1>;
  24. #size-cells = <0>;
  25. interrupt-parent = <&gic>;
  26. cpu@0 {
  27. compatible = "arm,cortex-a15";
  28. device_type = "cpu";
  29. reg = <0>;
  30. };
  31. cpu@1 {
  32. compatible = "arm,cortex-a15";
  33. device_type = "cpu";
  34. reg = <1>;
  35. };
  36. cpu@2 {
  37. compatible = "arm,cortex-a15";
  38. device_type = "cpu";
  39. reg = <2>;
  40. };
  41. cpu@3 {
  42. compatible = "arm,cortex-a15";
  43. device_type = "cpu";
  44. reg = <3>;
  45. };
  46. };
  47. gic: interrupt-controller {
  48. compatible = "arm,cortex-a15-gic";
  49. #interrupt-cells = <3>;
  50. #size-cells = <0>;
  51. #address-cells = <1>;
  52. interrupt-controller;
  53. reg = <0x0 0x02561000 0x0 0x1000>,
  54. <0x0 0x02562000 0x0 0x2000>;
  55. };
  56. timer {
  57. compatible = "arm,armv7-timer";
  58. interrupts = <1 13 0xf08>,
  59. <1 14 0xf08>,
  60. <1 11 0xf08>,
  61. <1 10 0x308>;
  62. };
  63. pmu {
  64. compatible = "arm,cortex-a15-pmu";
  65. interrupts = <0 20 0xf01>,
  66. <0 21 0xf01>,
  67. <0 22 0xf01>,
  68. <0 23 0xf01>;
  69. };
  70. soc {
  71. #address-cells = <1>;
  72. #size-cells = <1>;
  73. compatible = "ti,keystone","simple-bus";
  74. interrupt-parent = <&gic>;
  75. ranges = <0x0 0x0 0x0 0xc0000000>;
  76. rstctrl: reset-controller {
  77. compatible = "ti,keystone-reset";
  78. reg = <0x023100e8 4>; /* pll reset control reg */
  79. };
  80. uart0: serial@02530c00 {
  81. compatible = "ns16550a";
  82. current-speed = <115200>;
  83. reg-shift = <2>;
  84. reg-io-width = <4>;
  85. reg = <0x02530c00 0x100>;
  86. clock-frequency = <133120000>;
  87. interrupts = <0 277 0xf01>;
  88. };
  89. uart1: serial@02531000 {
  90. compatible = "ns16550a";
  91. current-speed = <115200>;
  92. reg-shift = <2>;
  93. reg-io-width = <4>;
  94. reg = <0x02531000 0x100>;
  95. clock-frequency = <133120000>;
  96. interrupts = <0 280 0xf01>;
  97. };
  98. };
  99. };