imx51-babbage.dts 6.2 KB

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  1. /*
  2. * Copyright 2011 Freescale Semiconductor, Inc.
  3. * Copyright 2011 Linaro Ltd.
  4. *
  5. * The code contained herein is licensed under the GNU General Public
  6. * License. You may obtain a copy of the GNU General Public License
  7. * Version 2 or later at the following locations:
  8. *
  9. * http://www.opensource.org/licenses/gpl-license.html
  10. * http://www.gnu.org/copyleft/gpl.html
  11. */
  12. /dts-v1/;
  13. #include "imx51.dtsi"
  14. / {
  15. model = "Freescale i.MX51 Babbage Board";
  16. compatible = "fsl,imx51-babbage", "fsl,imx51";
  17. memory {
  18. reg = <0x90000000 0x20000000>;
  19. };
  20. display@di0 {
  21. compatible = "fsl,imx-parallel-display";
  22. crtcs = <&ipu 0>;
  23. interface-pix-fmt = "rgb24";
  24. pinctrl-names = "default";
  25. pinctrl-0 = <&pinctrl_ipu_disp1_1>;
  26. };
  27. display@di1 {
  28. compatible = "fsl,imx-parallel-display";
  29. crtcs = <&ipu 1>;
  30. interface-pix-fmt = "rgb565";
  31. pinctrl-names = "default";
  32. pinctrl-0 = <&pinctrl_ipu_disp2_1>;
  33. };
  34. gpio-keys {
  35. compatible = "gpio-keys";
  36. power {
  37. label = "Power Button";
  38. gpios = <&gpio2 21 0>;
  39. linux,code = <116>; /* KEY_POWER */
  40. gpio-key,wakeup;
  41. };
  42. };
  43. sound {
  44. compatible = "fsl,imx51-babbage-sgtl5000",
  45. "fsl,imx-audio-sgtl5000";
  46. model = "imx51-babbage-sgtl5000";
  47. ssi-controller = <&ssi2>;
  48. audio-codec = <&sgtl5000>;
  49. audio-routing =
  50. "MIC_IN", "Mic Jack",
  51. "Mic Jack", "Mic Bias",
  52. "Headphone Jack", "HP_OUT";
  53. mux-int-port = <2>;
  54. mux-ext-port = <3>;
  55. };
  56. clocks {
  57. clk_26M: codec_clock {
  58. compatible = "fixed-clock";
  59. reg=<0>;
  60. #clock-cells = <0>;
  61. clock-frequency = <26000000>;
  62. gpios = <&gpio4 26 1>;
  63. };
  64. };
  65. };
  66. &esdhc1 {
  67. pinctrl-names = "default";
  68. pinctrl-0 = <&pinctrl_esdhc1_1>;
  69. fsl,cd-controller;
  70. fsl,wp-controller;
  71. status = "okay";
  72. };
  73. &esdhc2 {
  74. pinctrl-names = "default";
  75. pinctrl-0 = <&pinctrl_esdhc2_1>;
  76. cd-gpios = <&gpio1 6 0>;
  77. wp-gpios = <&gpio1 5 0>;
  78. status = "okay";
  79. };
  80. &uart3 {
  81. pinctrl-names = "default";
  82. pinctrl-0 = <&pinctrl_uart3_1>;
  83. fsl,uart-has-rtscts;
  84. status = "okay";
  85. };
  86. &ecspi1 {
  87. pinctrl-names = "default";
  88. pinctrl-0 = <&pinctrl_ecspi1_1>;
  89. fsl,spi-num-chipselects = <2>;
  90. cs-gpios = <&gpio4 24 0>, <&gpio4 25 0>;
  91. status = "okay";
  92. pmic: mc13892@0 {
  93. #address-cells = <1>;
  94. #size-cells = <0>;
  95. compatible = "fsl,mc13892";
  96. spi-max-frequency = <6000000>;
  97. reg = <0>;
  98. interrupt-parent = <&gpio1>;
  99. interrupts = <8 0x4>;
  100. regulators {
  101. sw1_reg: sw1 {
  102. regulator-min-microvolt = <600000>;
  103. regulator-max-microvolt = <1375000>;
  104. regulator-boot-on;
  105. regulator-always-on;
  106. };
  107. sw2_reg: sw2 {
  108. regulator-min-microvolt = <900000>;
  109. regulator-max-microvolt = <1850000>;
  110. regulator-boot-on;
  111. regulator-always-on;
  112. };
  113. sw3_reg: sw3 {
  114. regulator-min-microvolt = <1100000>;
  115. regulator-max-microvolt = <1850000>;
  116. regulator-boot-on;
  117. regulator-always-on;
  118. };
  119. sw4_reg: sw4 {
  120. regulator-min-microvolt = <1100000>;
  121. regulator-max-microvolt = <1850000>;
  122. regulator-boot-on;
  123. regulator-always-on;
  124. };
  125. vpll_reg: vpll {
  126. regulator-min-microvolt = <1050000>;
  127. regulator-max-microvolt = <1800000>;
  128. regulator-boot-on;
  129. regulator-always-on;
  130. };
  131. vdig_reg: vdig {
  132. regulator-min-microvolt = <1650000>;
  133. regulator-max-microvolt = <1650000>;
  134. regulator-boot-on;
  135. };
  136. vsd_reg: vsd {
  137. regulator-min-microvolt = <1800000>;
  138. regulator-max-microvolt = <3150000>;
  139. };
  140. vusb2_reg: vusb2 {
  141. regulator-min-microvolt = <2400000>;
  142. regulator-max-microvolt = <2775000>;
  143. regulator-boot-on;
  144. regulator-always-on;
  145. };
  146. vvideo_reg: vvideo {
  147. regulator-min-microvolt = <2775000>;
  148. regulator-max-microvolt = <2775000>;
  149. };
  150. vaudio_reg: vaudio {
  151. regulator-min-microvolt = <2300000>;
  152. regulator-max-microvolt = <3000000>;
  153. };
  154. vcam_reg: vcam {
  155. regulator-min-microvolt = <2500000>;
  156. regulator-max-microvolt = <3000000>;
  157. };
  158. vgen1_reg: vgen1 {
  159. regulator-min-microvolt = <1200000>;
  160. regulator-max-microvolt = <1200000>;
  161. };
  162. vgen2_reg: vgen2 {
  163. regulator-min-microvolt = <1200000>;
  164. regulator-max-microvolt = <3150000>;
  165. regulator-always-on;
  166. };
  167. vgen3_reg: vgen3 {
  168. regulator-min-microvolt = <1800000>;
  169. regulator-max-microvolt = <2900000>;
  170. regulator-always-on;
  171. };
  172. };
  173. };
  174. flash: at45db321d@1 {
  175. #address-cells = <1>;
  176. #size-cells = <1>;
  177. compatible = "atmel,at45db321d", "atmel,at45", "atmel,dataflash";
  178. spi-max-frequency = <25000000>;
  179. reg = <1>;
  180. partition@0 {
  181. label = "U-Boot";
  182. reg = <0x0 0x40000>;
  183. read-only;
  184. };
  185. partition@40000 {
  186. label = "Kernel";
  187. reg = <0x40000 0x3c0000>;
  188. };
  189. };
  190. };
  191. &ssi2 {
  192. fsl,mode = "i2s-slave";
  193. status = "okay";
  194. };
  195. &iomuxc {
  196. pinctrl-names = "default";
  197. pinctrl-0 = <&pinctrl_hog>;
  198. hog {
  199. pinctrl_hog: hoggrp {
  200. fsl,pins = <
  201. MX51_PAD_GPIO1_0__SD1_CD 0x20d5
  202. MX51_PAD_GPIO1_1__SD1_WP 0x20d5
  203. MX51_PAD_GPIO1_5__GPIO1_5 0x100
  204. MX51_PAD_GPIO1_6__GPIO1_6 0x100
  205. MX51_PAD_EIM_A27__GPIO2_21 0x5
  206. MX51_PAD_CSPI1_SS0__GPIO4_24 0x85
  207. MX51_PAD_CSPI1_SS1__GPIO4_25 0x85
  208. MX51_PAD_CSPI1_RDY__GPIO4_26 0x80000000
  209. >;
  210. };
  211. };
  212. };
  213. &uart1 {
  214. pinctrl-names = "default";
  215. pinctrl-0 = <&pinctrl_uart1_1>;
  216. fsl,uart-has-rtscts;
  217. status = "okay";
  218. };
  219. &uart2 {
  220. pinctrl-names = "default";
  221. pinctrl-0 = <&pinctrl_uart2_1>;
  222. status = "okay";
  223. };
  224. &i2c2 {
  225. pinctrl-names = "default";
  226. pinctrl-0 = <&pinctrl_i2c2_1>;
  227. status = "okay";
  228. sgtl5000: codec@0a {
  229. compatible = "fsl,sgtl5000";
  230. reg = <0x0a>;
  231. clocks = <&clk_26M>;
  232. VDDA-supply = <&vdig_reg>;
  233. VDDIO-supply = <&vvideo_reg>;
  234. };
  235. };
  236. &audmux {
  237. pinctrl-names = "default";
  238. pinctrl-0 = <&pinctrl_audmux_1>;
  239. status = "okay";
  240. };
  241. &fec {
  242. pinctrl-names = "default";
  243. pinctrl-0 = <&pinctrl_fec_1>;
  244. phy-mode = "mii";
  245. status = "okay";
  246. };
  247. &kpp {
  248. pinctrl-names = "default";
  249. pinctrl-0 = <&pinctrl_kpp_1>;
  250. linux,keymap = <0x00000067 /* KEY_UP */
  251. 0x0001006c /* KEY_DOWN */
  252. 0x00020072 /* KEY_VOLUMEDOWN */
  253. 0x00030066 /* KEY_HOME */
  254. 0x0100006a /* KEY_RIGHT */
  255. 0x01010069 /* KEY_LEFT */
  256. 0x0102001c /* KEY_ENTER */
  257. 0x01030073 /* KEY_VOLUMEUP */
  258. 0x02000040 /* KEY_F6 */
  259. 0x02010042 /* KEY_F8 */
  260. 0x02020043 /* KEY_F9 */
  261. 0x02030044 /* KEY_F10 */
  262. 0x0300003b /* KEY_F1 */
  263. 0x0301003c /* KEY_F2 */
  264. 0x0302003d /* KEY_F3 */
  265. 0x03030074>; /* KEY_POWER */
  266. status = "okay";
  267. };