atlas6-evb.dts 1.4 KB

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  1. /*
  2. * DTS file for CSR SiRFatlas6 Evaluation Board
  3. *
  4. * Copyright (c) 2012 Cambridge Silicon Radio Limited, a CSR plc group company.
  5. *
  6. * Licensed under GPLv2 or later.
  7. */
  8. /dts-v1/;
  9. /include/ "atlas6.dtsi"
  10. / {
  11. model = "CSR SiRFatlas6 Evaluation Board";
  12. compatible = "sirf,atlas6-cb", "sirf,atlas6";
  13. memory {
  14. reg = <0x00000000 0x20000000>;
  15. };
  16. axi {
  17. peri-iobg {
  18. uart@b0060000 {
  19. pinctrl-names = "default";
  20. pinctrl-0 = <&uart1_pins_a>;
  21. };
  22. spi@b00d0000 {
  23. status = "okay";
  24. pinctrl-names = "default";
  25. pinctrl-0 = <&spi0_pins_a>;
  26. spi@0 {
  27. compatible = "spidev";
  28. reg = <0>;
  29. spi-max-frequency = <1000000>;
  30. };
  31. };
  32. spi@b0170000 {
  33. pinctrl-names = "default";
  34. pinctrl-0 = <&spi1_pins_a>;
  35. };
  36. i2c0: i2c@b00e0000 {
  37. status = "okay";
  38. pinctrl-names = "default";
  39. pinctrl-0 = <&i2c0_pins_a>;
  40. lcd@40 {
  41. compatible = "sirf,lcd";
  42. reg = <0x40>;
  43. };
  44. };
  45. };
  46. disp-iobg {
  47. lcd@90010000 {
  48. status = "okay";
  49. pinctrl-names = "default";
  50. pinctrl-0 = <&lcd_24pins_a>;
  51. };
  52. };
  53. };
  54. display: display@0 {
  55. panels {
  56. panel0: panel@0 {
  57. panel-name = "Innolux TFT";
  58. hactive = <800>;
  59. vactive = <480>;
  60. left_margin = <20>;
  61. right_margin = <234>;
  62. upper_margin = <3>;
  63. lower_margin = <41>;
  64. hsync_len = <3>;
  65. vsync_len = <2>;
  66. pixclock = <33264000>;
  67. sync = <3>;
  68. timing = <0x88>;
  69. };
  70. };
  71. };
  72. };