armada-xp-openblocks-ax3-4.dts 3.8 KB

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  1. /*
  2. * Device Tree file for OpenBlocks AX3-4 board
  3. *
  4. * Copyright (C) 2012 Marvell
  5. *
  6. * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
  7. *
  8. * This file is licensed under the terms of the GNU General Public
  9. * License version 2. This program is licensed "as is" without any
  10. * warranty of any kind, whether express or implied.
  11. */
  12. /dts-v1/;
  13. /include/ "armada-xp-mv78260.dtsi"
  14. / {
  15. model = "PlatHome OpenBlocks AX3-4 board";
  16. compatible = "plathome,openblocks-ax3-4", "marvell,armadaxp-mv78260", "marvell,armadaxp", "marvell,armada-370-xp";
  17. chosen {
  18. bootargs = "console=ttyS0,115200 earlyprintk";
  19. };
  20. memory {
  21. device_type = "memory";
  22. reg = <0 0x00000000 0 0xC0000000>; /* 3 GB */
  23. };
  24. soc {
  25. ranges = <0 0 0xd0000000 0x100000 /* Internal registers 1MiB */
  26. 0xe0000000 0 0xe0000000 0x8100000 /* PCIe */
  27. 0xf0000000 0 0xf0000000 0x8000000 /* Device Bus, NOR 128MiB */>;
  28. internal-regs {
  29. serial@12000 {
  30. clock-frequency = <250000000>;
  31. status = "okay";
  32. };
  33. serial@12100 {
  34. clock-frequency = <250000000>;
  35. status = "okay";
  36. };
  37. pinctrl {
  38. led_pins: led-pins-0 {
  39. marvell,pins = "mpp49", "mpp51", "mpp53";
  40. marvell,function = "gpio";
  41. };
  42. };
  43. leds {
  44. compatible = "gpio-leds";
  45. pinctrl-names = "default";
  46. pinctrl-0 = <&led_pins>;
  47. red_led {
  48. label = "red_led";
  49. gpios = <&gpio1 17 1>;
  50. default-state = "off";
  51. };
  52. yellow_led {
  53. label = "yellow_led";
  54. gpios = <&gpio1 19 1>;
  55. default-state = "off";
  56. };
  57. green_led {
  58. label = "green_led";
  59. gpios = <&gpio1 21 1>;
  60. default-state = "off";
  61. linux,default-trigger = "heartbeat";
  62. };
  63. };
  64. gpio_keys {
  65. compatible = "gpio-keys";
  66. #address-cells = <1>;
  67. #size-cells = <0>;
  68. button@1 {
  69. label = "Init Button";
  70. linux,code = <116>;
  71. gpios = <&gpio1 28 0>;
  72. };
  73. };
  74. mdio {
  75. phy0: ethernet-phy@0 {
  76. reg = <0>;
  77. };
  78. phy1: ethernet-phy@1 {
  79. reg = <1>;
  80. };
  81. phy2: ethernet-phy@2 {
  82. reg = <2>;
  83. };
  84. phy3: ethernet-phy@3 {
  85. reg = <3>;
  86. };
  87. };
  88. ethernet@70000 {
  89. status = "okay";
  90. phy = <&phy0>;
  91. phy-mode = "sgmii";
  92. };
  93. ethernet@74000 {
  94. status = "okay";
  95. phy = <&phy1>;
  96. phy-mode = "sgmii";
  97. };
  98. ethernet@30000 {
  99. status = "okay";
  100. phy = <&phy2>;
  101. phy-mode = "sgmii";
  102. };
  103. ethernet@34000 {
  104. status = "okay";
  105. phy = <&phy3>;
  106. phy-mode = "sgmii";
  107. };
  108. i2c@11000 {
  109. status = "okay";
  110. clock-frequency = <400000>;
  111. };
  112. i2c@11100 {
  113. status = "okay";
  114. clock-frequency = <400000>;
  115. s35390a: s35390a@30 {
  116. compatible = "s35390a";
  117. reg = <0x30>;
  118. };
  119. };
  120. sata@a0000 {
  121. nr-ports = <2>;
  122. status = "okay";
  123. };
  124. /* Front side USB 0 */
  125. usb@50000 {
  126. status = "okay";
  127. };
  128. /* Front side USB 1 */
  129. usb@51000 {
  130. status = "okay";
  131. };
  132. /* USB interface in the mini-PCIe connector */
  133. usb@52000 {
  134. status = "okay";
  135. };
  136. devbus-bootcs@10400 {
  137. status = "okay";
  138. ranges = <0 0xf0000000 0x8000000>; /* @addr 0xf000000, size 0x8000000 */
  139. /* Device Bus parameters are required */
  140. /* Read parameters */
  141. devbus,bus-width = <8>;
  142. devbus,turn-off-ps = <60000>;
  143. devbus,badr-skew-ps = <0>;
  144. devbus,acc-first-ps = <124000>;
  145. devbus,acc-next-ps = <248000>;
  146. devbus,rd-setup-ps = <0>;
  147. devbus,rd-hold-ps = <0>;
  148. /* Write parameters */
  149. devbus,sync-enable = <0>;
  150. devbus,wr-high-ps = <60000>;
  151. devbus,wr-low-ps = <60000>;
  152. devbus,ale-wr-ps = <60000>;
  153. /* NOR 128 MiB */
  154. nor@0 {
  155. compatible = "cfi-flash";
  156. reg = <0 0x8000000>;
  157. bank-width = <2>;
  158. };
  159. };
  160. pcie-controller {
  161. status = "okay";
  162. /* Internal mini-PCIe connector */
  163. pcie@1,0 {
  164. /* Port 0, Lane 0 */
  165. status = "okay";
  166. };
  167. };
  168. };
  169. };
  170. };