dsa.txt 2.4 KB

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  1. Marvell Distributed Switch Architecture Device Tree Bindings
  2. ------------------------------------------------------------
  3. Required properties:
  4. - compatible : Should be "marvell,dsa"
  5. - #address-cells : Must be 2, first cell is the address on the MDIO bus
  6. and second cell is the address in the switch tree.
  7. Second cell is used only when cascading/chaining.
  8. - #size-cells : Must be 0
  9. - dsa,ethernet : Should be a phandle to a valid Ethernet device node
  10. - dsa,mii-bus : Should be a phandle to a valid MDIO bus device node
  11. Optionnal properties:
  12. - interrupts : property with a value describing the switch
  13. interrupt number (not supported by the driver)
  14. A DSA node can contain multiple switch chips which are therefore child nodes of
  15. the parent DSA node. The maximum number of allowed child nodes is 4
  16. (DSA_MAX_SWITCHES).
  17. Each of these switch child nodes should have the following required properties:
  18. - reg : Describes the switch address on the MII bus
  19. - #address-cells : Must be 1
  20. - #size-cells : Must be 0
  21. A switch may have multiple "port" children nodes
  22. Each port children node must have the following mandatory properties:
  23. - reg : Describes the port address in the switch
  24. - label : Describes the label associated with this port, special
  25. labels are "cpu" to indicate a CPU port and "dsa" to
  26. indicate an uplink/downlink port.
  27. Note that a port labelled "dsa" will imply checking for the uplink phandle
  28. described below.
  29. Optionnal property:
  30. - link : Should be a phandle to another switch's DSA port.
  31. This property is only used when switches are being
  32. chained/cascaded together.
  33. Example:
  34. dsa@0 {
  35. compatible = "marvell,dsa";
  36. #address-cells = <2>;
  37. #size-cells = <0>;
  38. interrupts = <10>;
  39. dsa,ethernet = <&ethernet0>;
  40. dsa,mii-bus = <&mii_bus0>;
  41. switch@0 {
  42. #address-cells = <1>;
  43. #size-cells = <0>;
  44. reg = <16 0>; /* MDIO address 16, switch 0 in tree */
  45. port@0 {
  46. reg = <0>;
  47. label = "lan1";
  48. };
  49. port@1 {
  50. reg = <1>;
  51. label = "lan2";
  52. };
  53. port@5 {
  54. reg = <5>;
  55. label = "cpu";
  56. };
  57. switch0uplink: port@6 {
  58. reg = <6>;
  59. label = "dsa";
  60. link = <&switch1uplink>;
  61. };
  62. };
  63. switch@1 {
  64. #address-cells = <1>;
  65. #size-cells = <0>;
  66. reg = <17 1>; /* MDIO address 17, switch 1 in tree */
  67. switch1uplink: port@0 {
  68. reg = <0>;
  69. label = "dsa";
  70. link = <&switch0uplink>;
  71. };
  72. };
  73. };