tegra.c 4.6 KB

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  1. /*
  2. * NVIDIA Tegra SoC device tree board support
  3. *
  4. * Copyright (C) 2011, 2013, NVIDIA Corporation
  5. * Copyright (C) 2010 Secret Lab Technologies, Ltd.
  6. * Copyright (C) 2010 Google, Inc.
  7. *
  8. * This software is licensed under the terms of the GNU General Public
  9. * License version 2, as published by the Free Software Foundation, and
  10. * may be copied, distributed, and modified under those terms.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. */
  18. #include <linux/clocksource.h>
  19. #include <linux/kernel.h>
  20. #include <linux/init.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/serial_8250.h>
  23. #include <linux/clk.h>
  24. #include <linux/dma-mapping.h>
  25. #include <linux/irqdomain.h>
  26. #include <linux/of.h>
  27. #include <linux/of_address.h>
  28. #include <linux/of_fdt.h>
  29. #include <linux/of_platform.h>
  30. #include <linux/pda_power.h>
  31. #include <linux/platform_data/tegra_usb.h>
  32. #include <linux/io.h>
  33. #include <linux/i2c.h>
  34. #include <linux/i2c-tegra.h>
  35. #include <linux/slab.h>
  36. #include <linux/sys_soc.h>
  37. #include <linux/usb/tegra_usb_phy.h>
  38. #include <linux/clk/tegra.h>
  39. #include <asm/mach-types.h>
  40. #include <asm/mach/arch.h>
  41. #include <asm/mach/time.h>
  42. #include <asm/setup.h>
  43. #include "board.h"
  44. #include "common.h"
  45. #include "fuse.h"
  46. #include "iomap.h"
  47. static struct tegra_ehci_platform_data tegra_ehci1_pdata = {
  48. .operating_mode = TEGRA_USB_OTG,
  49. .power_down_on_bus_suspend = 1,
  50. .vbus_gpio = -1,
  51. };
  52. static struct tegra_ulpi_config tegra_ehci2_ulpi_phy_config = {
  53. .reset_gpio = -1,
  54. .clk = "cdev2",
  55. };
  56. static struct tegra_ehci_platform_data tegra_ehci2_pdata = {
  57. .phy_config = &tegra_ehci2_ulpi_phy_config,
  58. .operating_mode = TEGRA_USB_HOST,
  59. .power_down_on_bus_suspend = 1,
  60. .vbus_gpio = -1,
  61. };
  62. static struct tegra_ehci_platform_data tegra_ehci3_pdata = {
  63. .operating_mode = TEGRA_USB_HOST,
  64. .power_down_on_bus_suspend = 1,
  65. .vbus_gpio = -1,
  66. };
  67. static struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = {
  68. OF_DEV_AUXDATA("nvidia,tegra20-ehci", 0xC5000000, "tegra-ehci.0",
  69. &tegra_ehci1_pdata),
  70. OF_DEV_AUXDATA("nvidia,tegra20-ehci", 0xC5004000, "tegra-ehci.1",
  71. &tegra_ehci2_pdata),
  72. OF_DEV_AUXDATA("nvidia,tegra20-ehci", 0xC5008000, "tegra-ehci.2",
  73. &tegra_ehci3_pdata),
  74. {}
  75. };
  76. static void __init tegra_dt_init(void)
  77. {
  78. struct soc_device_attribute *soc_dev_attr;
  79. struct soc_device *soc_dev;
  80. struct device *parent = NULL;
  81. tegra_clocks_apply_init_table();
  82. soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
  83. if (!soc_dev_attr)
  84. goto out;
  85. soc_dev_attr->family = kasprintf(GFP_KERNEL, "Tegra");
  86. soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%d", tegra_revision);
  87. soc_dev_attr->soc_id = kasprintf(GFP_KERNEL, "%d", tegra_chip_id);
  88. soc_dev = soc_device_register(soc_dev_attr);
  89. if (IS_ERR(soc_dev)) {
  90. kfree(soc_dev_attr->family);
  91. kfree(soc_dev_attr->revision);
  92. kfree(soc_dev_attr->soc_id);
  93. kfree(soc_dev_attr);
  94. goto out;
  95. }
  96. parent = soc_device_to_device(soc_dev);
  97. /*
  98. * Finished with the static registrations now; fill in the missing
  99. * devices
  100. */
  101. out:
  102. of_platform_populate(NULL, of_default_bus_match_table,
  103. tegra20_auxdata_lookup, parent);
  104. }
  105. static void __init trimslice_init(void)
  106. {
  107. #ifdef CONFIG_TEGRA_PCI
  108. int ret;
  109. ret = tegra_pcie_init(true, true);
  110. if (ret)
  111. pr_err("tegra_pci_init() failed: %d\n", ret);
  112. #endif
  113. }
  114. static void __init harmony_init(void)
  115. {
  116. #ifdef CONFIG_TEGRA_PCI
  117. int ret;
  118. ret = harmony_pcie_init();
  119. if (ret)
  120. pr_err("harmony_pcie_init() failed: %d\n", ret);
  121. #endif
  122. }
  123. static void __init paz00_init(void)
  124. {
  125. if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC))
  126. tegra_paz00_wifikill_init();
  127. }
  128. static struct {
  129. char *machine;
  130. void (*init)(void);
  131. } board_init_funcs[] = {
  132. { "compulab,trimslice", trimslice_init },
  133. { "nvidia,harmony", harmony_init },
  134. { "compal,paz00", paz00_init },
  135. };
  136. static void __init tegra_dt_init_late(void)
  137. {
  138. int i;
  139. tegra_init_late();
  140. for (i = 0; i < ARRAY_SIZE(board_init_funcs); i++) {
  141. if (of_machine_is_compatible(board_init_funcs[i].machine)) {
  142. board_init_funcs[i].init();
  143. break;
  144. }
  145. }
  146. }
  147. static const char * const tegra_dt_board_compat[] = {
  148. "nvidia,tegra114",
  149. "nvidia,tegra30",
  150. "nvidia,tegra20",
  151. NULL
  152. };
  153. DT_MACHINE_START(TEGRA_DT, "NVIDIA Tegra SoC (Flattened Device Tree)")
  154. .map_io = tegra_map_common_io,
  155. .smp = smp_ops(tegra_smp_ops),
  156. .init_early = tegra_init_early,
  157. .init_irq = tegra_dt_init_irq,
  158. .init_time = clocksource_of_init,
  159. .init_machine = tegra_dt_init,
  160. .init_late = tegra_dt_init_late,
  161. .restart = tegra_assert_system_reset,
  162. .dt_compat = tegra_dt_board_compat,
  163. MACHINE_END