intr_remapping.c 4.4 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207
  1. #include <linux/dmar.h>
  2. #include <linux/spinlock.h>
  3. #include <linux/jiffies.h>
  4. #include <linux/pci.h>
  5. #include <asm/io_apic.h>
  6. #include "intel-iommu.h"
  7. #include "intr_remapping.h"
  8. static struct ioapic_scope ir_ioapic[MAX_IO_APICS];
  9. static int ir_ioapic_num;
  10. int intr_remapping_enabled;
  11. static void iommu_set_intr_remapping(struct intel_iommu *iommu, int mode)
  12. {
  13. u64 addr;
  14. u32 cmd, sts;
  15. unsigned long flags;
  16. addr = virt_to_phys((void *)iommu->ir_table->base);
  17. spin_lock_irqsave(&iommu->register_lock, flags);
  18. dmar_writeq(iommu->reg + DMAR_IRTA_REG,
  19. (addr) | IR_X2APIC_MODE(mode) | INTR_REMAP_TABLE_REG_SIZE);
  20. /* Set interrupt-remapping table pointer */
  21. cmd = iommu->gcmd | DMA_GCMD_SIRTP;
  22. writel(cmd, iommu->reg + DMAR_GCMD_REG);
  23. IOMMU_WAIT_OP(iommu, DMAR_GSTS_REG,
  24. readl, (sts & DMA_GSTS_IRTPS), sts);
  25. spin_unlock_irqrestore(&iommu->register_lock, flags);
  26. /*
  27. * global invalidation of interrupt entry cache before enabling
  28. * interrupt-remapping.
  29. */
  30. qi_global_iec(iommu);
  31. spin_lock_irqsave(&iommu->register_lock, flags);
  32. /* Enable interrupt-remapping */
  33. cmd = iommu->gcmd | DMA_GCMD_IRE;
  34. iommu->gcmd |= DMA_GCMD_IRE;
  35. writel(cmd, iommu->reg + DMAR_GCMD_REG);
  36. IOMMU_WAIT_OP(iommu, DMAR_GSTS_REG,
  37. readl, (sts & DMA_GSTS_IRES), sts);
  38. spin_unlock_irqrestore(&iommu->register_lock, flags);
  39. }
  40. static int setup_intr_remapping(struct intel_iommu *iommu, int mode)
  41. {
  42. struct ir_table *ir_table;
  43. struct page *pages;
  44. ir_table = iommu->ir_table = kzalloc(sizeof(struct ir_table),
  45. GFP_KERNEL);
  46. if (!iommu->ir_table)
  47. return -ENOMEM;
  48. pages = alloc_pages(GFP_KERNEL | __GFP_ZERO, INTR_REMAP_PAGE_ORDER);
  49. if (!pages) {
  50. printk(KERN_ERR "failed to allocate pages of order %d\n",
  51. INTR_REMAP_PAGE_ORDER);
  52. kfree(iommu->ir_table);
  53. return -ENOMEM;
  54. }
  55. ir_table->base = page_address(pages);
  56. iommu_set_intr_remapping(iommu, mode);
  57. return 0;
  58. }
  59. int __init enable_intr_remapping(int eim)
  60. {
  61. struct dmar_drhd_unit *drhd;
  62. int setup = 0;
  63. /*
  64. * check for the Interrupt-remapping support
  65. */
  66. for_each_drhd_unit(drhd) {
  67. struct intel_iommu *iommu = drhd->iommu;
  68. if (!ecap_ir_support(iommu->ecap))
  69. continue;
  70. if (eim && !ecap_eim_support(iommu->ecap)) {
  71. printk(KERN_INFO "DRHD %Lx: EIM not supported by DRHD, "
  72. " ecap %Lx\n", drhd->reg_base_addr, iommu->ecap);
  73. return -1;
  74. }
  75. }
  76. /*
  77. * Enable queued invalidation for all the DRHD's.
  78. */
  79. for_each_drhd_unit(drhd) {
  80. int ret;
  81. struct intel_iommu *iommu = drhd->iommu;
  82. ret = dmar_enable_qi(iommu);
  83. if (ret) {
  84. printk(KERN_ERR "DRHD %Lx: failed to enable queued, "
  85. " invalidation, ecap %Lx, ret %d\n",
  86. drhd->reg_base_addr, iommu->ecap, ret);
  87. return -1;
  88. }
  89. }
  90. /*
  91. * Setup Interrupt-remapping for all the DRHD's now.
  92. */
  93. for_each_drhd_unit(drhd) {
  94. struct intel_iommu *iommu = drhd->iommu;
  95. if (!ecap_ir_support(iommu->ecap))
  96. continue;
  97. if (setup_intr_remapping(iommu, eim))
  98. goto error;
  99. setup = 1;
  100. }
  101. if (!setup)
  102. goto error;
  103. intr_remapping_enabled = 1;
  104. return 0;
  105. error:
  106. /*
  107. * handle error condition gracefully here!
  108. */
  109. return -1;
  110. }
  111. static int ir_parse_ioapic_scope(struct acpi_dmar_header *header,
  112. struct intel_iommu *iommu)
  113. {
  114. struct acpi_dmar_hardware_unit *drhd;
  115. struct acpi_dmar_device_scope *scope;
  116. void *start, *end;
  117. drhd = (struct acpi_dmar_hardware_unit *)header;
  118. start = (void *)(drhd + 1);
  119. end = ((void *)drhd) + header->length;
  120. while (start < end) {
  121. scope = start;
  122. if (scope->entry_type == ACPI_DMAR_SCOPE_TYPE_IOAPIC) {
  123. if (ir_ioapic_num == MAX_IO_APICS) {
  124. printk(KERN_WARNING "Exceeded Max IO APICS\n");
  125. return -1;
  126. }
  127. printk(KERN_INFO "IOAPIC id %d under DRHD base"
  128. " 0x%Lx\n", scope->enumeration_id,
  129. drhd->address);
  130. ir_ioapic[ir_ioapic_num].iommu = iommu;
  131. ir_ioapic[ir_ioapic_num].id = scope->enumeration_id;
  132. ir_ioapic_num++;
  133. }
  134. start += scope->length;
  135. }
  136. return 0;
  137. }
  138. /*
  139. * Finds the assocaition between IOAPIC's and its Interrupt-remapping
  140. * hardware unit.
  141. */
  142. int __init parse_ioapics_under_ir(void)
  143. {
  144. struct dmar_drhd_unit *drhd;
  145. int ir_supported = 0;
  146. for_each_drhd_unit(drhd) {
  147. struct intel_iommu *iommu = drhd->iommu;
  148. if (ecap_ir_support(iommu->ecap)) {
  149. if (ir_parse_ioapic_scope(drhd->hdr, iommu))
  150. return -1;
  151. ir_supported = 1;
  152. }
  153. }
  154. if (ir_supported && ir_ioapic_num != nr_ioapics) {
  155. printk(KERN_WARNING
  156. "Not all IO-APIC's listed under remapping hardware\n");
  157. return -1;
  158. }
  159. return ir_supported;
  160. }