bfin_5xx.c 32 KB

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  1. /*
  2. * Blackfin On-Chip Serial Driver
  3. *
  4. * Copyright 2006-2007 Analog Devices Inc.
  5. *
  6. * Enter bugs at http://blackfin.uclinux.org/
  7. *
  8. * Licensed under the GPL-2 or later.
  9. */
  10. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  11. #define SUPPORT_SYSRQ
  12. #endif
  13. #include <linux/module.h>
  14. #include <linux/ioport.h>
  15. #include <linux/init.h>
  16. #include <linux/console.h>
  17. #include <linux/sysrq.h>
  18. #include <linux/platform_device.h>
  19. #include <linux/tty.h>
  20. #include <linux/tty_flip.h>
  21. #include <linux/serial_core.h>
  22. #ifdef CONFIG_KGDB_UART
  23. #include <linux/kgdb.h>
  24. #include <asm/irq_regs.h>
  25. #endif
  26. #include <asm/gpio.h>
  27. #include <asm/mach/bfin_serial_5xx.h>
  28. #ifdef CONFIG_SERIAL_BFIN_DMA
  29. #include <linux/dma-mapping.h>
  30. #include <asm/io.h>
  31. #include <asm/irq.h>
  32. #include <asm/cacheflush.h>
  33. #endif
  34. /* UART name and device definitions */
  35. #define BFIN_SERIAL_NAME "ttyBF"
  36. #define BFIN_SERIAL_MAJOR 204
  37. #define BFIN_SERIAL_MINOR 64
  38. /*
  39. * Setup for console. Argument comes from the menuconfig
  40. */
  41. #define DMA_RX_XCOUNT 512
  42. #define DMA_RX_YCOUNT (PAGE_SIZE / DMA_RX_XCOUNT)
  43. #define DMA_RX_FLUSH_JIFFIES (HZ / 50)
  44. #ifdef CONFIG_SERIAL_BFIN_DMA
  45. static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart);
  46. #else
  47. static void bfin_serial_tx_chars(struct bfin_serial_port *uart);
  48. #endif
  49. static void bfin_serial_mctrl_check(struct bfin_serial_port *uart);
  50. /*
  51. * interrupts are disabled on entry
  52. */
  53. static void bfin_serial_stop_tx(struct uart_port *port)
  54. {
  55. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  56. struct circ_buf *xmit = &uart->port.info->xmit;
  57. #if !defined(CONFIG_BF54x) && !defined(CONFIG_SERIAL_BFIN_DMA)
  58. unsigned short ier;
  59. #endif
  60. while (!(UART_GET_LSR(uart) & TEMT))
  61. cpu_relax();
  62. #ifdef CONFIG_SERIAL_BFIN_DMA
  63. disable_dma(uart->tx_dma_channel);
  64. xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
  65. uart->port.icount.tx += uart->tx_count;
  66. uart->tx_count = 0;
  67. uart->tx_done = 1;
  68. #else
  69. #ifdef CONFIG_BF54x
  70. /* Clear TFI bit */
  71. UART_PUT_LSR(uart, TFI);
  72. UART_CLEAR_IER(uart, ETBEI);
  73. #else
  74. ier = UART_GET_IER(uart);
  75. ier &= ~ETBEI;
  76. UART_PUT_IER(uart, ier);
  77. #endif
  78. #endif
  79. }
  80. /*
  81. * port is locked and interrupts are disabled
  82. */
  83. static void bfin_serial_start_tx(struct uart_port *port)
  84. {
  85. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  86. #ifdef CONFIG_SERIAL_BFIN_DMA
  87. if (uart->tx_done)
  88. bfin_serial_dma_tx_chars(uart);
  89. #else
  90. #ifdef CONFIG_BF54x
  91. UART_SET_IER(uart, ETBEI);
  92. #else
  93. unsigned short ier;
  94. ier = UART_GET_IER(uart);
  95. ier |= ETBEI;
  96. UART_PUT_IER(uart, ier);
  97. #endif
  98. bfin_serial_tx_chars(uart);
  99. #endif
  100. }
  101. /*
  102. * Interrupts are enabled
  103. */
  104. static void bfin_serial_stop_rx(struct uart_port *port)
  105. {
  106. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  107. #ifdef CONFIG_KGDB_UART
  108. if (uart->port.line != CONFIG_KGDB_UART_PORT) {
  109. #endif
  110. #ifdef CONFIG_BF54x
  111. UART_CLEAR_IER(uart, ERBFI);
  112. #else
  113. unsigned short ier;
  114. ier = UART_GET_IER(uart);
  115. ier &= ~ERBFI;
  116. UART_PUT_IER(uart, ier);
  117. #endif
  118. #ifdef CONFIG_KGDB_UART
  119. }
  120. #endif
  121. }
  122. /*
  123. * Set the modem control timer to fire immediately.
  124. */
  125. static void bfin_serial_enable_ms(struct uart_port *port)
  126. {
  127. }
  128. #ifdef CONFIG_KGDB_UART
  129. static int kgdb_entry_state;
  130. void kgdb_put_debug_char(int chr)
  131. {
  132. struct bfin_serial_port *uart;
  133. if (CONFIG_KGDB_UART_PORT < 0
  134. || CONFIG_KGDB_UART_PORT >= BFIN_UART_NR_PORTS)
  135. uart = &bfin_serial_ports[0];
  136. else
  137. uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
  138. while (!(UART_GET_LSR(uart) & THRE)) {
  139. SSYNC();
  140. }
  141. #ifndef CONFIG_BF54x
  142. UART_PUT_LCR(uart, UART_GET_LCR(uart)&(~DLAB));
  143. SSYNC();
  144. #endif
  145. UART_PUT_CHAR(uart, (unsigned char)chr);
  146. SSYNC();
  147. }
  148. int kgdb_get_debug_char(void)
  149. {
  150. struct bfin_serial_port *uart;
  151. unsigned char chr;
  152. if (CONFIG_KGDB_UART_PORT < 0
  153. || CONFIG_KGDB_UART_PORT >= BFIN_UART_NR_PORTS)
  154. uart = &bfin_serial_ports[0];
  155. else
  156. uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
  157. while(!(UART_GET_LSR(uart) & DR)) {
  158. SSYNC();
  159. }
  160. #ifndef CONFIG_BF54x
  161. UART_PUT_LCR(uart, UART_GET_LCR(uart)&(~DLAB));
  162. SSYNC();
  163. #endif
  164. chr = UART_GET_CHAR(uart);
  165. SSYNC();
  166. return chr;
  167. }
  168. #endif
  169. #if ANOMALY_05000230 && defined(CONFIG_SERIAL_BFIN_PIO)
  170. # define UART_GET_ANOMALY_THRESHOLD(uart) ((uart)->anomaly_threshold)
  171. # define UART_SET_ANOMALY_THRESHOLD(uart, v) ((uart)->anomaly_threshold = (v))
  172. #else
  173. # define UART_GET_ANOMALY_THRESHOLD(uart) 0
  174. # define UART_SET_ANOMALY_THRESHOLD(uart, v)
  175. #endif
  176. #ifdef CONFIG_SERIAL_BFIN_PIO
  177. static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
  178. {
  179. struct tty_struct *tty = uart->port.info->tty;
  180. unsigned int status, ch, flg;
  181. static struct timeval anomaly_start = { .tv_sec = 0 };
  182. #ifdef CONFIG_KGDB_UART
  183. struct pt_regs *regs = get_irq_regs();
  184. #endif
  185. status = UART_GET_LSR(uart);
  186. UART_CLEAR_LSR(uart);
  187. ch = UART_GET_CHAR(uart);
  188. uart->port.icount.rx++;
  189. #ifdef CONFIG_KGDB_UART
  190. if (uart->port.line == CONFIG_KGDB_UART_PORT) {
  191. if (uart->port.cons->index == CONFIG_KGDB_UART_PORT && ch == 0x1) { /* Ctrl + A */
  192. kgdb_breakkey_pressed(regs);
  193. return;
  194. } else if (kgdb_entry_state == 0 && ch == '$') {/* connection from KGDB */
  195. kgdb_entry_state = 1;
  196. } else if (kgdb_entry_state == 1 && ch == 'q') {
  197. kgdb_entry_state = 0;
  198. kgdb_breakkey_pressed(regs);
  199. return;
  200. } else if (ch == 0x3) {/* Ctrl + C */
  201. kgdb_entry_state = 0;
  202. kgdb_breakkey_pressed(regs);
  203. return;
  204. } else {
  205. kgdb_entry_state = 0;
  206. }
  207. }
  208. #endif
  209. if (ANOMALY_05000230) {
  210. /* The BF533 (and BF561) family of processors have a nice anomaly
  211. * where they continuously generate characters for a "single" break.
  212. * We have to basically ignore this flood until the "next" valid
  213. * character comes across. Due to the nature of the flood, it is
  214. * not possible to reliably catch bytes that are sent too quickly
  215. * after this break. So application code talking to the Blackfin
  216. * which sends a break signal must allow at least 1.5 character
  217. * times after the end of the break for things to stabilize. This
  218. * timeout was picked as it must absolutely be larger than 1
  219. * character time +/- some percent. So 1.5 sounds good. All other
  220. * Blackfin families operate properly. Woo.
  221. * Note: While Anomaly 05000230 does not directly address this,
  222. * the changes that went in for it also fixed this issue.
  223. * That anomaly was fixed in 0.5+ silicon. I like bunnies.
  224. */
  225. if (anomaly_start.tv_sec) {
  226. struct timeval curr;
  227. suseconds_t usecs;
  228. if ((~ch & (~ch + 1)) & 0xff)
  229. goto known_good_char;
  230. do_gettimeofday(&curr);
  231. if (curr.tv_sec - anomaly_start.tv_sec > 1)
  232. goto known_good_char;
  233. usecs = 0;
  234. if (curr.tv_sec != anomaly_start.tv_sec)
  235. usecs += USEC_PER_SEC;
  236. usecs += curr.tv_usec - anomaly_start.tv_usec;
  237. if (usecs > UART_GET_ANOMALY_THRESHOLD(uart))
  238. goto known_good_char;
  239. if (ch)
  240. anomaly_start.tv_sec = 0;
  241. else
  242. anomaly_start = curr;
  243. return;
  244. known_good_char:
  245. anomaly_start.tv_sec = 0;
  246. }
  247. }
  248. if (status & BI) {
  249. if (ANOMALY_05000230)
  250. if (bfin_revid() < 5)
  251. do_gettimeofday(&anomaly_start);
  252. uart->port.icount.brk++;
  253. if (uart_handle_break(&uart->port))
  254. goto ignore_char;
  255. status &= ~(PE | FE);
  256. }
  257. if (status & PE)
  258. uart->port.icount.parity++;
  259. if (status & OE)
  260. uart->port.icount.overrun++;
  261. if (status & FE)
  262. uart->port.icount.frame++;
  263. status &= uart->port.read_status_mask;
  264. if (status & BI)
  265. flg = TTY_BREAK;
  266. else if (status & PE)
  267. flg = TTY_PARITY;
  268. else if (status & FE)
  269. flg = TTY_FRAME;
  270. else
  271. flg = TTY_NORMAL;
  272. if (uart_handle_sysrq_char(&uart->port, ch))
  273. goto ignore_char;
  274. uart_insert_char(&uart->port, status, OE, ch, flg);
  275. ignore_char:
  276. tty_flip_buffer_push(tty);
  277. }
  278. static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
  279. {
  280. struct circ_buf *xmit = &uart->port.info->xmit;
  281. if (uart->port.x_char) {
  282. UART_PUT_CHAR(uart, uart->port.x_char);
  283. uart->port.icount.tx++;
  284. uart->port.x_char = 0;
  285. }
  286. /*
  287. * Check the modem control lines before
  288. * transmitting anything.
  289. */
  290. bfin_serial_mctrl_check(uart);
  291. if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
  292. bfin_serial_stop_tx(&uart->port);
  293. return;
  294. }
  295. while ((UART_GET_LSR(uart) & THRE) && xmit->tail != xmit->head) {
  296. UART_PUT_CHAR(uart, xmit->buf[xmit->tail]);
  297. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  298. uart->port.icount.tx++;
  299. SSYNC();
  300. }
  301. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  302. uart_write_wakeup(&uart->port);
  303. if (uart_circ_empty(xmit))
  304. bfin_serial_stop_tx(&uart->port);
  305. }
  306. static irqreturn_t bfin_serial_rx_int(int irq, void *dev_id)
  307. {
  308. struct bfin_serial_port *uart = dev_id;
  309. spin_lock(&uart->port.lock);
  310. while (UART_GET_LSR(uart) & DR)
  311. bfin_serial_rx_chars(uart);
  312. spin_unlock(&uart->port.lock);
  313. return IRQ_HANDLED;
  314. }
  315. static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id)
  316. {
  317. struct bfin_serial_port *uart = dev_id;
  318. spin_lock(&uart->port.lock);
  319. if (UART_GET_LSR(uart) & THRE)
  320. bfin_serial_tx_chars(uart);
  321. spin_unlock(&uart->port.lock);
  322. return IRQ_HANDLED;
  323. }
  324. #endif
  325. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  326. static void bfin_serial_do_work(struct work_struct *work)
  327. {
  328. struct bfin_serial_port *uart = container_of(work, struct bfin_serial_port, cts_workqueue);
  329. bfin_serial_mctrl_check(uart);
  330. }
  331. #endif
  332. #ifdef CONFIG_SERIAL_BFIN_DMA
  333. static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
  334. {
  335. struct circ_buf *xmit = &uart->port.info->xmit;
  336. unsigned short ier;
  337. uart->tx_done = 0;
  338. if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
  339. uart->tx_count = 0;
  340. uart->tx_done = 1;
  341. return;
  342. }
  343. if (uart->port.x_char) {
  344. UART_PUT_CHAR(uart, uart->port.x_char);
  345. uart->port.icount.tx++;
  346. uart->port.x_char = 0;
  347. }
  348. /*
  349. * Check the modem control lines before
  350. * transmitting anything.
  351. */
  352. bfin_serial_mctrl_check(uart);
  353. uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);
  354. if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail))
  355. uart->tx_count = UART_XMIT_SIZE - xmit->tail;
  356. blackfin_dcache_flush_range((unsigned long)(xmit->buf+xmit->tail),
  357. (unsigned long)(xmit->buf+xmit->tail+uart->tx_count));
  358. set_dma_config(uart->tx_dma_channel,
  359. set_bfin_dma_config(DIR_READ, DMA_FLOW_STOP,
  360. INTR_ON_BUF,
  361. DIMENSION_LINEAR,
  362. DATA_SIZE_8,
  363. DMA_SYNC_RESTART));
  364. set_dma_start_addr(uart->tx_dma_channel, (unsigned long)(xmit->buf+xmit->tail));
  365. set_dma_x_count(uart->tx_dma_channel, uart->tx_count);
  366. set_dma_x_modify(uart->tx_dma_channel, 1);
  367. enable_dma(uart->tx_dma_channel);
  368. #ifdef CONFIG_BF54x
  369. UART_SET_IER(uart, ETBEI);
  370. #else
  371. ier = UART_GET_IER(uart);
  372. ier |= ETBEI;
  373. UART_PUT_IER(uart, ier);
  374. #endif
  375. }
  376. static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
  377. {
  378. struct tty_struct *tty = uart->port.info->tty;
  379. int i, flg, status;
  380. status = UART_GET_LSR(uart);
  381. UART_CLEAR_LSR(uart);
  382. uart->port.icount.rx +=
  383. CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail,
  384. UART_XMIT_SIZE);
  385. if (status & BI) {
  386. uart->port.icount.brk++;
  387. if (uart_handle_break(&uart->port))
  388. goto dma_ignore_char;
  389. status &= ~(PE | FE);
  390. }
  391. if (status & PE)
  392. uart->port.icount.parity++;
  393. if (status & OE)
  394. uart->port.icount.overrun++;
  395. if (status & FE)
  396. uart->port.icount.frame++;
  397. status &= uart->port.read_status_mask;
  398. if (status & BI)
  399. flg = TTY_BREAK;
  400. else if (status & PE)
  401. flg = TTY_PARITY;
  402. else if (status & FE)
  403. flg = TTY_FRAME;
  404. else
  405. flg = TTY_NORMAL;
  406. for (i = uart->rx_dma_buf.tail; i != uart->rx_dma_buf.head; i++) {
  407. if (i >= UART_XMIT_SIZE)
  408. i = 0;
  409. if (!uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i]))
  410. uart_insert_char(&uart->port, status, OE,
  411. uart->rx_dma_buf.buf[i], flg);
  412. }
  413. dma_ignore_char:
  414. tty_flip_buffer_push(tty);
  415. }
  416. void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
  417. {
  418. int x_pos, pos;
  419. uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
  420. x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
  421. uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
  422. if (uart->rx_dma_nrows == DMA_RX_YCOUNT)
  423. uart->rx_dma_nrows = 0;
  424. x_pos = DMA_RX_XCOUNT - x_pos;
  425. if (x_pos == DMA_RX_XCOUNT)
  426. x_pos = 0;
  427. pos = uart->rx_dma_nrows * DMA_RX_XCOUNT + x_pos;
  428. if (pos != uart->rx_dma_buf.tail) {
  429. uart->rx_dma_buf.head = pos;
  430. bfin_serial_dma_rx_chars(uart);
  431. uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
  432. }
  433. uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
  434. add_timer(&(uart->rx_dma_timer));
  435. }
  436. static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
  437. {
  438. struct bfin_serial_port *uart = dev_id;
  439. struct circ_buf *xmit = &uart->port.info->xmit;
  440. unsigned short ier;
  441. spin_lock(&uart->port.lock);
  442. if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
  443. disable_dma(uart->tx_dma_channel);
  444. clear_dma_irqstat(uart->tx_dma_channel);
  445. #ifdef CONFIG_BF54x
  446. UART_CLEAR_IER(uart, ETBEI);
  447. #else
  448. ier = UART_GET_IER(uart);
  449. ier &= ~ETBEI;
  450. UART_PUT_IER(uart, ier);
  451. #endif
  452. xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
  453. uart->port.icount.tx += uart->tx_count;
  454. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  455. uart_write_wakeup(&uart->port);
  456. bfin_serial_dma_tx_chars(uart);
  457. }
  458. spin_unlock(&uart->port.lock);
  459. return IRQ_HANDLED;
  460. }
  461. static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id)
  462. {
  463. struct bfin_serial_port *uart = dev_id;
  464. unsigned short irqstat;
  465. spin_lock(&uart->port.lock);
  466. irqstat = get_dma_curr_irqstat(uart->rx_dma_channel);
  467. clear_dma_irqstat(uart->rx_dma_channel);
  468. spin_unlock(&uart->port.lock);
  469. del_timer(&(uart->rx_dma_timer));
  470. uart->rx_dma_timer.expires = jiffies;
  471. add_timer(&(uart->rx_dma_timer));
  472. return IRQ_HANDLED;
  473. }
  474. #endif
  475. /*
  476. * Return TIOCSER_TEMT when transmitter is not busy.
  477. */
  478. static unsigned int bfin_serial_tx_empty(struct uart_port *port)
  479. {
  480. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  481. unsigned short lsr;
  482. lsr = UART_GET_LSR(uart);
  483. if (lsr & TEMT)
  484. return TIOCSER_TEMT;
  485. else
  486. return 0;
  487. }
  488. static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
  489. {
  490. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  491. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  492. if (uart->cts_pin < 0)
  493. return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  494. # ifdef BF54x
  495. if (UART_GET_MSR(uart) & CTS)
  496. # else
  497. if (gpio_get_value(uart->cts_pin))
  498. # endif
  499. return TIOCM_DSR | TIOCM_CAR;
  500. else
  501. #endif
  502. return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  503. }
  504. static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
  505. {
  506. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  507. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  508. if (uart->rts_pin < 0)
  509. return;
  510. if (mctrl & TIOCM_RTS)
  511. # ifdef BF54x
  512. UART_PUT_MCR(uart, UART_GET_MCR(uart) & ~MRTS);
  513. # else
  514. gpio_set_value(uart->rts_pin, 0);
  515. # endif
  516. else
  517. # ifdef BF54x
  518. UART_PUT_MCR(uart, UART_GET_MCR(uart) | MRTS);
  519. # else
  520. gpio_set_value(uart->rts_pin, 1);
  521. # endif
  522. #endif
  523. }
  524. /*
  525. * Handle any change of modem status signal since we were last called.
  526. */
  527. static void bfin_serial_mctrl_check(struct bfin_serial_port *uart)
  528. {
  529. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  530. unsigned int status;
  531. struct uart_info *info = uart->port.info;
  532. struct tty_struct *tty = info->tty;
  533. status = bfin_serial_get_mctrl(&uart->port);
  534. uart_handle_cts_change(&uart->port, status & TIOCM_CTS);
  535. if (!(status & TIOCM_CTS)) {
  536. tty->hw_stopped = 1;
  537. schedule_work(&uart->cts_workqueue);
  538. } else {
  539. tty->hw_stopped = 0;
  540. }
  541. #endif
  542. }
  543. /*
  544. * Interrupts are always disabled.
  545. */
  546. static void bfin_serial_break_ctl(struct uart_port *port, int break_state)
  547. {
  548. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  549. u16 lcr = UART_GET_LCR(uart);
  550. if (break_state)
  551. lcr |= SB;
  552. else
  553. lcr &= ~SB;
  554. UART_PUT_LCR(uart, lcr);
  555. SSYNC();
  556. }
  557. static int bfin_serial_startup(struct uart_port *port)
  558. {
  559. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  560. #ifdef CONFIG_SERIAL_BFIN_DMA
  561. dma_addr_t dma_handle;
  562. if (request_dma(uart->rx_dma_channel, "BFIN_UART_RX") < 0) {
  563. printk(KERN_NOTICE "Unable to attach Blackfin UART RX DMA channel\n");
  564. return -EBUSY;
  565. }
  566. if (request_dma(uart->tx_dma_channel, "BFIN_UART_TX") < 0) {
  567. printk(KERN_NOTICE "Unable to attach Blackfin UART TX DMA channel\n");
  568. free_dma(uart->rx_dma_channel);
  569. return -EBUSY;
  570. }
  571. set_dma_callback(uart->rx_dma_channel, bfin_serial_dma_rx_int, uart);
  572. set_dma_callback(uart->tx_dma_channel, bfin_serial_dma_tx_int, uart);
  573. uart->rx_dma_buf.buf = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE, &dma_handle, GFP_DMA);
  574. uart->rx_dma_buf.head = 0;
  575. uart->rx_dma_buf.tail = 0;
  576. uart->rx_dma_nrows = 0;
  577. set_dma_config(uart->rx_dma_channel,
  578. set_bfin_dma_config(DIR_WRITE, DMA_FLOW_AUTO,
  579. INTR_ON_ROW, DIMENSION_2D,
  580. DATA_SIZE_8,
  581. DMA_SYNC_RESTART));
  582. set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT);
  583. set_dma_x_modify(uart->rx_dma_channel, 1);
  584. set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT);
  585. set_dma_y_modify(uart->rx_dma_channel, 1);
  586. set_dma_start_addr(uart->rx_dma_channel, (unsigned long)uart->rx_dma_buf.buf);
  587. enable_dma(uart->rx_dma_channel);
  588. uart->rx_dma_timer.data = (unsigned long)(uart);
  589. uart->rx_dma_timer.function = (void *)bfin_serial_rx_dma_timeout;
  590. uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
  591. add_timer(&(uart->rx_dma_timer));
  592. #else
  593. if (request_irq(uart->port.irq, bfin_serial_rx_int, IRQF_DISABLED,
  594. "BFIN_UART_RX", uart)) {
  595. # ifdef CONFIG_KGDB_UART
  596. if (uart->port.line != CONFIG_KGDB_UART_PORT) {
  597. # endif
  598. printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n");
  599. return -EBUSY;
  600. # ifdef CONFIG_KGDB_UART
  601. }
  602. # endif
  603. }
  604. if (request_irq
  605. (uart->port.irq+1, bfin_serial_tx_int, IRQF_DISABLED,
  606. "BFIN_UART_TX", uart)) {
  607. printk(KERN_NOTICE "Unable to attach BlackFin UART TX interrupt\n");
  608. free_irq(uart->port.irq, uart);
  609. return -EBUSY;
  610. }
  611. #endif
  612. #ifdef CONFIG_BF54x
  613. UART_SET_IER(uart, ERBFI);
  614. #else
  615. UART_PUT_IER(uart, UART_GET_IER(uart) | ERBFI);
  616. #endif
  617. return 0;
  618. }
  619. static void bfin_serial_shutdown(struct uart_port *port)
  620. {
  621. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  622. #ifdef CONFIG_SERIAL_BFIN_DMA
  623. disable_dma(uart->tx_dma_channel);
  624. free_dma(uart->tx_dma_channel);
  625. disable_dma(uart->rx_dma_channel);
  626. free_dma(uart->rx_dma_channel);
  627. del_timer(&(uart->rx_dma_timer));
  628. dma_free_coherent(NULL, PAGE_SIZE, uart->rx_dma_buf.buf, 0);
  629. #else
  630. #ifdef CONFIG_KGDB_UART
  631. if (uart->port.line != CONFIG_KGDB_UART_PORT)
  632. #endif
  633. free_irq(uart->port.irq, uart);
  634. free_irq(uart->port.irq+1, uart);
  635. #endif
  636. }
  637. static void
  638. bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
  639. struct ktermios *old)
  640. {
  641. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  642. unsigned long flags;
  643. unsigned int baud, quot;
  644. unsigned short val, ier, lcr = 0;
  645. switch (termios->c_cflag & CSIZE) {
  646. case CS8:
  647. lcr = WLS(8);
  648. break;
  649. case CS7:
  650. lcr = WLS(7);
  651. break;
  652. case CS6:
  653. lcr = WLS(6);
  654. break;
  655. case CS5:
  656. lcr = WLS(5);
  657. break;
  658. default:
  659. printk(KERN_ERR "%s: word lengh not supported\n",
  660. __FUNCTION__);
  661. }
  662. if (termios->c_cflag & CSTOPB)
  663. lcr |= STB;
  664. if (termios->c_cflag & PARENB)
  665. lcr |= PEN;
  666. if (!(termios->c_cflag & PARODD))
  667. lcr |= EPS;
  668. if (termios->c_cflag & CMSPAR)
  669. lcr |= STP;
  670. port->read_status_mask = OE;
  671. if (termios->c_iflag & INPCK)
  672. port->read_status_mask |= (FE | PE);
  673. if (termios->c_iflag & (BRKINT | PARMRK))
  674. port->read_status_mask |= BI;
  675. /*
  676. * Characters to ignore
  677. */
  678. port->ignore_status_mask = 0;
  679. if (termios->c_iflag & IGNPAR)
  680. port->ignore_status_mask |= FE | PE;
  681. if (termios->c_iflag & IGNBRK) {
  682. port->ignore_status_mask |= BI;
  683. /*
  684. * If we're ignoring parity and break indicators,
  685. * ignore overruns too (for real raw support).
  686. */
  687. if (termios->c_iflag & IGNPAR)
  688. port->ignore_status_mask |= OE;
  689. }
  690. baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
  691. quot = uart_get_divisor(port, baud);
  692. spin_lock_irqsave(&uart->port.lock, flags);
  693. UART_SET_ANOMALY_THRESHOLD(uart, USEC_PER_SEC / baud * 15);
  694. /* Disable UART */
  695. ier = UART_GET_IER(uart);
  696. #ifdef CONFIG_BF54x
  697. UART_CLEAR_IER(uart, 0xF);
  698. #else
  699. UART_PUT_IER(uart, 0);
  700. #endif
  701. #ifndef CONFIG_BF54x
  702. /* Set DLAB in LCR to Access DLL and DLH */
  703. val = UART_GET_LCR(uart);
  704. val |= DLAB;
  705. UART_PUT_LCR(uart, val);
  706. SSYNC();
  707. #endif
  708. UART_PUT_DLL(uart, quot & 0xFF);
  709. SSYNC();
  710. UART_PUT_DLH(uart, (quot >> 8) & 0xFF);
  711. SSYNC();
  712. #ifndef CONFIG_BF54x
  713. /* Clear DLAB in LCR to Access THR RBR IER */
  714. val = UART_GET_LCR(uart);
  715. val &= ~DLAB;
  716. UART_PUT_LCR(uart, val);
  717. SSYNC();
  718. #endif
  719. UART_PUT_LCR(uart, lcr);
  720. /* Enable UART */
  721. #ifdef CONFIG_BF54x
  722. UART_SET_IER(uart, ier);
  723. #else
  724. UART_PUT_IER(uart, ier);
  725. #endif
  726. val = UART_GET_GCTL(uart);
  727. val |= UCEN;
  728. UART_PUT_GCTL(uart, val);
  729. spin_unlock_irqrestore(&uart->port.lock, flags);
  730. }
  731. static const char *bfin_serial_type(struct uart_port *port)
  732. {
  733. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  734. return uart->port.type == PORT_BFIN ? "BFIN-UART" : NULL;
  735. }
  736. /*
  737. * Release the memory region(s) being used by 'port'.
  738. */
  739. static void bfin_serial_release_port(struct uart_port *port)
  740. {
  741. }
  742. /*
  743. * Request the memory region(s) being used by 'port'.
  744. */
  745. static int bfin_serial_request_port(struct uart_port *port)
  746. {
  747. return 0;
  748. }
  749. /*
  750. * Configure/autoconfigure the port.
  751. */
  752. static void bfin_serial_config_port(struct uart_port *port, int flags)
  753. {
  754. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  755. if (flags & UART_CONFIG_TYPE &&
  756. bfin_serial_request_port(&uart->port) == 0)
  757. uart->port.type = PORT_BFIN;
  758. }
  759. /*
  760. * Verify the new serial_struct (for TIOCSSERIAL).
  761. * The only change we allow are to the flags and type, and
  762. * even then only between PORT_BFIN and PORT_UNKNOWN
  763. */
  764. static int
  765. bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
  766. {
  767. return 0;
  768. }
  769. /*
  770. * Enable the IrDA function if tty->ldisc.num is N_IRDA.
  771. * In other cases, disable IrDA function.
  772. */
  773. static void bfin_set_ldisc(struct tty_struct *tty)
  774. {
  775. int line = tty->index;
  776. unsigned short val;
  777. if (line >= tty->driver->num)
  778. return;
  779. switch (tty->ldisc.num) {
  780. case N_IRDA:
  781. val = UART_GET_GCTL(&bfin_serial_ports[line]);
  782. val |= (IREN | RPOLC);
  783. UART_PUT_GCTL(&bfin_serial_ports[line], val);
  784. break;
  785. default:
  786. val = UART_GET_GCTL(&bfin_serial_ports[line]);
  787. val &= ~(IREN | RPOLC);
  788. UART_PUT_GCTL(&bfin_serial_ports[line], val);
  789. }
  790. }
  791. static struct uart_ops bfin_serial_pops = {
  792. .tx_empty = bfin_serial_tx_empty,
  793. .set_mctrl = bfin_serial_set_mctrl,
  794. .get_mctrl = bfin_serial_get_mctrl,
  795. .stop_tx = bfin_serial_stop_tx,
  796. .start_tx = bfin_serial_start_tx,
  797. .stop_rx = bfin_serial_stop_rx,
  798. .enable_ms = bfin_serial_enable_ms,
  799. .break_ctl = bfin_serial_break_ctl,
  800. .startup = bfin_serial_startup,
  801. .shutdown = bfin_serial_shutdown,
  802. .set_termios = bfin_serial_set_termios,
  803. .type = bfin_serial_type,
  804. .release_port = bfin_serial_release_port,
  805. .request_port = bfin_serial_request_port,
  806. .config_port = bfin_serial_config_port,
  807. .verify_port = bfin_serial_verify_port,
  808. };
  809. static void __init bfin_serial_init_ports(void)
  810. {
  811. static int first = 1;
  812. int i;
  813. if (!first)
  814. return;
  815. first = 0;
  816. for (i = 0; i < nr_ports; i++) {
  817. bfin_serial_ports[i].port.uartclk = get_sclk();
  818. bfin_serial_ports[i].port.ops = &bfin_serial_pops;
  819. bfin_serial_ports[i].port.line = i;
  820. bfin_serial_ports[i].port.iotype = UPIO_MEM;
  821. bfin_serial_ports[i].port.membase =
  822. (void __iomem *)bfin_serial_resource[i].uart_base_addr;
  823. bfin_serial_ports[i].port.mapbase =
  824. bfin_serial_resource[i].uart_base_addr;
  825. bfin_serial_ports[i].port.irq =
  826. bfin_serial_resource[i].uart_irq;
  827. bfin_serial_ports[i].port.flags = UPF_BOOT_AUTOCONF;
  828. #ifdef CONFIG_SERIAL_BFIN_DMA
  829. bfin_serial_ports[i].tx_done = 1;
  830. bfin_serial_ports[i].tx_count = 0;
  831. bfin_serial_ports[i].tx_dma_channel =
  832. bfin_serial_resource[i].uart_tx_dma_channel;
  833. bfin_serial_ports[i].rx_dma_channel =
  834. bfin_serial_resource[i].uart_rx_dma_channel;
  835. init_timer(&(bfin_serial_ports[i].rx_dma_timer));
  836. #endif
  837. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  838. INIT_WORK(&bfin_serial_ports[i].cts_workqueue, bfin_serial_do_work);
  839. bfin_serial_ports[i].cts_pin =
  840. bfin_serial_resource[i].uart_cts_pin;
  841. bfin_serial_ports[i].rts_pin =
  842. bfin_serial_resource[i].uart_rts_pin;
  843. #endif
  844. bfin_serial_hw_init(&bfin_serial_ports[i]);
  845. }
  846. }
  847. #ifdef CONFIG_SERIAL_BFIN_CONSOLE
  848. /*
  849. * If the port was already initialised (eg, by a boot loader),
  850. * try to determine the current setup.
  851. */
  852. static void __init
  853. bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
  854. int *parity, int *bits)
  855. {
  856. unsigned short status;
  857. status = UART_GET_IER(uart) & (ERBFI | ETBEI);
  858. if (status == (ERBFI | ETBEI)) {
  859. /* ok, the port was enabled */
  860. unsigned short lcr, val;
  861. unsigned short dlh, dll;
  862. lcr = UART_GET_LCR(uart);
  863. *parity = 'n';
  864. if (lcr & PEN) {
  865. if (lcr & EPS)
  866. *parity = 'e';
  867. else
  868. *parity = 'o';
  869. }
  870. switch (lcr & 0x03) {
  871. case 0: *bits = 5; break;
  872. case 1: *bits = 6; break;
  873. case 2: *bits = 7; break;
  874. case 3: *bits = 8; break;
  875. }
  876. #ifndef CONFIG_BF54x
  877. /* Set DLAB in LCR to Access DLL and DLH */
  878. val = UART_GET_LCR(uart);
  879. val |= DLAB;
  880. UART_PUT_LCR(uart, val);
  881. #endif
  882. dll = UART_GET_DLL(uart);
  883. dlh = UART_GET_DLH(uart);
  884. #ifndef CONFIG_BF54x
  885. /* Clear DLAB in LCR to Access THR RBR IER */
  886. val = UART_GET_LCR(uart);
  887. val &= ~DLAB;
  888. UART_PUT_LCR(uart, val);
  889. #endif
  890. *baud = get_sclk() / (16*(dll | dlh << 8));
  891. }
  892. pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __FUNCTION__, *baud, *parity, *bits);
  893. }
  894. #endif
  895. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  896. static struct uart_driver bfin_serial_reg;
  897. static int __init
  898. bfin_serial_console_setup(struct console *co, char *options)
  899. {
  900. struct bfin_serial_port *uart;
  901. # ifdef CONFIG_SERIAL_BFIN_CONSOLE
  902. int baud = 57600;
  903. int bits = 8;
  904. int parity = 'n';
  905. # ifdef CONFIG_SERIAL_BFIN_CTSRTS
  906. int flow = 'r';
  907. # else
  908. int flow = 'n';
  909. # endif
  910. # endif
  911. /*
  912. * Check whether an invalid uart number has been specified, and
  913. * if so, search for the first available port that does have
  914. * console support.
  915. */
  916. if (co->index == -1 || co->index >= nr_ports)
  917. co->index = 0;
  918. uart = &bfin_serial_ports[co->index];
  919. # ifdef CONFIG_SERIAL_BFIN_CONSOLE
  920. if (options)
  921. uart_parse_options(options, &baud, &parity, &bits, &flow);
  922. else
  923. bfin_serial_console_get_options(uart, &baud, &parity, &bits);
  924. return uart_set_options(&uart->port, co, baud, parity, bits, flow);
  925. # else
  926. return 0;
  927. # endif
  928. }
  929. #endif /* defined (CONFIG_SERIAL_BFIN_CONSOLE) ||
  930. defined (CONFIG_EARLY_PRINTK) */
  931. #ifdef CONFIG_SERIAL_BFIN_CONSOLE
  932. static void bfin_serial_console_putchar(struct uart_port *port, int ch)
  933. {
  934. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  935. while (!(UART_GET_LSR(uart) & THRE))
  936. barrier();
  937. UART_PUT_CHAR(uart, ch);
  938. SSYNC();
  939. }
  940. /*
  941. * Interrupts are disabled on entering
  942. */
  943. static void
  944. bfin_serial_console_write(struct console *co, const char *s, unsigned int count)
  945. {
  946. struct bfin_serial_port *uart = &bfin_serial_ports[co->index];
  947. int flags = 0;
  948. spin_lock_irqsave(&uart->port.lock, flags);
  949. uart_console_write(&uart->port, s, count, bfin_serial_console_putchar);
  950. spin_unlock_irqrestore(&uart->port.lock, flags);
  951. }
  952. static struct console bfin_serial_console = {
  953. .name = BFIN_SERIAL_NAME,
  954. .write = bfin_serial_console_write,
  955. .device = uart_console_device,
  956. .setup = bfin_serial_console_setup,
  957. .flags = CON_PRINTBUFFER,
  958. .index = -1,
  959. .data = &bfin_serial_reg,
  960. };
  961. static int __init bfin_serial_rs_console_init(void)
  962. {
  963. bfin_serial_init_ports();
  964. register_console(&bfin_serial_console);
  965. #ifdef CONFIG_KGDB_UART
  966. kgdb_entry_state = 0;
  967. init_kgdb_uart();
  968. #endif
  969. return 0;
  970. }
  971. console_initcall(bfin_serial_rs_console_init);
  972. #define BFIN_SERIAL_CONSOLE &bfin_serial_console
  973. #else
  974. #define BFIN_SERIAL_CONSOLE NULL
  975. #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
  976. #ifdef CONFIG_EARLY_PRINTK
  977. static __init void early_serial_putc(struct uart_port *port, int ch)
  978. {
  979. unsigned timeout = 0xffff;
  980. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  981. while ((!(UART_GET_LSR(uart) & THRE)) && --timeout)
  982. cpu_relax();
  983. UART_PUT_CHAR(uart, ch);
  984. }
  985. static __init void early_serial_write(struct console *con, const char *s,
  986. unsigned int n)
  987. {
  988. struct bfin_serial_port *uart = &bfin_serial_ports[con->index];
  989. unsigned int i;
  990. for (i = 0; i < n; i++, s++) {
  991. if (*s == '\n')
  992. early_serial_putc(&uart->port, '\r');
  993. early_serial_putc(&uart->port, *s);
  994. }
  995. }
  996. static struct __init console bfin_early_serial_console = {
  997. .name = "early_BFuart",
  998. .write = early_serial_write,
  999. .device = uart_console_device,
  1000. .flags = CON_PRINTBUFFER,
  1001. .setup = bfin_serial_console_setup,
  1002. .index = -1,
  1003. .data = &bfin_serial_reg,
  1004. };
  1005. struct console __init *bfin_earlyserial_init(unsigned int port,
  1006. unsigned int cflag)
  1007. {
  1008. struct bfin_serial_port *uart;
  1009. struct ktermios t;
  1010. if (port == -1 || port >= nr_ports)
  1011. port = 0;
  1012. bfin_serial_init_ports();
  1013. bfin_early_serial_console.index = port;
  1014. uart = &bfin_serial_ports[port];
  1015. t.c_cflag = cflag;
  1016. t.c_iflag = 0;
  1017. t.c_oflag = 0;
  1018. t.c_lflag = ICANON;
  1019. t.c_line = port;
  1020. bfin_serial_set_termios(&uart->port, &t, &t);
  1021. return &bfin_early_serial_console;
  1022. }
  1023. #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
  1024. static struct uart_driver bfin_serial_reg = {
  1025. .owner = THIS_MODULE,
  1026. .driver_name = "bfin-uart",
  1027. .dev_name = BFIN_SERIAL_NAME,
  1028. .major = BFIN_SERIAL_MAJOR,
  1029. .minor = BFIN_SERIAL_MINOR,
  1030. .nr = BFIN_UART_NR_PORTS,
  1031. .cons = BFIN_SERIAL_CONSOLE,
  1032. };
  1033. static int bfin_serial_suspend(struct platform_device *dev, pm_message_t state)
  1034. {
  1035. struct bfin_serial_port *uart = platform_get_drvdata(dev);
  1036. if (uart)
  1037. uart_suspend_port(&bfin_serial_reg, &uart->port);
  1038. return 0;
  1039. }
  1040. static int bfin_serial_resume(struct platform_device *dev)
  1041. {
  1042. struct bfin_serial_port *uart = platform_get_drvdata(dev);
  1043. if (uart)
  1044. uart_resume_port(&bfin_serial_reg, &uart->port);
  1045. return 0;
  1046. }
  1047. static int bfin_serial_probe(struct platform_device *dev)
  1048. {
  1049. struct resource *res = dev->resource;
  1050. int i;
  1051. for (i = 0; i < dev->num_resources; i++, res++)
  1052. if (res->flags & IORESOURCE_MEM)
  1053. break;
  1054. if (i < dev->num_resources) {
  1055. for (i = 0; i < nr_ports; i++, res++) {
  1056. if (bfin_serial_ports[i].port.mapbase != res->start)
  1057. continue;
  1058. bfin_serial_ports[i].port.dev = &dev->dev;
  1059. uart_add_one_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
  1060. platform_set_drvdata(dev, &bfin_serial_ports[i]);
  1061. }
  1062. }
  1063. return 0;
  1064. }
  1065. static int bfin_serial_remove(struct platform_device *pdev)
  1066. {
  1067. struct bfin_serial_port *uart = platform_get_drvdata(pdev);
  1068. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  1069. gpio_free(uart->cts_pin);
  1070. gpio_free(uart->rts_pin);
  1071. #endif
  1072. platform_set_drvdata(pdev, NULL);
  1073. if (uart)
  1074. uart_remove_one_port(&bfin_serial_reg, &uart->port);
  1075. return 0;
  1076. }
  1077. static struct platform_driver bfin_serial_driver = {
  1078. .probe = bfin_serial_probe,
  1079. .remove = bfin_serial_remove,
  1080. .suspend = bfin_serial_suspend,
  1081. .resume = bfin_serial_resume,
  1082. .driver = {
  1083. .name = "bfin-uart",
  1084. .owner = THIS_MODULE,
  1085. },
  1086. };
  1087. static int __init bfin_serial_init(void)
  1088. {
  1089. int ret;
  1090. #ifdef CONFIG_KGDB_UART
  1091. struct bfin_serial_port *uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
  1092. struct ktermios t;
  1093. #endif
  1094. pr_info("Serial: Blackfin serial driver\n");
  1095. bfin_serial_init_ports();
  1096. ret = uart_register_driver(&bfin_serial_reg);
  1097. if (ret == 0) {
  1098. bfin_serial_reg.tty_driver->set_ldisc = bfin_set_ldisc;
  1099. ret = platform_driver_register(&bfin_serial_driver);
  1100. if (ret) {
  1101. pr_debug("uart register failed\n");
  1102. uart_unregister_driver(&bfin_serial_reg);
  1103. }
  1104. }
  1105. #ifdef CONFIG_KGDB_UART
  1106. if (uart->port.cons->index != CONFIG_KGDB_UART_PORT) {
  1107. request_irq(uart->port.irq, bfin_serial_rx_int,
  1108. IRQF_DISABLED, "BFIN_UART_RX", uart);
  1109. pr_info("Request irq for kgdb uart port\n");
  1110. #ifdef CONFIG_BF54x
  1111. UART_SET_IER(uart, ERBFI);
  1112. #else
  1113. UART_PUT_IER(uart, UART_GET_IER(uart) | ERBFI);
  1114. #endif
  1115. SSYNC();
  1116. t.c_cflag = CS8|B57600;
  1117. t.c_iflag = 0;
  1118. t.c_oflag = 0;
  1119. t.c_lflag = ICANON;
  1120. t.c_line = CONFIG_KGDB_UART_PORT;
  1121. bfin_serial_set_termios(&uart->port, &t, &t);
  1122. }
  1123. #endif
  1124. return ret;
  1125. }
  1126. static void __exit bfin_serial_exit(void)
  1127. {
  1128. platform_driver_unregister(&bfin_serial_driver);
  1129. uart_unregister_driver(&bfin_serial_reg);
  1130. }
  1131. module_init(bfin_serial_init);
  1132. module_exit(bfin_serial_exit);
  1133. MODULE_AUTHOR("Aubrey.Li <aubrey.li@analog.com>");
  1134. MODULE_DESCRIPTION("Blackfin generic serial port driver");
  1135. MODULE_LICENSE("GPL");
  1136. MODULE_ALIAS_CHARDEV_MAJOR(BFIN_SERIAL_MAJOR);
  1137. MODULE_ALIAS("platform:bfin-uart");