tw9910.c 23 KB

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  1. /*
  2. * tw9910 Video Driver
  3. *
  4. * Copyright (C) 2008 Renesas Solutions Corp.
  5. * Kuninori Morimoto <morimoto.kuninori@renesas.com>
  6. *
  7. * Based on ov772x driver,
  8. *
  9. * Copyright (C) 2008 Kuninori Morimoto <morimoto.kuninori@renesas.com>
  10. * Copyright 2006-7 Jonathan Corbet <corbet@lwn.net>
  11. * Copyright (C) 2008 Magnus Damm
  12. * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de>
  13. *
  14. * This program is free software; you can redistribute it and/or modify
  15. * it under the terms of the GNU General Public License version 2 as
  16. * published by the Free Software Foundation.
  17. */
  18. #include <linux/init.h>
  19. #include <linux/module.h>
  20. #include <linux/i2c.h>
  21. #include <linux/slab.h>
  22. #include <linux/kernel.h>
  23. #include <linux/delay.h>
  24. #include <linux/videodev2.h>
  25. #include <media/v4l2-chip-ident.h>
  26. #include <media/v4l2-subdev.h>
  27. #include <media/soc_camera.h>
  28. #include <media/tw9910.h>
  29. #define GET_ID(val) ((val & 0xF8) >> 3)
  30. #define GET_REV(val) (val & 0x07)
  31. /*
  32. * register offset
  33. */
  34. #define ID 0x00 /* Product ID Code Register */
  35. #define STATUS1 0x01 /* Chip Status Register I */
  36. #define INFORM 0x02 /* Input Format */
  37. #define OPFORM 0x03 /* Output Format Control Register */
  38. #define DLYCTR 0x04 /* Hysteresis and HSYNC Delay Control */
  39. #define OUTCTR1 0x05 /* Output Control I */
  40. #define ACNTL1 0x06 /* Analog Control Register 1 */
  41. #define CROP_HI 0x07 /* Cropping Register, High */
  42. #define VDELAY_LO 0x08 /* Vertical Delay Register, Low */
  43. #define VACTIVE_LO 0x09 /* Vertical Active Register, Low */
  44. #define HDELAY_LO 0x0A /* Horizontal Delay Register, Low */
  45. #define HACTIVE_LO 0x0B /* Horizontal Active Register, Low */
  46. #define CNTRL1 0x0C /* Control Register I */
  47. #define VSCALE_LO 0x0D /* Vertical Scaling Register, Low */
  48. #define SCALE_HI 0x0E /* Scaling Register, High */
  49. #define HSCALE_LO 0x0F /* Horizontal Scaling Register, Low */
  50. #define BRIGHT 0x10 /* BRIGHTNESS Control Register */
  51. #define CONTRAST 0x11 /* CONTRAST Control Register */
  52. #define SHARPNESS 0x12 /* SHARPNESS Control Register I */
  53. #define SAT_U 0x13 /* Chroma (U) Gain Register */
  54. #define SAT_V 0x14 /* Chroma (V) Gain Register */
  55. #define HUE 0x15 /* Hue Control Register */
  56. #define CORING1 0x17
  57. #define CORING2 0x18 /* Coring and IF compensation */
  58. #define VBICNTL 0x19 /* VBI Control Register */
  59. #define ACNTL2 0x1A /* Analog Control 2 */
  60. #define OUTCTR2 0x1B /* Output Control 2 */
  61. #define SDT 0x1C /* Standard Selection */
  62. #define SDTR 0x1D /* Standard Recognition */
  63. #define TEST 0x1F /* Test Control Register */
  64. #define CLMPG 0x20 /* Clamping Gain */
  65. #define IAGC 0x21 /* Individual AGC Gain */
  66. #define AGCGAIN 0x22 /* AGC Gain */
  67. #define PEAKWT 0x23 /* White Peak Threshold */
  68. #define CLMPL 0x24 /* Clamp level */
  69. #define SYNCT 0x25 /* Sync Amplitude */
  70. #define MISSCNT 0x26 /* Sync Miss Count Register */
  71. #define PCLAMP 0x27 /* Clamp Position Register */
  72. #define VCNTL1 0x28 /* Vertical Control I */
  73. #define VCNTL2 0x29 /* Vertical Control II */
  74. #define CKILL 0x2A /* Color Killer Level Control */
  75. #define COMB 0x2B /* Comb Filter Control */
  76. #define LDLY 0x2C /* Luma Delay and H Filter Control */
  77. #define MISC1 0x2D /* Miscellaneous Control I */
  78. #define LOOP 0x2E /* LOOP Control Register */
  79. #define MISC2 0x2F /* Miscellaneous Control II */
  80. #define MVSN 0x30 /* Macrovision Detection */
  81. #define STATUS2 0x31 /* Chip STATUS II */
  82. #define HFREF 0x32 /* H monitor */
  83. #define CLMD 0x33 /* CLAMP MODE */
  84. #define IDCNTL 0x34 /* ID Detection Control */
  85. #define CLCNTL1 0x35 /* Clamp Control I */
  86. #define ANAPLLCTL 0x4C
  87. #define VBIMIN 0x4D
  88. #define HSLOWCTL 0x4E
  89. #define WSS3 0x4F
  90. #define FILLDATA 0x50
  91. #define SDID 0x51
  92. #define DID 0x52
  93. #define WSS1 0x53
  94. #define WSS2 0x54
  95. #define VVBI 0x55
  96. #define LCTL6 0x56
  97. #define LCTL7 0x57
  98. #define LCTL8 0x58
  99. #define LCTL9 0x59
  100. #define LCTL10 0x5A
  101. #define LCTL11 0x5B
  102. #define LCTL12 0x5C
  103. #define LCTL13 0x5D
  104. #define LCTL14 0x5E
  105. #define LCTL15 0x5F
  106. #define LCTL16 0x60
  107. #define LCTL17 0x61
  108. #define LCTL18 0x62
  109. #define LCTL19 0x63
  110. #define LCTL20 0x64
  111. #define LCTL21 0x65
  112. #define LCTL22 0x66
  113. #define LCTL23 0x67
  114. #define LCTL24 0x68
  115. #define LCTL25 0x69
  116. #define LCTL26 0x6A
  117. #define HSBEGIN 0x6B
  118. #define HSEND 0x6C
  119. #define OVSDLY 0x6D
  120. #define OVSEND 0x6E
  121. #define VBIDELAY 0x6F
  122. /*
  123. * register detail
  124. */
  125. /* INFORM */
  126. #define FC27_ON 0x40 /* 1 : Input crystal clock frequency is 27MHz */
  127. #define FC27_FF 0x00 /* 0 : Square pixel mode. */
  128. /* Must use 24.54MHz for 60Hz field rate */
  129. /* source or 29.5MHz for 50Hz field rate */
  130. #define IFSEL_S 0x10 /* 01 : S-video decoding */
  131. #define IFSEL_C 0x00 /* 00 : Composite video decoding */
  132. /* Y input video selection */
  133. #define YSEL_M0 0x00 /* 00 : Mux0 selected */
  134. #define YSEL_M1 0x04 /* 01 : Mux1 selected */
  135. #define YSEL_M2 0x08 /* 10 : Mux2 selected */
  136. #define YSEL_M3 0x10 /* 11 : Mux3 selected */
  137. /* OPFORM */
  138. #define MODE 0x80 /* 0 : CCIR601 compatible YCrCb 4:2:2 format */
  139. /* 1 : ITU-R-656 compatible data sequence format */
  140. #define LEN 0x40 /* 0 : 8-bit YCrCb 4:2:2 output format */
  141. /* 1 : 16-bit YCrCb 4:2:2 output format.*/
  142. #define LLCMODE 0x20 /* 1 : LLC output mode. */
  143. /* 0 : free-run output mode */
  144. #define AINC 0x10 /* Serial interface auto-indexing control */
  145. /* 0 : auto-increment */
  146. /* 1 : non-auto */
  147. #define VSCTL 0x08 /* 1 : Vertical out ctrl by DVALID */
  148. /* 0 : Vertical out ctrl by HACTIVE and DVALID */
  149. #define OEN_TRI_SEL_MASK 0x07
  150. #define OEN_TRI_SEL_ALL_ON 0x00 /* Enable output for Rev0/Rev1 */
  151. #define OEN_TRI_SEL_ALL_OFF_r0 0x06 /* All tri-stated for Rev0 */
  152. #define OEN_TRI_SEL_ALL_OFF_r1 0x07 /* All tri-stated for Rev1 */
  153. /* OUTCTR1 */
  154. #define VSP_LO 0x00 /* 0 : VS pin output polarity is active low */
  155. #define VSP_HI 0x80 /* 1 : VS pin output polarity is active high. */
  156. /* VS pin output control */
  157. #define VSSL_VSYNC 0x00 /* 0 : VSYNC */
  158. #define VSSL_VACT 0x10 /* 1 : VACT */
  159. #define VSSL_FIELD 0x20 /* 2 : FIELD */
  160. #define VSSL_VVALID 0x30 /* 3 : VVALID */
  161. #define VSSL_ZERO 0x70 /* 7 : 0 */
  162. #define HSP_LOW 0x00 /* 0 : HS pin output polarity is active low */
  163. #define HSP_HI 0x08 /* 1 : HS pin output polarity is active high.*/
  164. /* HS pin output control */
  165. #define HSSL_HACT 0x00 /* 0 : HACT */
  166. #define HSSL_HSYNC 0x01 /* 1 : HSYNC */
  167. #define HSSL_DVALID 0x02 /* 2 : DVALID */
  168. #define HSSL_HLOCK 0x03 /* 3 : HLOCK */
  169. #define HSSL_ASYNCW 0x04 /* 4 : ASYNCW */
  170. #define HSSL_ZERO 0x07 /* 7 : 0 */
  171. /* ACNTL1 */
  172. #define SRESET 0x80 /* resets the device to its default state
  173. * but all register content remain unchanged.
  174. * This bit is self-resetting.
  175. */
  176. #define ACNTL1_PDN_MASK 0x0e
  177. #define CLK_PDN 0x08 /* system clock power down */
  178. #define Y_PDN 0x04 /* Luma ADC power down */
  179. #define C_PDN 0x02 /* Chroma ADC power down */
  180. /* ACNTL2 */
  181. #define ACNTL2_PDN_MASK 0x40
  182. #define PLL_PDN 0x40 /* PLL power down */
  183. /* VBICNTL */
  184. /* RTSEL : control the real time signal output from the MPOUT pin */
  185. #define RTSEL_MASK 0x07
  186. #define RTSEL_VLOSS 0x00 /* 0000 = Video loss */
  187. #define RTSEL_HLOCK 0x01 /* 0001 = H-lock */
  188. #define RTSEL_SLOCK 0x02 /* 0010 = S-lock */
  189. #define RTSEL_VLOCK 0x03 /* 0011 = V-lock */
  190. #define RTSEL_MONO 0x04 /* 0100 = MONO */
  191. #define RTSEL_DET50 0x05 /* 0101 = DET50 */
  192. #define RTSEL_FIELD 0x06 /* 0110 = FIELD */
  193. #define RTSEL_RTCO 0x07 /* 0111 = RTCO ( Real Time Control ) */
  194. /* HSYNC start and end are constant for now */
  195. #define HSYNC_START 0x0260
  196. #define HSYNC_END 0x0300
  197. /*
  198. * structure
  199. */
  200. struct regval_list {
  201. unsigned char reg_num;
  202. unsigned char value;
  203. };
  204. struct tw9910_scale_ctrl {
  205. char *name;
  206. unsigned short width;
  207. unsigned short height;
  208. u16 hscale;
  209. u16 vscale;
  210. };
  211. struct tw9910_priv {
  212. struct v4l2_subdev subdev;
  213. struct tw9910_video_info *info;
  214. const struct tw9910_scale_ctrl *scale;
  215. u32 revision;
  216. };
  217. static const struct tw9910_scale_ctrl tw9910_ntsc_scales[] = {
  218. {
  219. .name = "NTSC SQ",
  220. .width = 640,
  221. .height = 480,
  222. .hscale = 0x0100,
  223. .vscale = 0x0100,
  224. },
  225. {
  226. .name = "NTSC CCIR601",
  227. .width = 720,
  228. .height = 480,
  229. .hscale = 0x0100,
  230. .vscale = 0x0100,
  231. },
  232. {
  233. .name = "NTSC SQ (CIF)",
  234. .width = 320,
  235. .height = 240,
  236. .hscale = 0x0200,
  237. .vscale = 0x0200,
  238. },
  239. {
  240. .name = "NTSC CCIR601 (CIF)",
  241. .width = 360,
  242. .height = 240,
  243. .hscale = 0x0200,
  244. .vscale = 0x0200,
  245. },
  246. {
  247. .name = "NTSC SQ (QCIF)",
  248. .width = 160,
  249. .height = 120,
  250. .hscale = 0x0400,
  251. .vscale = 0x0400,
  252. },
  253. {
  254. .name = "NTSC CCIR601 (QCIF)",
  255. .width = 180,
  256. .height = 120,
  257. .hscale = 0x0400,
  258. .vscale = 0x0400,
  259. },
  260. };
  261. static const struct tw9910_scale_ctrl tw9910_pal_scales[] = {
  262. {
  263. .name = "PAL SQ",
  264. .width = 768,
  265. .height = 576,
  266. .hscale = 0x0100,
  267. .vscale = 0x0100,
  268. },
  269. {
  270. .name = "PAL CCIR601",
  271. .width = 720,
  272. .height = 576,
  273. .hscale = 0x0100,
  274. .vscale = 0x0100,
  275. },
  276. {
  277. .name = "PAL SQ (CIF)",
  278. .width = 384,
  279. .height = 288,
  280. .hscale = 0x0200,
  281. .vscale = 0x0200,
  282. },
  283. {
  284. .name = "PAL CCIR601 (CIF)",
  285. .width = 360,
  286. .height = 288,
  287. .hscale = 0x0200,
  288. .vscale = 0x0200,
  289. },
  290. {
  291. .name = "PAL SQ (QCIF)",
  292. .width = 192,
  293. .height = 144,
  294. .hscale = 0x0400,
  295. .vscale = 0x0400,
  296. },
  297. {
  298. .name = "PAL CCIR601 (QCIF)",
  299. .width = 180,
  300. .height = 144,
  301. .hscale = 0x0400,
  302. .vscale = 0x0400,
  303. },
  304. };
  305. /*
  306. * general function
  307. */
  308. static struct tw9910_priv *to_tw9910(const struct i2c_client *client)
  309. {
  310. return container_of(i2c_get_clientdata(client), struct tw9910_priv,
  311. subdev);
  312. }
  313. static int tw9910_mask_set(struct i2c_client *client, u8 command,
  314. u8 mask, u8 set)
  315. {
  316. s32 val = i2c_smbus_read_byte_data(client, command);
  317. if (val < 0)
  318. return val;
  319. val &= ~mask;
  320. val |= set & mask;
  321. return i2c_smbus_write_byte_data(client, command, val);
  322. }
  323. static int tw9910_set_scale(struct i2c_client *client,
  324. const struct tw9910_scale_ctrl *scale)
  325. {
  326. int ret;
  327. ret = i2c_smbus_write_byte_data(client, SCALE_HI,
  328. (scale->vscale & 0x0F00) >> 4 |
  329. (scale->hscale & 0x0F00) >> 8);
  330. if (ret < 0)
  331. return ret;
  332. ret = i2c_smbus_write_byte_data(client, HSCALE_LO,
  333. scale->hscale & 0x00FF);
  334. if (ret < 0)
  335. return ret;
  336. ret = i2c_smbus_write_byte_data(client, VSCALE_LO,
  337. scale->vscale & 0x00FF);
  338. return ret;
  339. }
  340. static int tw9910_set_hsync(struct i2c_client *client)
  341. {
  342. struct tw9910_priv *priv = to_tw9910(client);
  343. int ret;
  344. /* bit 10 - 3 */
  345. ret = i2c_smbus_write_byte_data(client, HSBEGIN,
  346. (HSYNC_START & 0x07F8) >> 3);
  347. if (ret < 0)
  348. return ret;
  349. /* bit 10 - 3 */
  350. ret = i2c_smbus_write_byte_data(client, HSEND,
  351. (HSYNC_END & 0x07F8) >> 3);
  352. if (ret < 0)
  353. return ret;
  354. /* So far only revisions 0 and 1 have been seen */
  355. /* bit 2 - 0 */
  356. if (1 == priv->revision)
  357. ret = tw9910_mask_set(client, HSLOWCTL, 0x77,
  358. (HSYNC_START & 0x0007) << 4 |
  359. (HSYNC_END & 0x0007));
  360. return ret;
  361. }
  362. static void tw9910_reset(struct i2c_client *client)
  363. {
  364. tw9910_mask_set(client, ACNTL1, SRESET, SRESET);
  365. msleep(1);
  366. }
  367. static int tw9910_power(struct i2c_client *client, int enable)
  368. {
  369. int ret;
  370. u8 acntl1;
  371. u8 acntl2;
  372. if (enable) {
  373. acntl1 = 0;
  374. acntl2 = 0;
  375. } else {
  376. acntl1 = CLK_PDN | Y_PDN | C_PDN;
  377. acntl2 = PLL_PDN;
  378. }
  379. ret = tw9910_mask_set(client, ACNTL1, ACNTL1_PDN_MASK, acntl1);
  380. if (ret < 0)
  381. return ret;
  382. return tw9910_mask_set(client, ACNTL2, ACNTL2_PDN_MASK, acntl2);
  383. }
  384. static const struct tw9910_scale_ctrl *tw9910_select_norm(struct soc_camera_device *icd,
  385. u32 width, u32 height)
  386. {
  387. const struct tw9910_scale_ctrl *scale;
  388. const struct tw9910_scale_ctrl *ret = NULL;
  389. v4l2_std_id norm = icd->vdev->current_norm;
  390. __u32 diff = 0xffffffff, tmp;
  391. int size, i;
  392. if (norm & V4L2_STD_NTSC) {
  393. scale = tw9910_ntsc_scales;
  394. size = ARRAY_SIZE(tw9910_ntsc_scales);
  395. } else if (norm & V4L2_STD_PAL) {
  396. scale = tw9910_pal_scales;
  397. size = ARRAY_SIZE(tw9910_pal_scales);
  398. } else {
  399. return NULL;
  400. }
  401. for (i = 0; i < size; i++) {
  402. tmp = abs(width - scale[i].width) +
  403. abs(height - scale[i].height);
  404. if (tmp < diff) {
  405. diff = tmp;
  406. ret = scale + i;
  407. }
  408. }
  409. return ret;
  410. }
  411. /*
  412. * soc_camera_ops function
  413. */
  414. static int tw9910_s_stream(struct v4l2_subdev *sd, int enable)
  415. {
  416. struct i2c_client *client = v4l2_get_subdevdata(sd);
  417. struct tw9910_priv *priv = to_tw9910(client);
  418. u8 val;
  419. int ret;
  420. if (!enable) {
  421. switch (priv->revision) {
  422. case 0:
  423. val = OEN_TRI_SEL_ALL_OFF_r0;
  424. break;
  425. case 1:
  426. val = OEN_TRI_SEL_ALL_OFF_r1;
  427. break;
  428. default:
  429. dev_err(&client->dev, "un-supported revision\n");
  430. return -EINVAL;
  431. }
  432. } else {
  433. val = OEN_TRI_SEL_ALL_ON;
  434. if (!priv->scale) {
  435. dev_err(&client->dev, "norm select error\n");
  436. return -EPERM;
  437. }
  438. dev_dbg(&client->dev, "%s %dx%d\n",
  439. priv->scale->name,
  440. priv->scale->width,
  441. priv->scale->height);
  442. }
  443. ret = tw9910_mask_set(client, OPFORM, OEN_TRI_SEL_MASK, val);
  444. if (ret < 0)
  445. return ret;
  446. return tw9910_power(client, enable);
  447. }
  448. static int tw9910_set_bus_param(struct soc_camera_device *icd,
  449. unsigned long flags)
  450. {
  451. struct soc_camera_link *icl = to_soc_camera_link(icd);
  452. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  453. struct i2c_client *client = v4l2_get_subdevdata(sd);
  454. u8 val = VSSL_VVALID | HSSL_DVALID;
  455. flags = soc_camera_apply_sensor_flags(icl, flags);
  456. /*
  457. * set OUTCTR1
  458. *
  459. * We use VVALID and DVALID signals to control VSYNC and HSYNC
  460. * outputs, in this mode their polarity is inverted.
  461. */
  462. if (flags & SOCAM_HSYNC_ACTIVE_LOW)
  463. val |= HSP_HI;
  464. if (flags & SOCAM_VSYNC_ACTIVE_LOW)
  465. val |= VSP_HI;
  466. return i2c_smbus_write_byte_data(client, OUTCTR1, val);
  467. }
  468. static unsigned long tw9910_query_bus_param(struct soc_camera_device *icd)
  469. {
  470. struct i2c_client *client = to_i2c_client(to_soc_camera_control(icd));
  471. struct tw9910_priv *priv = to_tw9910(client);
  472. struct soc_camera_link *icl = to_soc_camera_link(icd);
  473. unsigned long flags = SOCAM_PCLK_SAMPLE_RISING | SOCAM_MASTER |
  474. SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_HSYNC_ACTIVE_HIGH |
  475. SOCAM_VSYNC_ACTIVE_LOW | SOCAM_HSYNC_ACTIVE_LOW |
  476. SOCAM_DATA_ACTIVE_HIGH | priv->info->buswidth;
  477. return soc_camera_apply_sensor_flags(icl, flags);
  478. }
  479. static int tw9910_s_std(struct v4l2_subdev *sd, v4l2_std_id norm)
  480. {
  481. int ret = -EINVAL;
  482. if (norm & (V4L2_STD_NTSC | V4L2_STD_PAL))
  483. ret = 0;
  484. return ret;
  485. }
  486. static int tw9910_g_chip_ident(struct v4l2_subdev *sd,
  487. struct v4l2_dbg_chip_ident *id)
  488. {
  489. struct i2c_client *client = v4l2_get_subdevdata(sd);
  490. struct tw9910_priv *priv = to_tw9910(client);
  491. id->ident = V4L2_IDENT_TW9910;
  492. id->revision = priv->revision;
  493. return 0;
  494. }
  495. #ifdef CONFIG_VIDEO_ADV_DEBUG
  496. static int tw9910_g_register(struct v4l2_subdev *sd,
  497. struct v4l2_dbg_register *reg)
  498. {
  499. struct i2c_client *client = v4l2_get_subdevdata(sd);
  500. int ret;
  501. if (reg->reg > 0xff)
  502. return -EINVAL;
  503. ret = i2c_smbus_read_byte_data(client, reg->reg);
  504. if (ret < 0)
  505. return ret;
  506. /*
  507. * ret = int
  508. * reg->val = __u64
  509. */
  510. reg->val = (__u64)ret;
  511. return 0;
  512. }
  513. static int tw9910_s_register(struct v4l2_subdev *sd,
  514. struct v4l2_dbg_register *reg)
  515. {
  516. struct i2c_client *client = v4l2_get_subdevdata(sd);
  517. if (reg->reg > 0xff ||
  518. reg->val > 0xff)
  519. return -EINVAL;
  520. return i2c_smbus_write_byte_data(client, reg->reg, reg->val);
  521. }
  522. #endif
  523. static int tw9910_set_frame(struct v4l2_subdev *sd, u32 *width, u32 *height)
  524. {
  525. struct i2c_client *client = v4l2_get_subdevdata(sd);
  526. struct tw9910_priv *priv = to_tw9910(client);
  527. struct soc_camera_device *icd = client->dev.platform_data;
  528. int ret = -EINVAL;
  529. u8 val;
  530. /*
  531. * select suitable norm
  532. */
  533. priv->scale = tw9910_select_norm(icd, *width, *height);
  534. if (!priv->scale)
  535. goto tw9910_set_fmt_error;
  536. /*
  537. * reset hardware
  538. */
  539. tw9910_reset(client);
  540. /*
  541. * set bus width
  542. */
  543. val = 0x00;
  544. if (SOCAM_DATAWIDTH_16 == priv->info->buswidth)
  545. val = LEN;
  546. ret = tw9910_mask_set(client, OPFORM, LEN, val);
  547. if (ret < 0)
  548. goto tw9910_set_fmt_error;
  549. /*
  550. * select MPOUT behavior
  551. */
  552. switch (priv->info->mpout) {
  553. case TW9910_MPO_VLOSS:
  554. val = RTSEL_VLOSS; break;
  555. case TW9910_MPO_HLOCK:
  556. val = RTSEL_HLOCK; break;
  557. case TW9910_MPO_SLOCK:
  558. val = RTSEL_SLOCK; break;
  559. case TW9910_MPO_VLOCK:
  560. val = RTSEL_VLOCK; break;
  561. case TW9910_MPO_MONO:
  562. val = RTSEL_MONO; break;
  563. case TW9910_MPO_DET50:
  564. val = RTSEL_DET50; break;
  565. case TW9910_MPO_FIELD:
  566. val = RTSEL_FIELD; break;
  567. case TW9910_MPO_RTCO:
  568. val = RTSEL_RTCO; break;
  569. default:
  570. val = 0;
  571. }
  572. ret = tw9910_mask_set(client, VBICNTL, RTSEL_MASK, val);
  573. if (ret < 0)
  574. goto tw9910_set_fmt_error;
  575. /*
  576. * set scale
  577. */
  578. ret = tw9910_set_scale(client, priv->scale);
  579. if (ret < 0)
  580. goto tw9910_set_fmt_error;
  581. /*
  582. * set hsync
  583. */
  584. ret = tw9910_set_hsync(client);
  585. if (ret < 0)
  586. goto tw9910_set_fmt_error;
  587. *width = priv->scale->width;
  588. *height = priv->scale->height;
  589. return ret;
  590. tw9910_set_fmt_error:
  591. tw9910_reset(client);
  592. priv->scale = NULL;
  593. return ret;
  594. }
  595. static int tw9910_g_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
  596. {
  597. struct i2c_client *client = v4l2_get_subdevdata(sd);
  598. struct soc_camera_device *icd = client->dev.platform_data;
  599. a->c.left = 0;
  600. a->c.top = 0;
  601. if (icd->vdev->current_norm & V4L2_STD_NTSC) {
  602. a->c.width = 640;
  603. a->c.height = 480;
  604. } else {
  605. a->c.width = 768;
  606. a->c.height = 576;
  607. }
  608. a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
  609. return 0;
  610. }
  611. static int tw9910_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a)
  612. {
  613. struct i2c_client *client = v4l2_get_subdevdata(sd);
  614. struct soc_camera_device *icd = client->dev.platform_data;
  615. a->bounds.left = 0;
  616. a->bounds.top = 0;
  617. if (icd->vdev->current_norm & V4L2_STD_NTSC) {
  618. a->bounds.width = 640;
  619. a->bounds.height = 480;
  620. } else {
  621. a->bounds.width = 768;
  622. a->bounds.height = 576;
  623. }
  624. a->defrect = a->bounds;
  625. a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
  626. a->pixelaspect.numerator = 1;
  627. a->pixelaspect.denominator = 1;
  628. return 0;
  629. }
  630. static int tw9910_g_fmt(struct v4l2_subdev *sd,
  631. struct v4l2_mbus_framefmt *mf)
  632. {
  633. struct i2c_client *client = v4l2_get_subdevdata(sd);
  634. struct tw9910_priv *priv = to_tw9910(client);
  635. if (!priv->scale) {
  636. int ret;
  637. u32 width = 640, height = 480;
  638. ret = tw9910_set_frame(sd, &width, &height);
  639. if (ret < 0)
  640. return ret;
  641. }
  642. mf->width = priv->scale->width;
  643. mf->height = priv->scale->height;
  644. mf->code = V4L2_MBUS_FMT_UYVY8_2X8;
  645. mf->colorspace = V4L2_COLORSPACE_JPEG;
  646. mf->field = V4L2_FIELD_INTERLACED_BT;
  647. return 0;
  648. }
  649. static int tw9910_s_fmt(struct v4l2_subdev *sd,
  650. struct v4l2_mbus_framefmt *mf)
  651. {
  652. u32 width = mf->width, height = mf->height;
  653. int ret;
  654. WARN_ON(mf->field != V4L2_FIELD_ANY &&
  655. mf->field != V4L2_FIELD_INTERLACED_BT);
  656. /*
  657. * check color format
  658. */
  659. if (mf->code != V4L2_MBUS_FMT_UYVY8_2X8)
  660. return -EINVAL;
  661. mf->colorspace = V4L2_COLORSPACE_JPEG;
  662. ret = tw9910_set_frame(sd, &width, &height);
  663. if (!ret) {
  664. mf->width = width;
  665. mf->height = height;
  666. }
  667. return ret;
  668. }
  669. static int tw9910_try_fmt(struct v4l2_subdev *sd,
  670. struct v4l2_mbus_framefmt *mf)
  671. {
  672. struct i2c_client *client = v4l2_get_subdevdata(sd);
  673. struct soc_camera_device *icd = client->dev.platform_data;
  674. const struct tw9910_scale_ctrl *scale;
  675. if (V4L2_FIELD_ANY == mf->field) {
  676. mf->field = V4L2_FIELD_INTERLACED_BT;
  677. } else if (V4L2_FIELD_INTERLACED_BT != mf->field) {
  678. dev_err(&client->dev, "Field type %d invalid.\n", mf->field);
  679. return -EINVAL;
  680. }
  681. mf->code = V4L2_MBUS_FMT_UYVY8_2X8;
  682. mf->colorspace = V4L2_COLORSPACE_JPEG;
  683. /*
  684. * select suitable norm
  685. */
  686. scale = tw9910_select_norm(icd, mf->width, mf->height);
  687. if (!scale)
  688. return -EINVAL;
  689. mf->width = scale->width;
  690. mf->height = scale->height;
  691. return 0;
  692. }
  693. static int tw9910_video_probe(struct soc_camera_device *icd,
  694. struct i2c_client *client)
  695. {
  696. struct tw9910_priv *priv = to_tw9910(client);
  697. s32 id;
  698. /* We must have a parent by now. And it cannot be a wrong one. */
  699. BUG_ON(!icd->parent ||
  700. to_soc_camera_host(icd->parent)->nr != icd->iface);
  701. /*
  702. * tw9910 only use 8 or 16 bit bus width
  703. */
  704. if (SOCAM_DATAWIDTH_16 != priv->info->buswidth &&
  705. SOCAM_DATAWIDTH_8 != priv->info->buswidth) {
  706. dev_err(&client->dev, "bus width error\n");
  707. return -ENODEV;
  708. }
  709. /*
  710. * check and show Product ID
  711. * So far only revisions 0 and 1 have been seen
  712. */
  713. id = i2c_smbus_read_byte_data(client, ID);
  714. priv->revision = GET_REV(id);
  715. id = GET_ID(id);
  716. if (0x0B != id ||
  717. 0x01 < priv->revision) {
  718. dev_err(&client->dev,
  719. "Product ID error %x:%x\n",
  720. id, priv->revision);
  721. return -ENODEV;
  722. }
  723. dev_info(&client->dev,
  724. "tw9910 Product ID %0x:%0x\n", id, priv->revision);
  725. icd->vdev->tvnorms = V4L2_STD_NTSC | V4L2_STD_PAL;
  726. icd->vdev->current_norm = V4L2_STD_NTSC;
  727. return 0;
  728. }
  729. static struct soc_camera_ops tw9910_ops = {
  730. .set_bus_param = tw9910_set_bus_param,
  731. .query_bus_param = tw9910_query_bus_param,
  732. };
  733. static struct v4l2_subdev_core_ops tw9910_subdev_core_ops = {
  734. .g_chip_ident = tw9910_g_chip_ident,
  735. .s_std = tw9910_s_std,
  736. #ifdef CONFIG_VIDEO_ADV_DEBUG
  737. .g_register = tw9910_g_register,
  738. .s_register = tw9910_s_register,
  739. #endif
  740. };
  741. static int tw9910_enum_fmt(struct v4l2_subdev *sd, unsigned int index,
  742. enum v4l2_mbus_pixelcode *code)
  743. {
  744. if (index)
  745. return -EINVAL;
  746. *code = V4L2_MBUS_FMT_UYVY8_2X8;
  747. return 0;
  748. }
  749. static struct v4l2_subdev_video_ops tw9910_subdev_video_ops = {
  750. .s_stream = tw9910_s_stream,
  751. .g_mbus_fmt = tw9910_g_fmt,
  752. .s_mbus_fmt = tw9910_s_fmt,
  753. .try_mbus_fmt = tw9910_try_fmt,
  754. .cropcap = tw9910_cropcap,
  755. .g_crop = tw9910_g_crop,
  756. .enum_mbus_fmt = tw9910_enum_fmt,
  757. };
  758. static struct v4l2_subdev_ops tw9910_subdev_ops = {
  759. .core = &tw9910_subdev_core_ops,
  760. .video = &tw9910_subdev_video_ops,
  761. };
  762. /*
  763. * i2c_driver function
  764. */
  765. static int tw9910_probe(struct i2c_client *client,
  766. const struct i2c_device_id *did)
  767. {
  768. struct tw9910_priv *priv;
  769. struct tw9910_video_info *info;
  770. struct soc_camera_device *icd = client->dev.platform_data;
  771. struct i2c_adapter *adapter =
  772. to_i2c_adapter(client->dev.parent);
  773. struct soc_camera_link *icl;
  774. int ret;
  775. if (!icd) {
  776. dev_err(&client->dev, "TW9910: missing soc-camera data!\n");
  777. return -EINVAL;
  778. }
  779. icl = to_soc_camera_link(icd);
  780. if (!icl || !icl->priv)
  781. return -EINVAL;
  782. info = icl->priv;
  783. if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
  784. dev_err(&client->dev,
  785. "I2C-Adapter doesn't support "
  786. "I2C_FUNC_SMBUS_BYTE_DATA\n");
  787. return -EIO;
  788. }
  789. priv = kzalloc(sizeof(*priv), GFP_KERNEL);
  790. if (!priv)
  791. return -ENOMEM;
  792. priv->info = info;
  793. v4l2_i2c_subdev_init(&priv->subdev, client, &tw9910_subdev_ops);
  794. icd->ops = &tw9910_ops;
  795. icd->iface = icl->bus_id;
  796. ret = tw9910_video_probe(icd, client);
  797. if (ret) {
  798. icd->ops = NULL;
  799. kfree(priv);
  800. }
  801. return ret;
  802. }
  803. static int tw9910_remove(struct i2c_client *client)
  804. {
  805. struct tw9910_priv *priv = to_tw9910(client);
  806. struct soc_camera_device *icd = client->dev.platform_data;
  807. icd->ops = NULL;
  808. kfree(priv);
  809. return 0;
  810. }
  811. static const struct i2c_device_id tw9910_id[] = {
  812. { "tw9910", 0 },
  813. { }
  814. };
  815. MODULE_DEVICE_TABLE(i2c, tw9910_id);
  816. static struct i2c_driver tw9910_i2c_driver = {
  817. .driver = {
  818. .name = "tw9910",
  819. },
  820. .probe = tw9910_probe,
  821. .remove = tw9910_remove,
  822. .id_table = tw9910_id,
  823. };
  824. /*
  825. * module function
  826. */
  827. static int __init tw9910_module_init(void)
  828. {
  829. return i2c_add_driver(&tw9910_i2c_driver);
  830. }
  831. static void __exit tw9910_module_exit(void)
  832. {
  833. i2c_del_driver(&tw9910_i2c_driver);
  834. }
  835. module_init(tw9910_module_init);
  836. module_exit(tw9910_module_exit);
  837. MODULE_DESCRIPTION("SoC Camera driver for tw9910");
  838. MODULE_AUTHOR("Kuninori Morimoto");
  839. MODULE_LICENSE("GPL v2");