cs4231.c 58 KB

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  1. /*
  2. * Driver for CS4231 sound chips found on Sparcs.
  3. * Copyright (C) 2002 David S. Miller <davem@redhat.com>
  4. *
  5. * Based entirely upon drivers/sbus/audio/cs4231.c which is:
  6. * Copyright (C) 1996, 1997, 1998 Derrick J Brashear (shadow@andrew.cmu.edu)
  7. * and also sound/isa/cs423x/cs4231_lib.c which is:
  8. * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
  9. */
  10. #include <linux/module.h>
  11. #include <linux/kernel.h>
  12. #include <linux/slab.h>
  13. #include <linux/delay.h>
  14. #include <linux/init.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/moduleparam.h>
  17. #include <linux/irq.h>
  18. #include <linux/io.h>
  19. #include <sound/driver.h>
  20. #include <sound/core.h>
  21. #include <sound/pcm.h>
  22. #include <sound/info.h>
  23. #include <sound/control.h>
  24. #include <sound/timer.h>
  25. #include <sound/initval.h>
  26. #include <sound/pcm_params.h>
  27. #ifdef CONFIG_SBUS
  28. #define SBUS_SUPPORT
  29. #include <asm/sbus.h>
  30. #endif
  31. #if defined(CONFIG_PCI) && defined(CONFIG_SPARC64)
  32. #define EBUS_SUPPORT
  33. #include <linux/pci.h>
  34. #include <asm/ebus.h>
  35. #endif
  36. static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
  37. static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
  38. /* Enable this card */
  39. static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
  40. module_param_array(index, int, NULL, 0444);
  41. MODULE_PARM_DESC(index, "Index value for Sun CS4231 soundcard.");
  42. module_param_array(id, charp, NULL, 0444);
  43. MODULE_PARM_DESC(id, "ID string for Sun CS4231 soundcard.");
  44. module_param_array(enable, bool, NULL, 0444);
  45. MODULE_PARM_DESC(enable, "Enable Sun CS4231 soundcard.");
  46. MODULE_AUTHOR("Jaroslav Kysela, Derrick J. Brashear and David S. Miller");
  47. MODULE_DESCRIPTION("Sun CS4231");
  48. MODULE_LICENSE("GPL");
  49. MODULE_SUPPORTED_DEVICE("{{Sun,CS4231}}");
  50. #ifdef SBUS_SUPPORT
  51. struct sbus_dma_info {
  52. spinlock_t lock; /* DMA access lock */
  53. int dir;
  54. void __iomem *regs;
  55. };
  56. #endif
  57. struct snd_cs4231;
  58. struct cs4231_dma_control {
  59. void (*prepare)(struct cs4231_dma_control *dma_cont,
  60. int dir);
  61. void (*enable)(struct cs4231_dma_control *dma_cont, int on);
  62. int (*request)(struct cs4231_dma_control *dma_cont,
  63. dma_addr_t bus_addr, size_t len);
  64. unsigned int (*address)(struct cs4231_dma_control *dma_cont);
  65. void (*preallocate)(struct snd_cs4231 *chip,
  66. struct snd_pcm *pcm);
  67. #ifdef EBUS_SUPPORT
  68. struct ebus_dma_info ebus_info;
  69. #endif
  70. #ifdef SBUS_SUPPORT
  71. struct sbus_dma_info sbus_info;
  72. #endif
  73. };
  74. struct snd_cs4231 {
  75. spinlock_t lock; /* registers access lock */
  76. void __iomem *port;
  77. struct cs4231_dma_control p_dma;
  78. struct cs4231_dma_control c_dma;
  79. u32 flags;
  80. #define CS4231_FLAG_EBUS 0x00000001
  81. #define CS4231_FLAG_PLAYBACK 0x00000002
  82. #define CS4231_FLAG_CAPTURE 0x00000004
  83. struct snd_card *card;
  84. struct snd_pcm *pcm;
  85. struct snd_pcm_substream *playback_substream;
  86. unsigned int p_periods_sent;
  87. struct snd_pcm_substream *capture_substream;
  88. unsigned int c_periods_sent;
  89. struct snd_timer *timer;
  90. unsigned short mode;
  91. #define CS4231_MODE_NONE 0x0000
  92. #define CS4231_MODE_PLAY 0x0001
  93. #define CS4231_MODE_RECORD 0x0002
  94. #define CS4231_MODE_TIMER 0x0004
  95. #define CS4231_MODE_OPEN (CS4231_MODE_PLAY | CS4231_MODE_RECORD | \
  96. CS4231_MODE_TIMER)
  97. unsigned char image[32]; /* registers image */
  98. int mce_bit;
  99. int calibrate_mute;
  100. struct mutex mce_mutex; /* mutex for mce register */
  101. struct mutex open_mutex; /* mutex for ALSA open/close */
  102. union {
  103. #ifdef SBUS_SUPPORT
  104. struct sbus_dev *sdev;
  105. #endif
  106. #ifdef EBUS_SUPPORT
  107. struct pci_dev *pdev;
  108. #endif
  109. } dev_u;
  110. unsigned int irq[2];
  111. unsigned int regs_size;
  112. struct snd_cs4231 *next;
  113. };
  114. static struct snd_cs4231 *cs4231_list;
  115. /* Eventually we can use sound/isa/cs423x/cs4231_lib.c directly, but for
  116. * now.... -DaveM
  117. */
  118. /* IO ports */
  119. #include <sound/cs4231-regs.h>
  120. /* XXX offsets are different than PC ISA chips... */
  121. #define CS4231U(chip, x) ((chip)->port + ((c_d_c_CS4231##x) << 2))
  122. /* SBUS DMA register defines. */
  123. #define APCCSR 0x10UL /* APC DMA CSR */
  124. #define APCCVA 0x20UL /* APC Capture DMA Address */
  125. #define APCCC 0x24UL /* APC Capture Count */
  126. #define APCCNVA 0x28UL /* APC Capture DMA Next Address */
  127. #define APCCNC 0x2cUL /* APC Capture Next Count */
  128. #define APCPVA 0x30UL /* APC Play DMA Address */
  129. #define APCPC 0x34UL /* APC Play Count */
  130. #define APCPNVA 0x38UL /* APC Play DMA Next Address */
  131. #define APCPNC 0x3cUL /* APC Play Next Count */
  132. /* Defines for SBUS DMA-routines */
  133. #define APCVA 0x0UL /* APC DMA Address */
  134. #define APCC 0x4UL /* APC Count */
  135. #define APCNVA 0x8UL /* APC DMA Next Address */
  136. #define APCNC 0xcUL /* APC Next Count */
  137. #define APC_PLAY 0x30UL /* Play registers start at 0x30 */
  138. #define APC_RECORD 0x20UL /* Record registers start at 0x20 */
  139. /* APCCSR bits */
  140. #define APC_INT_PENDING 0x800000 /* Interrupt Pending */
  141. #define APC_PLAY_INT 0x400000 /* Playback interrupt */
  142. #define APC_CAPT_INT 0x200000 /* Capture interrupt */
  143. #define APC_GENL_INT 0x100000 /* General interrupt */
  144. #define APC_XINT_ENA 0x80000 /* General ext int. enable */
  145. #define APC_XINT_PLAY 0x40000 /* Playback ext intr */
  146. #define APC_XINT_CAPT 0x20000 /* Capture ext intr */
  147. #define APC_XINT_GENL 0x10000 /* Error ext intr */
  148. #define APC_XINT_EMPT 0x8000 /* Pipe empty interrupt (0 write to pva) */
  149. #define APC_XINT_PEMP 0x4000 /* Play pipe empty (pva and pnva not set) */
  150. #define APC_XINT_PNVA 0x2000 /* Playback NVA dirty */
  151. #define APC_XINT_PENA 0x1000 /* play pipe empty Int enable */
  152. #define APC_XINT_COVF 0x800 /* Cap data dropped on floor */
  153. #define APC_XINT_CNVA 0x400 /* Capture NVA dirty */
  154. #define APC_XINT_CEMP 0x200 /* Capture pipe empty (cva and cnva not set) */
  155. #define APC_XINT_CENA 0x100 /* Cap. pipe empty int enable */
  156. #define APC_PPAUSE 0x80 /* Pause the play DMA */
  157. #define APC_CPAUSE 0x40 /* Pause the capture DMA */
  158. #define APC_CDC_RESET 0x20 /* CODEC RESET */
  159. #define APC_PDMA_READY 0x08 /* Play DMA Go */
  160. #define APC_CDMA_READY 0x04 /* Capture DMA Go */
  161. #define APC_CHIP_RESET 0x01 /* Reset the chip */
  162. /* EBUS DMA register offsets */
  163. #define EBDMA_CSR 0x00UL /* Control/Status */
  164. #define EBDMA_ADDR 0x04UL /* DMA Address */
  165. #define EBDMA_COUNT 0x08UL /* DMA Count */
  166. /*
  167. * Some variables
  168. */
  169. static unsigned char freq_bits[14] = {
  170. /* 5510 */ 0x00 | CS4231_XTAL2,
  171. /* 6620 */ 0x0E | CS4231_XTAL2,
  172. /* 8000 */ 0x00 | CS4231_XTAL1,
  173. /* 9600 */ 0x0E | CS4231_XTAL1,
  174. /* 11025 */ 0x02 | CS4231_XTAL2,
  175. /* 16000 */ 0x02 | CS4231_XTAL1,
  176. /* 18900 */ 0x04 | CS4231_XTAL2,
  177. /* 22050 */ 0x06 | CS4231_XTAL2,
  178. /* 27042 */ 0x04 | CS4231_XTAL1,
  179. /* 32000 */ 0x06 | CS4231_XTAL1,
  180. /* 33075 */ 0x0C | CS4231_XTAL2,
  181. /* 37800 */ 0x08 | CS4231_XTAL2,
  182. /* 44100 */ 0x0A | CS4231_XTAL2,
  183. /* 48000 */ 0x0C | CS4231_XTAL1
  184. };
  185. static unsigned int rates[14] = {
  186. 5510, 6620, 8000, 9600, 11025, 16000, 18900, 22050,
  187. 27042, 32000, 33075, 37800, 44100, 48000
  188. };
  189. static struct snd_pcm_hw_constraint_list hw_constraints_rates = {
  190. .count = ARRAY_SIZE(rates),
  191. .list = rates,
  192. };
  193. static int snd_cs4231_xrate(struct snd_pcm_runtime *runtime)
  194. {
  195. return snd_pcm_hw_constraint_list(runtime, 0,
  196. SNDRV_PCM_HW_PARAM_RATE,
  197. &hw_constraints_rates);
  198. }
  199. static unsigned char snd_cs4231_original_image[32] =
  200. {
  201. 0x00, /* 00/00 - lic */
  202. 0x00, /* 01/01 - ric */
  203. 0x9f, /* 02/02 - la1ic */
  204. 0x9f, /* 03/03 - ra1ic */
  205. 0x9f, /* 04/04 - la2ic */
  206. 0x9f, /* 05/05 - ra2ic */
  207. 0xbf, /* 06/06 - loc */
  208. 0xbf, /* 07/07 - roc */
  209. 0x20, /* 08/08 - pdfr */
  210. CS4231_AUTOCALIB, /* 09/09 - ic */
  211. 0x00, /* 0a/10 - pc */
  212. 0x00, /* 0b/11 - ti */
  213. CS4231_MODE2, /* 0c/12 - mi */
  214. 0x00, /* 0d/13 - lbc */
  215. 0x00, /* 0e/14 - pbru */
  216. 0x00, /* 0f/15 - pbrl */
  217. 0x80, /* 10/16 - afei */
  218. 0x01, /* 11/17 - afeii */
  219. 0x9f, /* 12/18 - llic */
  220. 0x9f, /* 13/19 - rlic */
  221. 0x00, /* 14/20 - tlb */
  222. 0x00, /* 15/21 - thb */
  223. 0x00, /* 16/22 - la3mic/reserved */
  224. 0x00, /* 17/23 - ra3mic/reserved */
  225. 0x00, /* 18/24 - afs */
  226. 0x00, /* 19/25 - lamoc/version */
  227. 0x00, /* 1a/26 - mioc */
  228. 0x00, /* 1b/27 - ramoc/reserved */
  229. 0x20, /* 1c/28 - cdfr */
  230. 0x00, /* 1d/29 - res4 */
  231. 0x00, /* 1e/30 - cbru */
  232. 0x00, /* 1f/31 - cbrl */
  233. };
  234. static u8 __cs4231_readb(struct snd_cs4231 *cp, void __iomem *reg_addr)
  235. {
  236. #ifdef EBUS_SUPPORT
  237. if (cp->flags & CS4231_FLAG_EBUS)
  238. return readb(reg_addr);
  239. else
  240. #endif
  241. #ifdef SBUS_SUPPORT
  242. return sbus_readb(reg_addr);
  243. #endif
  244. }
  245. static void __cs4231_writeb(struct snd_cs4231 *cp, u8 val,
  246. void __iomem *reg_addr)
  247. {
  248. #ifdef EBUS_SUPPORT
  249. if (cp->flags & CS4231_FLAG_EBUS)
  250. return writeb(val, reg_addr);
  251. else
  252. #endif
  253. #ifdef SBUS_SUPPORT
  254. return sbus_writeb(val, reg_addr);
  255. #endif
  256. }
  257. /*
  258. * Basic I/O functions
  259. */
  260. static void snd_cs4231_ready(struct snd_cs4231 *chip)
  261. {
  262. int timeout;
  263. for (timeout = 250; timeout > 0; timeout--) {
  264. int val = __cs4231_readb(chip, CS4231U(chip, REGSEL));
  265. if ((val & CS4231_INIT) == 0)
  266. break;
  267. udelay(100);
  268. }
  269. }
  270. static void snd_cs4231_dout(struct snd_cs4231 *chip, unsigned char reg,
  271. unsigned char value)
  272. {
  273. snd_cs4231_ready(chip);
  274. #ifdef CONFIG_SND_DEBUG
  275. if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
  276. snd_printdd("out: auto calibration time out - reg = 0x%x, "
  277. "value = 0x%x\n",
  278. reg, value);
  279. #endif
  280. __cs4231_writeb(chip, chip->mce_bit | reg, CS4231U(chip, REGSEL));
  281. wmb();
  282. __cs4231_writeb(chip, value, CS4231U(chip, REG));
  283. mb();
  284. }
  285. static inline void snd_cs4231_outm(struct snd_cs4231 *chip, unsigned char reg,
  286. unsigned char mask, unsigned char value)
  287. {
  288. unsigned char tmp = (chip->image[reg] & mask) | value;
  289. chip->image[reg] = tmp;
  290. if (!chip->calibrate_mute)
  291. snd_cs4231_dout(chip, reg, tmp);
  292. }
  293. static void snd_cs4231_out(struct snd_cs4231 *chip, unsigned char reg,
  294. unsigned char value)
  295. {
  296. snd_cs4231_dout(chip, reg, value);
  297. chip->image[reg] = value;
  298. mb();
  299. }
  300. static unsigned char snd_cs4231_in(struct snd_cs4231 *chip, unsigned char reg)
  301. {
  302. snd_cs4231_ready(chip);
  303. #ifdef CONFIG_SND_DEBUG
  304. if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
  305. snd_printdd("in: auto calibration time out - reg = 0x%x\n",
  306. reg);
  307. #endif
  308. __cs4231_writeb(chip, chip->mce_bit | reg, CS4231U(chip, REGSEL));
  309. mb();
  310. return __cs4231_readb(chip, CS4231U(chip, REG));
  311. }
  312. /*
  313. * CS4231 detection / MCE routines
  314. */
  315. static void snd_cs4231_busy_wait(struct snd_cs4231 *chip)
  316. {
  317. int timeout;
  318. /* looks like this sequence is proper for CS4231A chip (GUS MAX) */
  319. for (timeout = 5; timeout > 0; timeout--)
  320. __cs4231_readb(chip, CS4231U(chip, REGSEL));
  321. /* end of cleanup sequence */
  322. for (timeout = 500; timeout > 0; timeout--) {
  323. int val = __cs4231_readb(chip, CS4231U(chip, REGSEL));
  324. if ((val & CS4231_INIT) == 0)
  325. break;
  326. msleep(1);
  327. }
  328. }
  329. static void snd_cs4231_mce_up(struct snd_cs4231 *chip)
  330. {
  331. unsigned long flags;
  332. int timeout;
  333. spin_lock_irqsave(&chip->lock, flags);
  334. snd_cs4231_ready(chip);
  335. #ifdef CONFIG_SND_DEBUG
  336. if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
  337. snd_printdd("mce_up - auto calibration time out (0)\n");
  338. #endif
  339. chip->mce_bit |= CS4231_MCE;
  340. timeout = __cs4231_readb(chip, CS4231U(chip, REGSEL));
  341. if (timeout == 0x80)
  342. snd_printdd("mce_up [%p]: serious init problem - "
  343. "codec still busy\n",
  344. chip->port);
  345. if (!(timeout & CS4231_MCE))
  346. __cs4231_writeb(chip, chip->mce_bit | (timeout & 0x1f),
  347. CS4231U(chip, REGSEL));
  348. spin_unlock_irqrestore(&chip->lock, flags);
  349. }
  350. static void snd_cs4231_mce_down(struct snd_cs4231 *chip)
  351. {
  352. unsigned long flags;
  353. unsigned long end_time;
  354. int timeout;
  355. spin_lock_irqsave(&chip->lock, flags);
  356. snd_cs4231_busy_wait(chip);
  357. #ifdef CONFIG_SND_DEBUG
  358. if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
  359. snd_printdd("mce_down [%p] - auto calibration time out (0)\n",
  360. CS4231U(chip, REGSEL));
  361. #endif
  362. chip->mce_bit &= ~CS4231_MCE;
  363. timeout = __cs4231_readb(chip, CS4231U(chip, REGSEL));
  364. __cs4231_writeb(chip, chip->mce_bit | (timeout & 0x1f),
  365. CS4231U(chip, REGSEL));
  366. if (timeout == 0x80)
  367. snd_printdd("mce_down [%p]: serious init problem - "
  368. "codec still busy\n",
  369. chip->port);
  370. if ((timeout & CS4231_MCE) == 0) {
  371. spin_unlock_irqrestore(&chip->lock, flags);
  372. return;
  373. }
  374. /*
  375. * Wait for (possible -- during init auto-calibration may not be set)
  376. * calibration process to start. Needs upto 5 sample periods on AD1848
  377. * which at the slowest possible rate of 5.5125 kHz means 907 us.
  378. */
  379. msleep(1);
  380. /* check condition up to 250ms */
  381. end_time = jiffies + msecs_to_jiffies(250);
  382. while (snd_cs4231_in(chip, CS4231_TEST_INIT) &
  383. CS4231_CALIB_IN_PROGRESS) {
  384. spin_unlock_irqrestore(&chip->lock, flags);
  385. if (time_after(jiffies, end_time)) {
  386. snd_printk("mce_down - "
  387. "auto calibration time out (2)\n");
  388. return;
  389. }
  390. msleep(1);
  391. spin_lock_irqsave(&chip->lock, flags);
  392. }
  393. /* check condition up to 100ms */
  394. end_time = jiffies + msecs_to_jiffies(100);
  395. while (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT) {
  396. spin_unlock_irqrestore(&chip->lock, flags);
  397. if (time_after(jiffies, end_time)) {
  398. snd_printk("mce_down - "
  399. "auto calibration time out (3)\n");
  400. return;
  401. }
  402. msleep(1);
  403. spin_lock_irqsave(&chip->lock, flags);
  404. }
  405. spin_unlock_irqrestore(&chip->lock, flags);
  406. }
  407. static void snd_cs4231_advance_dma(struct cs4231_dma_control *dma_cont,
  408. struct snd_pcm_substream *substream,
  409. unsigned int *periods_sent)
  410. {
  411. struct snd_pcm_runtime *runtime = substream->runtime;
  412. while (1) {
  413. unsigned int period_size = snd_pcm_lib_period_bytes(substream);
  414. unsigned int offset = period_size * (*periods_sent);
  415. BUG_ON(period_size >= (1 << 24));
  416. if (dma_cont->request(dma_cont,
  417. runtime->dma_addr + offset, period_size))
  418. return;
  419. (*periods_sent) = ((*periods_sent) + 1) % runtime->periods;
  420. }
  421. }
  422. static void cs4231_dma_trigger(struct snd_pcm_substream *substream,
  423. unsigned int what, int on)
  424. {
  425. struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
  426. struct cs4231_dma_control *dma_cont;
  427. if (what & CS4231_PLAYBACK_ENABLE) {
  428. dma_cont = &chip->p_dma;
  429. if (on) {
  430. dma_cont->prepare(dma_cont, 0);
  431. dma_cont->enable(dma_cont, 1);
  432. snd_cs4231_advance_dma(dma_cont,
  433. chip->playback_substream,
  434. &chip->p_periods_sent);
  435. } else {
  436. dma_cont->enable(dma_cont, 0);
  437. }
  438. }
  439. if (what & CS4231_RECORD_ENABLE) {
  440. dma_cont = &chip->c_dma;
  441. if (on) {
  442. dma_cont->prepare(dma_cont, 1);
  443. dma_cont->enable(dma_cont, 1);
  444. snd_cs4231_advance_dma(dma_cont,
  445. chip->capture_substream,
  446. &chip->c_periods_sent);
  447. } else {
  448. dma_cont->enable(dma_cont, 0);
  449. }
  450. }
  451. }
  452. static int snd_cs4231_trigger(struct snd_pcm_substream *substream, int cmd)
  453. {
  454. struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
  455. int result = 0;
  456. switch (cmd) {
  457. case SNDRV_PCM_TRIGGER_START:
  458. case SNDRV_PCM_TRIGGER_STOP:
  459. {
  460. unsigned int what = 0;
  461. struct snd_pcm_substream *s;
  462. unsigned long flags;
  463. snd_pcm_group_for_each_entry(s, substream) {
  464. if (s == chip->playback_substream) {
  465. what |= CS4231_PLAYBACK_ENABLE;
  466. snd_pcm_trigger_done(s, substream);
  467. } else if (s == chip->capture_substream) {
  468. what |= CS4231_RECORD_ENABLE;
  469. snd_pcm_trigger_done(s, substream);
  470. }
  471. }
  472. spin_lock_irqsave(&chip->lock, flags);
  473. if (cmd == SNDRV_PCM_TRIGGER_START) {
  474. cs4231_dma_trigger(substream, what, 1);
  475. chip->image[CS4231_IFACE_CTRL] |= what;
  476. } else {
  477. cs4231_dma_trigger(substream, what, 0);
  478. chip->image[CS4231_IFACE_CTRL] &= ~what;
  479. }
  480. snd_cs4231_out(chip, CS4231_IFACE_CTRL,
  481. chip->image[CS4231_IFACE_CTRL]);
  482. spin_unlock_irqrestore(&chip->lock, flags);
  483. break;
  484. }
  485. default:
  486. result = -EINVAL;
  487. break;
  488. }
  489. return result;
  490. }
  491. /*
  492. * CODEC I/O
  493. */
  494. static unsigned char snd_cs4231_get_rate(unsigned int rate)
  495. {
  496. int i;
  497. for (i = 0; i < 14; i++)
  498. if (rate == rates[i])
  499. return freq_bits[i];
  500. return freq_bits[13];
  501. }
  502. static unsigned char snd_cs4231_get_format(struct snd_cs4231 *chip, int format,
  503. int channels)
  504. {
  505. unsigned char rformat;
  506. rformat = CS4231_LINEAR_8;
  507. switch (format) {
  508. case SNDRV_PCM_FORMAT_MU_LAW:
  509. rformat = CS4231_ULAW_8;
  510. break;
  511. case SNDRV_PCM_FORMAT_A_LAW:
  512. rformat = CS4231_ALAW_8;
  513. break;
  514. case SNDRV_PCM_FORMAT_S16_LE:
  515. rformat = CS4231_LINEAR_16;
  516. break;
  517. case SNDRV_PCM_FORMAT_S16_BE:
  518. rformat = CS4231_LINEAR_16_BIG;
  519. break;
  520. case SNDRV_PCM_FORMAT_IMA_ADPCM:
  521. rformat = CS4231_ADPCM_16;
  522. break;
  523. }
  524. if (channels > 1)
  525. rformat |= CS4231_STEREO;
  526. return rformat;
  527. }
  528. static void snd_cs4231_calibrate_mute(struct snd_cs4231 *chip, int mute)
  529. {
  530. unsigned long flags;
  531. mute = mute ? 1 : 0;
  532. spin_lock_irqsave(&chip->lock, flags);
  533. if (chip->calibrate_mute == mute) {
  534. spin_unlock_irqrestore(&chip->lock, flags);
  535. return;
  536. }
  537. if (!mute) {
  538. snd_cs4231_dout(chip, CS4231_LEFT_INPUT,
  539. chip->image[CS4231_LEFT_INPUT]);
  540. snd_cs4231_dout(chip, CS4231_RIGHT_INPUT,
  541. chip->image[CS4231_RIGHT_INPUT]);
  542. snd_cs4231_dout(chip, CS4231_LOOPBACK,
  543. chip->image[CS4231_LOOPBACK]);
  544. }
  545. snd_cs4231_dout(chip, CS4231_AUX1_LEFT_INPUT,
  546. mute ? 0x80 : chip->image[CS4231_AUX1_LEFT_INPUT]);
  547. snd_cs4231_dout(chip, CS4231_AUX1_RIGHT_INPUT,
  548. mute ? 0x80 : chip->image[CS4231_AUX1_RIGHT_INPUT]);
  549. snd_cs4231_dout(chip, CS4231_AUX2_LEFT_INPUT,
  550. mute ? 0x80 : chip->image[CS4231_AUX2_LEFT_INPUT]);
  551. snd_cs4231_dout(chip, CS4231_AUX2_RIGHT_INPUT,
  552. mute ? 0x80 : chip->image[CS4231_AUX2_RIGHT_INPUT]);
  553. snd_cs4231_dout(chip, CS4231_LEFT_OUTPUT,
  554. mute ? 0x80 : chip->image[CS4231_LEFT_OUTPUT]);
  555. snd_cs4231_dout(chip, CS4231_RIGHT_OUTPUT,
  556. mute ? 0x80 : chip->image[CS4231_RIGHT_OUTPUT]);
  557. snd_cs4231_dout(chip, CS4231_LEFT_LINE_IN,
  558. mute ? 0x80 : chip->image[CS4231_LEFT_LINE_IN]);
  559. snd_cs4231_dout(chip, CS4231_RIGHT_LINE_IN,
  560. mute ? 0x80 : chip->image[CS4231_RIGHT_LINE_IN]);
  561. snd_cs4231_dout(chip, CS4231_MONO_CTRL,
  562. mute ? 0xc0 : chip->image[CS4231_MONO_CTRL]);
  563. chip->calibrate_mute = mute;
  564. spin_unlock_irqrestore(&chip->lock, flags);
  565. }
  566. static void snd_cs4231_playback_format(struct snd_cs4231 *chip,
  567. struct snd_pcm_hw_params *params,
  568. unsigned char pdfr)
  569. {
  570. unsigned long flags;
  571. mutex_lock(&chip->mce_mutex);
  572. snd_cs4231_calibrate_mute(chip, 1);
  573. snd_cs4231_mce_up(chip);
  574. spin_lock_irqsave(&chip->lock, flags);
  575. snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
  576. (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) ?
  577. (pdfr & 0xf0) | (chip->image[CS4231_REC_FORMAT] & 0x0f) :
  578. pdfr);
  579. spin_unlock_irqrestore(&chip->lock, flags);
  580. snd_cs4231_mce_down(chip);
  581. snd_cs4231_calibrate_mute(chip, 0);
  582. mutex_unlock(&chip->mce_mutex);
  583. }
  584. static void snd_cs4231_capture_format(struct snd_cs4231 *chip,
  585. struct snd_pcm_hw_params *params,
  586. unsigned char cdfr)
  587. {
  588. unsigned long flags;
  589. mutex_lock(&chip->mce_mutex);
  590. snd_cs4231_calibrate_mute(chip, 1);
  591. snd_cs4231_mce_up(chip);
  592. spin_lock_irqsave(&chip->lock, flags);
  593. if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE)) {
  594. snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
  595. ((chip->image[CS4231_PLAYBK_FORMAT]) & 0xf0) |
  596. (cdfr & 0x0f));
  597. spin_unlock_irqrestore(&chip->lock, flags);
  598. snd_cs4231_mce_down(chip);
  599. snd_cs4231_mce_up(chip);
  600. spin_lock_irqsave(&chip->lock, flags);
  601. }
  602. snd_cs4231_out(chip, CS4231_REC_FORMAT, cdfr);
  603. spin_unlock_irqrestore(&chip->lock, flags);
  604. snd_cs4231_mce_down(chip);
  605. snd_cs4231_calibrate_mute(chip, 0);
  606. mutex_unlock(&chip->mce_mutex);
  607. }
  608. /*
  609. * Timer interface
  610. */
  611. static unsigned long snd_cs4231_timer_resolution(struct snd_timer *timer)
  612. {
  613. struct snd_cs4231 *chip = snd_timer_chip(timer);
  614. return chip->image[CS4231_PLAYBK_FORMAT] & 1 ? 9969 : 9920;
  615. }
  616. static int snd_cs4231_timer_start(struct snd_timer *timer)
  617. {
  618. unsigned long flags;
  619. unsigned int ticks;
  620. struct snd_cs4231 *chip = snd_timer_chip(timer);
  621. spin_lock_irqsave(&chip->lock, flags);
  622. ticks = timer->sticks;
  623. if ((chip->image[CS4231_ALT_FEATURE_1] & CS4231_TIMER_ENABLE) == 0 ||
  624. (unsigned char)(ticks >> 8) != chip->image[CS4231_TIMER_HIGH] ||
  625. (unsigned char)ticks != chip->image[CS4231_TIMER_LOW]) {
  626. snd_cs4231_out(chip, CS4231_TIMER_HIGH,
  627. chip->image[CS4231_TIMER_HIGH] =
  628. (unsigned char) (ticks >> 8));
  629. snd_cs4231_out(chip, CS4231_TIMER_LOW,
  630. chip->image[CS4231_TIMER_LOW] =
  631. (unsigned char) ticks);
  632. snd_cs4231_out(chip, CS4231_ALT_FEATURE_1,
  633. chip->image[CS4231_ALT_FEATURE_1] |
  634. CS4231_TIMER_ENABLE);
  635. }
  636. spin_unlock_irqrestore(&chip->lock, flags);
  637. return 0;
  638. }
  639. static int snd_cs4231_timer_stop(struct snd_timer *timer)
  640. {
  641. unsigned long flags;
  642. struct snd_cs4231 *chip = snd_timer_chip(timer);
  643. spin_lock_irqsave(&chip->lock, flags);
  644. chip->image[CS4231_ALT_FEATURE_1] &= ~CS4231_TIMER_ENABLE;
  645. snd_cs4231_out(chip, CS4231_ALT_FEATURE_1,
  646. chip->image[CS4231_ALT_FEATURE_1]);
  647. spin_unlock_irqrestore(&chip->lock, flags);
  648. return 0;
  649. }
  650. static void __init snd_cs4231_init(struct snd_cs4231 *chip)
  651. {
  652. unsigned long flags;
  653. snd_cs4231_mce_down(chip);
  654. #ifdef SNDRV_DEBUG_MCE
  655. snd_printdd("init: (1)\n");
  656. #endif
  657. snd_cs4231_mce_up(chip);
  658. spin_lock_irqsave(&chip->lock, flags);
  659. chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE |
  660. CS4231_PLAYBACK_PIO |
  661. CS4231_RECORD_ENABLE |
  662. CS4231_RECORD_PIO |
  663. CS4231_CALIB_MODE);
  664. chip->image[CS4231_IFACE_CTRL] |= CS4231_AUTOCALIB;
  665. snd_cs4231_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]);
  666. spin_unlock_irqrestore(&chip->lock, flags);
  667. snd_cs4231_mce_down(chip);
  668. #ifdef SNDRV_DEBUG_MCE
  669. snd_printdd("init: (2)\n");
  670. #endif
  671. snd_cs4231_mce_up(chip);
  672. spin_lock_irqsave(&chip->lock, flags);
  673. snd_cs4231_out(chip, CS4231_ALT_FEATURE_1,
  674. chip->image[CS4231_ALT_FEATURE_1]);
  675. spin_unlock_irqrestore(&chip->lock, flags);
  676. snd_cs4231_mce_down(chip);
  677. #ifdef SNDRV_DEBUG_MCE
  678. snd_printdd("init: (3) - afei = 0x%x\n",
  679. chip->image[CS4231_ALT_FEATURE_1]);
  680. #endif
  681. spin_lock_irqsave(&chip->lock, flags);
  682. snd_cs4231_out(chip, CS4231_ALT_FEATURE_2,
  683. chip->image[CS4231_ALT_FEATURE_2]);
  684. spin_unlock_irqrestore(&chip->lock, flags);
  685. snd_cs4231_mce_up(chip);
  686. spin_lock_irqsave(&chip->lock, flags);
  687. snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
  688. chip->image[CS4231_PLAYBK_FORMAT]);
  689. spin_unlock_irqrestore(&chip->lock, flags);
  690. snd_cs4231_mce_down(chip);
  691. #ifdef SNDRV_DEBUG_MCE
  692. snd_printdd("init: (4)\n");
  693. #endif
  694. snd_cs4231_mce_up(chip);
  695. spin_lock_irqsave(&chip->lock, flags);
  696. snd_cs4231_out(chip, CS4231_REC_FORMAT, chip->image[CS4231_REC_FORMAT]);
  697. spin_unlock_irqrestore(&chip->lock, flags);
  698. snd_cs4231_mce_down(chip);
  699. #ifdef SNDRV_DEBUG_MCE
  700. snd_printdd("init: (5)\n");
  701. #endif
  702. }
  703. static int snd_cs4231_open(struct snd_cs4231 *chip, unsigned int mode)
  704. {
  705. unsigned long flags;
  706. mutex_lock(&chip->open_mutex);
  707. if ((chip->mode & mode)) {
  708. mutex_unlock(&chip->open_mutex);
  709. return -EAGAIN;
  710. }
  711. if (chip->mode & CS4231_MODE_OPEN) {
  712. chip->mode |= mode;
  713. mutex_unlock(&chip->open_mutex);
  714. return 0;
  715. }
  716. /* ok. now enable and ack CODEC IRQ */
  717. spin_lock_irqsave(&chip->lock, flags);
  718. snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ |
  719. CS4231_RECORD_IRQ |
  720. CS4231_TIMER_IRQ);
  721. snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
  722. __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
  723. __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
  724. snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ |
  725. CS4231_RECORD_IRQ |
  726. CS4231_TIMER_IRQ);
  727. snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
  728. spin_unlock_irqrestore(&chip->lock, flags);
  729. chip->mode = mode;
  730. mutex_unlock(&chip->open_mutex);
  731. return 0;
  732. }
  733. static void snd_cs4231_close(struct snd_cs4231 *chip, unsigned int mode)
  734. {
  735. unsigned long flags;
  736. mutex_lock(&chip->open_mutex);
  737. chip->mode &= ~mode;
  738. if (chip->mode & CS4231_MODE_OPEN) {
  739. mutex_unlock(&chip->open_mutex);
  740. return;
  741. }
  742. snd_cs4231_calibrate_mute(chip, 1);
  743. /* disable IRQ */
  744. spin_lock_irqsave(&chip->lock, flags);
  745. snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
  746. __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
  747. __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
  748. /* now disable record & playback */
  749. if (chip->image[CS4231_IFACE_CTRL] &
  750. (CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
  751. CS4231_RECORD_ENABLE | CS4231_RECORD_PIO)) {
  752. spin_unlock_irqrestore(&chip->lock, flags);
  753. snd_cs4231_mce_up(chip);
  754. spin_lock_irqsave(&chip->lock, flags);
  755. chip->image[CS4231_IFACE_CTRL] &=
  756. ~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
  757. CS4231_RECORD_ENABLE | CS4231_RECORD_PIO);
  758. snd_cs4231_out(chip, CS4231_IFACE_CTRL,
  759. chip->image[CS4231_IFACE_CTRL]);
  760. spin_unlock_irqrestore(&chip->lock, flags);
  761. snd_cs4231_mce_down(chip);
  762. spin_lock_irqsave(&chip->lock, flags);
  763. }
  764. /* clear IRQ again */
  765. snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
  766. __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
  767. __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
  768. spin_unlock_irqrestore(&chip->lock, flags);
  769. snd_cs4231_calibrate_mute(chip, 0);
  770. chip->mode = 0;
  771. mutex_unlock(&chip->open_mutex);
  772. }
  773. /*
  774. * timer open/close
  775. */
  776. static int snd_cs4231_timer_open(struct snd_timer *timer)
  777. {
  778. struct snd_cs4231 *chip = snd_timer_chip(timer);
  779. snd_cs4231_open(chip, CS4231_MODE_TIMER);
  780. return 0;
  781. }
  782. static int snd_cs4231_timer_close(struct snd_timer *timer)
  783. {
  784. struct snd_cs4231 *chip = snd_timer_chip(timer);
  785. snd_cs4231_close(chip, CS4231_MODE_TIMER);
  786. return 0;
  787. }
  788. static struct snd_timer_hardware snd_cs4231_timer_table = {
  789. .flags = SNDRV_TIMER_HW_AUTO,
  790. .resolution = 9945,
  791. .ticks = 65535,
  792. .open = snd_cs4231_timer_open,
  793. .close = snd_cs4231_timer_close,
  794. .c_resolution = snd_cs4231_timer_resolution,
  795. .start = snd_cs4231_timer_start,
  796. .stop = snd_cs4231_timer_stop,
  797. };
  798. /*
  799. * ok.. exported functions..
  800. */
  801. static int snd_cs4231_playback_hw_params(struct snd_pcm_substream *substream,
  802. struct snd_pcm_hw_params *hw_params)
  803. {
  804. struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
  805. unsigned char new_pdfr;
  806. int err;
  807. err = snd_pcm_lib_malloc_pages(substream,
  808. params_buffer_bytes(hw_params));
  809. if (err < 0)
  810. return err;
  811. new_pdfr = snd_cs4231_get_format(chip, params_format(hw_params),
  812. params_channels(hw_params)) |
  813. snd_cs4231_get_rate(params_rate(hw_params));
  814. snd_cs4231_playback_format(chip, hw_params, new_pdfr);
  815. return 0;
  816. }
  817. static int snd_cs4231_playback_prepare(struct snd_pcm_substream *substream)
  818. {
  819. struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
  820. struct snd_pcm_runtime *runtime = substream->runtime;
  821. unsigned long flags;
  822. spin_lock_irqsave(&chip->lock, flags);
  823. chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE |
  824. CS4231_PLAYBACK_PIO);
  825. BUG_ON(runtime->period_size > 0xffff + 1);
  826. chip->p_periods_sent = 0;
  827. spin_unlock_irqrestore(&chip->lock, flags);
  828. return 0;
  829. }
  830. static int snd_cs4231_capture_hw_params(struct snd_pcm_substream *substream,
  831. struct snd_pcm_hw_params *hw_params)
  832. {
  833. struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
  834. unsigned char new_cdfr;
  835. int err;
  836. err = snd_pcm_lib_malloc_pages(substream,
  837. params_buffer_bytes(hw_params));
  838. if (err < 0)
  839. return err;
  840. new_cdfr = snd_cs4231_get_format(chip, params_format(hw_params),
  841. params_channels(hw_params)) |
  842. snd_cs4231_get_rate(params_rate(hw_params));
  843. snd_cs4231_capture_format(chip, hw_params, new_cdfr);
  844. return 0;
  845. }
  846. static int snd_cs4231_capture_prepare(struct snd_pcm_substream *substream)
  847. {
  848. struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
  849. unsigned long flags;
  850. spin_lock_irqsave(&chip->lock, flags);
  851. chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_RECORD_ENABLE |
  852. CS4231_RECORD_PIO);
  853. chip->c_periods_sent = 0;
  854. spin_unlock_irqrestore(&chip->lock, flags);
  855. return 0;
  856. }
  857. static void snd_cs4231_overrange(struct snd_cs4231 *chip)
  858. {
  859. unsigned long flags;
  860. unsigned char res;
  861. spin_lock_irqsave(&chip->lock, flags);
  862. res = snd_cs4231_in(chip, CS4231_TEST_INIT);
  863. spin_unlock_irqrestore(&chip->lock, flags);
  864. /* detect overrange only above 0dB; may be user selectable? */
  865. if (res & (0x08 | 0x02))
  866. chip->capture_substream->runtime->overrange++;
  867. }
  868. static void snd_cs4231_play_callback(struct snd_cs4231 *chip)
  869. {
  870. if (chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE) {
  871. snd_pcm_period_elapsed(chip->playback_substream);
  872. snd_cs4231_advance_dma(&chip->p_dma, chip->playback_substream,
  873. &chip->p_periods_sent);
  874. }
  875. }
  876. static void snd_cs4231_capture_callback(struct snd_cs4231 *chip)
  877. {
  878. if (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) {
  879. snd_pcm_period_elapsed(chip->capture_substream);
  880. snd_cs4231_advance_dma(&chip->c_dma, chip->capture_substream,
  881. &chip->c_periods_sent);
  882. }
  883. }
  884. static snd_pcm_uframes_t snd_cs4231_playback_pointer(
  885. struct snd_pcm_substream *substream)
  886. {
  887. struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
  888. struct cs4231_dma_control *dma_cont = &chip->p_dma;
  889. size_t ptr;
  890. if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE))
  891. return 0;
  892. ptr = dma_cont->address(dma_cont);
  893. if (ptr != 0)
  894. ptr -= substream->runtime->dma_addr;
  895. return bytes_to_frames(substream->runtime, ptr);
  896. }
  897. static snd_pcm_uframes_t snd_cs4231_capture_pointer(
  898. struct snd_pcm_substream *substream)
  899. {
  900. struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
  901. struct cs4231_dma_control *dma_cont = &chip->c_dma;
  902. size_t ptr;
  903. if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE))
  904. return 0;
  905. ptr = dma_cont->address(dma_cont);
  906. if (ptr != 0)
  907. ptr -= substream->runtime->dma_addr;
  908. return bytes_to_frames(substream->runtime, ptr);
  909. }
  910. static int __init snd_cs4231_probe(struct snd_cs4231 *chip)
  911. {
  912. unsigned long flags;
  913. int i;
  914. int id = 0;
  915. int vers = 0;
  916. unsigned char *ptr;
  917. for (i = 0; i < 50; i++) {
  918. mb();
  919. if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
  920. msleep(2);
  921. else {
  922. spin_lock_irqsave(&chip->lock, flags);
  923. snd_cs4231_out(chip, CS4231_MISC_INFO, CS4231_MODE2);
  924. id = snd_cs4231_in(chip, CS4231_MISC_INFO) & 0x0f;
  925. vers = snd_cs4231_in(chip, CS4231_VERSION);
  926. spin_unlock_irqrestore(&chip->lock, flags);
  927. if (id == 0x0a)
  928. break; /* this is valid value */
  929. }
  930. }
  931. snd_printdd("cs4231: port = %p, id = 0x%x\n", chip->port, id);
  932. if (id != 0x0a)
  933. return -ENODEV; /* no valid device found */
  934. spin_lock_irqsave(&chip->lock, flags);
  935. /* clear any pendings IRQ */
  936. __cs4231_readb(chip, CS4231U(chip, STATUS));
  937. __cs4231_writeb(chip, 0, CS4231U(chip, STATUS));
  938. mb();
  939. spin_unlock_irqrestore(&chip->lock, flags);
  940. chip->image[CS4231_MISC_INFO] = CS4231_MODE2;
  941. chip->image[CS4231_IFACE_CTRL] =
  942. chip->image[CS4231_IFACE_CTRL] & ~CS4231_SINGLE_DMA;
  943. chip->image[CS4231_ALT_FEATURE_1] = 0x80;
  944. chip->image[CS4231_ALT_FEATURE_2] = 0x01;
  945. if (vers & 0x20)
  946. chip->image[CS4231_ALT_FEATURE_2] |= 0x02;
  947. ptr = (unsigned char *) &chip->image;
  948. snd_cs4231_mce_down(chip);
  949. spin_lock_irqsave(&chip->lock, flags);
  950. for (i = 0; i < 32; i++) /* ok.. fill all CS4231 registers */
  951. snd_cs4231_out(chip, i, *ptr++);
  952. spin_unlock_irqrestore(&chip->lock, flags);
  953. snd_cs4231_mce_up(chip);
  954. snd_cs4231_mce_down(chip);
  955. mdelay(2);
  956. return 0; /* all things are ok.. */
  957. }
  958. static struct snd_pcm_hardware snd_cs4231_playback = {
  959. .info = SNDRV_PCM_INFO_MMAP |
  960. SNDRV_PCM_INFO_INTERLEAVED |
  961. SNDRV_PCM_INFO_MMAP_VALID |
  962. SNDRV_PCM_INFO_SYNC_START,
  963. .formats = SNDRV_PCM_FMTBIT_MU_LAW |
  964. SNDRV_PCM_FMTBIT_A_LAW |
  965. SNDRV_PCM_FMTBIT_IMA_ADPCM |
  966. SNDRV_PCM_FMTBIT_U8 |
  967. SNDRV_PCM_FMTBIT_S16_LE |
  968. SNDRV_PCM_FMTBIT_S16_BE,
  969. .rates = SNDRV_PCM_RATE_KNOT |
  970. SNDRV_PCM_RATE_8000_48000,
  971. .rate_min = 5510,
  972. .rate_max = 48000,
  973. .channels_min = 1,
  974. .channels_max = 2,
  975. .buffer_bytes_max = 32 * 1024,
  976. .period_bytes_min = 64,
  977. .period_bytes_max = 32 * 1024,
  978. .periods_min = 1,
  979. .periods_max = 1024,
  980. };
  981. static struct snd_pcm_hardware snd_cs4231_capture = {
  982. .info = SNDRV_PCM_INFO_MMAP |
  983. SNDRV_PCM_INFO_INTERLEAVED |
  984. SNDRV_PCM_INFO_MMAP_VALID |
  985. SNDRV_PCM_INFO_SYNC_START,
  986. .formats = SNDRV_PCM_FMTBIT_MU_LAW |
  987. SNDRV_PCM_FMTBIT_A_LAW |
  988. SNDRV_PCM_FMTBIT_IMA_ADPCM |
  989. SNDRV_PCM_FMTBIT_U8 |
  990. SNDRV_PCM_FMTBIT_S16_LE |
  991. SNDRV_PCM_FMTBIT_S16_BE,
  992. .rates = SNDRV_PCM_RATE_KNOT |
  993. SNDRV_PCM_RATE_8000_48000,
  994. .rate_min = 5510,
  995. .rate_max = 48000,
  996. .channels_min = 1,
  997. .channels_max = 2,
  998. .buffer_bytes_max = 32 * 1024,
  999. .period_bytes_min = 64,
  1000. .period_bytes_max = 32 * 1024,
  1001. .periods_min = 1,
  1002. .periods_max = 1024,
  1003. };
  1004. static int snd_cs4231_playback_open(struct snd_pcm_substream *substream)
  1005. {
  1006. struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
  1007. struct snd_pcm_runtime *runtime = substream->runtime;
  1008. int err;
  1009. runtime->hw = snd_cs4231_playback;
  1010. err = snd_cs4231_open(chip, CS4231_MODE_PLAY);
  1011. if (err < 0) {
  1012. snd_free_pages(runtime->dma_area, runtime->dma_bytes);
  1013. return err;
  1014. }
  1015. chip->playback_substream = substream;
  1016. chip->p_periods_sent = 0;
  1017. snd_pcm_set_sync(substream);
  1018. snd_cs4231_xrate(runtime);
  1019. return 0;
  1020. }
  1021. static int snd_cs4231_capture_open(struct snd_pcm_substream *substream)
  1022. {
  1023. struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
  1024. struct snd_pcm_runtime *runtime = substream->runtime;
  1025. int err;
  1026. runtime->hw = snd_cs4231_capture;
  1027. err = snd_cs4231_open(chip, CS4231_MODE_RECORD);
  1028. if (err < 0) {
  1029. snd_free_pages(runtime->dma_area, runtime->dma_bytes);
  1030. return err;
  1031. }
  1032. chip->capture_substream = substream;
  1033. chip->c_periods_sent = 0;
  1034. snd_pcm_set_sync(substream);
  1035. snd_cs4231_xrate(runtime);
  1036. return 0;
  1037. }
  1038. static int snd_cs4231_playback_close(struct snd_pcm_substream *substream)
  1039. {
  1040. struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
  1041. snd_cs4231_close(chip, CS4231_MODE_PLAY);
  1042. chip->playback_substream = NULL;
  1043. return 0;
  1044. }
  1045. static int snd_cs4231_capture_close(struct snd_pcm_substream *substream)
  1046. {
  1047. struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
  1048. snd_cs4231_close(chip, CS4231_MODE_RECORD);
  1049. chip->capture_substream = NULL;
  1050. return 0;
  1051. }
  1052. /* XXX We can do some power-management, in particular on EBUS using
  1053. * XXX the audio AUXIO register...
  1054. */
  1055. static struct snd_pcm_ops snd_cs4231_playback_ops = {
  1056. .open = snd_cs4231_playback_open,
  1057. .close = snd_cs4231_playback_close,
  1058. .ioctl = snd_pcm_lib_ioctl,
  1059. .hw_params = snd_cs4231_playback_hw_params,
  1060. .hw_free = snd_pcm_lib_free_pages,
  1061. .prepare = snd_cs4231_playback_prepare,
  1062. .trigger = snd_cs4231_trigger,
  1063. .pointer = snd_cs4231_playback_pointer,
  1064. };
  1065. static struct snd_pcm_ops snd_cs4231_capture_ops = {
  1066. .open = snd_cs4231_capture_open,
  1067. .close = snd_cs4231_capture_close,
  1068. .ioctl = snd_pcm_lib_ioctl,
  1069. .hw_params = snd_cs4231_capture_hw_params,
  1070. .hw_free = snd_pcm_lib_free_pages,
  1071. .prepare = snd_cs4231_capture_prepare,
  1072. .trigger = snd_cs4231_trigger,
  1073. .pointer = snd_cs4231_capture_pointer,
  1074. };
  1075. static int __init snd_cs4231_pcm(struct snd_card *card)
  1076. {
  1077. struct snd_cs4231 *chip = card->private_data;
  1078. struct snd_pcm *pcm;
  1079. int err;
  1080. err = snd_pcm_new(card, "CS4231", 0, 1, 1, &pcm);
  1081. if (err < 0)
  1082. return err;
  1083. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
  1084. &snd_cs4231_playback_ops);
  1085. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
  1086. &snd_cs4231_capture_ops);
  1087. /* global setup */
  1088. pcm->private_data = chip;
  1089. pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
  1090. strcpy(pcm->name, "CS4231");
  1091. chip->p_dma.preallocate(chip, pcm);
  1092. chip->pcm = pcm;
  1093. return 0;
  1094. }
  1095. static int __init snd_cs4231_timer(struct snd_card *card)
  1096. {
  1097. struct snd_cs4231 *chip = card->private_data;
  1098. struct snd_timer *timer;
  1099. struct snd_timer_id tid;
  1100. int err;
  1101. /* Timer initialization */
  1102. tid.dev_class = SNDRV_TIMER_CLASS_CARD;
  1103. tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
  1104. tid.card = card->number;
  1105. tid.device = 0;
  1106. tid.subdevice = 0;
  1107. err = snd_timer_new(card, "CS4231", &tid, &timer);
  1108. if (err < 0)
  1109. return err;
  1110. strcpy(timer->name, "CS4231");
  1111. timer->private_data = chip;
  1112. timer->hw = snd_cs4231_timer_table;
  1113. chip->timer = timer;
  1114. return 0;
  1115. }
  1116. /*
  1117. * MIXER part
  1118. */
  1119. static int snd_cs4231_info_mux(struct snd_kcontrol *kcontrol,
  1120. struct snd_ctl_elem_info *uinfo)
  1121. {
  1122. static char *texts[4] = {
  1123. "Line", "CD", "Mic", "Mix"
  1124. };
  1125. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1126. uinfo->count = 2;
  1127. uinfo->value.enumerated.items = 4;
  1128. if (uinfo->value.enumerated.item > 3)
  1129. uinfo->value.enumerated.item = 3;
  1130. strcpy(uinfo->value.enumerated.name,
  1131. texts[uinfo->value.enumerated.item]);
  1132. return 0;
  1133. }
  1134. static int snd_cs4231_get_mux(struct snd_kcontrol *kcontrol,
  1135. struct snd_ctl_elem_value *ucontrol)
  1136. {
  1137. struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
  1138. unsigned long flags;
  1139. spin_lock_irqsave(&chip->lock, flags);
  1140. ucontrol->value.enumerated.item[0] =
  1141. (chip->image[CS4231_LEFT_INPUT] & CS4231_MIXS_ALL) >> 6;
  1142. ucontrol->value.enumerated.item[1] =
  1143. (chip->image[CS4231_RIGHT_INPUT] & CS4231_MIXS_ALL) >> 6;
  1144. spin_unlock_irqrestore(&chip->lock, flags);
  1145. return 0;
  1146. }
  1147. static int snd_cs4231_put_mux(struct snd_kcontrol *kcontrol,
  1148. struct snd_ctl_elem_value *ucontrol)
  1149. {
  1150. struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
  1151. unsigned long flags;
  1152. unsigned short left, right;
  1153. int change;
  1154. if (ucontrol->value.enumerated.item[0] > 3 ||
  1155. ucontrol->value.enumerated.item[1] > 3)
  1156. return -EINVAL;
  1157. left = ucontrol->value.enumerated.item[0] << 6;
  1158. right = ucontrol->value.enumerated.item[1] << 6;
  1159. spin_lock_irqsave(&chip->lock, flags);
  1160. left = (chip->image[CS4231_LEFT_INPUT] & ~CS4231_MIXS_ALL) | left;
  1161. right = (chip->image[CS4231_RIGHT_INPUT] & ~CS4231_MIXS_ALL) | right;
  1162. change = left != chip->image[CS4231_LEFT_INPUT] ||
  1163. right != chip->image[CS4231_RIGHT_INPUT];
  1164. snd_cs4231_out(chip, CS4231_LEFT_INPUT, left);
  1165. snd_cs4231_out(chip, CS4231_RIGHT_INPUT, right);
  1166. spin_unlock_irqrestore(&chip->lock, flags);
  1167. return change;
  1168. }
  1169. static int snd_cs4231_info_single(struct snd_kcontrol *kcontrol,
  1170. struct snd_ctl_elem_info *uinfo)
  1171. {
  1172. int mask = (kcontrol->private_value >> 16) & 0xff;
  1173. uinfo->type = (mask == 1) ?
  1174. SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
  1175. uinfo->count = 1;
  1176. uinfo->value.integer.min = 0;
  1177. uinfo->value.integer.max = mask;
  1178. return 0;
  1179. }
  1180. static int snd_cs4231_get_single(struct snd_kcontrol *kcontrol,
  1181. struct snd_ctl_elem_value *ucontrol)
  1182. {
  1183. struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
  1184. unsigned long flags;
  1185. int reg = kcontrol->private_value & 0xff;
  1186. int shift = (kcontrol->private_value >> 8) & 0xff;
  1187. int mask = (kcontrol->private_value >> 16) & 0xff;
  1188. int invert = (kcontrol->private_value >> 24) & 0xff;
  1189. spin_lock_irqsave(&chip->lock, flags);
  1190. ucontrol->value.integer.value[0] = (chip->image[reg] >> shift) & mask;
  1191. spin_unlock_irqrestore(&chip->lock, flags);
  1192. if (invert)
  1193. ucontrol->value.integer.value[0] =
  1194. (mask - ucontrol->value.integer.value[0]);
  1195. return 0;
  1196. }
  1197. static int snd_cs4231_put_single(struct snd_kcontrol *kcontrol,
  1198. struct snd_ctl_elem_value *ucontrol)
  1199. {
  1200. struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
  1201. unsigned long flags;
  1202. int reg = kcontrol->private_value & 0xff;
  1203. int shift = (kcontrol->private_value >> 8) & 0xff;
  1204. int mask = (kcontrol->private_value >> 16) & 0xff;
  1205. int invert = (kcontrol->private_value >> 24) & 0xff;
  1206. int change;
  1207. unsigned short val;
  1208. val = (ucontrol->value.integer.value[0] & mask);
  1209. if (invert)
  1210. val = mask - val;
  1211. val <<= shift;
  1212. spin_lock_irqsave(&chip->lock, flags);
  1213. val = (chip->image[reg] & ~(mask << shift)) | val;
  1214. change = val != chip->image[reg];
  1215. snd_cs4231_out(chip, reg, val);
  1216. spin_unlock_irqrestore(&chip->lock, flags);
  1217. return change;
  1218. }
  1219. static int snd_cs4231_info_double(struct snd_kcontrol *kcontrol,
  1220. struct snd_ctl_elem_info *uinfo)
  1221. {
  1222. int mask = (kcontrol->private_value >> 24) & 0xff;
  1223. uinfo->type = mask == 1 ?
  1224. SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
  1225. uinfo->count = 2;
  1226. uinfo->value.integer.min = 0;
  1227. uinfo->value.integer.max = mask;
  1228. return 0;
  1229. }
  1230. static int snd_cs4231_get_double(struct snd_kcontrol *kcontrol,
  1231. struct snd_ctl_elem_value *ucontrol)
  1232. {
  1233. struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
  1234. unsigned long flags;
  1235. int left_reg = kcontrol->private_value & 0xff;
  1236. int right_reg = (kcontrol->private_value >> 8) & 0xff;
  1237. int shift_left = (kcontrol->private_value >> 16) & 0x07;
  1238. int shift_right = (kcontrol->private_value >> 19) & 0x07;
  1239. int mask = (kcontrol->private_value >> 24) & 0xff;
  1240. int invert = (kcontrol->private_value >> 22) & 1;
  1241. spin_lock_irqsave(&chip->lock, flags);
  1242. ucontrol->value.integer.value[0] =
  1243. (chip->image[left_reg] >> shift_left) & mask;
  1244. ucontrol->value.integer.value[1] =
  1245. (chip->image[right_reg] >> shift_right) & mask;
  1246. spin_unlock_irqrestore(&chip->lock, flags);
  1247. if (invert) {
  1248. ucontrol->value.integer.value[0] =
  1249. (mask - ucontrol->value.integer.value[0]);
  1250. ucontrol->value.integer.value[1] =
  1251. (mask - ucontrol->value.integer.value[1]);
  1252. }
  1253. return 0;
  1254. }
  1255. static int snd_cs4231_put_double(struct snd_kcontrol *kcontrol,
  1256. struct snd_ctl_elem_value *ucontrol)
  1257. {
  1258. struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
  1259. unsigned long flags;
  1260. int left_reg = kcontrol->private_value & 0xff;
  1261. int right_reg = (kcontrol->private_value >> 8) & 0xff;
  1262. int shift_left = (kcontrol->private_value >> 16) & 0x07;
  1263. int shift_right = (kcontrol->private_value >> 19) & 0x07;
  1264. int mask = (kcontrol->private_value >> 24) & 0xff;
  1265. int invert = (kcontrol->private_value >> 22) & 1;
  1266. int change;
  1267. unsigned short val1, val2;
  1268. val1 = ucontrol->value.integer.value[0] & mask;
  1269. val2 = ucontrol->value.integer.value[1] & mask;
  1270. if (invert) {
  1271. val1 = mask - val1;
  1272. val2 = mask - val2;
  1273. }
  1274. val1 <<= shift_left;
  1275. val2 <<= shift_right;
  1276. spin_lock_irqsave(&chip->lock, flags);
  1277. val1 = (chip->image[left_reg] & ~(mask << shift_left)) | val1;
  1278. val2 = (chip->image[right_reg] & ~(mask << shift_right)) | val2;
  1279. change = val1 != chip->image[left_reg];
  1280. change |= val2 != chip->image[right_reg];
  1281. snd_cs4231_out(chip, left_reg, val1);
  1282. snd_cs4231_out(chip, right_reg, val2);
  1283. spin_unlock_irqrestore(&chip->lock, flags);
  1284. return change;
  1285. }
  1286. #define CS4231_SINGLE(xname, xindex, reg, shift, mask, invert) \
  1287. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), .index = (xindex), \
  1288. .info = snd_cs4231_info_single, \
  1289. .get = snd_cs4231_get_single, .put = snd_cs4231_put_single, \
  1290. .private_value = (reg) | ((shift) << 8) | ((mask) << 16) | ((invert) << 24) }
  1291. #define CS4231_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, \
  1292. shift_right, mask, invert) \
  1293. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), .index = (xindex), \
  1294. .info = snd_cs4231_info_double, \
  1295. .get = snd_cs4231_get_double, .put = snd_cs4231_put_double, \
  1296. .private_value = (left_reg) | ((right_reg) << 8) | ((shift_left) << 16) | \
  1297. ((shift_right) << 19) | ((mask) << 24) | ((invert) << 22) }
  1298. static struct snd_kcontrol_new snd_cs4231_controls[] __initdata = {
  1299. CS4231_DOUBLE("PCM Playback Switch", 0, CS4231_LEFT_OUTPUT,
  1300. CS4231_RIGHT_OUTPUT, 7, 7, 1, 1),
  1301. CS4231_DOUBLE("PCM Playback Volume", 0, CS4231_LEFT_OUTPUT,
  1302. CS4231_RIGHT_OUTPUT, 0, 0, 63, 1),
  1303. CS4231_DOUBLE("Line Playback Switch", 0, CS4231_LEFT_LINE_IN,
  1304. CS4231_RIGHT_LINE_IN, 7, 7, 1, 1),
  1305. CS4231_DOUBLE("Line Playback Volume", 0, CS4231_LEFT_LINE_IN,
  1306. CS4231_RIGHT_LINE_IN, 0, 0, 31, 1),
  1307. CS4231_DOUBLE("Aux Playback Switch", 0, CS4231_AUX1_LEFT_INPUT,
  1308. CS4231_AUX1_RIGHT_INPUT, 7, 7, 1, 1),
  1309. CS4231_DOUBLE("Aux Playback Volume", 0, CS4231_AUX1_LEFT_INPUT,
  1310. CS4231_AUX1_RIGHT_INPUT, 0, 0, 31, 1),
  1311. CS4231_DOUBLE("Aux Playback Switch", 1, CS4231_AUX2_LEFT_INPUT,
  1312. CS4231_AUX2_RIGHT_INPUT, 7, 7, 1, 1),
  1313. CS4231_DOUBLE("Aux Playback Volume", 1, CS4231_AUX2_LEFT_INPUT,
  1314. CS4231_AUX2_RIGHT_INPUT, 0, 0, 31, 1),
  1315. CS4231_SINGLE("Mono Playback Switch", 0, CS4231_MONO_CTRL, 7, 1, 1),
  1316. CS4231_SINGLE("Mono Playback Volume", 0, CS4231_MONO_CTRL, 0, 15, 1),
  1317. CS4231_SINGLE("Mono Output Playback Switch", 0, CS4231_MONO_CTRL, 6, 1, 1),
  1318. CS4231_SINGLE("Mono Output Playback Bypass", 0, CS4231_MONO_CTRL, 5, 1, 0),
  1319. CS4231_DOUBLE("Capture Volume", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 0, 0,
  1320. 15, 0),
  1321. {
  1322. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1323. .name = "Capture Source",
  1324. .info = snd_cs4231_info_mux,
  1325. .get = snd_cs4231_get_mux,
  1326. .put = snd_cs4231_put_mux,
  1327. },
  1328. CS4231_DOUBLE("Mic Boost", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 5, 5,
  1329. 1, 0),
  1330. CS4231_SINGLE("Loopback Capture Switch", 0, CS4231_LOOPBACK, 0, 1, 0),
  1331. CS4231_SINGLE("Loopback Capture Volume", 0, CS4231_LOOPBACK, 2, 63, 1),
  1332. /* SPARC specific uses of XCTL{0,1} general purpose outputs. */
  1333. CS4231_SINGLE("Line Out Switch", 0, CS4231_PIN_CTRL, 6, 1, 1),
  1334. CS4231_SINGLE("Headphone Out Switch", 0, CS4231_PIN_CTRL, 7, 1, 1)
  1335. };
  1336. static int __init snd_cs4231_mixer(struct snd_card *card)
  1337. {
  1338. struct snd_cs4231 *chip = card->private_data;
  1339. int err, idx;
  1340. snd_assert(chip != NULL && chip->pcm != NULL, return -EINVAL);
  1341. strcpy(card->mixername, chip->pcm->name);
  1342. for (idx = 0; idx < ARRAY_SIZE(snd_cs4231_controls); idx++) {
  1343. err = snd_ctl_add(card,
  1344. snd_ctl_new1(&snd_cs4231_controls[idx], chip));
  1345. if (err < 0)
  1346. return err;
  1347. }
  1348. return 0;
  1349. }
  1350. static int dev;
  1351. static int __init cs4231_attach_begin(struct snd_card **rcard)
  1352. {
  1353. struct snd_card *card;
  1354. struct snd_cs4231 *chip;
  1355. *rcard = NULL;
  1356. if (dev >= SNDRV_CARDS)
  1357. return -ENODEV;
  1358. if (!enable[dev]) {
  1359. dev++;
  1360. return -ENOENT;
  1361. }
  1362. card = snd_card_new(index[dev], id[dev], THIS_MODULE,
  1363. sizeof(struct snd_cs4231));
  1364. if (card == NULL)
  1365. return -ENOMEM;
  1366. strcpy(card->driver, "CS4231");
  1367. strcpy(card->shortname, "Sun CS4231");
  1368. chip = card->private_data;
  1369. chip->card = card;
  1370. *rcard = card;
  1371. return 0;
  1372. }
  1373. static int __init cs4231_attach_finish(struct snd_card *card)
  1374. {
  1375. struct snd_cs4231 *chip = card->private_data;
  1376. int err;
  1377. err = snd_cs4231_pcm(card);
  1378. if (err < 0)
  1379. goto out_err;
  1380. err = snd_cs4231_mixer(card);
  1381. if (err < 0)
  1382. goto out_err;
  1383. err = snd_cs4231_timer(card);
  1384. if (err < 0)
  1385. goto out_err;
  1386. err = snd_card_register(card);
  1387. if (err < 0)
  1388. goto out_err;
  1389. chip->next = cs4231_list;
  1390. cs4231_list = chip;
  1391. dev++;
  1392. return 0;
  1393. out_err:
  1394. snd_card_free(card);
  1395. return err;
  1396. }
  1397. #ifdef SBUS_SUPPORT
  1398. static irqreturn_t snd_cs4231_sbus_interrupt(int irq, void *dev_id)
  1399. {
  1400. unsigned long flags;
  1401. unsigned char status;
  1402. u32 csr;
  1403. struct snd_cs4231 *chip = dev_id;
  1404. /*This is IRQ is not raised by the cs4231*/
  1405. if (!(__cs4231_readb(chip, CS4231U(chip, STATUS)) & CS4231_GLOBALIRQ))
  1406. return IRQ_NONE;
  1407. /* ACK the APC interrupt. */
  1408. csr = sbus_readl(chip->port + APCCSR);
  1409. sbus_writel(csr, chip->port + APCCSR);
  1410. if ((csr & APC_PDMA_READY) &&
  1411. (csr & APC_PLAY_INT) &&
  1412. (csr & APC_XINT_PNVA) &&
  1413. !(csr & APC_XINT_EMPT))
  1414. snd_cs4231_play_callback(chip);
  1415. if ((csr & APC_CDMA_READY) &&
  1416. (csr & APC_CAPT_INT) &&
  1417. (csr & APC_XINT_CNVA) &&
  1418. !(csr & APC_XINT_EMPT))
  1419. snd_cs4231_capture_callback(chip);
  1420. status = snd_cs4231_in(chip, CS4231_IRQ_STATUS);
  1421. if (status & CS4231_TIMER_IRQ) {
  1422. if (chip->timer)
  1423. snd_timer_interrupt(chip->timer, chip->timer->sticks);
  1424. }
  1425. if ((status & CS4231_RECORD_IRQ) && (csr & APC_CDMA_READY))
  1426. snd_cs4231_overrange(chip);
  1427. /* ACK the CS4231 interrupt. */
  1428. spin_lock_irqsave(&chip->lock, flags);
  1429. snd_cs4231_outm(chip, CS4231_IRQ_STATUS, ~CS4231_ALL_IRQS | ~status, 0);
  1430. spin_unlock_irqrestore(&chip->lock, flags);
  1431. return IRQ_HANDLED;
  1432. }
  1433. /*
  1434. * SBUS DMA routines
  1435. */
  1436. static int sbus_dma_request(struct cs4231_dma_control *dma_cont,
  1437. dma_addr_t bus_addr, size_t len)
  1438. {
  1439. unsigned long flags;
  1440. u32 test, csr;
  1441. int err;
  1442. struct sbus_dma_info *base = &dma_cont->sbus_info;
  1443. if (len >= (1 << 24))
  1444. return -EINVAL;
  1445. spin_lock_irqsave(&base->lock, flags);
  1446. csr = sbus_readl(base->regs + APCCSR);
  1447. err = -EINVAL;
  1448. test = APC_CDMA_READY;
  1449. if (base->dir == APC_PLAY)
  1450. test = APC_PDMA_READY;
  1451. if (!(csr & test))
  1452. goto out;
  1453. err = -EBUSY;
  1454. test = APC_XINT_CNVA;
  1455. if (base->dir == APC_PLAY)
  1456. test = APC_XINT_PNVA;
  1457. if (!(csr & test))
  1458. goto out;
  1459. err = 0;
  1460. sbus_writel(bus_addr, base->regs + base->dir + APCNVA);
  1461. sbus_writel(len, base->regs + base->dir + APCNC);
  1462. out:
  1463. spin_unlock_irqrestore(&base->lock, flags);
  1464. return err;
  1465. }
  1466. static void sbus_dma_prepare(struct cs4231_dma_control *dma_cont, int d)
  1467. {
  1468. unsigned long flags;
  1469. u32 csr, test;
  1470. struct sbus_dma_info *base = &dma_cont->sbus_info;
  1471. spin_lock_irqsave(&base->lock, flags);
  1472. csr = sbus_readl(base->regs + APCCSR);
  1473. test = APC_GENL_INT | APC_PLAY_INT | APC_XINT_ENA |
  1474. APC_XINT_PLAY | APC_XINT_PEMP | APC_XINT_GENL |
  1475. APC_XINT_PENA;
  1476. if (base->dir == APC_RECORD)
  1477. test = APC_GENL_INT | APC_CAPT_INT | APC_XINT_ENA |
  1478. APC_XINT_CAPT | APC_XINT_CEMP | APC_XINT_GENL;
  1479. csr |= test;
  1480. sbus_writel(csr, base->regs + APCCSR);
  1481. spin_unlock_irqrestore(&base->lock, flags);
  1482. }
  1483. static void sbus_dma_enable(struct cs4231_dma_control *dma_cont, int on)
  1484. {
  1485. unsigned long flags;
  1486. u32 csr, shift;
  1487. struct sbus_dma_info *base = &dma_cont->sbus_info;
  1488. spin_lock_irqsave(&base->lock, flags);
  1489. if (!on) {
  1490. sbus_writel(0, base->regs + base->dir + APCNC);
  1491. sbus_writel(0, base->regs + base->dir + APCNVA);
  1492. if (base->dir == APC_PLAY) {
  1493. sbus_writel(0, base->regs + base->dir + APCC);
  1494. sbus_writel(0, base->regs + base->dir + APCVA);
  1495. }
  1496. udelay(1200);
  1497. }
  1498. csr = sbus_readl(base->regs + APCCSR);
  1499. shift = 0;
  1500. if (base->dir == APC_PLAY)
  1501. shift = 1;
  1502. if (on)
  1503. csr &= ~(APC_CPAUSE << shift);
  1504. else
  1505. csr |= (APC_CPAUSE << shift);
  1506. sbus_writel(csr, base->regs + APCCSR);
  1507. if (on)
  1508. csr |= (APC_CDMA_READY << shift);
  1509. else
  1510. csr &= ~(APC_CDMA_READY << shift);
  1511. sbus_writel(csr, base->regs + APCCSR);
  1512. spin_unlock_irqrestore(&base->lock, flags);
  1513. }
  1514. static unsigned int sbus_dma_addr(struct cs4231_dma_control *dma_cont)
  1515. {
  1516. struct sbus_dma_info *base = &dma_cont->sbus_info;
  1517. return sbus_readl(base->regs + base->dir + APCVA);
  1518. }
  1519. static void sbus_dma_preallocate(struct snd_cs4231 *chip, struct snd_pcm *pcm)
  1520. {
  1521. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_SBUS,
  1522. snd_dma_sbus_data(chip->dev_u.sdev),
  1523. 64 * 1024, 128 * 1024);
  1524. }
  1525. /*
  1526. * Init and exit routines
  1527. */
  1528. static int snd_cs4231_sbus_free(struct snd_cs4231 *chip)
  1529. {
  1530. if (chip->irq[0])
  1531. free_irq(chip->irq[0], chip);
  1532. if (chip->port)
  1533. sbus_iounmap(chip->port, chip->regs_size);
  1534. return 0;
  1535. }
  1536. static int snd_cs4231_sbus_dev_free(struct snd_device *device)
  1537. {
  1538. struct snd_cs4231 *cp = device->device_data;
  1539. return snd_cs4231_sbus_free(cp);
  1540. }
  1541. static struct snd_device_ops snd_cs4231_sbus_dev_ops = {
  1542. .dev_free = snd_cs4231_sbus_dev_free,
  1543. };
  1544. static int __init snd_cs4231_sbus_create(struct snd_card *card,
  1545. struct sbus_dev *sdev,
  1546. int dev)
  1547. {
  1548. struct snd_cs4231 *chip = card->private_data;
  1549. int err;
  1550. spin_lock_init(&chip->lock);
  1551. spin_lock_init(&chip->c_dma.sbus_info.lock);
  1552. spin_lock_init(&chip->p_dma.sbus_info.lock);
  1553. mutex_init(&chip->mce_mutex);
  1554. mutex_init(&chip->open_mutex);
  1555. chip->dev_u.sdev = sdev;
  1556. chip->regs_size = sdev->reg_addrs[0].reg_size;
  1557. memcpy(&chip->image, &snd_cs4231_original_image,
  1558. sizeof(snd_cs4231_original_image));
  1559. chip->port = sbus_ioremap(&sdev->resource[0], 0,
  1560. chip->regs_size, "cs4231");
  1561. if (!chip->port) {
  1562. snd_printdd("cs4231-%d: Unable to map chip registers.\n", dev);
  1563. return -EIO;
  1564. }
  1565. chip->c_dma.sbus_info.regs = chip->port;
  1566. chip->p_dma.sbus_info.regs = chip->port;
  1567. chip->c_dma.sbus_info.dir = APC_RECORD;
  1568. chip->p_dma.sbus_info.dir = APC_PLAY;
  1569. chip->p_dma.prepare = sbus_dma_prepare;
  1570. chip->p_dma.enable = sbus_dma_enable;
  1571. chip->p_dma.request = sbus_dma_request;
  1572. chip->p_dma.address = sbus_dma_addr;
  1573. chip->p_dma.preallocate = sbus_dma_preallocate;
  1574. chip->c_dma.prepare = sbus_dma_prepare;
  1575. chip->c_dma.enable = sbus_dma_enable;
  1576. chip->c_dma.request = sbus_dma_request;
  1577. chip->c_dma.address = sbus_dma_addr;
  1578. chip->c_dma.preallocate = sbus_dma_preallocate;
  1579. if (request_irq(sdev->irqs[0], snd_cs4231_sbus_interrupt,
  1580. IRQF_SHARED, "cs4231", chip)) {
  1581. snd_printdd("cs4231-%d: Unable to grab SBUS IRQ %d\n",
  1582. dev, sdev->irqs[0]);
  1583. snd_cs4231_sbus_free(chip);
  1584. return -EBUSY;
  1585. }
  1586. chip->irq[0] = sdev->irqs[0];
  1587. if (snd_cs4231_probe(chip) < 0) {
  1588. snd_cs4231_sbus_free(chip);
  1589. return -ENODEV;
  1590. }
  1591. snd_cs4231_init(chip);
  1592. if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL,
  1593. chip, &snd_cs4231_sbus_dev_ops)) < 0) {
  1594. snd_cs4231_sbus_free(chip);
  1595. return err;
  1596. }
  1597. return 0;
  1598. }
  1599. static int __init cs4231_sbus_attach(struct sbus_dev *sdev)
  1600. {
  1601. struct resource *rp = &sdev->resource[0];
  1602. struct snd_card *card;
  1603. int err;
  1604. err = cs4231_attach_begin(&card);
  1605. if (err)
  1606. return err;
  1607. sprintf(card->longname, "%s at 0x%02lx:0x%016Lx, irq %d",
  1608. card->shortname,
  1609. rp->flags & 0xffL,
  1610. (unsigned long long)rp->start,
  1611. sdev->irqs[0]);
  1612. err = snd_cs4231_sbus_create(card, sdev, dev);
  1613. if (err < 0) {
  1614. snd_card_free(card);
  1615. return err;
  1616. }
  1617. return cs4231_attach_finish(card);
  1618. }
  1619. #endif
  1620. #ifdef EBUS_SUPPORT
  1621. static void snd_cs4231_ebus_play_callback(struct ebus_dma_info *p, int event,
  1622. void *cookie)
  1623. {
  1624. struct snd_cs4231 *chip = cookie;
  1625. snd_cs4231_play_callback(chip);
  1626. }
  1627. static void snd_cs4231_ebus_capture_callback(struct ebus_dma_info *p,
  1628. int event, void *cookie)
  1629. {
  1630. struct snd_cs4231 *chip = cookie;
  1631. snd_cs4231_capture_callback(chip);
  1632. }
  1633. /*
  1634. * EBUS DMA wrappers
  1635. */
  1636. static int _ebus_dma_request(struct cs4231_dma_control *dma_cont,
  1637. dma_addr_t bus_addr, size_t len)
  1638. {
  1639. return ebus_dma_request(&dma_cont->ebus_info, bus_addr, len);
  1640. }
  1641. static void _ebus_dma_enable(struct cs4231_dma_control *dma_cont, int on)
  1642. {
  1643. ebus_dma_enable(&dma_cont->ebus_info, on);
  1644. }
  1645. static void _ebus_dma_prepare(struct cs4231_dma_control *dma_cont, int dir)
  1646. {
  1647. ebus_dma_prepare(&dma_cont->ebus_info, dir);
  1648. }
  1649. static unsigned int _ebus_dma_addr(struct cs4231_dma_control *dma_cont)
  1650. {
  1651. return ebus_dma_addr(&dma_cont->ebus_info);
  1652. }
  1653. static void _ebus_dma_preallocate(struct snd_cs4231 *chip, struct snd_pcm *pcm)
  1654. {
  1655. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  1656. snd_dma_pci_data(chip->dev_u.pdev),
  1657. 64*1024, 128*1024);
  1658. }
  1659. /*
  1660. * Init and exit routines
  1661. */
  1662. static int snd_cs4231_ebus_free(struct snd_cs4231 *chip)
  1663. {
  1664. if (chip->c_dma.ebus_info.regs) {
  1665. ebus_dma_unregister(&chip->c_dma.ebus_info);
  1666. iounmap(chip->c_dma.ebus_info.regs);
  1667. }
  1668. if (chip->p_dma.ebus_info.regs) {
  1669. ebus_dma_unregister(&chip->p_dma.ebus_info);
  1670. iounmap(chip->p_dma.ebus_info.regs);
  1671. }
  1672. if (chip->port)
  1673. iounmap(chip->port);
  1674. return 0;
  1675. }
  1676. static int snd_cs4231_ebus_dev_free(struct snd_device *device)
  1677. {
  1678. struct snd_cs4231 *cp = device->device_data;
  1679. return snd_cs4231_ebus_free(cp);
  1680. }
  1681. static struct snd_device_ops snd_cs4231_ebus_dev_ops = {
  1682. .dev_free = snd_cs4231_ebus_dev_free,
  1683. };
  1684. static int __init snd_cs4231_ebus_create(struct snd_card *card,
  1685. struct linux_ebus_device *edev,
  1686. int dev)
  1687. {
  1688. struct snd_cs4231 *chip = card->private_data;
  1689. int err;
  1690. spin_lock_init(&chip->lock);
  1691. spin_lock_init(&chip->c_dma.ebus_info.lock);
  1692. spin_lock_init(&chip->p_dma.ebus_info.lock);
  1693. mutex_init(&chip->mce_mutex);
  1694. mutex_init(&chip->open_mutex);
  1695. chip->flags |= CS4231_FLAG_EBUS;
  1696. chip->dev_u.pdev = edev->bus->self;
  1697. memcpy(&chip->image, &snd_cs4231_original_image,
  1698. sizeof(snd_cs4231_original_image));
  1699. strcpy(chip->c_dma.ebus_info.name, "cs4231(capture)");
  1700. chip->c_dma.ebus_info.flags = EBUS_DMA_FLAG_USE_EBDMA_HANDLER;
  1701. chip->c_dma.ebus_info.callback = snd_cs4231_ebus_capture_callback;
  1702. chip->c_dma.ebus_info.client_cookie = chip;
  1703. chip->c_dma.ebus_info.irq = edev->irqs[0];
  1704. strcpy(chip->p_dma.ebus_info.name, "cs4231(play)");
  1705. chip->p_dma.ebus_info.flags = EBUS_DMA_FLAG_USE_EBDMA_HANDLER;
  1706. chip->p_dma.ebus_info.callback = snd_cs4231_ebus_play_callback;
  1707. chip->p_dma.ebus_info.client_cookie = chip;
  1708. chip->p_dma.ebus_info.irq = edev->irqs[1];
  1709. chip->p_dma.prepare = _ebus_dma_prepare;
  1710. chip->p_dma.enable = _ebus_dma_enable;
  1711. chip->p_dma.request = _ebus_dma_request;
  1712. chip->p_dma.address = _ebus_dma_addr;
  1713. chip->p_dma.preallocate = _ebus_dma_preallocate;
  1714. chip->c_dma.prepare = _ebus_dma_prepare;
  1715. chip->c_dma.enable = _ebus_dma_enable;
  1716. chip->c_dma.request = _ebus_dma_request;
  1717. chip->c_dma.address = _ebus_dma_addr;
  1718. chip->c_dma.preallocate = _ebus_dma_preallocate;
  1719. chip->port = ioremap(edev->resource[0].start, 0x10);
  1720. chip->p_dma.ebus_info.regs = ioremap(edev->resource[1].start, 0x10);
  1721. chip->c_dma.ebus_info.regs = ioremap(edev->resource[2].start, 0x10);
  1722. if (!chip->port || !chip->p_dma.ebus_info.regs ||
  1723. !chip->c_dma.ebus_info.regs) {
  1724. snd_cs4231_ebus_free(chip);
  1725. snd_printdd("cs4231-%d: Unable to map chip registers.\n", dev);
  1726. return -EIO;
  1727. }
  1728. if (ebus_dma_register(&chip->c_dma.ebus_info)) {
  1729. snd_cs4231_ebus_free(chip);
  1730. snd_printdd("cs4231-%d: Unable to register EBUS capture DMA\n",
  1731. dev);
  1732. return -EBUSY;
  1733. }
  1734. if (ebus_dma_irq_enable(&chip->c_dma.ebus_info, 1)) {
  1735. snd_cs4231_ebus_free(chip);
  1736. snd_printdd("cs4231-%d: Unable to enable EBUS capture IRQ\n",
  1737. dev);
  1738. return -EBUSY;
  1739. }
  1740. if (ebus_dma_register(&chip->p_dma.ebus_info)) {
  1741. snd_cs4231_ebus_free(chip);
  1742. snd_printdd("cs4231-%d: Unable to register EBUS play DMA\n",
  1743. dev);
  1744. return -EBUSY;
  1745. }
  1746. if (ebus_dma_irq_enable(&chip->p_dma.ebus_info, 1)) {
  1747. snd_cs4231_ebus_free(chip);
  1748. snd_printdd("cs4231-%d: Unable to enable EBUS play IRQ\n", dev);
  1749. return -EBUSY;
  1750. }
  1751. if (snd_cs4231_probe(chip) < 0) {
  1752. snd_cs4231_ebus_free(chip);
  1753. return -ENODEV;
  1754. }
  1755. snd_cs4231_init(chip);
  1756. if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL,
  1757. chip, &snd_cs4231_ebus_dev_ops)) < 0) {
  1758. snd_cs4231_ebus_free(chip);
  1759. return err;
  1760. }
  1761. return 0;
  1762. }
  1763. static int __init cs4231_ebus_attach(struct linux_ebus_device *edev)
  1764. {
  1765. struct snd_card *card;
  1766. int err;
  1767. err = cs4231_attach_begin(&card);
  1768. if (err)
  1769. return err;
  1770. sprintf(card->longname, "%s at 0x%lx, irq %d",
  1771. card->shortname,
  1772. edev->resource[0].start,
  1773. edev->irqs[0]);
  1774. err = snd_cs4231_ebus_create(card, edev, dev);
  1775. if (err < 0) {
  1776. snd_card_free(card);
  1777. return err;
  1778. }
  1779. return cs4231_attach_finish(card);
  1780. }
  1781. #endif
  1782. static int __init cs4231_init(void)
  1783. {
  1784. #ifdef SBUS_SUPPORT
  1785. struct sbus_bus *sbus;
  1786. struct sbus_dev *sdev;
  1787. #endif
  1788. #ifdef EBUS_SUPPORT
  1789. struct linux_ebus *ebus;
  1790. struct linux_ebus_device *edev;
  1791. #endif
  1792. int found;
  1793. found = 0;
  1794. #ifdef SBUS_SUPPORT
  1795. for_all_sbusdev(sdev, sbus) {
  1796. if (!strcmp(sdev->prom_name, "SUNW,CS4231")) {
  1797. if (cs4231_sbus_attach(sdev) == 0)
  1798. found++;
  1799. }
  1800. }
  1801. #endif
  1802. #ifdef EBUS_SUPPORT
  1803. for_each_ebus(ebus) {
  1804. for_each_ebusdev(edev, ebus) {
  1805. int match = 0;
  1806. if (!strcmp(edev->prom_node->name, "SUNW,CS4231")) {
  1807. match = 1;
  1808. } else if (!strcmp(edev->prom_node->name, "audio")) {
  1809. const char *compat;
  1810. compat = of_get_property(edev->prom_node,
  1811. "compatible", NULL);
  1812. if (compat && !strcmp(compat, "SUNW,CS4231"))
  1813. match = 1;
  1814. }
  1815. if (match &&
  1816. cs4231_ebus_attach(edev) == 0)
  1817. found++;
  1818. }
  1819. }
  1820. #endif
  1821. return (found > 0) ? 0 : -EIO;
  1822. }
  1823. static void __exit cs4231_exit(void)
  1824. {
  1825. struct snd_cs4231 *p = cs4231_list;
  1826. while (p != NULL) {
  1827. struct snd_cs4231 *next = p->next;
  1828. snd_card_free(p->card);
  1829. p = next;
  1830. }
  1831. cs4231_list = NULL;
  1832. }
  1833. module_init(cs4231_init);
  1834. module_exit(cs4231_exit);