nm256.c 45 KB

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  1. /*
  2. * Driver for NeoMagic 256AV and 256ZX chipsets.
  3. * Copyright (c) 2000 by Takashi Iwai <tiwai@suse.de>
  4. *
  5. * Based on nm256_audio.c OSS driver in linux kernel.
  6. * The original author of OSS nm256 driver wishes to remain anonymous,
  7. * so I just put my acknoledgment to him/her here.
  8. * The original author's web page is found at
  9. * http://www.uglx.org/sony.html
  10. *
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2 of the License, or
  15. * (at your option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  25. */
  26. #include <sound/driver.h>
  27. #include <asm/io.h>
  28. #include <linux/delay.h>
  29. #include <linux/interrupt.h>
  30. #include <linux/init.h>
  31. #include <linux/pci.h>
  32. #include <linux/slab.h>
  33. #include <linux/moduleparam.h>
  34. #include <linux/mutex.h>
  35. #include <sound/core.h>
  36. #include <sound/info.h>
  37. #include <sound/control.h>
  38. #include <sound/pcm.h>
  39. #include <sound/ac97_codec.h>
  40. #include <sound/initval.h>
  41. #define CARD_NAME "NeoMagic 256AV/ZX"
  42. #define DRIVER_NAME "NM256"
  43. MODULE_AUTHOR("Takashi Iwai <tiwai@suse.de>");
  44. MODULE_DESCRIPTION("NeoMagic NM256AV/ZX");
  45. MODULE_LICENSE("GPL");
  46. MODULE_SUPPORTED_DEVICE("{{NeoMagic,NM256AV},"
  47. "{NeoMagic,NM256ZX}}");
  48. /*
  49. * some compile conditions.
  50. */
  51. static int index = SNDRV_DEFAULT_IDX1; /* Index */
  52. static char *id = SNDRV_DEFAULT_STR1; /* ID for this card */
  53. static int playback_bufsize = 16;
  54. static int capture_bufsize = 16;
  55. static int force_ac97; /* disabled as default */
  56. static int buffer_top; /* not specified */
  57. static int use_cache; /* disabled */
  58. static int vaio_hack; /* disabled */
  59. static int reset_workaround;
  60. static int reset_workaround_2;
  61. module_param(index, int, 0444);
  62. MODULE_PARM_DESC(index, "Index value for " CARD_NAME " soundcard.");
  63. module_param(id, charp, 0444);
  64. MODULE_PARM_DESC(id, "ID string for " CARD_NAME " soundcard.");
  65. module_param(playback_bufsize, int, 0444);
  66. MODULE_PARM_DESC(playback_bufsize, "DAC frame size in kB for " CARD_NAME " soundcard.");
  67. module_param(capture_bufsize, int, 0444);
  68. MODULE_PARM_DESC(capture_bufsize, "ADC frame size in kB for " CARD_NAME " soundcard.");
  69. module_param(force_ac97, bool, 0444);
  70. MODULE_PARM_DESC(force_ac97, "Force to use AC97 codec for " CARD_NAME " soundcard.");
  71. module_param(buffer_top, int, 0444);
  72. MODULE_PARM_DESC(buffer_top, "Set the top address of audio buffer for " CARD_NAME " soundcard.");
  73. module_param(use_cache, bool, 0444);
  74. MODULE_PARM_DESC(use_cache, "Enable the cache for coefficient table access.");
  75. module_param(vaio_hack, bool, 0444);
  76. MODULE_PARM_DESC(vaio_hack, "Enable workaround for Sony VAIO notebooks.");
  77. module_param(reset_workaround, bool, 0444);
  78. MODULE_PARM_DESC(reset_workaround, "Enable AC97 RESET workaround for some laptops.");
  79. module_param(reset_workaround_2, bool, 0444);
  80. MODULE_PARM_DESC(reset_workaround_2, "Enable extended AC97 RESET workaround for some other laptops.");
  81. /* just for backward compatibility */
  82. static int enable;
  83. module_param(enable, bool, 0444);
  84. /*
  85. * hw definitions
  86. */
  87. /* The BIOS signature. */
  88. #define NM_SIGNATURE 0x4e4d0000
  89. /* Signature mask. */
  90. #define NM_SIG_MASK 0xffff0000
  91. /* Size of the second memory area. */
  92. #define NM_PORT2_SIZE 4096
  93. /* The base offset of the mixer in the second memory area. */
  94. #define NM_MIXER_OFFSET 0x600
  95. /* The maximum size of a coefficient entry. */
  96. #define NM_MAX_PLAYBACK_COEF_SIZE 0x5000
  97. #define NM_MAX_RECORD_COEF_SIZE 0x1260
  98. /* The interrupt register. */
  99. #define NM_INT_REG 0xa04
  100. /* And its bits. */
  101. #define NM_PLAYBACK_INT 0x40
  102. #define NM_RECORD_INT 0x100
  103. #define NM_MISC_INT_1 0x4000
  104. #define NM_MISC_INT_2 0x1
  105. #define NM_ACK_INT(chip, X) snd_nm256_writew(chip, NM_INT_REG, (X) << 1)
  106. /* The AV's "mixer ready" status bit and location. */
  107. #define NM_MIXER_STATUS_OFFSET 0xa04
  108. #define NM_MIXER_READY_MASK 0x0800
  109. #define NM_MIXER_PRESENCE 0xa06
  110. #define NM_PRESENCE_MASK 0x0050
  111. #define NM_PRESENCE_VALUE 0x0040
  112. /*
  113. * For the ZX. It uses the same interrupt register, but it holds 32
  114. * bits instead of 16.
  115. */
  116. #define NM2_PLAYBACK_INT 0x10000
  117. #define NM2_RECORD_INT 0x80000
  118. #define NM2_MISC_INT_1 0x8
  119. #define NM2_MISC_INT_2 0x2
  120. #define NM2_ACK_INT(chip, X) snd_nm256_writel(chip, NM_INT_REG, (X))
  121. /* The ZX's "mixer ready" status bit and location. */
  122. #define NM2_MIXER_STATUS_OFFSET 0xa06
  123. #define NM2_MIXER_READY_MASK 0x0800
  124. /* The playback registers start from here. */
  125. #define NM_PLAYBACK_REG_OFFSET 0x0
  126. /* The record registers start from here. */
  127. #define NM_RECORD_REG_OFFSET 0x200
  128. /* The rate register is located 2 bytes from the start of the register area. */
  129. #define NM_RATE_REG_OFFSET 2
  130. /* Mono/stereo flag, number of bits on playback, and rate mask. */
  131. #define NM_RATE_STEREO 1
  132. #define NM_RATE_BITS_16 2
  133. #define NM_RATE_MASK 0xf0
  134. /* Playback enable register. */
  135. #define NM_PLAYBACK_ENABLE_REG (NM_PLAYBACK_REG_OFFSET + 0x1)
  136. #define NM_PLAYBACK_ENABLE_FLAG 1
  137. #define NM_PLAYBACK_ONESHOT 2
  138. #define NM_PLAYBACK_FREERUN 4
  139. /* Mutes the audio output. */
  140. #define NM_AUDIO_MUTE_REG (NM_PLAYBACK_REG_OFFSET + 0x18)
  141. #define NM_AUDIO_MUTE_LEFT 0x8000
  142. #define NM_AUDIO_MUTE_RIGHT 0x0080
  143. /* Recording enable register. */
  144. #define NM_RECORD_ENABLE_REG (NM_RECORD_REG_OFFSET + 0)
  145. #define NM_RECORD_ENABLE_FLAG 1
  146. #define NM_RECORD_FREERUN 2
  147. /* coefficient buffer pointer */
  148. #define NM_COEFF_START_OFFSET 0x1c
  149. #define NM_COEFF_END_OFFSET 0x20
  150. /* DMA buffer offsets */
  151. #define NM_RBUFFER_START (NM_RECORD_REG_OFFSET + 0x4)
  152. #define NM_RBUFFER_END (NM_RECORD_REG_OFFSET + 0x10)
  153. #define NM_RBUFFER_WMARK (NM_RECORD_REG_OFFSET + 0xc)
  154. #define NM_RBUFFER_CURRP (NM_RECORD_REG_OFFSET + 0x8)
  155. #define NM_PBUFFER_START (NM_PLAYBACK_REG_OFFSET + 0x4)
  156. #define NM_PBUFFER_END (NM_PLAYBACK_REG_OFFSET + 0x14)
  157. #define NM_PBUFFER_WMARK (NM_PLAYBACK_REG_OFFSET + 0xc)
  158. #define NM_PBUFFER_CURRP (NM_PLAYBACK_REG_OFFSET + 0x8)
  159. struct nm256_stream {
  160. struct nm256 *chip;
  161. struct snd_pcm_substream *substream;
  162. int running;
  163. int suspended;
  164. u32 buf; /* offset from chip->buffer */
  165. int bufsize; /* buffer size in bytes */
  166. void __iomem *bufptr; /* mapped pointer */
  167. unsigned long bufptr_addr; /* physical address of the mapped pointer */
  168. int dma_size; /* buffer size of the substream in bytes */
  169. int period_size; /* period size in bytes */
  170. int periods; /* # of periods */
  171. int shift; /* bit shifts */
  172. int cur_period; /* current period # */
  173. };
  174. struct nm256 {
  175. struct snd_card *card;
  176. void __iomem *cport; /* control port */
  177. struct resource *res_cport; /* its resource */
  178. unsigned long cport_addr; /* physical address */
  179. void __iomem *buffer; /* buffer */
  180. struct resource *res_buffer; /* its resource */
  181. unsigned long buffer_addr; /* buffer phyiscal address */
  182. u32 buffer_start; /* start offset from pci resource 0 */
  183. u32 buffer_end; /* end offset */
  184. u32 buffer_size; /* total buffer size */
  185. u32 all_coeff_buf; /* coefficient buffer */
  186. u32 coeff_buf[2]; /* coefficient buffer for each stream */
  187. unsigned int coeffs_current: 1; /* coeff. table is loaded? */
  188. unsigned int use_cache: 1; /* use one big coef. table */
  189. unsigned int reset_workaround: 1; /* Workaround for some laptops to avoid freeze */
  190. unsigned int reset_workaround_2: 1; /* Extended workaround for some other laptops to avoid freeze */
  191. unsigned int in_resume: 1;
  192. int mixer_base; /* register offset of ac97 mixer */
  193. int mixer_status_offset; /* offset of mixer status reg. */
  194. int mixer_status_mask; /* bit mask to test the mixer status */
  195. int irq;
  196. int irq_acks;
  197. irq_handler_t interrupt;
  198. int badintrcount; /* counter to check bogus interrupts */
  199. struct mutex irq_mutex;
  200. struct nm256_stream streams[2];
  201. struct snd_ac97 *ac97;
  202. unsigned short *ac97_regs; /* register caches, only for valid regs */
  203. struct snd_pcm *pcm;
  204. struct pci_dev *pci;
  205. spinlock_t reg_lock;
  206. };
  207. /*
  208. * include coefficient table
  209. */
  210. #include "nm256_coef.c"
  211. /*
  212. * PCI ids
  213. */
  214. static struct pci_device_id snd_nm256_ids[] = {
  215. {PCI_VENDOR_ID_NEOMAGIC, PCI_DEVICE_ID_NEOMAGIC_NM256AV_AUDIO, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  216. {PCI_VENDOR_ID_NEOMAGIC, PCI_DEVICE_ID_NEOMAGIC_NM256ZX_AUDIO, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  217. {PCI_VENDOR_ID_NEOMAGIC, PCI_DEVICE_ID_NEOMAGIC_NM256XL_PLUS_AUDIO, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  218. {0,},
  219. };
  220. MODULE_DEVICE_TABLE(pci, snd_nm256_ids);
  221. /*
  222. * lowlvel stuffs
  223. */
  224. static inline u8
  225. snd_nm256_readb(struct nm256 *chip, int offset)
  226. {
  227. return readb(chip->cport + offset);
  228. }
  229. static inline u16
  230. snd_nm256_readw(struct nm256 *chip, int offset)
  231. {
  232. return readw(chip->cport + offset);
  233. }
  234. static inline u32
  235. snd_nm256_readl(struct nm256 *chip, int offset)
  236. {
  237. return readl(chip->cport + offset);
  238. }
  239. static inline void
  240. snd_nm256_writeb(struct nm256 *chip, int offset, u8 val)
  241. {
  242. writeb(val, chip->cport + offset);
  243. }
  244. static inline void
  245. snd_nm256_writew(struct nm256 *chip, int offset, u16 val)
  246. {
  247. writew(val, chip->cport + offset);
  248. }
  249. static inline void
  250. snd_nm256_writel(struct nm256 *chip, int offset, u32 val)
  251. {
  252. writel(val, chip->cport + offset);
  253. }
  254. static inline void
  255. snd_nm256_write_buffer(struct nm256 *chip, void *src, int offset, int size)
  256. {
  257. offset -= chip->buffer_start;
  258. #ifdef CONFIG_SND_DEBUG
  259. if (offset < 0 || offset >= chip->buffer_size) {
  260. snd_printk(KERN_ERR "write_buffer invalid offset = %d size = %d\n",
  261. offset, size);
  262. return;
  263. }
  264. #endif
  265. memcpy_toio(chip->buffer + offset, src, size);
  266. }
  267. /*
  268. * coefficient handlers -- what a magic!
  269. */
  270. static u16
  271. snd_nm256_get_start_offset(int which)
  272. {
  273. u16 offset = 0;
  274. while (which-- > 0)
  275. offset += coefficient_sizes[which];
  276. return offset;
  277. }
  278. static void
  279. snd_nm256_load_one_coefficient(struct nm256 *chip, int stream, u32 port, int which)
  280. {
  281. u32 coeff_buf = chip->coeff_buf[stream];
  282. u16 offset = snd_nm256_get_start_offset(which);
  283. u16 size = coefficient_sizes[which];
  284. snd_nm256_write_buffer(chip, coefficients + offset, coeff_buf, size);
  285. snd_nm256_writel(chip, port, coeff_buf);
  286. /* ??? Record seems to behave differently than playback. */
  287. if (stream == SNDRV_PCM_STREAM_PLAYBACK)
  288. size--;
  289. snd_nm256_writel(chip, port + 4, coeff_buf + size);
  290. }
  291. static void
  292. snd_nm256_load_coefficient(struct nm256 *chip, int stream, int number)
  293. {
  294. /* The enable register for the specified engine. */
  295. u32 poffset = (stream == SNDRV_PCM_STREAM_CAPTURE ?
  296. NM_RECORD_ENABLE_REG : NM_PLAYBACK_ENABLE_REG);
  297. u32 addr = NM_COEFF_START_OFFSET;
  298. addr += (stream == SNDRV_PCM_STREAM_CAPTURE ?
  299. NM_RECORD_REG_OFFSET : NM_PLAYBACK_REG_OFFSET);
  300. if (snd_nm256_readb(chip, poffset) & 1) {
  301. snd_printd("NM256: Engine was enabled while loading coefficients!\n");
  302. return;
  303. }
  304. /* The recording engine uses coefficient values 8-15. */
  305. number &= 7;
  306. if (stream == SNDRV_PCM_STREAM_CAPTURE)
  307. number += 8;
  308. if (! chip->use_cache) {
  309. snd_nm256_load_one_coefficient(chip, stream, addr, number);
  310. return;
  311. }
  312. if (! chip->coeffs_current) {
  313. snd_nm256_write_buffer(chip, coefficients, chip->all_coeff_buf,
  314. NM_TOTAL_COEFF_COUNT * 4);
  315. chip->coeffs_current = 1;
  316. } else {
  317. u32 base = chip->all_coeff_buf;
  318. u32 offset = snd_nm256_get_start_offset(number);
  319. u32 end_offset = offset + coefficient_sizes[number];
  320. snd_nm256_writel(chip, addr, base + offset);
  321. if (stream == SNDRV_PCM_STREAM_PLAYBACK)
  322. end_offset--;
  323. snd_nm256_writel(chip, addr + 4, base + end_offset);
  324. }
  325. }
  326. /* The actual rates supported by the card. */
  327. static unsigned int samplerates[8] = {
  328. 8000, 11025, 16000, 22050, 24000, 32000, 44100, 48000,
  329. };
  330. static struct snd_pcm_hw_constraint_list constraints_rates = {
  331. .count = ARRAY_SIZE(samplerates),
  332. .list = samplerates,
  333. .mask = 0,
  334. };
  335. /*
  336. * return the index of the target rate
  337. */
  338. static int
  339. snd_nm256_fixed_rate(unsigned int rate)
  340. {
  341. unsigned int i;
  342. for (i = 0; i < ARRAY_SIZE(samplerates); i++) {
  343. if (rate == samplerates[i])
  344. return i;
  345. }
  346. snd_BUG();
  347. return 0;
  348. }
  349. /*
  350. * set sample rate and format
  351. */
  352. static void
  353. snd_nm256_set_format(struct nm256 *chip, struct nm256_stream *s,
  354. struct snd_pcm_substream *substream)
  355. {
  356. struct snd_pcm_runtime *runtime = substream->runtime;
  357. int rate_index = snd_nm256_fixed_rate(runtime->rate);
  358. unsigned char ratebits = (rate_index << 4) & NM_RATE_MASK;
  359. s->shift = 0;
  360. if (snd_pcm_format_width(runtime->format) == 16) {
  361. ratebits |= NM_RATE_BITS_16;
  362. s->shift++;
  363. }
  364. if (runtime->channels > 1) {
  365. ratebits |= NM_RATE_STEREO;
  366. s->shift++;
  367. }
  368. runtime->rate = samplerates[rate_index];
  369. switch (substream->stream) {
  370. case SNDRV_PCM_STREAM_PLAYBACK:
  371. snd_nm256_load_coefficient(chip, 0, rate_index); /* 0 = playback */
  372. snd_nm256_writeb(chip,
  373. NM_PLAYBACK_REG_OFFSET + NM_RATE_REG_OFFSET,
  374. ratebits);
  375. break;
  376. case SNDRV_PCM_STREAM_CAPTURE:
  377. snd_nm256_load_coefficient(chip, 1, rate_index); /* 1 = record */
  378. snd_nm256_writeb(chip,
  379. NM_RECORD_REG_OFFSET + NM_RATE_REG_OFFSET,
  380. ratebits);
  381. break;
  382. }
  383. }
  384. /* acquire interrupt */
  385. static int snd_nm256_acquire_irq(struct nm256 *chip)
  386. {
  387. mutex_lock(&chip->irq_mutex);
  388. if (chip->irq < 0) {
  389. if (request_irq(chip->pci->irq, chip->interrupt, IRQF_SHARED,
  390. chip->card->driver, chip)) {
  391. snd_printk(KERN_ERR "unable to grab IRQ %d\n", chip->pci->irq);
  392. mutex_unlock(&chip->irq_mutex);
  393. return -EBUSY;
  394. }
  395. chip->irq = chip->pci->irq;
  396. }
  397. chip->irq_acks++;
  398. mutex_unlock(&chip->irq_mutex);
  399. return 0;
  400. }
  401. /* release interrupt */
  402. static void snd_nm256_release_irq(struct nm256 *chip)
  403. {
  404. mutex_lock(&chip->irq_mutex);
  405. if (chip->irq_acks > 0)
  406. chip->irq_acks--;
  407. if (chip->irq_acks == 0 && chip->irq >= 0) {
  408. free_irq(chip->irq, chip);
  409. chip->irq = -1;
  410. }
  411. mutex_unlock(&chip->irq_mutex);
  412. }
  413. /*
  414. * start / stop
  415. */
  416. /* update the watermark (current period) */
  417. static void snd_nm256_pcm_mark(struct nm256 *chip, struct nm256_stream *s, int reg)
  418. {
  419. s->cur_period++;
  420. s->cur_period %= s->periods;
  421. snd_nm256_writel(chip, reg, s->buf + s->cur_period * s->period_size);
  422. }
  423. #define snd_nm256_playback_mark(chip, s) snd_nm256_pcm_mark(chip, s, NM_PBUFFER_WMARK)
  424. #define snd_nm256_capture_mark(chip, s) snd_nm256_pcm_mark(chip, s, NM_RBUFFER_WMARK)
  425. static void
  426. snd_nm256_playback_start(struct nm256 *chip, struct nm256_stream *s,
  427. struct snd_pcm_substream *substream)
  428. {
  429. /* program buffer pointers */
  430. snd_nm256_writel(chip, NM_PBUFFER_START, s->buf);
  431. snd_nm256_writel(chip, NM_PBUFFER_END, s->buf + s->dma_size - (1 << s->shift));
  432. snd_nm256_writel(chip, NM_PBUFFER_CURRP, s->buf);
  433. snd_nm256_playback_mark(chip, s);
  434. /* Enable playback engine and interrupts. */
  435. snd_nm256_writeb(chip, NM_PLAYBACK_ENABLE_REG,
  436. NM_PLAYBACK_ENABLE_FLAG | NM_PLAYBACK_FREERUN);
  437. /* Enable both channels. */
  438. snd_nm256_writew(chip, NM_AUDIO_MUTE_REG, 0x0);
  439. }
  440. static void
  441. snd_nm256_capture_start(struct nm256 *chip, struct nm256_stream *s,
  442. struct snd_pcm_substream *substream)
  443. {
  444. /* program buffer pointers */
  445. snd_nm256_writel(chip, NM_RBUFFER_START, s->buf);
  446. snd_nm256_writel(chip, NM_RBUFFER_END, s->buf + s->dma_size);
  447. snd_nm256_writel(chip, NM_RBUFFER_CURRP, s->buf);
  448. snd_nm256_capture_mark(chip, s);
  449. /* Enable playback engine and interrupts. */
  450. snd_nm256_writeb(chip, NM_RECORD_ENABLE_REG,
  451. NM_RECORD_ENABLE_FLAG | NM_RECORD_FREERUN);
  452. }
  453. /* Stop the play engine. */
  454. static void
  455. snd_nm256_playback_stop(struct nm256 *chip)
  456. {
  457. /* Shut off sound from both channels. */
  458. snd_nm256_writew(chip, NM_AUDIO_MUTE_REG,
  459. NM_AUDIO_MUTE_LEFT | NM_AUDIO_MUTE_RIGHT);
  460. /* Disable play engine. */
  461. snd_nm256_writeb(chip, NM_PLAYBACK_ENABLE_REG, 0);
  462. }
  463. static void
  464. snd_nm256_capture_stop(struct nm256 *chip)
  465. {
  466. /* Disable recording engine. */
  467. snd_nm256_writeb(chip, NM_RECORD_ENABLE_REG, 0);
  468. }
  469. static int
  470. snd_nm256_playback_trigger(struct snd_pcm_substream *substream, int cmd)
  471. {
  472. struct nm256 *chip = snd_pcm_substream_chip(substream);
  473. struct nm256_stream *s = substream->runtime->private_data;
  474. int err = 0;
  475. snd_assert(s != NULL, return -ENXIO);
  476. spin_lock(&chip->reg_lock);
  477. switch (cmd) {
  478. case SNDRV_PCM_TRIGGER_RESUME:
  479. s->suspended = 0;
  480. /* fallthru */
  481. case SNDRV_PCM_TRIGGER_START:
  482. if (! s->running) {
  483. snd_nm256_playback_start(chip, s, substream);
  484. s->running = 1;
  485. }
  486. break;
  487. case SNDRV_PCM_TRIGGER_SUSPEND:
  488. s->suspended = 1;
  489. /* fallthru */
  490. case SNDRV_PCM_TRIGGER_STOP:
  491. if (s->running) {
  492. snd_nm256_playback_stop(chip);
  493. s->running = 0;
  494. }
  495. break;
  496. default:
  497. err = -EINVAL;
  498. break;
  499. }
  500. spin_unlock(&chip->reg_lock);
  501. return err;
  502. }
  503. static int
  504. snd_nm256_capture_trigger(struct snd_pcm_substream *substream, int cmd)
  505. {
  506. struct nm256 *chip = snd_pcm_substream_chip(substream);
  507. struct nm256_stream *s = substream->runtime->private_data;
  508. int err = 0;
  509. snd_assert(s != NULL, return -ENXIO);
  510. spin_lock(&chip->reg_lock);
  511. switch (cmd) {
  512. case SNDRV_PCM_TRIGGER_START:
  513. case SNDRV_PCM_TRIGGER_RESUME:
  514. if (! s->running) {
  515. snd_nm256_capture_start(chip, s, substream);
  516. s->running = 1;
  517. }
  518. break;
  519. case SNDRV_PCM_TRIGGER_STOP:
  520. case SNDRV_PCM_TRIGGER_SUSPEND:
  521. if (s->running) {
  522. snd_nm256_capture_stop(chip);
  523. s->running = 0;
  524. }
  525. break;
  526. default:
  527. err = -EINVAL;
  528. break;
  529. }
  530. spin_unlock(&chip->reg_lock);
  531. return err;
  532. }
  533. /*
  534. * prepare playback/capture channel
  535. */
  536. static int snd_nm256_pcm_prepare(struct snd_pcm_substream *substream)
  537. {
  538. struct nm256 *chip = snd_pcm_substream_chip(substream);
  539. struct snd_pcm_runtime *runtime = substream->runtime;
  540. struct nm256_stream *s = runtime->private_data;
  541. snd_assert(s, return -ENXIO);
  542. s->dma_size = frames_to_bytes(runtime, substream->runtime->buffer_size);
  543. s->period_size = frames_to_bytes(runtime, substream->runtime->period_size);
  544. s->periods = substream->runtime->periods;
  545. s->cur_period = 0;
  546. spin_lock_irq(&chip->reg_lock);
  547. s->running = 0;
  548. snd_nm256_set_format(chip, s, substream);
  549. spin_unlock_irq(&chip->reg_lock);
  550. return 0;
  551. }
  552. /*
  553. * get the current pointer
  554. */
  555. static snd_pcm_uframes_t
  556. snd_nm256_playback_pointer(struct snd_pcm_substream *substream)
  557. {
  558. struct nm256 *chip = snd_pcm_substream_chip(substream);
  559. struct nm256_stream *s = substream->runtime->private_data;
  560. unsigned long curp;
  561. snd_assert(s, return 0);
  562. curp = snd_nm256_readl(chip, NM_PBUFFER_CURRP) - (unsigned long)s->buf;
  563. curp %= s->dma_size;
  564. return bytes_to_frames(substream->runtime, curp);
  565. }
  566. static snd_pcm_uframes_t
  567. snd_nm256_capture_pointer(struct snd_pcm_substream *substream)
  568. {
  569. struct nm256 *chip = snd_pcm_substream_chip(substream);
  570. struct nm256_stream *s = substream->runtime->private_data;
  571. unsigned long curp;
  572. snd_assert(s != NULL, return 0);
  573. curp = snd_nm256_readl(chip, NM_RBUFFER_CURRP) - (unsigned long)s->buf;
  574. curp %= s->dma_size;
  575. return bytes_to_frames(substream->runtime, curp);
  576. }
  577. /* Remapped I/O space can be accessible as pointer on i386 */
  578. /* This might be changed in the future */
  579. #ifndef __i386__
  580. /*
  581. * silence / copy for playback
  582. */
  583. static int
  584. snd_nm256_playback_silence(struct snd_pcm_substream *substream,
  585. int channel, /* not used (interleaved data) */
  586. snd_pcm_uframes_t pos,
  587. snd_pcm_uframes_t count)
  588. {
  589. struct snd_pcm_runtime *runtime = substream->runtime;
  590. struct nm256_stream *s = runtime->private_data;
  591. count = frames_to_bytes(runtime, count);
  592. pos = frames_to_bytes(runtime, pos);
  593. memset_io(s->bufptr + pos, 0, count);
  594. return 0;
  595. }
  596. static int
  597. snd_nm256_playback_copy(struct snd_pcm_substream *substream,
  598. int channel, /* not used (interleaved data) */
  599. snd_pcm_uframes_t pos,
  600. void __user *src,
  601. snd_pcm_uframes_t count)
  602. {
  603. struct snd_pcm_runtime *runtime = substream->runtime;
  604. struct nm256_stream *s = runtime->private_data;
  605. count = frames_to_bytes(runtime, count);
  606. pos = frames_to_bytes(runtime, pos);
  607. if (copy_from_user_toio(s->bufptr + pos, src, count))
  608. return -EFAULT;
  609. return 0;
  610. }
  611. /*
  612. * copy to user
  613. */
  614. static int
  615. snd_nm256_capture_copy(struct snd_pcm_substream *substream,
  616. int channel, /* not used (interleaved data) */
  617. snd_pcm_uframes_t pos,
  618. void __user *dst,
  619. snd_pcm_uframes_t count)
  620. {
  621. struct snd_pcm_runtime *runtime = substream->runtime;
  622. struct nm256_stream *s = runtime->private_data;
  623. count = frames_to_bytes(runtime, count);
  624. pos = frames_to_bytes(runtime, pos);
  625. if (copy_to_user_fromio(dst, s->bufptr + pos, count))
  626. return -EFAULT;
  627. return 0;
  628. }
  629. #endif /* !__i386__ */
  630. /*
  631. * update playback/capture watermarks
  632. */
  633. /* spinlock held! */
  634. static void
  635. snd_nm256_playback_update(struct nm256 *chip)
  636. {
  637. struct nm256_stream *s;
  638. s = &chip->streams[SNDRV_PCM_STREAM_PLAYBACK];
  639. if (s->running && s->substream) {
  640. spin_unlock(&chip->reg_lock);
  641. snd_pcm_period_elapsed(s->substream);
  642. spin_lock(&chip->reg_lock);
  643. snd_nm256_playback_mark(chip, s);
  644. }
  645. }
  646. /* spinlock held! */
  647. static void
  648. snd_nm256_capture_update(struct nm256 *chip)
  649. {
  650. struct nm256_stream *s;
  651. s = &chip->streams[SNDRV_PCM_STREAM_CAPTURE];
  652. if (s->running && s->substream) {
  653. spin_unlock(&chip->reg_lock);
  654. snd_pcm_period_elapsed(s->substream);
  655. spin_lock(&chip->reg_lock);
  656. snd_nm256_capture_mark(chip, s);
  657. }
  658. }
  659. /*
  660. * hardware info
  661. */
  662. static struct snd_pcm_hardware snd_nm256_playback =
  663. {
  664. .info = SNDRV_PCM_INFO_MMAP_IOMEM |SNDRV_PCM_INFO_MMAP_VALID |
  665. SNDRV_PCM_INFO_INTERLEAVED |
  666. /*SNDRV_PCM_INFO_PAUSE |*/
  667. SNDRV_PCM_INFO_RESUME,
  668. .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
  669. .rates = SNDRV_PCM_RATE_KNOT/*24k*/ | SNDRV_PCM_RATE_8000_48000,
  670. .rate_min = 8000,
  671. .rate_max = 48000,
  672. .channels_min = 1,
  673. .channels_max = 2,
  674. .periods_min = 2,
  675. .periods_max = 1024,
  676. .buffer_bytes_max = 128 * 1024,
  677. .period_bytes_min = 256,
  678. .period_bytes_max = 128 * 1024,
  679. };
  680. static struct snd_pcm_hardware snd_nm256_capture =
  681. {
  682. .info = SNDRV_PCM_INFO_MMAP_IOMEM | SNDRV_PCM_INFO_MMAP_VALID |
  683. SNDRV_PCM_INFO_INTERLEAVED |
  684. /*SNDRV_PCM_INFO_PAUSE |*/
  685. SNDRV_PCM_INFO_RESUME,
  686. .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
  687. .rates = SNDRV_PCM_RATE_KNOT/*24k*/ | SNDRV_PCM_RATE_8000_48000,
  688. .rate_min = 8000,
  689. .rate_max = 48000,
  690. .channels_min = 1,
  691. .channels_max = 2,
  692. .periods_min = 2,
  693. .periods_max = 1024,
  694. .buffer_bytes_max = 128 * 1024,
  695. .period_bytes_min = 256,
  696. .period_bytes_max = 128 * 1024,
  697. };
  698. /* set dma transfer size */
  699. static int snd_nm256_pcm_hw_params(struct snd_pcm_substream *substream,
  700. struct snd_pcm_hw_params *hw_params)
  701. {
  702. /* area and addr are already set and unchanged */
  703. substream->runtime->dma_bytes = params_buffer_bytes(hw_params);
  704. return 0;
  705. }
  706. /*
  707. * open
  708. */
  709. static void snd_nm256_setup_stream(struct nm256 *chip, struct nm256_stream *s,
  710. struct snd_pcm_substream *substream,
  711. struct snd_pcm_hardware *hw_ptr)
  712. {
  713. struct snd_pcm_runtime *runtime = substream->runtime;
  714. s->running = 0;
  715. runtime->hw = *hw_ptr;
  716. runtime->hw.buffer_bytes_max = s->bufsize;
  717. runtime->hw.period_bytes_max = s->bufsize / 2;
  718. runtime->dma_area = (void __force *) s->bufptr;
  719. runtime->dma_addr = s->bufptr_addr;
  720. runtime->dma_bytes = s->bufsize;
  721. runtime->private_data = s;
  722. s->substream = substream;
  723. snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
  724. &constraints_rates);
  725. }
  726. static int
  727. snd_nm256_playback_open(struct snd_pcm_substream *substream)
  728. {
  729. struct nm256 *chip = snd_pcm_substream_chip(substream);
  730. if (snd_nm256_acquire_irq(chip) < 0)
  731. return -EBUSY;
  732. snd_nm256_setup_stream(chip, &chip->streams[SNDRV_PCM_STREAM_PLAYBACK],
  733. substream, &snd_nm256_playback);
  734. return 0;
  735. }
  736. static int
  737. snd_nm256_capture_open(struct snd_pcm_substream *substream)
  738. {
  739. struct nm256 *chip = snd_pcm_substream_chip(substream);
  740. if (snd_nm256_acquire_irq(chip) < 0)
  741. return -EBUSY;
  742. snd_nm256_setup_stream(chip, &chip->streams[SNDRV_PCM_STREAM_CAPTURE],
  743. substream, &snd_nm256_capture);
  744. return 0;
  745. }
  746. /*
  747. * close - we don't have to do special..
  748. */
  749. static int
  750. snd_nm256_playback_close(struct snd_pcm_substream *substream)
  751. {
  752. struct nm256 *chip = snd_pcm_substream_chip(substream);
  753. snd_nm256_release_irq(chip);
  754. return 0;
  755. }
  756. static int
  757. snd_nm256_capture_close(struct snd_pcm_substream *substream)
  758. {
  759. struct nm256 *chip = snd_pcm_substream_chip(substream);
  760. snd_nm256_release_irq(chip);
  761. return 0;
  762. }
  763. /*
  764. * create a pcm instance
  765. */
  766. static struct snd_pcm_ops snd_nm256_playback_ops = {
  767. .open = snd_nm256_playback_open,
  768. .close = snd_nm256_playback_close,
  769. .ioctl = snd_pcm_lib_ioctl,
  770. .hw_params = snd_nm256_pcm_hw_params,
  771. .prepare = snd_nm256_pcm_prepare,
  772. .trigger = snd_nm256_playback_trigger,
  773. .pointer = snd_nm256_playback_pointer,
  774. #ifndef __i386__
  775. .copy = snd_nm256_playback_copy,
  776. .silence = snd_nm256_playback_silence,
  777. #endif
  778. .mmap = snd_pcm_lib_mmap_iomem,
  779. };
  780. static struct snd_pcm_ops snd_nm256_capture_ops = {
  781. .open = snd_nm256_capture_open,
  782. .close = snd_nm256_capture_close,
  783. .ioctl = snd_pcm_lib_ioctl,
  784. .hw_params = snd_nm256_pcm_hw_params,
  785. .prepare = snd_nm256_pcm_prepare,
  786. .trigger = snd_nm256_capture_trigger,
  787. .pointer = snd_nm256_capture_pointer,
  788. #ifndef __i386__
  789. .copy = snd_nm256_capture_copy,
  790. #endif
  791. .mmap = snd_pcm_lib_mmap_iomem,
  792. };
  793. static int __devinit
  794. snd_nm256_pcm(struct nm256 *chip, int device)
  795. {
  796. struct snd_pcm *pcm;
  797. int i, err;
  798. for (i = 0; i < 2; i++) {
  799. struct nm256_stream *s = &chip->streams[i];
  800. s->bufptr = chip->buffer + (s->buf - chip->buffer_start);
  801. s->bufptr_addr = chip->buffer_addr + (s->buf - chip->buffer_start);
  802. }
  803. err = snd_pcm_new(chip->card, chip->card->driver, device,
  804. 1, 1, &pcm);
  805. if (err < 0)
  806. return err;
  807. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_nm256_playback_ops);
  808. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_nm256_capture_ops);
  809. pcm->private_data = chip;
  810. pcm->info_flags = 0;
  811. chip->pcm = pcm;
  812. return 0;
  813. }
  814. /*
  815. * Initialize the hardware.
  816. */
  817. static void
  818. snd_nm256_init_chip(struct nm256 *chip)
  819. {
  820. /* Reset everything. */
  821. snd_nm256_writeb(chip, 0x0, 0x11);
  822. snd_nm256_writew(chip, 0x214, 0);
  823. /* stop sounds.. */
  824. //snd_nm256_playback_stop(chip);
  825. //snd_nm256_capture_stop(chip);
  826. }
  827. static irqreturn_t
  828. snd_nm256_intr_check(struct nm256 *chip)
  829. {
  830. if (chip->badintrcount++ > 1000) {
  831. /*
  832. * I'm not sure if the best thing is to stop the card from
  833. * playing or just release the interrupt (after all, we're in
  834. * a bad situation, so doing fancy stuff may not be such a good
  835. * idea).
  836. *
  837. * I worry about the card engine continuing to play noise
  838. * over and over, however--that could become a very
  839. * obnoxious problem. And we know that when this usually
  840. * happens things are fairly safe, it just means the user's
  841. * inserted a PCMCIA card and someone's spamming us with IRQ 9s.
  842. */
  843. if (chip->streams[SNDRV_PCM_STREAM_PLAYBACK].running)
  844. snd_nm256_playback_stop(chip);
  845. if (chip->streams[SNDRV_PCM_STREAM_CAPTURE].running)
  846. snd_nm256_capture_stop(chip);
  847. chip->badintrcount = 0;
  848. return IRQ_HANDLED;
  849. }
  850. return IRQ_NONE;
  851. }
  852. /*
  853. * Handle a potential interrupt for the device referred to by DEV_ID.
  854. *
  855. * I don't like the cut-n-paste job here either between the two routines,
  856. * but there are sufficient differences between the two interrupt handlers
  857. * that parameterizing it isn't all that great either. (Could use a macro,
  858. * I suppose...yucky bleah.)
  859. */
  860. static irqreturn_t
  861. snd_nm256_interrupt(int irq, void *dev_id)
  862. {
  863. struct nm256 *chip = dev_id;
  864. u16 status;
  865. u8 cbyte;
  866. status = snd_nm256_readw(chip, NM_INT_REG);
  867. /* Not ours. */
  868. if (status == 0)
  869. return snd_nm256_intr_check(chip);
  870. chip->badintrcount = 0;
  871. /* Rather boring; check for individual interrupts and process them. */
  872. spin_lock(&chip->reg_lock);
  873. if (status & NM_PLAYBACK_INT) {
  874. status &= ~NM_PLAYBACK_INT;
  875. NM_ACK_INT(chip, NM_PLAYBACK_INT);
  876. snd_nm256_playback_update(chip);
  877. }
  878. if (status & NM_RECORD_INT) {
  879. status &= ~NM_RECORD_INT;
  880. NM_ACK_INT(chip, NM_RECORD_INT);
  881. snd_nm256_capture_update(chip);
  882. }
  883. if (status & NM_MISC_INT_1) {
  884. status &= ~NM_MISC_INT_1;
  885. NM_ACK_INT(chip, NM_MISC_INT_1);
  886. snd_printd("NM256: Got misc interrupt #1\n");
  887. snd_nm256_writew(chip, NM_INT_REG, 0x8000);
  888. cbyte = snd_nm256_readb(chip, 0x400);
  889. snd_nm256_writeb(chip, 0x400, cbyte | 2);
  890. }
  891. if (status & NM_MISC_INT_2) {
  892. status &= ~NM_MISC_INT_2;
  893. NM_ACK_INT(chip, NM_MISC_INT_2);
  894. snd_printd("NM256: Got misc interrupt #2\n");
  895. cbyte = snd_nm256_readb(chip, 0x400);
  896. snd_nm256_writeb(chip, 0x400, cbyte & ~2);
  897. }
  898. /* Unknown interrupt. */
  899. if (status) {
  900. snd_printd("NM256: Fire in the hole! Unknown status 0x%x\n",
  901. status);
  902. /* Pray. */
  903. NM_ACK_INT(chip, status);
  904. }
  905. spin_unlock(&chip->reg_lock);
  906. return IRQ_HANDLED;
  907. }
  908. /*
  909. * Handle a potential interrupt for the device referred to by DEV_ID.
  910. * This handler is for the 256ZX, and is very similar to the non-ZX
  911. * routine.
  912. */
  913. static irqreturn_t
  914. snd_nm256_interrupt_zx(int irq, void *dev_id)
  915. {
  916. struct nm256 *chip = dev_id;
  917. u32 status;
  918. u8 cbyte;
  919. status = snd_nm256_readl(chip, NM_INT_REG);
  920. /* Not ours. */
  921. if (status == 0)
  922. return snd_nm256_intr_check(chip);
  923. chip->badintrcount = 0;
  924. /* Rather boring; check for individual interrupts and process them. */
  925. spin_lock(&chip->reg_lock);
  926. if (status & NM2_PLAYBACK_INT) {
  927. status &= ~NM2_PLAYBACK_INT;
  928. NM2_ACK_INT(chip, NM2_PLAYBACK_INT);
  929. snd_nm256_playback_update(chip);
  930. }
  931. if (status & NM2_RECORD_INT) {
  932. status &= ~NM2_RECORD_INT;
  933. NM2_ACK_INT(chip, NM2_RECORD_INT);
  934. snd_nm256_capture_update(chip);
  935. }
  936. if (status & NM2_MISC_INT_1) {
  937. status &= ~NM2_MISC_INT_1;
  938. NM2_ACK_INT(chip, NM2_MISC_INT_1);
  939. snd_printd("NM256: Got misc interrupt #1\n");
  940. cbyte = snd_nm256_readb(chip, 0x400);
  941. snd_nm256_writeb(chip, 0x400, cbyte | 2);
  942. }
  943. if (status & NM2_MISC_INT_2) {
  944. status &= ~NM2_MISC_INT_2;
  945. NM2_ACK_INT(chip, NM2_MISC_INT_2);
  946. snd_printd("NM256: Got misc interrupt #2\n");
  947. cbyte = snd_nm256_readb(chip, 0x400);
  948. snd_nm256_writeb(chip, 0x400, cbyte & ~2);
  949. }
  950. /* Unknown interrupt. */
  951. if (status) {
  952. snd_printd("NM256: Fire in the hole! Unknown status 0x%x\n",
  953. status);
  954. /* Pray. */
  955. NM2_ACK_INT(chip, status);
  956. }
  957. spin_unlock(&chip->reg_lock);
  958. return IRQ_HANDLED;
  959. }
  960. /*
  961. * AC97 interface
  962. */
  963. /*
  964. * Waits for the mixer to become ready to be written; returns a zero value
  965. * if it timed out.
  966. */
  967. static int
  968. snd_nm256_ac97_ready(struct nm256 *chip)
  969. {
  970. int timeout = 10;
  971. u32 testaddr;
  972. u16 testb;
  973. testaddr = chip->mixer_status_offset;
  974. testb = chip->mixer_status_mask;
  975. /*
  976. * Loop around waiting for the mixer to become ready.
  977. */
  978. while (timeout-- > 0) {
  979. if ((snd_nm256_readw(chip, testaddr) & testb) == 0)
  980. return 1;
  981. udelay(100);
  982. }
  983. return 0;
  984. }
  985. /*
  986. * Initial register values to be written to the AC97 mixer.
  987. * While most of these are identical to the reset values, we do this
  988. * so that we have most of the register contents cached--this avoids
  989. * reading from the mixer directly (which seems to be problematic,
  990. * probably due to ignorance).
  991. */
  992. struct initialValues {
  993. unsigned short reg;
  994. unsigned short value;
  995. };
  996. static struct initialValues nm256_ac97_init_val[] =
  997. {
  998. { AC97_MASTER, 0x8000 },
  999. { AC97_HEADPHONE, 0x8000 },
  1000. { AC97_MASTER_MONO, 0x8000 },
  1001. { AC97_PC_BEEP, 0x8000 },
  1002. { AC97_PHONE, 0x8008 },
  1003. { AC97_MIC, 0x8000 },
  1004. { AC97_LINE, 0x8808 },
  1005. { AC97_CD, 0x8808 },
  1006. { AC97_VIDEO, 0x8808 },
  1007. { AC97_AUX, 0x8808 },
  1008. { AC97_PCM, 0x8808 },
  1009. { AC97_REC_SEL, 0x0000 },
  1010. { AC97_REC_GAIN, 0x0B0B },
  1011. { AC97_GENERAL_PURPOSE, 0x0000 },
  1012. { AC97_3D_CONTROL, 0x8000 },
  1013. { AC97_VENDOR_ID1, 0x8384 },
  1014. { AC97_VENDOR_ID2, 0x7609 },
  1015. };
  1016. static int nm256_ac97_idx(unsigned short reg)
  1017. {
  1018. int i;
  1019. for (i = 0; i < ARRAY_SIZE(nm256_ac97_init_val); i++)
  1020. if (nm256_ac97_init_val[i].reg == reg)
  1021. return i;
  1022. return -1;
  1023. }
  1024. /*
  1025. * some nm256 easily crash when reading from mixer registers
  1026. * thus we're treating it as a write-only mixer and cache the
  1027. * written values
  1028. */
  1029. static unsigned short
  1030. snd_nm256_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
  1031. {
  1032. struct nm256 *chip = ac97->private_data;
  1033. int idx = nm256_ac97_idx(reg);
  1034. if (idx < 0)
  1035. return 0;
  1036. return chip->ac97_regs[idx];
  1037. }
  1038. /*
  1039. */
  1040. static void
  1041. snd_nm256_ac97_write(struct snd_ac97 *ac97,
  1042. unsigned short reg, unsigned short val)
  1043. {
  1044. struct nm256 *chip = ac97->private_data;
  1045. int tries = 2;
  1046. int idx = nm256_ac97_idx(reg);
  1047. u32 base;
  1048. if (idx < 0)
  1049. return;
  1050. base = chip->mixer_base;
  1051. snd_nm256_ac97_ready(chip);
  1052. /* Wait for the write to take, too. */
  1053. while (tries-- > 0) {
  1054. snd_nm256_writew(chip, base + reg, val);
  1055. msleep(1); /* a little delay here seems better.. */
  1056. if (snd_nm256_ac97_ready(chip)) {
  1057. /* successful write: set cache */
  1058. chip->ac97_regs[idx] = val;
  1059. return;
  1060. }
  1061. }
  1062. snd_printd("nm256: ac97 codec not ready..\n");
  1063. }
  1064. /* static resolution table */
  1065. static struct snd_ac97_res_table nm256_res_table[] = {
  1066. { AC97_MASTER, 0x1f1f },
  1067. { AC97_HEADPHONE, 0x1f1f },
  1068. { AC97_MASTER_MONO, 0x001f },
  1069. { AC97_PC_BEEP, 0x001f },
  1070. { AC97_PHONE, 0x001f },
  1071. { AC97_MIC, 0x001f },
  1072. { AC97_LINE, 0x1f1f },
  1073. { AC97_CD, 0x1f1f },
  1074. { AC97_VIDEO, 0x1f1f },
  1075. { AC97_AUX, 0x1f1f },
  1076. { AC97_PCM, 0x1f1f },
  1077. { AC97_REC_GAIN, 0x0f0f },
  1078. { } /* terminator */
  1079. };
  1080. /* initialize the ac97 into a known state */
  1081. static void
  1082. snd_nm256_ac97_reset(struct snd_ac97 *ac97)
  1083. {
  1084. struct nm256 *chip = ac97->private_data;
  1085. /* Reset the mixer. 'Tis magic! */
  1086. snd_nm256_writeb(chip, 0x6c0, 1);
  1087. if (! chip->reset_workaround) {
  1088. /* Dell latitude LS will lock up by this */
  1089. snd_nm256_writeb(chip, 0x6cc, 0x87);
  1090. }
  1091. if (! chip->reset_workaround_2) {
  1092. /* Dell latitude CSx will lock up by this */
  1093. snd_nm256_writeb(chip, 0x6cc, 0x80);
  1094. snd_nm256_writeb(chip, 0x6cc, 0x0);
  1095. }
  1096. if (! chip->in_resume) {
  1097. int i;
  1098. for (i = 0; i < ARRAY_SIZE(nm256_ac97_init_val); i++) {
  1099. /* preload the cache, so as to avoid even a single
  1100. * read of the mixer regs
  1101. */
  1102. snd_nm256_ac97_write(ac97, nm256_ac97_init_val[i].reg,
  1103. nm256_ac97_init_val[i].value);
  1104. }
  1105. }
  1106. }
  1107. /* create an ac97 mixer interface */
  1108. static int __devinit
  1109. snd_nm256_mixer(struct nm256 *chip)
  1110. {
  1111. struct snd_ac97_bus *pbus;
  1112. struct snd_ac97_template ac97;
  1113. int err;
  1114. static struct snd_ac97_bus_ops ops = {
  1115. .reset = snd_nm256_ac97_reset,
  1116. .write = snd_nm256_ac97_write,
  1117. .read = snd_nm256_ac97_read,
  1118. };
  1119. chip->ac97_regs = kcalloc(sizeof(short),
  1120. ARRAY_SIZE(nm256_ac97_init_val), GFP_KERNEL);
  1121. if (! chip->ac97_regs)
  1122. return -ENOMEM;
  1123. if ((err = snd_ac97_bus(chip->card, 0, &ops, NULL, &pbus)) < 0)
  1124. return err;
  1125. memset(&ac97, 0, sizeof(ac97));
  1126. ac97.scaps = AC97_SCAP_AUDIO; /* we support audio! */
  1127. ac97.private_data = chip;
  1128. ac97.res_table = nm256_res_table;
  1129. pbus->no_vra = 1;
  1130. err = snd_ac97_mixer(pbus, &ac97, &chip->ac97);
  1131. if (err < 0)
  1132. return err;
  1133. if (! (chip->ac97->id & (0xf0000000))) {
  1134. /* looks like an invalid id */
  1135. sprintf(chip->card->mixername, "%s AC97", chip->card->driver);
  1136. }
  1137. return 0;
  1138. }
  1139. /*
  1140. * See if the signature left by the NM256 BIOS is intact; if so, we use
  1141. * the associated address as the end of our audio buffer in the video
  1142. * RAM.
  1143. */
  1144. static int __devinit
  1145. snd_nm256_peek_for_sig(struct nm256 *chip)
  1146. {
  1147. /* The signature is located 1K below the end of video RAM. */
  1148. void __iomem *temp;
  1149. /* Default buffer end is 5120 bytes below the top of RAM. */
  1150. unsigned long pointer_found = chip->buffer_end - 0x1400;
  1151. u32 sig;
  1152. temp = ioremap_nocache(chip->buffer_addr + chip->buffer_end - 0x400, 16);
  1153. if (temp == NULL) {
  1154. snd_printk(KERN_ERR "Unable to scan for card signature in video RAM\n");
  1155. return -EBUSY;
  1156. }
  1157. sig = readl(temp);
  1158. if ((sig & NM_SIG_MASK) == NM_SIGNATURE) {
  1159. u32 pointer = readl(temp + 4);
  1160. /*
  1161. * If it's obviously invalid, don't use it
  1162. */
  1163. if (pointer == 0xffffffff ||
  1164. pointer < chip->buffer_size ||
  1165. pointer > chip->buffer_end) {
  1166. snd_printk(KERN_ERR "invalid signature found: 0x%x\n", pointer);
  1167. iounmap(temp);
  1168. return -ENODEV;
  1169. } else {
  1170. pointer_found = pointer;
  1171. printk(KERN_INFO "nm256: found card signature in video RAM: 0x%x\n",
  1172. pointer);
  1173. }
  1174. }
  1175. iounmap(temp);
  1176. chip->buffer_end = pointer_found;
  1177. return 0;
  1178. }
  1179. #ifdef CONFIG_PM
  1180. /*
  1181. * APM event handler, so the card is properly reinitialized after a power
  1182. * event.
  1183. */
  1184. static int nm256_suspend(struct pci_dev *pci, pm_message_t state)
  1185. {
  1186. struct snd_card *card = pci_get_drvdata(pci);
  1187. struct nm256 *chip = card->private_data;
  1188. snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
  1189. snd_pcm_suspend_all(chip->pcm);
  1190. snd_ac97_suspend(chip->ac97);
  1191. chip->coeffs_current = 0;
  1192. pci_disable_device(pci);
  1193. pci_save_state(pci);
  1194. pci_set_power_state(pci, pci_choose_state(pci, state));
  1195. return 0;
  1196. }
  1197. static int nm256_resume(struct pci_dev *pci)
  1198. {
  1199. struct snd_card *card = pci_get_drvdata(pci);
  1200. struct nm256 *chip = card->private_data;
  1201. int i;
  1202. /* Perform a full reset on the hardware */
  1203. chip->in_resume = 1;
  1204. pci_set_power_state(pci, PCI_D0);
  1205. pci_restore_state(pci);
  1206. if (pci_enable_device(pci) < 0) {
  1207. printk(KERN_ERR "nm256: pci_enable_device failed, "
  1208. "disabling device\n");
  1209. snd_card_disconnect(card);
  1210. return -EIO;
  1211. }
  1212. pci_set_master(pci);
  1213. snd_nm256_init_chip(chip);
  1214. /* restore ac97 */
  1215. snd_ac97_resume(chip->ac97);
  1216. for (i = 0; i < 2; i++) {
  1217. struct nm256_stream *s = &chip->streams[i];
  1218. if (s->substream && s->suspended) {
  1219. spin_lock_irq(&chip->reg_lock);
  1220. snd_nm256_set_format(chip, s, s->substream);
  1221. spin_unlock_irq(&chip->reg_lock);
  1222. }
  1223. }
  1224. snd_power_change_state(card, SNDRV_CTL_POWER_D0);
  1225. chip->in_resume = 0;
  1226. return 0;
  1227. }
  1228. #endif /* CONFIG_PM */
  1229. static int snd_nm256_free(struct nm256 *chip)
  1230. {
  1231. if (chip->streams[SNDRV_PCM_STREAM_PLAYBACK].running)
  1232. snd_nm256_playback_stop(chip);
  1233. if (chip->streams[SNDRV_PCM_STREAM_CAPTURE].running)
  1234. snd_nm256_capture_stop(chip);
  1235. if (chip->irq >= 0)
  1236. synchronize_irq(chip->irq);
  1237. if (chip->cport)
  1238. iounmap(chip->cport);
  1239. if (chip->buffer)
  1240. iounmap(chip->buffer);
  1241. release_and_free_resource(chip->res_cport);
  1242. release_and_free_resource(chip->res_buffer);
  1243. if (chip->irq >= 0)
  1244. free_irq(chip->irq, chip);
  1245. pci_disable_device(chip->pci);
  1246. kfree(chip->ac97_regs);
  1247. kfree(chip);
  1248. return 0;
  1249. }
  1250. static int snd_nm256_dev_free(struct snd_device *device)
  1251. {
  1252. struct nm256 *chip = device->device_data;
  1253. return snd_nm256_free(chip);
  1254. }
  1255. static int __devinit
  1256. snd_nm256_create(struct snd_card *card, struct pci_dev *pci,
  1257. struct nm256 **chip_ret)
  1258. {
  1259. struct nm256 *chip;
  1260. int err, pval;
  1261. static struct snd_device_ops ops = {
  1262. .dev_free = snd_nm256_dev_free,
  1263. };
  1264. u32 addr;
  1265. *chip_ret = NULL;
  1266. if ((err = pci_enable_device(pci)) < 0)
  1267. return err;
  1268. chip = kzalloc(sizeof(*chip), GFP_KERNEL);
  1269. if (chip == NULL) {
  1270. pci_disable_device(pci);
  1271. return -ENOMEM;
  1272. }
  1273. chip->card = card;
  1274. chip->pci = pci;
  1275. chip->use_cache = use_cache;
  1276. spin_lock_init(&chip->reg_lock);
  1277. chip->irq = -1;
  1278. mutex_init(&chip->irq_mutex);
  1279. /* store buffer sizes in bytes */
  1280. chip->streams[SNDRV_PCM_STREAM_PLAYBACK].bufsize = playback_bufsize * 1024;
  1281. chip->streams[SNDRV_PCM_STREAM_CAPTURE].bufsize = capture_bufsize * 1024;
  1282. /*
  1283. * The NM256 has two memory ports. The first port is nothing
  1284. * more than a chunk of video RAM, which is used as the I/O ring
  1285. * buffer. The second port has the actual juicy stuff (like the
  1286. * mixer and the playback engine control registers).
  1287. */
  1288. chip->buffer_addr = pci_resource_start(pci, 0);
  1289. chip->cport_addr = pci_resource_start(pci, 1);
  1290. /* Init the memory port info. */
  1291. /* remap control port (#2) */
  1292. chip->res_cport = request_mem_region(chip->cport_addr, NM_PORT2_SIZE,
  1293. card->driver);
  1294. if (chip->res_cport == NULL) {
  1295. snd_printk(KERN_ERR "memory region 0x%lx (size 0x%x) busy\n",
  1296. chip->cport_addr, NM_PORT2_SIZE);
  1297. err = -EBUSY;
  1298. goto __error;
  1299. }
  1300. chip->cport = ioremap_nocache(chip->cport_addr, NM_PORT2_SIZE);
  1301. if (chip->cport == NULL) {
  1302. snd_printk(KERN_ERR "unable to map control port %lx\n", chip->cport_addr);
  1303. err = -ENOMEM;
  1304. goto __error;
  1305. }
  1306. if (!strcmp(card->driver, "NM256AV")) {
  1307. /* Ok, try to see if this is a non-AC97 version of the hardware. */
  1308. pval = snd_nm256_readw(chip, NM_MIXER_PRESENCE);
  1309. if ((pval & NM_PRESENCE_MASK) != NM_PRESENCE_VALUE) {
  1310. if (! force_ac97) {
  1311. printk(KERN_ERR "nm256: no ac97 is found!\n");
  1312. printk(KERN_ERR " force the driver to load by "
  1313. "passing in the module parameter\n");
  1314. printk(KERN_ERR " force_ac97=1\n");
  1315. printk(KERN_ERR " or try sb16, opl3sa2, or "
  1316. "cs423x drivers instead.\n");
  1317. err = -ENXIO;
  1318. goto __error;
  1319. }
  1320. }
  1321. chip->buffer_end = 2560 * 1024;
  1322. chip->interrupt = snd_nm256_interrupt;
  1323. chip->mixer_status_offset = NM_MIXER_STATUS_OFFSET;
  1324. chip->mixer_status_mask = NM_MIXER_READY_MASK;
  1325. } else {
  1326. /* Not sure if there is any relevant detect for the ZX or not. */
  1327. if (snd_nm256_readb(chip, 0xa0b) != 0)
  1328. chip->buffer_end = 6144 * 1024;
  1329. else
  1330. chip->buffer_end = 4096 * 1024;
  1331. chip->interrupt = snd_nm256_interrupt_zx;
  1332. chip->mixer_status_offset = NM2_MIXER_STATUS_OFFSET;
  1333. chip->mixer_status_mask = NM2_MIXER_READY_MASK;
  1334. }
  1335. chip->buffer_size = chip->streams[SNDRV_PCM_STREAM_PLAYBACK].bufsize +
  1336. chip->streams[SNDRV_PCM_STREAM_CAPTURE].bufsize;
  1337. if (chip->use_cache)
  1338. chip->buffer_size += NM_TOTAL_COEFF_COUNT * 4;
  1339. else
  1340. chip->buffer_size += NM_MAX_PLAYBACK_COEF_SIZE + NM_MAX_RECORD_COEF_SIZE;
  1341. if (buffer_top >= chip->buffer_size && buffer_top < chip->buffer_end)
  1342. chip->buffer_end = buffer_top;
  1343. else {
  1344. /* get buffer end pointer from signature */
  1345. if ((err = snd_nm256_peek_for_sig(chip)) < 0)
  1346. goto __error;
  1347. }
  1348. chip->buffer_start = chip->buffer_end - chip->buffer_size;
  1349. chip->buffer_addr += chip->buffer_start;
  1350. printk(KERN_INFO "nm256: Mapping port 1 from 0x%x - 0x%x\n",
  1351. chip->buffer_start, chip->buffer_end);
  1352. chip->res_buffer = request_mem_region(chip->buffer_addr,
  1353. chip->buffer_size,
  1354. card->driver);
  1355. if (chip->res_buffer == NULL) {
  1356. snd_printk(KERN_ERR "nm256: buffer 0x%lx (size 0x%x) busy\n",
  1357. chip->buffer_addr, chip->buffer_size);
  1358. err = -EBUSY;
  1359. goto __error;
  1360. }
  1361. chip->buffer = ioremap_nocache(chip->buffer_addr, chip->buffer_size);
  1362. if (chip->buffer == NULL) {
  1363. err = -ENOMEM;
  1364. snd_printk(KERN_ERR "unable to map ring buffer at %lx\n", chip->buffer_addr);
  1365. goto __error;
  1366. }
  1367. /* set offsets */
  1368. addr = chip->buffer_start;
  1369. chip->streams[SNDRV_PCM_STREAM_PLAYBACK].buf = addr;
  1370. addr += chip->streams[SNDRV_PCM_STREAM_PLAYBACK].bufsize;
  1371. chip->streams[SNDRV_PCM_STREAM_CAPTURE].buf = addr;
  1372. addr += chip->streams[SNDRV_PCM_STREAM_CAPTURE].bufsize;
  1373. if (chip->use_cache) {
  1374. chip->all_coeff_buf = addr;
  1375. } else {
  1376. chip->coeff_buf[SNDRV_PCM_STREAM_PLAYBACK] = addr;
  1377. addr += NM_MAX_PLAYBACK_COEF_SIZE;
  1378. chip->coeff_buf[SNDRV_PCM_STREAM_CAPTURE] = addr;
  1379. }
  1380. /* Fixed setting. */
  1381. chip->mixer_base = NM_MIXER_OFFSET;
  1382. chip->coeffs_current = 0;
  1383. snd_nm256_init_chip(chip);
  1384. // pci_set_master(pci); /* needed? */
  1385. if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0)
  1386. goto __error;
  1387. snd_card_set_dev(card, &pci->dev);
  1388. *chip_ret = chip;
  1389. return 0;
  1390. __error:
  1391. snd_nm256_free(chip);
  1392. return err;
  1393. }
  1394. enum { NM_BLACKLISTED, NM_RESET_WORKAROUND, NM_RESET_WORKAROUND_2 };
  1395. static struct snd_pci_quirk nm256_quirks[] __devinitdata = {
  1396. /* HP omnibook 4150 has cs4232 codec internally */
  1397. SND_PCI_QUIRK(0x103c, 0x0007, "HP omnibook 4150", NM_BLACKLISTED),
  1398. /* Reset workarounds to avoid lock-ups */
  1399. SND_PCI_QUIRK(0x104d, 0x8041, "Sony PCG-F305", NM_RESET_WORKAROUND),
  1400. SND_PCI_QUIRK(0x1028, 0x0080, "Dell Latitude LS", NM_RESET_WORKAROUND),
  1401. SND_PCI_QUIRK(0x1028, 0x0091, "Dell Latitude CSx", NM_RESET_WORKAROUND_2),
  1402. { } /* terminator */
  1403. };
  1404. static int __devinit snd_nm256_probe(struct pci_dev *pci,
  1405. const struct pci_device_id *pci_id)
  1406. {
  1407. struct snd_card *card;
  1408. struct nm256 *chip;
  1409. int err;
  1410. const struct snd_pci_quirk *q;
  1411. q = snd_pci_quirk_lookup(pci, nm256_quirks);
  1412. if (q) {
  1413. snd_printdd(KERN_INFO "nm256: Enabled quirk for %s.\n", q->name);
  1414. switch (q->value) {
  1415. case NM_BLACKLISTED:
  1416. printk(KERN_INFO "nm256: The device is blacklisted. "
  1417. "Loading stopped\n");
  1418. return -ENODEV;
  1419. case NM_RESET_WORKAROUND_2:
  1420. reset_workaround_2 = 1;
  1421. /* Fall-through */
  1422. case NM_RESET_WORKAROUND:
  1423. reset_workaround = 1;
  1424. break;
  1425. }
  1426. }
  1427. card = snd_card_new(index, id, THIS_MODULE, 0);
  1428. if (card == NULL)
  1429. return -ENOMEM;
  1430. switch (pci->device) {
  1431. case PCI_DEVICE_ID_NEOMAGIC_NM256AV_AUDIO:
  1432. strcpy(card->driver, "NM256AV");
  1433. break;
  1434. case PCI_DEVICE_ID_NEOMAGIC_NM256ZX_AUDIO:
  1435. strcpy(card->driver, "NM256ZX");
  1436. break;
  1437. case PCI_DEVICE_ID_NEOMAGIC_NM256XL_PLUS_AUDIO:
  1438. strcpy(card->driver, "NM256XL+");
  1439. break;
  1440. default:
  1441. snd_printk(KERN_ERR "invalid device id 0x%x\n", pci->device);
  1442. snd_card_free(card);
  1443. return -EINVAL;
  1444. }
  1445. if (vaio_hack)
  1446. buffer_top = 0x25a800; /* this avoids conflicts with XFree86 server */
  1447. if (playback_bufsize < 4)
  1448. playback_bufsize = 4;
  1449. if (playback_bufsize > 128)
  1450. playback_bufsize = 128;
  1451. if (capture_bufsize < 4)
  1452. capture_bufsize = 4;
  1453. if (capture_bufsize > 128)
  1454. capture_bufsize = 128;
  1455. if ((err = snd_nm256_create(card, pci, &chip)) < 0) {
  1456. snd_card_free(card);
  1457. return err;
  1458. }
  1459. card->private_data = chip;
  1460. if (reset_workaround) {
  1461. snd_printdd(KERN_INFO "nm256: reset_workaround activated\n");
  1462. chip->reset_workaround = 1;
  1463. }
  1464. if (reset_workaround_2) {
  1465. snd_printdd(KERN_INFO "nm256: reset_workaround_2 activated\n");
  1466. chip->reset_workaround_2 = 1;
  1467. }
  1468. if ((err = snd_nm256_pcm(chip, 0)) < 0 ||
  1469. (err = snd_nm256_mixer(chip)) < 0) {
  1470. snd_card_free(card);
  1471. return err;
  1472. }
  1473. sprintf(card->shortname, "NeoMagic %s", card->driver);
  1474. sprintf(card->longname, "%s at 0x%lx & 0x%lx, irq %d",
  1475. card->shortname,
  1476. chip->buffer_addr, chip->cport_addr, chip->irq);
  1477. if ((err = snd_card_register(card)) < 0) {
  1478. snd_card_free(card);
  1479. return err;
  1480. }
  1481. pci_set_drvdata(pci, card);
  1482. return 0;
  1483. }
  1484. static void __devexit snd_nm256_remove(struct pci_dev *pci)
  1485. {
  1486. snd_card_free(pci_get_drvdata(pci));
  1487. pci_set_drvdata(pci, NULL);
  1488. }
  1489. static struct pci_driver driver = {
  1490. .name = "NeoMagic 256",
  1491. .id_table = snd_nm256_ids,
  1492. .probe = snd_nm256_probe,
  1493. .remove = __devexit_p(snd_nm256_remove),
  1494. #ifdef CONFIG_PM
  1495. .suspend = nm256_suspend,
  1496. .resume = nm256_resume,
  1497. #endif
  1498. };
  1499. static int __init alsa_card_nm256_init(void)
  1500. {
  1501. return pci_register_driver(&driver);
  1502. }
  1503. static void __exit alsa_card_nm256_exit(void)
  1504. {
  1505. pci_unregister_driver(&driver);
  1506. }
  1507. module_init(alsa_card_nm256_init)
  1508. module_exit(alsa_card_nm256_exit)