patch_sigmatel.c 90 KB

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  1. /*
  2. * Universal Interface for Intel High Definition Audio Codec
  3. *
  4. * HD audio interface patch for SigmaTel STAC92xx
  5. *
  6. * Copyright (c) 2005 Embedded Alley Solutions, Inc.
  7. * Matt Porter <mporter@embeddedalley.com>
  8. *
  9. * Based on patch_cmedia.c and patch_realtek.c
  10. * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
  11. *
  12. * This driver is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2 of the License, or
  15. * (at your option) any later version.
  16. *
  17. * This driver is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  25. */
  26. #include <sound/driver.h>
  27. #include <linux/init.h>
  28. #include <linux/delay.h>
  29. #include <linux/slab.h>
  30. #include <linux/pci.h>
  31. #include <sound/core.h>
  32. #include <sound/asoundef.h>
  33. #include "hda_codec.h"
  34. #include "hda_local.h"
  35. #define NUM_CONTROL_ALLOC 32
  36. #define STAC_HP_EVENT 0x37
  37. enum {
  38. STAC_REF,
  39. STAC_9200_DELL_D21,
  40. STAC_9200_DELL_D22,
  41. STAC_9200_DELL_D23,
  42. STAC_9200_DELL_M21,
  43. STAC_9200_DELL_M22,
  44. STAC_9200_DELL_M23,
  45. STAC_9200_DELL_M24,
  46. STAC_9200_DELL_M25,
  47. STAC_9200_DELL_M26,
  48. STAC_9200_DELL_M27,
  49. STAC_9200_GATEWAY,
  50. STAC_9200_MODELS
  51. };
  52. enum {
  53. STAC_9205_REF,
  54. STAC_9205_DELL_M42,
  55. STAC_9205_DELL_M43,
  56. STAC_9205_DELL_M44,
  57. STAC_9205_MODELS
  58. };
  59. enum {
  60. STAC_925x_REF,
  61. STAC_M2_2,
  62. STAC_MA6,
  63. STAC_PA6,
  64. STAC_925x_MODELS
  65. };
  66. enum {
  67. STAC_D945_REF,
  68. STAC_D945GTP3,
  69. STAC_D945GTP5,
  70. STAC_INTEL_MAC_V1,
  71. STAC_INTEL_MAC_V2,
  72. STAC_INTEL_MAC_V3,
  73. STAC_INTEL_MAC_V4,
  74. STAC_INTEL_MAC_V5,
  75. /* for backward compatibility */
  76. STAC_MACMINI,
  77. STAC_MACBOOK,
  78. STAC_MACBOOK_PRO_V1,
  79. STAC_MACBOOK_PRO_V2,
  80. STAC_IMAC_INTEL,
  81. STAC_IMAC_INTEL_20,
  82. STAC_922X_DELL_D81,
  83. STAC_922X_DELL_D82,
  84. STAC_922X_DELL_M81,
  85. STAC_922X_DELL_M82,
  86. STAC_922X_MODELS
  87. };
  88. enum {
  89. STAC_D965_REF,
  90. STAC_D965_3ST,
  91. STAC_D965_5ST,
  92. STAC_DELL_3ST,
  93. STAC_927X_MODELS
  94. };
  95. struct sigmatel_spec {
  96. struct snd_kcontrol_new *mixers[4];
  97. unsigned int num_mixers;
  98. int board_config;
  99. unsigned int surr_switch: 1;
  100. unsigned int line_switch: 1;
  101. unsigned int mic_switch: 1;
  102. unsigned int alt_switch: 1;
  103. unsigned int hp_detect: 1;
  104. unsigned int gpio_mute: 1;
  105. unsigned int gpio_mask, gpio_data;
  106. /* playback */
  107. struct hda_multi_out multiout;
  108. hda_nid_t dac_nids[5];
  109. /* capture */
  110. hda_nid_t *adc_nids;
  111. unsigned int num_adcs;
  112. hda_nid_t *mux_nids;
  113. unsigned int num_muxes;
  114. hda_nid_t *dmic_nids;
  115. unsigned int num_dmics;
  116. hda_nid_t dmux_nid;
  117. hda_nid_t dig_in_nid;
  118. /* pin widgets */
  119. hda_nid_t *pin_nids;
  120. unsigned int num_pins;
  121. unsigned int *pin_configs;
  122. unsigned int *bios_pin_configs;
  123. /* codec specific stuff */
  124. struct hda_verb *init;
  125. struct snd_kcontrol_new *mixer;
  126. /* capture source */
  127. struct hda_input_mux *dinput_mux;
  128. unsigned int cur_dmux;
  129. struct hda_input_mux *input_mux;
  130. unsigned int cur_mux[3];
  131. /* i/o switches */
  132. unsigned int io_switch[2];
  133. unsigned int clfe_swap;
  134. unsigned int aloopback;
  135. struct hda_pcm pcm_rec[2]; /* PCM information */
  136. /* dynamic controls and input_mux */
  137. struct auto_pin_cfg autocfg;
  138. unsigned int num_kctl_alloc, num_kctl_used;
  139. struct snd_kcontrol_new *kctl_alloc;
  140. struct hda_input_mux private_dimux;
  141. struct hda_input_mux private_imux;
  142. };
  143. static hda_nid_t stac9200_adc_nids[1] = {
  144. 0x03,
  145. };
  146. static hda_nid_t stac9200_mux_nids[1] = {
  147. 0x0c,
  148. };
  149. static hda_nid_t stac9200_dac_nids[1] = {
  150. 0x02,
  151. };
  152. static hda_nid_t stac925x_adc_nids[1] = {
  153. 0x03,
  154. };
  155. static hda_nid_t stac925x_mux_nids[1] = {
  156. 0x0f,
  157. };
  158. static hda_nid_t stac925x_dac_nids[1] = {
  159. 0x02,
  160. };
  161. #define STAC925X_NUM_DMICS 1
  162. static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
  163. 0x15, 0
  164. };
  165. static hda_nid_t stac922x_adc_nids[2] = {
  166. 0x06, 0x07,
  167. };
  168. static hda_nid_t stac922x_mux_nids[2] = {
  169. 0x12, 0x13,
  170. };
  171. static hda_nid_t stac927x_adc_nids[3] = {
  172. 0x07, 0x08, 0x09
  173. };
  174. static hda_nid_t stac927x_mux_nids[3] = {
  175. 0x15, 0x16, 0x17
  176. };
  177. static hda_nid_t stac9205_adc_nids[2] = {
  178. 0x12, 0x13
  179. };
  180. static hda_nid_t stac9205_mux_nids[2] = {
  181. 0x19, 0x1a
  182. };
  183. #define STAC9205_NUM_DMICS 2
  184. static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
  185. 0x17, 0x18, 0
  186. };
  187. static hda_nid_t stac9200_pin_nids[8] = {
  188. 0x08, 0x09, 0x0d, 0x0e,
  189. 0x0f, 0x10, 0x11, 0x12,
  190. };
  191. static hda_nid_t stac925x_pin_nids[8] = {
  192. 0x07, 0x08, 0x0a, 0x0b,
  193. 0x0c, 0x0d, 0x10, 0x11,
  194. };
  195. static hda_nid_t stac922x_pin_nids[10] = {
  196. 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
  197. 0x0f, 0x10, 0x11, 0x15, 0x1b,
  198. };
  199. static hda_nid_t stac927x_pin_nids[14] = {
  200. 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
  201. 0x0f, 0x10, 0x11, 0x12, 0x13,
  202. 0x14, 0x21, 0x22, 0x23,
  203. };
  204. static hda_nid_t stac9205_pin_nids[12] = {
  205. 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
  206. 0x0f, 0x14, 0x16, 0x17, 0x18,
  207. 0x21, 0x22,
  208. };
  209. static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
  210. struct snd_ctl_elem_info *uinfo)
  211. {
  212. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  213. struct sigmatel_spec *spec = codec->spec;
  214. return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
  215. }
  216. static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
  217. struct snd_ctl_elem_value *ucontrol)
  218. {
  219. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  220. struct sigmatel_spec *spec = codec->spec;
  221. ucontrol->value.enumerated.item[0] = spec->cur_dmux;
  222. return 0;
  223. }
  224. static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
  225. struct snd_ctl_elem_value *ucontrol)
  226. {
  227. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  228. struct sigmatel_spec *spec = codec->spec;
  229. return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
  230. spec->dmux_nid, &spec->cur_dmux);
  231. }
  232. static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  233. {
  234. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  235. struct sigmatel_spec *spec = codec->spec;
  236. return snd_hda_input_mux_info(spec->input_mux, uinfo);
  237. }
  238. static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  239. {
  240. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  241. struct sigmatel_spec *spec = codec->spec;
  242. unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  243. ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
  244. return 0;
  245. }
  246. static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  247. {
  248. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  249. struct sigmatel_spec *spec = codec->spec;
  250. unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  251. return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
  252. spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
  253. }
  254. #define stac92xx_aloopback_info snd_ctl_boolean_mono_info
  255. static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
  256. struct snd_ctl_elem_value *ucontrol)
  257. {
  258. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  259. struct sigmatel_spec *spec = codec->spec;
  260. ucontrol->value.integer.value[0] = spec->aloopback;
  261. return 0;
  262. }
  263. static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
  264. struct snd_ctl_elem_value *ucontrol)
  265. {
  266. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  267. struct sigmatel_spec *spec = codec->spec;
  268. unsigned int dac_mode;
  269. if (spec->aloopback == ucontrol->value.integer.value[0])
  270. return 0;
  271. spec->aloopback = ucontrol->value.integer.value[0];
  272. dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
  273. kcontrol->private_value & 0xFFFF, 0x0);
  274. if (spec->aloopback) {
  275. snd_hda_power_up(codec);
  276. dac_mode |= 0x40;
  277. } else {
  278. snd_hda_power_down(codec);
  279. dac_mode &= ~0x40;
  280. }
  281. snd_hda_codec_write_cache(codec, codec->afg, 0,
  282. kcontrol->private_value >> 16, dac_mode);
  283. return 1;
  284. }
  285. static int stac92xx_volknob_info(struct snd_kcontrol *kcontrol,
  286. struct snd_ctl_elem_info *uinfo)
  287. {
  288. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  289. uinfo->count = 1;
  290. uinfo->value.integer.min = 0;
  291. uinfo->value.integer.max = 127;
  292. return 0;
  293. }
  294. static int stac92xx_volknob_get(struct snd_kcontrol *kcontrol,
  295. struct snd_ctl_elem_value *ucontrol)
  296. {
  297. ucontrol->value.integer.value[0] = kcontrol->private_value & 0xff;
  298. return 0;
  299. }
  300. static int stac92xx_volknob_put(struct snd_kcontrol *kcontrol,
  301. struct snd_ctl_elem_value *ucontrol)
  302. {
  303. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  304. unsigned int val = kcontrol->private_value & 0xff;
  305. if (val == ucontrol->value.integer.value[0])
  306. return 0;
  307. val = ucontrol->value.integer.value[0];
  308. kcontrol->private_value &= ~0xff;
  309. kcontrol->private_value |= val;
  310. snd_hda_codec_write_cache(codec, kcontrol->private_value >> 16, 0,
  311. AC_VERB_SET_VOLUME_KNOB_CONTROL, val | 0x80);
  312. return 1;
  313. }
  314. static struct hda_verb stac9200_core_init[] = {
  315. /* set dac0mux for dac converter */
  316. { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
  317. {}
  318. };
  319. static struct hda_verb stac9200_eapd_init[] = {
  320. /* set dac0mux for dac converter */
  321. {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
  322. {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
  323. {}
  324. };
  325. static struct hda_verb stac925x_core_init[] = {
  326. /* set dac0mux for dac converter */
  327. { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
  328. {}
  329. };
  330. static struct hda_verb stac922x_core_init[] = {
  331. /* set master volume and direct control */
  332. { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
  333. {}
  334. };
  335. static struct hda_verb d965_core_init[] = {
  336. /* set master volume and direct control */
  337. { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
  338. /* unmute node 0x1b */
  339. { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
  340. /* select node 0x03 as DAC */
  341. { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
  342. {}
  343. };
  344. static struct hda_verb stac927x_core_init[] = {
  345. /* set master volume and direct control */
  346. { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
  347. {}
  348. };
  349. static struct hda_verb stac9205_core_init[] = {
  350. /* set master volume and direct control */
  351. { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
  352. {}
  353. };
  354. #define STAC_INPUT_SOURCE(cnt) \
  355. { \
  356. .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
  357. .name = "Input Source", \
  358. .count = cnt, \
  359. .info = stac92xx_mux_enum_info, \
  360. .get = stac92xx_mux_enum_get, \
  361. .put = stac92xx_mux_enum_put, \
  362. }
  363. #define STAC_ANALOG_LOOPBACK(verb_read,verb_write) \
  364. { \
  365. .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
  366. .name = "Analog Loopback", \
  367. .count = 1, \
  368. .info = stac92xx_aloopback_info, \
  369. .get = stac92xx_aloopback_get, \
  370. .put = stac92xx_aloopback_put, \
  371. .private_value = verb_read | (verb_write << 16), \
  372. }
  373. #define STAC_VOLKNOB(knob_nid) \
  374. { \
  375. .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
  376. .name = "Master Playback Volume", \
  377. .count = 1, \
  378. .info = stac92xx_volknob_info, \
  379. .get = stac92xx_volknob_get, \
  380. .put = stac92xx_volknob_put, \
  381. .private_value = 127 | (knob_nid << 16), \
  382. }
  383. static struct snd_kcontrol_new stac9200_mixer[] = {
  384. HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
  385. HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
  386. STAC_INPUT_SOURCE(1),
  387. HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
  388. HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
  389. HDA_CODEC_VOLUME("Capture Mux Volume", 0x0c, 0, HDA_OUTPUT),
  390. { } /* end */
  391. };
  392. static struct snd_kcontrol_new stac925x_mixer[] = {
  393. STAC_INPUT_SOURCE(1),
  394. HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
  395. HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_OUTPUT),
  396. HDA_CODEC_VOLUME("Capture Mux Volume", 0x0f, 0, HDA_OUTPUT),
  397. { } /* end */
  398. };
  399. static struct snd_kcontrol_new stac9205_mixer[] = {
  400. {
  401. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  402. .name = "Digital Input Source",
  403. .count = 1,
  404. .info = stac92xx_dmux_enum_info,
  405. .get = stac92xx_dmux_enum_get,
  406. .put = stac92xx_dmux_enum_put,
  407. },
  408. STAC_INPUT_SOURCE(2),
  409. STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0),
  410. STAC_VOLKNOB(0x24),
  411. HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT),
  412. HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT),
  413. HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x19, 0x0, HDA_OUTPUT),
  414. HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1c, 0x0, HDA_INPUT),
  415. HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1e, 0x0, HDA_OUTPUT),
  416. HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x1A, 0x0, HDA_OUTPUT),
  417. { } /* end */
  418. };
  419. /* This needs to be generated dynamically based on sequence */
  420. static struct snd_kcontrol_new stac922x_mixer[] = {
  421. STAC_INPUT_SOURCE(2),
  422. STAC_VOLKNOB(0x16),
  423. HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT),
  424. HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT),
  425. HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x12, 0x0, HDA_OUTPUT),
  426. HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_INPUT),
  427. HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_INPUT),
  428. HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x13, 0x0, HDA_OUTPUT),
  429. { } /* end */
  430. };
  431. static struct snd_kcontrol_new stac927x_mixer[] = {
  432. STAC_INPUT_SOURCE(3),
  433. STAC_VOLKNOB(0x24),
  434. STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB),
  435. HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT),
  436. HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT),
  437. HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x15, 0x0, HDA_OUTPUT),
  438. HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x19, 0x0, HDA_INPUT),
  439. HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1c, 0x0, HDA_OUTPUT),
  440. HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x16, 0x0, HDA_OUTPUT),
  441. HDA_CODEC_VOLUME_IDX("Capture Volume", 0x2, 0x1A, 0x0, HDA_INPUT),
  442. HDA_CODEC_MUTE_IDX("Capture Switch", 0x2, 0x1d, 0x0, HDA_OUTPUT),
  443. HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x2, 0x17, 0x0, HDA_OUTPUT),
  444. { } /* end */
  445. };
  446. static int stac92xx_build_controls(struct hda_codec *codec)
  447. {
  448. struct sigmatel_spec *spec = codec->spec;
  449. int err;
  450. int i;
  451. err = snd_hda_add_new_ctls(codec, spec->mixer);
  452. if (err < 0)
  453. return err;
  454. for (i = 0; i < spec->num_mixers; i++) {
  455. err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
  456. if (err < 0)
  457. return err;
  458. }
  459. if (spec->multiout.dig_out_nid) {
  460. err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
  461. if (err < 0)
  462. return err;
  463. }
  464. if (spec->dig_in_nid) {
  465. err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
  466. if (err < 0)
  467. return err;
  468. }
  469. return 0;
  470. }
  471. static unsigned int ref9200_pin_configs[8] = {
  472. 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
  473. 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
  474. };
  475. /*
  476. STAC 9200 pin configs for
  477. 102801A8
  478. 102801DE
  479. 102801E8
  480. */
  481. static unsigned int dell9200_d21_pin_configs[8] = {
  482. 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
  483. 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
  484. };
  485. /*
  486. STAC 9200 pin configs for
  487. 102801C0
  488. 102801C1
  489. */
  490. static unsigned int dell9200_d22_pin_configs[8] = {
  491. 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
  492. 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
  493. };
  494. /*
  495. STAC 9200 pin configs for
  496. 102801C4 (Dell Dimension E310)
  497. 102801C5
  498. 102801C7
  499. 102801D9
  500. 102801DA
  501. 102801E3
  502. */
  503. static unsigned int dell9200_d23_pin_configs[8] = {
  504. 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
  505. 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
  506. };
  507. /*
  508. STAC 9200-32 pin configs for
  509. 102801B5 (Dell Inspiron 630m)
  510. 102801D8 (Dell Inspiron 640m)
  511. */
  512. static unsigned int dell9200_m21_pin_configs[8] = {
  513. 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
  514. 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
  515. };
  516. /*
  517. STAC 9200-32 pin configs for
  518. 102801C2 (Dell Latitude D620)
  519. 102801C8
  520. 102801CC (Dell Latitude D820)
  521. 102801D4
  522. 102801D6
  523. */
  524. static unsigned int dell9200_m22_pin_configs[8] = {
  525. 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
  526. 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
  527. };
  528. /*
  529. STAC 9200-32 pin configs for
  530. 102801CE (Dell XPS M1710)
  531. 102801CF (Dell Precision M90)
  532. */
  533. static unsigned int dell9200_m23_pin_configs[8] = {
  534. 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
  535. 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
  536. };
  537. /*
  538. STAC 9200-32 pin configs for
  539. 102801C9
  540. 102801CA
  541. 102801CB (Dell Latitude 120L)
  542. 102801D3
  543. */
  544. static unsigned int dell9200_m24_pin_configs[8] = {
  545. 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
  546. 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
  547. };
  548. /*
  549. STAC 9200-32 pin configs for
  550. 102801BD (Dell Inspiron E1505n)
  551. 102801EE
  552. 102801EF
  553. */
  554. static unsigned int dell9200_m25_pin_configs[8] = {
  555. 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
  556. 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
  557. };
  558. /*
  559. STAC 9200-32 pin configs for
  560. 102801F5 (Dell Inspiron 1501)
  561. 102801F6
  562. */
  563. static unsigned int dell9200_m26_pin_configs[8] = {
  564. 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
  565. 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
  566. };
  567. /*
  568. STAC 9200-32
  569. 102801CD (Dell Inspiron E1705/9400)
  570. */
  571. static unsigned int dell9200_m27_pin_configs[8] = {
  572. 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
  573. 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
  574. };
  575. static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
  576. [STAC_REF] = ref9200_pin_configs,
  577. [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
  578. [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
  579. [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
  580. [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
  581. [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
  582. [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
  583. [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
  584. [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
  585. [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
  586. [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
  587. };
  588. static const char *stac9200_models[STAC_9200_MODELS] = {
  589. [STAC_REF] = "ref",
  590. [STAC_9200_DELL_D21] = "dell-d21",
  591. [STAC_9200_DELL_D22] = "dell-d22",
  592. [STAC_9200_DELL_D23] = "dell-d23",
  593. [STAC_9200_DELL_M21] = "dell-m21",
  594. [STAC_9200_DELL_M22] = "dell-m22",
  595. [STAC_9200_DELL_M23] = "dell-m23",
  596. [STAC_9200_DELL_M24] = "dell-m24",
  597. [STAC_9200_DELL_M25] = "dell-m25",
  598. [STAC_9200_DELL_M26] = "dell-m26",
  599. [STAC_9200_DELL_M27] = "dell-m27",
  600. [STAC_9200_GATEWAY] = "gateway",
  601. };
  602. static struct snd_pci_quirk stac9200_cfg_tbl[] = {
  603. /* SigmaTel reference board */
  604. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  605. "DFI LanParty", STAC_REF),
  606. /* Dell laptops have BIOS problem */
  607. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
  608. "unknown Dell", STAC_9200_DELL_D21),
  609. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
  610. "Dell Inspiron 630m", STAC_9200_DELL_M21),
  611. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
  612. "Dell Inspiron E1505n", STAC_9200_DELL_M25),
  613. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
  614. "unknown Dell", STAC_9200_DELL_D22),
  615. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
  616. "unknown Dell", STAC_9200_DELL_D22),
  617. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
  618. "Dell Latitude D620", STAC_9200_DELL_M22),
  619. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
  620. "unknown Dell", STAC_9200_DELL_D23),
  621. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
  622. "unknown Dell", STAC_9200_DELL_D23),
  623. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
  624. "unknown Dell", STAC_9200_DELL_M22),
  625. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
  626. "unknown Dell", STAC_9200_DELL_M24),
  627. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
  628. "unknown Dell", STAC_9200_DELL_M24),
  629. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
  630. "Dell Latitude 120L", STAC_9200_DELL_M24),
  631. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
  632. "Dell Latitude D820", STAC_9200_DELL_M22),
  633. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
  634. "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
  635. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
  636. "Dell XPS M1710", STAC_9200_DELL_M23),
  637. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
  638. "Dell Precision M90", STAC_9200_DELL_M23),
  639. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
  640. "unknown Dell", STAC_9200_DELL_M22),
  641. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
  642. "unknown Dell", STAC_9200_DELL_M22),
  643. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
  644. "unknown Dell", STAC_9200_DELL_M22),
  645. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
  646. "Dell Inspiron 640m", STAC_9200_DELL_M21),
  647. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
  648. "unknown Dell", STAC_9200_DELL_D23),
  649. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
  650. "unknown Dell", STAC_9200_DELL_D23),
  651. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
  652. "unknown Dell", STAC_9200_DELL_D21),
  653. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
  654. "unknown Dell", STAC_9200_DELL_D23),
  655. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
  656. "unknown Dell", STAC_9200_DELL_D21),
  657. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
  658. "unknown Dell", STAC_9200_DELL_M25),
  659. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
  660. "unknown Dell", STAC_9200_DELL_M25),
  661. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
  662. "Dell Inspiron 1501", STAC_9200_DELL_M26),
  663. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
  664. "unknown Dell", STAC_9200_DELL_M26),
  665. /* Panasonic */
  666. SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_REF),
  667. /* Gateway machines needs EAPD to be set on resume */
  668. SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_GATEWAY),
  669. SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*",
  670. STAC_9200_GATEWAY),
  671. SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707",
  672. STAC_9200_GATEWAY),
  673. {} /* terminator */
  674. };
  675. static unsigned int ref925x_pin_configs[8] = {
  676. 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
  677. 0x90a70320, 0x02214210, 0x400003f1, 0x9033032e,
  678. };
  679. static unsigned int stac925x_MA6_pin_configs[8] = {
  680. 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
  681. 0x90a70320, 0x90100211, 0x400003f1, 0x9033032e,
  682. };
  683. static unsigned int stac925x_PA6_pin_configs[8] = {
  684. 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
  685. 0x50a103f0, 0x90100211, 0x400003f1, 0x9033032e,
  686. };
  687. static unsigned int stac925xM2_2_pin_configs[8] = {
  688. 0x40c003f3, 0x424503f2, 0x04180011, 0x02a19020,
  689. 0x50a103f0, 0x90100212, 0x400003f1, 0x9033032e,
  690. };
  691. static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
  692. [STAC_REF] = ref925x_pin_configs,
  693. [STAC_M2_2] = stac925xM2_2_pin_configs,
  694. [STAC_MA6] = stac925x_MA6_pin_configs,
  695. [STAC_PA6] = stac925x_PA6_pin_configs,
  696. };
  697. static const char *stac925x_models[STAC_925x_MODELS] = {
  698. [STAC_REF] = "ref",
  699. [STAC_M2_2] = "m2-2",
  700. [STAC_MA6] = "m6",
  701. [STAC_PA6] = "pa6",
  702. };
  703. static struct snd_pci_quirk stac925x_cfg_tbl[] = {
  704. /* SigmaTel reference board */
  705. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
  706. SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
  707. SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_REF),
  708. SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_REF),
  709. SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_MA6),
  710. SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_PA6),
  711. SND_PCI_QUIRK(0x1002, 0x437b, "Gateway MX6453", STAC_M2_2),
  712. {} /* terminator */
  713. };
  714. static unsigned int ref922x_pin_configs[10] = {
  715. 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
  716. 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
  717. 0x40000100, 0x40000100,
  718. };
  719. /*
  720. STAC 922X pin configs for
  721. 102801A7
  722. 102801AB
  723. 102801A9
  724. 102801D1
  725. 102801D2
  726. */
  727. static unsigned int dell_922x_d81_pin_configs[10] = {
  728. 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
  729. 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
  730. 0x01813122, 0x400001f2,
  731. };
  732. /*
  733. STAC 922X pin configs for
  734. 102801AC
  735. 102801D0
  736. */
  737. static unsigned int dell_922x_d82_pin_configs[10] = {
  738. 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
  739. 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
  740. 0x01813122, 0x400001f1,
  741. };
  742. /*
  743. STAC 922X pin configs for
  744. 102801BF
  745. */
  746. static unsigned int dell_922x_m81_pin_configs[10] = {
  747. 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
  748. 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
  749. 0x40C003f1, 0x405003f0,
  750. };
  751. /*
  752. STAC 9221 A1 pin configs for
  753. 102801D7 (Dell XPS M1210)
  754. */
  755. static unsigned int dell_922x_m82_pin_configs[10] = {
  756. 0x0221121f, 0x408103ff, 0x02111212, 0x90100310,
  757. 0x408003f1, 0x02111211, 0x03451340, 0x40c003f2,
  758. 0x508003f3, 0x405003f4,
  759. };
  760. static unsigned int d945gtp3_pin_configs[10] = {
  761. 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
  762. 0x40000100, 0x40000100, 0x40000100, 0x40000100,
  763. 0x02a19120, 0x40000100,
  764. };
  765. static unsigned int d945gtp5_pin_configs[10] = {
  766. 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
  767. 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
  768. 0x02a19320, 0x40000100,
  769. };
  770. static unsigned int intel_mac_v1_pin_configs[10] = {
  771. 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
  772. 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
  773. 0x400000fc, 0x400000fb,
  774. };
  775. static unsigned int intel_mac_v2_pin_configs[10] = {
  776. 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
  777. 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
  778. 0x400000fc, 0x400000fb,
  779. };
  780. static unsigned int intel_mac_v3_pin_configs[10] = {
  781. 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
  782. 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
  783. 0x400000fc, 0x400000fb,
  784. };
  785. static unsigned int intel_mac_v4_pin_configs[10] = {
  786. 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
  787. 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
  788. 0x400000fc, 0x400000fb,
  789. };
  790. static unsigned int intel_mac_v5_pin_configs[10] = {
  791. 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
  792. 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
  793. 0x400000fc, 0x400000fb,
  794. };
  795. static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
  796. [STAC_D945_REF] = ref922x_pin_configs,
  797. [STAC_D945GTP3] = d945gtp3_pin_configs,
  798. [STAC_D945GTP5] = d945gtp5_pin_configs,
  799. [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
  800. [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
  801. [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
  802. [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
  803. [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
  804. /* for backward compatibility */
  805. [STAC_MACMINI] = intel_mac_v3_pin_configs,
  806. [STAC_MACBOOK] = intel_mac_v5_pin_configs,
  807. [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
  808. [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
  809. [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
  810. [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
  811. [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
  812. [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
  813. [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
  814. [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
  815. };
  816. static const char *stac922x_models[STAC_922X_MODELS] = {
  817. [STAC_D945_REF] = "ref",
  818. [STAC_D945GTP5] = "5stack",
  819. [STAC_D945GTP3] = "3stack",
  820. [STAC_INTEL_MAC_V1] = "intel-mac-v1",
  821. [STAC_INTEL_MAC_V2] = "intel-mac-v2",
  822. [STAC_INTEL_MAC_V3] = "intel-mac-v3",
  823. [STAC_INTEL_MAC_V4] = "intel-mac-v4",
  824. [STAC_INTEL_MAC_V5] = "intel-mac-v5",
  825. /* for backward compatibility */
  826. [STAC_MACMINI] = "macmini",
  827. [STAC_MACBOOK] = "macbook",
  828. [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
  829. [STAC_MACBOOK_PRO_V2] = "macbook-pro",
  830. [STAC_IMAC_INTEL] = "imac-intel",
  831. [STAC_IMAC_INTEL_20] = "imac-intel-20",
  832. [STAC_922X_DELL_D81] = "dell-d81",
  833. [STAC_922X_DELL_D82] = "dell-d82",
  834. [STAC_922X_DELL_M81] = "dell-m81",
  835. [STAC_922X_DELL_M82] = "dell-m82",
  836. };
  837. static struct snd_pci_quirk stac922x_cfg_tbl[] = {
  838. /* SigmaTel reference board */
  839. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  840. "DFI LanParty", STAC_D945_REF),
  841. /* Intel 945G based systems */
  842. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
  843. "Intel D945G", STAC_D945GTP3),
  844. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
  845. "Intel D945G", STAC_D945GTP3),
  846. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
  847. "Intel D945G", STAC_D945GTP3),
  848. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
  849. "Intel D945G", STAC_D945GTP3),
  850. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
  851. "Intel D945G", STAC_D945GTP3),
  852. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
  853. "Intel D945G", STAC_D945GTP3),
  854. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
  855. "Intel D945G", STAC_D945GTP3),
  856. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
  857. "Intel D945G", STAC_D945GTP3),
  858. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
  859. "Intel D945G", STAC_D945GTP3),
  860. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
  861. "Intel D945G", STAC_D945GTP3),
  862. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
  863. "Intel D945G", STAC_D945GTP3),
  864. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
  865. "Intel D945G", STAC_D945GTP3),
  866. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
  867. "Intel D945G", STAC_D945GTP3),
  868. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
  869. "Intel D945G", STAC_D945GTP3),
  870. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
  871. "Intel D945G", STAC_D945GTP3),
  872. /* Intel D945G 5-stack systems */
  873. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
  874. "Intel D945G", STAC_D945GTP5),
  875. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
  876. "Intel D945G", STAC_D945GTP5),
  877. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
  878. "Intel D945G", STAC_D945GTP5),
  879. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
  880. "Intel D945G", STAC_D945GTP5),
  881. /* Intel 945P based systems */
  882. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
  883. "Intel D945P", STAC_D945GTP3),
  884. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
  885. "Intel D945P", STAC_D945GTP3),
  886. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
  887. "Intel D945P", STAC_D945GTP3),
  888. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
  889. "Intel D945P", STAC_D945GTP3),
  890. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
  891. "Intel D945P", STAC_D945GTP3),
  892. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
  893. "Intel D945P", STAC_D945GTP5),
  894. /* other systems */
  895. /* Apple Mac Mini (early 2006) */
  896. SND_PCI_QUIRK(0x8384, 0x7680,
  897. "Mac Mini", STAC_INTEL_MAC_V3),
  898. /* Dell systems */
  899. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
  900. "unknown Dell", STAC_922X_DELL_D81),
  901. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
  902. "unknown Dell", STAC_922X_DELL_D81),
  903. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
  904. "unknown Dell", STAC_922X_DELL_D81),
  905. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
  906. "unknown Dell", STAC_922X_DELL_D82),
  907. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
  908. "unknown Dell", STAC_922X_DELL_M81),
  909. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
  910. "unknown Dell", STAC_922X_DELL_D82),
  911. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
  912. "unknown Dell", STAC_922X_DELL_D81),
  913. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
  914. "unknown Dell", STAC_922X_DELL_D81),
  915. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
  916. "Dell XPS M1210", STAC_922X_DELL_M82),
  917. {} /* terminator */
  918. };
  919. static unsigned int ref927x_pin_configs[14] = {
  920. 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
  921. 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
  922. 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
  923. 0x01c42190, 0x40000100,
  924. };
  925. static unsigned int d965_3st_pin_configs[14] = {
  926. 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
  927. 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
  928. 0x40000100, 0x40000100, 0x40000100, 0x40000100,
  929. 0x40000100, 0x40000100
  930. };
  931. static unsigned int d965_5st_pin_configs[14] = {
  932. 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
  933. 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
  934. 0x40000100, 0x40000100, 0x40000100, 0x01442070,
  935. 0x40000100, 0x40000100
  936. };
  937. static unsigned int dell_3st_pin_configs[14] = {
  938. 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
  939. 0x01111212, 0x01116211, 0x01813050, 0x01112214,
  940. 0x403003fa, 0x40000100, 0x40000100, 0x404003fb,
  941. 0x40c003fc, 0x40000100
  942. };
  943. static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
  944. [STAC_D965_REF] = ref927x_pin_configs,
  945. [STAC_D965_3ST] = d965_3st_pin_configs,
  946. [STAC_D965_5ST] = d965_5st_pin_configs,
  947. [STAC_DELL_3ST] = dell_3st_pin_configs,
  948. };
  949. static const char *stac927x_models[STAC_927X_MODELS] = {
  950. [STAC_D965_REF] = "ref",
  951. [STAC_D965_3ST] = "3stack",
  952. [STAC_D965_5ST] = "5stack",
  953. [STAC_DELL_3ST] = "dell-3stack",
  954. };
  955. static struct snd_pci_quirk stac927x_cfg_tbl[] = {
  956. /* SigmaTel reference board */
  957. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  958. "DFI LanParty", STAC_D965_REF),
  959. /* Intel 946 based systems */
  960. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
  961. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
  962. /* 965 based 3 stack systems */
  963. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
  964. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
  965. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
  966. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
  967. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
  968. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
  969. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
  970. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
  971. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
  972. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
  973. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
  974. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
  975. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
  976. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
  977. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
  978. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
  979. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_D965_3ST),
  980. /* Dell 3 stack systems */
  981. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
  982. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
  983. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
  984. /* 965 based 5 stack systems */
  985. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_D965_5ST),
  986. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
  987. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
  988. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
  989. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
  990. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
  991. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
  992. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
  993. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
  994. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
  995. {} /* terminator */
  996. };
  997. static unsigned int ref9205_pin_configs[12] = {
  998. 0x40000100, 0x40000100, 0x01016011, 0x01014010,
  999. 0x01813122, 0x01a19021, 0x40000100, 0x40000100,
  1000. 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
  1001. };
  1002. /*
  1003. STAC 9205 pin configs for
  1004. 102801F1
  1005. 102801F2
  1006. 102801FC
  1007. 102801FD
  1008. 10280204
  1009. 1028021F
  1010. */
  1011. static unsigned int dell_9205_m42_pin_configs[12] = {
  1012. 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
  1013. 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
  1014. 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
  1015. };
  1016. /*
  1017. STAC 9205 pin configs for
  1018. 102801F9
  1019. 102801FA
  1020. 102801FE
  1021. 102801FF (Dell Precision M4300)
  1022. 10280206
  1023. 10280200
  1024. 10280201
  1025. */
  1026. static unsigned int dell_9205_m43_pin_configs[12] = {
  1027. 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
  1028. 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
  1029. 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
  1030. };
  1031. static unsigned int dell_9205_m44_pin_configs[12] = {
  1032. 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
  1033. 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
  1034. 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
  1035. };
  1036. static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
  1037. [STAC_9205_REF] = ref9205_pin_configs,
  1038. [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
  1039. [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
  1040. [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
  1041. };
  1042. static const char *stac9205_models[STAC_9205_MODELS] = {
  1043. [STAC_9205_REF] = "ref",
  1044. [STAC_9205_DELL_M42] = "dell-m42",
  1045. [STAC_9205_DELL_M43] = "dell-m43",
  1046. [STAC_9205_DELL_M44] = "dell-m44",
  1047. };
  1048. static struct snd_pci_quirk stac9205_cfg_tbl[] = {
  1049. /* SigmaTel reference board */
  1050. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  1051. "DFI LanParty", STAC_9205_REF),
  1052. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
  1053. "unknown Dell", STAC_9205_DELL_M42),
  1054. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
  1055. "unknown Dell", STAC_9205_DELL_M42),
  1056. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
  1057. "Dell Precision", STAC_9205_DELL_M43),
  1058. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
  1059. "Dell Precision", STAC_9205_DELL_M43),
  1060. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
  1061. "Dell Precision", STAC_9205_DELL_M43),
  1062. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
  1063. "Dell Precision", STAC_9205_DELL_M43),
  1064. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
  1065. "Dell Precision", STAC_9205_DELL_M43),
  1066. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
  1067. "unknown Dell", STAC_9205_DELL_M42),
  1068. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
  1069. "unknown Dell", STAC_9205_DELL_M42),
  1070. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
  1071. "Dell Precision", STAC_9205_DELL_M43),
  1072. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
  1073. "Dell Precision M4300", STAC_9205_DELL_M43),
  1074. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
  1075. "Dell Precision", STAC_9205_DELL_M43),
  1076. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
  1077. "Dell Inspiron", STAC_9205_DELL_M44),
  1078. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
  1079. "Dell Inspiron", STAC_9205_DELL_M44),
  1080. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
  1081. "Dell Inspiron", STAC_9205_DELL_M44),
  1082. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
  1083. "Dell Inspiron", STAC_9205_DELL_M44),
  1084. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
  1085. "unknown Dell", STAC_9205_DELL_M42),
  1086. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
  1087. "Dell Inspiron", STAC_9205_DELL_M44),
  1088. {} /* terminator */
  1089. };
  1090. static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
  1091. {
  1092. int i;
  1093. struct sigmatel_spec *spec = codec->spec;
  1094. if (! spec->bios_pin_configs) {
  1095. spec->bios_pin_configs = kcalloc(spec->num_pins,
  1096. sizeof(*spec->bios_pin_configs), GFP_KERNEL);
  1097. if (! spec->bios_pin_configs)
  1098. return -ENOMEM;
  1099. }
  1100. for (i = 0; i < spec->num_pins; i++) {
  1101. hda_nid_t nid = spec->pin_nids[i];
  1102. unsigned int pin_cfg;
  1103. pin_cfg = snd_hda_codec_read(codec, nid, 0,
  1104. AC_VERB_GET_CONFIG_DEFAULT, 0x00);
  1105. snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
  1106. nid, pin_cfg);
  1107. spec->bios_pin_configs[i] = pin_cfg;
  1108. }
  1109. return 0;
  1110. }
  1111. static void stac92xx_set_config_reg(struct hda_codec *codec,
  1112. hda_nid_t pin_nid, unsigned int pin_config)
  1113. {
  1114. int i;
  1115. snd_hda_codec_write(codec, pin_nid, 0,
  1116. AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
  1117. pin_config & 0x000000ff);
  1118. snd_hda_codec_write(codec, pin_nid, 0,
  1119. AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
  1120. (pin_config & 0x0000ff00) >> 8);
  1121. snd_hda_codec_write(codec, pin_nid, 0,
  1122. AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
  1123. (pin_config & 0x00ff0000) >> 16);
  1124. snd_hda_codec_write(codec, pin_nid, 0,
  1125. AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
  1126. pin_config >> 24);
  1127. i = snd_hda_codec_read(codec, pin_nid, 0,
  1128. AC_VERB_GET_CONFIG_DEFAULT,
  1129. 0x00);
  1130. snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
  1131. pin_nid, i);
  1132. }
  1133. static void stac92xx_set_config_regs(struct hda_codec *codec)
  1134. {
  1135. int i;
  1136. struct sigmatel_spec *spec = codec->spec;
  1137. if (!spec->pin_configs)
  1138. return;
  1139. for (i = 0; i < spec->num_pins; i++)
  1140. stac92xx_set_config_reg(codec, spec->pin_nids[i],
  1141. spec->pin_configs[i]);
  1142. }
  1143. static void stac92xx_enable_gpio_mask(struct hda_codec *codec)
  1144. {
  1145. struct sigmatel_spec *spec = codec->spec;
  1146. /* Configure GPIOx as output */
  1147. snd_hda_codec_write_cache(codec, codec->afg, 0,
  1148. AC_VERB_SET_GPIO_DIRECTION, spec->gpio_mask);
  1149. /* Configure GPIOx as CMOS */
  1150. snd_hda_codec_write_cache(codec, codec->afg, 0, 0x7e7, 0x00000000);
  1151. /* Assert GPIOx */
  1152. snd_hda_codec_write_cache(codec, codec->afg, 0,
  1153. AC_VERB_SET_GPIO_DATA, spec->gpio_data);
  1154. /* Enable GPIOx */
  1155. snd_hda_codec_write_cache(codec, codec->afg, 0,
  1156. AC_VERB_SET_GPIO_MASK, spec->gpio_mask);
  1157. }
  1158. /*
  1159. * Analog playback callbacks
  1160. */
  1161. static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
  1162. struct hda_codec *codec,
  1163. struct snd_pcm_substream *substream)
  1164. {
  1165. struct sigmatel_spec *spec = codec->spec;
  1166. return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream);
  1167. }
  1168. static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
  1169. struct hda_codec *codec,
  1170. unsigned int stream_tag,
  1171. unsigned int format,
  1172. struct snd_pcm_substream *substream)
  1173. {
  1174. struct sigmatel_spec *spec = codec->spec;
  1175. return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
  1176. }
  1177. static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
  1178. struct hda_codec *codec,
  1179. struct snd_pcm_substream *substream)
  1180. {
  1181. struct sigmatel_spec *spec = codec->spec;
  1182. return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
  1183. }
  1184. /*
  1185. * Digital playback callbacks
  1186. */
  1187. static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
  1188. struct hda_codec *codec,
  1189. struct snd_pcm_substream *substream)
  1190. {
  1191. struct sigmatel_spec *spec = codec->spec;
  1192. return snd_hda_multi_out_dig_open(codec, &spec->multiout);
  1193. }
  1194. static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
  1195. struct hda_codec *codec,
  1196. struct snd_pcm_substream *substream)
  1197. {
  1198. struct sigmatel_spec *spec = codec->spec;
  1199. return snd_hda_multi_out_dig_close(codec, &spec->multiout);
  1200. }
  1201. static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
  1202. struct hda_codec *codec,
  1203. unsigned int stream_tag,
  1204. unsigned int format,
  1205. struct snd_pcm_substream *substream)
  1206. {
  1207. struct sigmatel_spec *spec = codec->spec;
  1208. return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
  1209. stream_tag, format, substream);
  1210. }
  1211. /*
  1212. * Analog capture callbacks
  1213. */
  1214. static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
  1215. struct hda_codec *codec,
  1216. unsigned int stream_tag,
  1217. unsigned int format,
  1218. struct snd_pcm_substream *substream)
  1219. {
  1220. struct sigmatel_spec *spec = codec->spec;
  1221. snd_hda_codec_setup_stream(codec, spec->adc_nids[substream->number],
  1222. stream_tag, 0, format);
  1223. return 0;
  1224. }
  1225. static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
  1226. struct hda_codec *codec,
  1227. struct snd_pcm_substream *substream)
  1228. {
  1229. struct sigmatel_spec *spec = codec->spec;
  1230. snd_hda_codec_setup_stream(codec, spec->adc_nids[substream->number], 0, 0, 0);
  1231. return 0;
  1232. }
  1233. static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
  1234. .substreams = 1,
  1235. .channels_min = 2,
  1236. .channels_max = 2,
  1237. /* NID is set in stac92xx_build_pcms */
  1238. .ops = {
  1239. .open = stac92xx_dig_playback_pcm_open,
  1240. .close = stac92xx_dig_playback_pcm_close,
  1241. .prepare = stac92xx_dig_playback_pcm_prepare
  1242. },
  1243. };
  1244. static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
  1245. .substreams = 1,
  1246. .channels_min = 2,
  1247. .channels_max = 2,
  1248. /* NID is set in stac92xx_build_pcms */
  1249. };
  1250. static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
  1251. .substreams = 1,
  1252. .channels_min = 2,
  1253. .channels_max = 8,
  1254. .nid = 0x02, /* NID to query formats and rates */
  1255. .ops = {
  1256. .open = stac92xx_playback_pcm_open,
  1257. .prepare = stac92xx_playback_pcm_prepare,
  1258. .cleanup = stac92xx_playback_pcm_cleanup
  1259. },
  1260. };
  1261. static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
  1262. .substreams = 1,
  1263. .channels_min = 2,
  1264. .channels_max = 2,
  1265. .nid = 0x06, /* NID to query formats and rates */
  1266. .ops = {
  1267. .open = stac92xx_playback_pcm_open,
  1268. .prepare = stac92xx_playback_pcm_prepare,
  1269. .cleanup = stac92xx_playback_pcm_cleanup
  1270. },
  1271. };
  1272. static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
  1273. .channels_min = 2,
  1274. .channels_max = 2,
  1275. /* NID + .substreams is set in stac92xx_build_pcms */
  1276. .ops = {
  1277. .prepare = stac92xx_capture_pcm_prepare,
  1278. .cleanup = stac92xx_capture_pcm_cleanup
  1279. },
  1280. };
  1281. static int stac92xx_build_pcms(struct hda_codec *codec)
  1282. {
  1283. struct sigmatel_spec *spec = codec->spec;
  1284. struct hda_pcm *info = spec->pcm_rec;
  1285. codec->num_pcms = 1;
  1286. codec->pcm_info = info;
  1287. info->name = "STAC92xx Analog";
  1288. info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
  1289. info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
  1290. info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
  1291. info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
  1292. if (spec->alt_switch) {
  1293. codec->num_pcms++;
  1294. info++;
  1295. info->name = "STAC92xx Analog Alt";
  1296. info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
  1297. }
  1298. if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
  1299. codec->num_pcms++;
  1300. info++;
  1301. info->name = "STAC92xx Digital";
  1302. if (spec->multiout.dig_out_nid) {
  1303. info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
  1304. info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
  1305. }
  1306. if (spec->dig_in_nid) {
  1307. info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
  1308. info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
  1309. }
  1310. }
  1311. return 0;
  1312. }
  1313. static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
  1314. {
  1315. unsigned int pincap = snd_hda_param_read(codec, nid,
  1316. AC_PAR_PIN_CAP);
  1317. pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
  1318. if (pincap & AC_PINCAP_VREF_100)
  1319. return AC_PINCTL_VREF_100;
  1320. if (pincap & AC_PINCAP_VREF_80)
  1321. return AC_PINCTL_VREF_80;
  1322. if (pincap & AC_PINCAP_VREF_50)
  1323. return AC_PINCTL_VREF_50;
  1324. if (pincap & AC_PINCAP_VREF_GRD)
  1325. return AC_PINCTL_VREF_GRD;
  1326. return 0;
  1327. }
  1328. static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
  1329. {
  1330. snd_hda_codec_write_cache(codec, nid, 0,
  1331. AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
  1332. }
  1333. #define stac92xx_io_switch_info snd_ctl_boolean_mono_info
  1334. static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1335. {
  1336. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  1337. struct sigmatel_spec *spec = codec->spec;
  1338. int io_idx = kcontrol-> private_value & 0xff;
  1339. ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
  1340. return 0;
  1341. }
  1342. static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1343. {
  1344. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  1345. struct sigmatel_spec *spec = codec->spec;
  1346. hda_nid_t nid = kcontrol->private_value >> 8;
  1347. int io_idx = kcontrol-> private_value & 0xff;
  1348. unsigned short val = ucontrol->value.integer.value[0];
  1349. spec->io_switch[io_idx] = val;
  1350. if (val)
  1351. stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
  1352. else {
  1353. unsigned int pinctl = AC_PINCTL_IN_EN;
  1354. if (io_idx) /* set VREF for mic */
  1355. pinctl |= stac92xx_get_vref(codec, nid);
  1356. stac92xx_auto_set_pinctl(codec, nid, pinctl);
  1357. }
  1358. return 1;
  1359. }
  1360. #define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
  1361. static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
  1362. struct snd_ctl_elem_value *ucontrol)
  1363. {
  1364. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  1365. struct sigmatel_spec *spec = codec->spec;
  1366. ucontrol->value.integer.value[0] = spec->clfe_swap;
  1367. return 0;
  1368. }
  1369. static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
  1370. struct snd_ctl_elem_value *ucontrol)
  1371. {
  1372. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  1373. struct sigmatel_spec *spec = codec->spec;
  1374. hda_nid_t nid = kcontrol->private_value & 0xff;
  1375. if (spec->clfe_swap == ucontrol->value.integer.value[0])
  1376. return 0;
  1377. spec->clfe_swap = ucontrol->value.integer.value[0];
  1378. snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
  1379. spec->clfe_swap ? 0x4 : 0x0);
  1380. return 1;
  1381. }
  1382. #define STAC_CODEC_IO_SWITCH(xname, xpval) \
  1383. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
  1384. .name = xname, \
  1385. .index = 0, \
  1386. .info = stac92xx_io_switch_info, \
  1387. .get = stac92xx_io_switch_get, \
  1388. .put = stac92xx_io_switch_put, \
  1389. .private_value = xpval, \
  1390. }
  1391. #define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
  1392. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
  1393. .name = xname, \
  1394. .index = 0, \
  1395. .info = stac92xx_clfe_switch_info, \
  1396. .get = stac92xx_clfe_switch_get, \
  1397. .put = stac92xx_clfe_switch_put, \
  1398. .private_value = xpval, \
  1399. }
  1400. enum {
  1401. STAC_CTL_WIDGET_VOL,
  1402. STAC_CTL_WIDGET_MUTE,
  1403. STAC_CTL_WIDGET_IO_SWITCH,
  1404. STAC_CTL_WIDGET_CLFE_SWITCH
  1405. };
  1406. static struct snd_kcontrol_new stac92xx_control_templates[] = {
  1407. HDA_CODEC_VOLUME(NULL, 0, 0, 0),
  1408. HDA_CODEC_MUTE(NULL, 0, 0, 0),
  1409. STAC_CODEC_IO_SWITCH(NULL, 0),
  1410. STAC_CODEC_CLFE_SWITCH(NULL, 0),
  1411. };
  1412. /* add dynamic controls */
  1413. static int stac92xx_add_control(struct sigmatel_spec *spec, int type, const char *name, unsigned long val)
  1414. {
  1415. struct snd_kcontrol_new *knew;
  1416. if (spec->num_kctl_used >= spec->num_kctl_alloc) {
  1417. int num = spec->num_kctl_alloc + NUM_CONTROL_ALLOC;
  1418. knew = kcalloc(num + 1, sizeof(*knew), GFP_KERNEL); /* array + terminator */
  1419. if (! knew)
  1420. return -ENOMEM;
  1421. if (spec->kctl_alloc) {
  1422. memcpy(knew, spec->kctl_alloc, sizeof(*knew) * spec->num_kctl_alloc);
  1423. kfree(spec->kctl_alloc);
  1424. }
  1425. spec->kctl_alloc = knew;
  1426. spec->num_kctl_alloc = num;
  1427. }
  1428. knew = &spec->kctl_alloc[spec->num_kctl_used];
  1429. *knew = stac92xx_control_templates[type];
  1430. knew->name = kstrdup(name, GFP_KERNEL);
  1431. if (! knew->name)
  1432. return -ENOMEM;
  1433. knew->private_value = val;
  1434. spec->num_kctl_used++;
  1435. return 0;
  1436. }
  1437. /* flag inputs as additional dynamic lineouts */
  1438. static int stac92xx_add_dyn_out_pins(struct hda_codec *codec, struct auto_pin_cfg *cfg)
  1439. {
  1440. struct sigmatel_spec *spec = codec->spec;
  1441. unsigned int wcaps, wtype;
  1442. int i, num_dacs = 0;
  1443. /* use the wcaps cache to count all DACs available for line-outs */
  1444. for (i = 0; i < codec->num_nodes; i++) {
  1445. wcaps = codec->wcaps[i];
  1446. wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
  1447. if (wtype == AC_WID_AUD_OUT && !(wcaps & AC_WCAP_DIGITAL))
  1448. num_dacs++;
  1449. }
  1450. snd_printdd("%s: total dac count=%d\n", __func__, num_dacs);
  1451. switch (cfg->line_outs) {
  1452. case 3:
  1453. /* add line-in as side */
  1454. if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 3) {
  1455. cfg->line_out_pins[cfg->line_outs] =
  1456. cfg->input_pins[AUTO_PIN_LINE];
  1457. spec->line_switch = 1;
  1458. cfg->line_outs++;
  1459. }
  1460. break;
  1461. case 2:
  1462. /* add line-in as clfe and mic as side */
  1463. if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 2) {
  1464. cfg->line_out_pins[cfg->line_outs] =
  1465. cfg->input_pins[AUTO_PIN_LINE];
  1466. spec->line_switch = 1;
  1467. cfg->line_outs++;
  1468. }
  1469. if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 3) {
  1470. cfg->line_out_pins[cfg->line_outs] =
  1471. cfg->input_pins[AUTO_PIN_MIC];
  1472. spec->mic_switch = 1;
  1473. cfg->line_outs++;
  1474. }
  1475. break;
  1476. case 1:
  1477. /* add line-in as surr and mic as clfe */
  1478. if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 1) {
  1479. cfg->line_out_pins[cfg->line_outs] =
  1480. cfg->input_pins[AUTO_PIN_LINE];
  1481. spec->line_switch = 1;
  1482. cfg->line_outs++;
  1483. }
  1484. if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 2) {
  1485. cfg->line_out_pins[cfg->line_outs] =
  1486. cfg->input_pins[AUTO_PIN_MIC];
  1487. spec->mic_switch = 1;
  1488. cfg->line_outs++;
  1489. }
  1490. break;
  1491. }
  1492. return 0;
  1493. }
  1494. static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
  1495. {
  1496. int i;
  1497. for (i = 0; i < spec->multiout.num_dacs; i++) {
  1498. if (spec->multiout.dac_nids[i] == nid)
  1499. return 1;
  1500. }
  1501. return 0;
  1502. }
  1503. /*
  1504. * Fill in the dac_nids table from the parsed pin configuration
  1505. * This function only works when every pin in line_out_pins[]
  1506. * contains atleast one DAC in its connection list. Some 92xx
  1507. * codecs are not connected directly to a DAC, such as the 9200
  1508. * and 9202/925x. For those, dac_nids[] must be hard-coded.
  1509. */
  1510. static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec,
  1511. struct auto_pin_cfg *cfg)
  1512. {
  1513. struct sigmatel_spec *spec = codec->spec;
  1514. int i, j, conn_len = 0;
  1515. hda_nid_t nid, conn[HDA_MAX_CONNECTIONS];
  1516. unsigned int wcaps, wtype;
  1517. for (i = 0; i < cfg->line_outs; i++) {
  1518. nid = cfg->line_out_pins[i];
  1519. conn_len = snd_hda_get_connections(codec, nid, conn,
  1520. HDA_MAX_CONNECTIONS);
  1521. for (j = 0; j < conn_len; j++) {
  1522. wcaps = snd_hda_param_read(codec, conn[j],
  1523. AC_PAR_AUDIO_WIDGET_CAP);
  1524. wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
  1525. if (wtype != AC_WID_AUD_OUT ||
  1526. (wcaps & AC_WCAP_DIGITAL))
  1527. continue;
  1528. /* conn[j] is a DAC routed to this line-out */
  1529. if (!is_in_dac_nids(spec, conn[j]))
  1530. break;
  1531. }
  1532. if (j == conn_len) {
  1533. if (spec->multiout.num_dacs > 0) {
  1534. /* we have already working output pins,
  1535. * so let's drop the broken ones again
  1536. */
  1537. cfg->line_outs = spec->multiout.num_dacs;
  1538. break;
  1539. }
  1540. /* error out, no available DAC found */
  1541. snd_printk(KERN_ERR
  1542. "%s: No available DAC for pin 0x%x\n",
  1543. __func__, nid);
  1544. return -ENODEV;
  1545. }
  1546. spec->multiout.dac_nids[i] = conn[j];
  1547. spec->multiout.num_dacs++;
  1548. if (conn_len > 1) {
  1549. /* select this DAC in the pin's input mux */
  1550. snd_hda_codec_write_cache(codec, nid, 0,
  1551. AC_VERB_SET_CONNECT_SEL, j);
  1552. }
  1553. }
  1554. snd_printd("dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
  1555. spec->multiout.num_dacs,
  1556. spec->multiout.dac_nids[0],
  1557. spec->multiout.dac_nids[1],
  1558. spec->multiout.dac_nids[2],
  1559. spec->multiout.dac_nids[3],
  1560. spec->multiout.dac_nids[4]);
  1561. return 0;
  1562. }
  1563. /* create volume control/switch for the given prefx type */
  1564. static int create_controls(struct sigmatel_spec *spec, const char *pfx, hda_nid_t nid, int chs)
  1565. {
  1566. char name[32];
  1567. int err;
  1568. sprintf(name, "%s Playback Volume", pfx);
  1569. err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
  1570. HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
  1571. if (err < 0)
  1572. return err;
  1573. sprintf(name, "%s Playback Switch", pfx);
  1574. err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
  1575. HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
  1576. if (err < 0)
  1577. return err;
  1578. return 0;
  1579. }
  1580. /* add playback controls from the parsed DAC table */
  1581. static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
  1582. const struct auto_pin_cfg *cfg)
  1583. {
  1584. static const char *chname[4] = {
  1585. "Front", "Surround", NULL /*CLFE*/, "Side"
  1586. };
  1587. hda_nid_t nid;
  1588. int i, err;
  1589. struct sigmatel_spec *spec = codec->spec;
  1590. unsigned int wid_caps;
  1591. for (i = 0; i < cfg->line_outs; i++) {
  1592. if (!spec->multiout.dac_nids[i])
  1593. continue;
  1594. nid = spec->multiout.dac_nids[i];
  1595. if (i == 2) {
  1596. /* Center/LFE */
  1597. err = create_controls(spec, "Center", nid, 1);
  1598. if (err < 0)
  1599. return err;
  1600. err = create_controls(spec, "LFE", nid, 2);
  1601. if (err < 0)
  1602. return err;
  1603. wid_caps = get_wcaps(codec, nid);
  1604. if (wid_caps & AC_WCAP_LR_SWAP) {
  1605. err = stac92xx_add_control(spec,
  1606. STAC_CTL_WIDGET_CLFE_SWITCH,
  1607. "Swap Center/LFE Playback Switch", nid);
  1608. if (err < 0)
  1609. return err;
  1610. }
  1611. } else {
  1612. err = create_controls(spec, chname[i], nid, 3);
  1613. if (err < 0)
  1614. return err;
  1615. }
  1616. }
  1617. if (spec->line_switch)
  1618. if ((err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH, "Line In as Output Switch", cfg->input_pins[AUTO_PIN_LINE] << 8)) < 0)
  1619. return err;
  1620. if (spec->mic_switch)
  1621. if ((err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH, "Mic as Output Switch", (cfg->input_pins[AUTO_PIN_MIC] << 8) | 1)) < 0)
  1622. return err;
  1623. return 0;
  1624. }
  1625. static int check_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
  1626. {
  1627. if (is_in_dac_nids(spec, nid))
  1628. return 1;
  1629. if (spec->multiout.hp_nid == nid)
  1630. return 1;
  1631. return 0;
  1632. }
  1633. static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
  1634. {
  1635. if (!spec->multiout.hp_nid)
  1636. spec->multiout.hp_nid = nid;
  1637. else if (spec->multiout.num_dacs > 4) {
  1638. printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
  1639. return 1;
  1640. } else {
  1641. spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
  1642. spec->multiout.num_dacs++;
  1643. }
  1644. return 0;
  1645. }
  1646. /* add playback controls for Speaker and HP outputs */
  1647. static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
  1648. struct auto_pin_cfg *cfg)
  1649. {
  1650. struct sigmatel_spec *spec = codec->spec;
  1651. hda_nid_t nid;
  1652. int i, old_num_dacs, err;
  1653. old_num_dacs = spec->multiout.num_dacs;
  1654. for (i = 0; i < cfg->hp_outs; i++) {
  1655. unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
  1656. if (wid_caps & AC_WCAP_UNSOL_CAP)
  1657. spec->hp_detect = 1;
  1658. nid = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
  1659. AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
  1660. if (check_in_dac_nids(spec, nid))
  1661. nid = 0;
  1662. if (! nid)
  1663. continue;
  1664. add_spec_dacs(spec, nid);
  1665. }
  1666. for (i = 0; i < cfg->speaker_outs; i++) {
  1667. nid = snd_hda_codec_read(codec, cfg->speaker_pins[i], 0,
  1668. AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
  1669. if (check_in_dac_nids(spec, nid))
  1670. nid = 0;
  1671. if (! nid)
  1672. continue;
  1673. add_spec_dacs(spec, nid);
  1674. }
  1675. for (i = 0; i < cfg->line_outs; i++) {
  1676. nid = snd_hda_codec_read(codec, cfg->line_out_pins[i], 0,
  1677. AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
  1678. if (check_in_dac_nids(spec, nid))
  1679. nid = 0;
  1680. if (! nid)
  1681. continue;
  1682. add_spec_dacs(spec, nid);
  1683. }
  1684. for (i = old_num_dacs; i < spec->multiout.num_dacs; i++) {
  1685. static const char *pfxs[] = {
  1686. "Speaker", "External Speaker", "Speaker2",
  1687. };
  1688. err = create_controls(spec, pfxs[i - old_num_dacs],
  1689. spec->multiout.dac_nids[i], 3);
  1690. if (err < 0)
  1691. return err;
  1692. }
  1693. if (spec->multiout.hp_nid) {
  1694. const char *pfx;
  1695. if (old_num_dacs == spec->multiout.num_dacs)
  1696. pfx = "Master";
  1697. else
  1698. pfx = "Headphone";
  1699. err = create_controls(spec, pfx, spec->multiout.hp_nid, 3);
  1700. if (err < 0)
  1701. return err;
  1702. }
  1703. return 0;
  1704. }
  1705. /* labels for dmic mux inputs */
  1706. static const char *stac92xx_dmic_labels[5] = {
  1707. "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
  1708. "Digital Mic 3", "Digital Mic 4"
  1709. };
  1710. /* create playback/capture controls for input pins on dmic capable codecs */
  1711. static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
  1712. const struct auto_pin_cfg *cfg)
  1713. {
  1714. struct sigmatel_spec *spec = codec->spec;
  1715. struct hda_input_mux *dimux = &spec->private_dimux;
  1716. hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
  1717. int i, j;
  1718. dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
  1719. dimux->items[dimux->num_items].index = 0;
  1720. dimux->num_items++;
  1721. for (i = 0; i < spec->num_dmics; i++) {
  1722. int index;
  1723. int num_cons;
  1724. unsigned int def_conf;
  1725. def_conf = snd_hda_codec_read(codec,
  1726. spec->dmic_nids[i],
  1727. 0,
  1728. AC_VERB_GET_CONFIG_DEFAULT,
  1729. 0);
  1730. if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
  1731. continue;
  1732. num_cons = snd_hda_get_connections(codec,
  1733. spec->dmux_nid,
  1734. con_lst,
  1735. HDA_MAX_NUM_INPUTS);
  1736. for (j = 0; j < num_cons; j++)
  1737. if (con_lst[j] == spec->dmic_nids[i]) {
  1738. index = j;
  1739. goto found;
  1740. }
  1741. continue;
  1742. found:
  1743. dimux->items[dimux->num_items].label =
  1744. stac92xx_dmic_labels[dimux->num_items];
  1745. dimux->items[dimux->num_items].index = index;
  1746. dimux->num_items++;
  1747. }
  1748. return 0;
  1749. }
  1750. /* create playback/capture controls for input pins */
  1751. static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
  1752. {
  1753. struct sigmatel_spec *spec = codec->spec;
  1754. struct hda_input_mux *imux = &spec->private_imux;
  1755. hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
  1756. int i, j, k;
  1757. for (i = 0; i < AUTO_PIN_LAST; i++) {
  1758. int index;
  1759. if (!cfg->input_pins[i])
  1760. continue;
  1761. index = -1;
  1762. for (j = 0; j < spec->num_muxes; j++) {
  1763. int num_cons;
  1764. num_cons = snd_hda_get_connections(codec,
  1765. spec->mux_nids[j],
  1766. con_lst,
  1767. HDA_MAX_NUM_INPUTS);
  1768. for (k = 0; k < num_cons; k++)
  1769. if (con_lst[k] == cfg->input_pins[i]) {
  1770. index = k;
  1771. goto found;
  1772. }
  1773. }
  1774. continue;
  1775. found:
  1776. imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
  1777. imux->items[imux->num_items].index = index;
  1778. imux->num_items++;
  1779. }
  1780. if (imux->num_items) {
  1781. /*
  1782. * Set the current input for the muxes.
  1783. * The STAC9221 has two input muxes with identical source
  1784. * NID lists. Hopefully this won't get confused.
  1785. */
  1786. for (i = 0; i < spec->num_muxes; i++) {
  1787. snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
  1788. AC_VERB_SET_CONNECT_SEL,
  1789. imux->items[0].index);
  1790. }
  1791. }
  1792. return 0;
  1793. }
  1794. static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
  1795. {
  1796. struct sigmatel_spec *spec = codec->spec;
  1797. int i;
  1798. for (i = 0; i < spec->autocfg.line_outs; i++) {
  1799. hda_nid_t nid = spec->autocfg.line_out_pins[i];
  1800. stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
  1801. }
  1802. }
  1803. static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
  1804. {
  1805. struct sigmatel_spec *spec = codec->spec;
  1806. int i;
  1807. for (i = 0; i < spec->autocfg.hp_outs; i++) {
  1808. hda_nid_t pin;
  1809. pin = spec->autocfg.hp_pins[i];
  1810. if (pin) /* connect to front */
  1811. stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
  1812. }
  1813. for (i = 0; i < spec->autocfg.speaker_outs; i++) {
  1814. hda_nid_t pin;
  1815. pin = spec->autocfg.speaker_pins[i];
  1816. if (pin) /* connect to front */
  1817. stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
  1818. }
  1819. }
  1820. static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
  1821. {
  1822. struct sigmatel_spec *spec = codec->spec;
  1823. int err;
  1824. if ((err = snd_hda_parse_pin_def_config(codec,
  1825. &spec->autocfg,
  1826. spec->dmic_nids)) < 0)
  1827. return err;
  1828. if (! spec->autocfg.line_outs)
  1829. return 0; /* can't find valid pin config */
  1830. if ((err = stac92xx_add_dyn_out_pins(codec, &spec->autocfg)) < 0)
  1831. return err;
  1832. if (spec->multiout.num_dacs == 0)
  1833. if ((err = stac92xx_auto_fill_dac_nids(codec, &spec->autocfg)) < 0)
  1834. return err;
  1835. err = stac92xx_auto_create_multi_out_ctls(codec, &spec->autocfg);
  1836. if (err < 0)
  1837. return err;
  1838. err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
  1839. if (err < 0)
  1840. return err;
  1841. err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
  1842. if (err < 0)
  1843. return err;
  1844. if (spec->num_dmics > 0)
  1845. if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
  1846. &spec->autocfg)) < 0)
  1847. return err;
  1848. spec->multiout.max_channels = spec->multiout.num_dacs * 2;
  1849. if (spec->multiout.max_channels > 2)
  1850. spec->surr_switch = 1;
  1851. if (spec->autocfg.dig_out_pin)
  1852. spec->multiout.dig_out_nid = dig_out;
  1853. if (spec->autocfg.dig_in_pin)
  1854. spec->dig_in_nid = dig_in;
  1855. if (spec->kctl_alloc)
  1856. spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
  1857. spec->input_mux = &spec->private_imux;
  1858. spec->dinput_mux = &spec->private_dimux;
  1859. return 1;
  1860. }
  1861. /* add playback controls for HP output */
  1862. static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
  1863. struct auto_pin_cfg *cfg)
  1864. {
  1865. struct sigmatel_spec *spec = codec->spec;
  1866. hda_nid_t pin = cfg->hp_pins[0];
  1867. unsigned int wid_caps;
  1868. if (! pin)
  1869. return 0;
  1870. wid_caps = get_wcaps(codec, pin);
  1871. if (wid_caps & AC_WCAP_UNSOL_CAP)
  1872. spec->hp_detect = 1;
  1873. return 0;
  1874. }
  1875. /* add playback controls for LFE output */
  1876. static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
  1877. struct auto_pin_cfg *cfg)
  1878. {
  1879. struct sigmatel_spec *spec = codec->spec;
  1880. int err;
  1881. hda_nid_t lfe_pin = 0x0;
  1882. int i;
  1883. /*
  1884. * search speaker outs and line outs for a mono speaker pin
  1885. * with an amp. If one is found, add LFE controls
  1886. * for it.
  1887. */
  1888. for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
  1889. hda_nid_t pin = spec->autocfg.speaker_pins[i];
  1890. unsigned long wcaps = get_wcaps(codec, pin);
  1891. wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
  1892. if (wcaps == AC_WCAP_OUT_AMP)
  1893. /* found a mono speaker with an amp, must be lfe */
  1894. lfe_pin = pin;
  1895. }
  1896. /* if speaker_outs is 0, then speakers may be in line_outs */
  1897. if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
  1898. for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
  1899. hda_nid_t pin = spec->autocfg.line_out_pins[i];
  1900. unsigned long cfg;
  1901. cfg = snd_hda_codec_read(codec, pin, 0,
  1902. AC_VERB_GET_CONFIG_DEFAULT,
  1903. 0x00);
  1904. if (get_defcfg_device(cfg) == AC_JACK_SPEAKER) {
  1905. unsigned long wcaps = get_wcaps(codec, pin);
  1906. wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
  1907. if (wcaps == AC_WCAP_OUT_AMP)
  1908. /* found a mono speaker with an amp,
  1909. must be lfe */
  1910. lfe_pin = pin;
  1911. }
  1912. }
  1913. }
  1914. if (lfe_pin) {
  1915. err = create_controls(spec, "LFE", lfe_pin, 1);
  1916. if (err < 0)
  1917. return err;
  1918. }
  1919. return 0;
  1920. }
  1921. static int stac9200_parse_auto_config(struct hda_codec *codec)
  1922. {
  1923. struct sigmatel_spec *spec = codec->spec;
  1924. int err;
  1925. if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
  1926. return err;
  1927. if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
  1928. return err;
  1929. if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
  1930. return err;
  1931. if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
  1932. return err;
  1933. if (spec->autocfg.dig_out_pin)
  1934. spec->multiout.dig_out_nid = 0x05;
  1935. if (spec->autocfg.dig_in_pin)
  1936. spec->dig_in_nid = 0x04;
  1937. if (spec->kctl_alloc)
  1938. spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
  1939. spec->input_mux = &spec->private_imux;
  1940. spec->dinput_mux = &spec->private_dimux;
  1941. return 1;
  1942. }
  1943. /*
  1944. * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
  1945. * funky external mute control using GPIO pins.
  1946. */
  1947. static void stac922x_gpio_mute(struct hda_codec *codec, int pin, int muted)
  1948. {
  1949. unsigned int gpiostate, gpiomask, gpiodir;
  1950. gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
  1951. AC_VERB_GET_GPIO_DATA, 0);
  1952. if (!muted)
  1953. gpiostate |= (1 << pin);
  1954. else
  1955. gpiostate &= ~(1 << pin);
  1956. gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
  1957. AC_VERB_GET_GPIO_MASK, 0);
  1958. gpiomask |= (1 << pin);
  1959. gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
  1960. AC_VERB_GET_GPIO_DIRECTION, 0);
  1961. gpiodir |= (1 << pin);
  1962. /* AppleHDA seems to do this -- WTF is this verb?? */
  1963. snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
  1964. snd_hda_codec_write(codec, codec->afg, 0,
  1965. AC_VERB_SET_GPIO_MASK, gpiomask);
  1966. snd_hda_codec_write(codec, codec->afg, 0,
  1967. AC_VERB_SET_GPIO_DIRECTION, gpiodir);
  1968. msleep(1);
  1969. snd_hda_codec_write(codec, codec->afg, 0,
  1970. AC_VERB_SET_GPIO_DATA, gpiostate);
  1971. }
  1972. static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
  1973. unsigned int event)
  1974. {
  1975. if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP)
  1976. snd_hda_codec_write_cache(codec, nid, 0,
  1977. AC_VERB_SET_UNSOLICITED_ENABLE,
  1978. (AC_USRSP_EN | event));
  1979. }
  1980. static int stac92xx_init(struct hda_codec *codec)
  1981. {
  1982. struct sigmatel_spec *spec = codec->spec;
  1983. struct auto_pin_cfg *cfg = &spec->autocfg;
  1984. int i;
  1985. snd_hda_sequence_write(codec, spec->init);
  1986. /* set up pins */
  1987. if (spec->hp_detect) {
  1988. /* Enable unsolicited responses on the HP widget */
  1989. for (i = 0; i < cfg->hp_outs; i++)
  1990. enable_pin_detect(codec, cfg->hp_pins[i],
  1991. STAC_HP_EVENT);
  1992. /* force to enable the first line-out; the others are set up
  1993. * in unsol_event
  1994. */
  1995. stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
  1996. AC_PINCTL_OUT_EN);
  1997. stac92xx_auto_init_hp_out(codec);
  1998. /* fake event to set up pins */
  1999. codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
  2000. } else {
  2001. stac92xx_auto_init_multi_out(codec);
  2002. stac92xx_auto_init_hp_out(codec);
  2003. }
  2004. for (i = 0; i < AUTO_PIN_LAST; i++) {
  2005. hda_nid_t nid = cfg->input_pins[i];
  2006. if (nid) {
  2007. unsigned int pinctl = AC_PINCTL_IN_EN;
  2008. if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC)
  2009. pinctl |= stac92xx_get_vref(codec, nid);
  2010. stac92xx_auto_set_pinctl(codec, nid, pinctl);
  2011. }
  2012. }
  2013. if (spec->num_dmics > 0)
  2014. for (i = 0; i < spec->num_dmics; i++)
  2015. stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
  2016. AC_PINCTL_IN_EN);
  2017. if (cfg->dig_out_pin)
  2018. stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
  2019. AC_PINCTL_OUT_EN);
  2020. if (cfg->dig_in_pin)
  2021. stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
  2022. AC_PINCTL_IN_EN);
  2023. if (spec->gpio_mute) {
  2024. stac922x_gpio_mute(codec, 0, 0);
  2025. stac922x_gpio_mute(codec, 1, 0);
  2026. }
  2027. return 0;
  2028. }
  2029. static void stac92xx_free(struct hda_codec *codec)
  2030. {
  2031. struct sigmatel_spec *spec = codec->spec;
  2032. int i;
  2033. if (! spec)
  2034. return;
  2035. if (spec->kctl_alloc) {
  2036. for (i = 0; i < spec->num_kctl_used; i++)
  2037. kfree(spec->kctl_alloc[i].name);
  2038. kfree(spec->kctl_alloc);
  2039. }
  2040. if (spec->bios_pin_configs)
  2041. kfree(spec->bios_pin_configs);
  2042. kfree(spec);
  2043. }
  2044. static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
  2045. unsigned int flag)
  2046. {
  2047. unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
  2048. 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
  2049. if (pin_ctl & AC_PINCTL_IN_EN) {
  2050. /*
  2051. * we need to check the current set-up direction of
  2052. * shared input pins since they can be switched via
  2053. * "xxx as Output" mixer switch
  2054. */
  2055. struct sigmatel_spec *spec = codec->spec;
  2056. struct auto_pin_cfg *cfg = &spec->autocfg;
  2057. if ((nid == cfg->input_pins[AUTO_PIN_LINE] &&
  2058. spec->line_switch) ||
  2059. (nid == cfg->input_pins[AUTO_PIN_MIC] &&
  2060. spec->mic_switch))
  2061. return;
  2062. }
  2063. /* if setting pin direction bits, clear the current
  2064. direction bits first */
  2065. if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
  2066. pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
  2067. snd_hda_codec_write_cache(codec, nid, 0,
  2068. AC_VERB_SET_PIN_WIDGET_CONTROL,
  2069. pin_ctl | flag);
  2070. }
  2071. static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
  2072. unsigned int flag)
  2073. {
  2074. unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
  2075. 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
  2076. snd_hda_codec_write_cache(codec, nid, 0,
  2077. AC_VERB_SET_PIN_WIDGET_CONTROL,
  2078. pin_ctl & ~flag);
  2079. }
  2080. static int get_pin_presence(struct hda_codec *codec, hda_nid_t nid)
  2081. {
  2082. if (!nid)
  2083. return 0;
  2084. if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
  2085. & (1 << 31))
  2086. return 1;
  2087. return 0;
  2088. }
  2089. static void stac92xx_hp_detect(struct hda_codec *codec, unsigned int res)
  2090. {
  2091. struct sigmatel_spec *spec = codec->spec;
  2092. struct auto_pin_cfg *cfg = &spec->autocfg;
  2093. int i, presence;
  2094. presence = 0;
  2095. for (i = 0; i < cfg->hp_outs; i++) {
  2096. presence = get_pin_presence(codec, cfg->hp_pins[i]);
  2097. if (presence)
  2098. break;
  2099. }
  2100. if (presence) {
  2101. /* disable lineouts, enable hp */
  2102. for (i = 0; i < cfg->line_outs; i++)
  2103. stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
  2104. AC_PINCTL_OUT_EN);
  2105. for (i = 0; i < cfg->speaker_outs; i++)
  2106. stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
  2107. AC_PINCTL_OUT_EN);
  2108. } else {
  2109. /* enable lineouts, disable hp */
  2110. for (i = 0; i < cfg->line_outs; i++)
  2111. stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
  2112. AC_PINCTL_OUT_EN);
  2113. for (i = 0; i < cfg->speaker_outs; i++)
  2114. stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
  2115. AC_PINCTL_OUT_EN);
  2116. }
  2117. }
  2118. static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
  2119. {
  2120. switch (res >> 26) {
  2121. case STAC_HP_EVENT:
  2122. stac92xx_hp_detect(codec, res);
  2123. break;
  2124. }
  2125. }
  2126. #ifdef SND_HDA_NEEDS_RESUME
  2127. static int stac92xx_resume(struct hda_codec *codec)
  2128. {
  2129. struct sigmatel_spec *spec = codec->spec;
  2130. stac92xx_set_config_regs(codec);
  2131. snd_hda_sequence_write(codec, spec->init);
  2132. if (spec->gpio_mute) {
  2133. stac922x_gpio_mute(codec, 0, 0);
  2134. stac922x_gpio_mute(codec, 1, 0);
  2135. }
  2136. snd_hda_codec_resume_amp(codec);
  2137. snd_hda_codec_resume_cache(codec);
  2138. /* invoke unsolicited event to reset the HP state */
  2139. if (spec->hp_detect)
  2140. codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
  2141. return 0;
  2142. }
  2143. #endif
  2144. static struct hda_codec_ops stac92xx_patch_ops = {
  2145. .build_controls = stac92xx_build_controls,
  2146. .build_pcms = stac92xx_build_pcms,
  2147. .init = stac92xx_init,
  2148. .free = stac92xx_free,
  2149. .unsol_event = stac92xx_unsol_event,
  2150. #ifdef SND_HDA_NEEDS_RESUME
  2151. .resume = stac92xx_resume,
  2152. #endif
  2153. };
  2154. static int patch_stac9200(struct hda_codec *codec)
  2155. {
  2156. struct sigmatel_spec *spec;
  2157. int err;
  2158. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  2159. if (spec == NULL)
  2160. return -ENOMEM;
  2161. codec->spec = spec;
  2162. spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
  2163. spec->pin_nids = stac9200_pin_nids;
  2164. spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
  2165. stac9200_models,
  2166. stac9200_cfg_tbl);
  2167. if (spec->board_config < 0) {
  2168. snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
  2169. err = stac92xx_save_bios_config_regs(codec);
  2170. if (err < 0) {
  2171. stac92xx_free(codec);
  2172. return err;
  2173. }
  2174. spec->pin_configs = spec->bios_pin_configs;
  2175. } else {
  2176. spec->pin_configs = stac9200_brd_tbl[spec->board_config];
  2177. stac92xx_set_config_regs(codec);
  2178. }
  2179. spec->multiout.max_channels = 2;
  2180. spec->multiout.num_dacs = 1;
  2181. spec->multiout.dac_nids = stac9200_dac_nids;
  2182. spec->adc_nids = stac9200_adc_nids;
  2183. spec->mux_nids = stac9200_mux_nids;
  2184. spec->num_muxes = 1;
  2185. spec->num_dmics = 0;
  2186. spec->num_adcs = 1;
  2187. if (spec->board_config == STAC_9200_GATEWAY)
  2188. spec->init = stac9200_eapd_init;
  2189. else
  2190. spec->init = stac9200_core_init;
  2191. spec->mixer = stac9200_mixer;
  2192. err = stac9200_parse_auto_config(codec);
  2193. if (err < 0) {
  2194. stac92xx_free(codec);
  2195. return err;
  2196. }
  2197. codec->patch_ops = stac92xx_patch_ops;
  2198. return 0;
  2199. }
  2200. static int patch_stac925x(struct hda_codec *codec)
  2201. {
  2202. struct sigmatel_spec *spec;
  2203. int err;
  2204. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  2205. if (spec == NULL)
  2206. return -ENOMEM;
  2207. codec->spec = spec;
  2208. spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
  2209. spec->pin_nids = stac925x_pin_nids;
  2210. spec->board_config = snd_hda_check_board_config(codec, STAC_925x_MODELS,
  2211. stac925x_models,
  2212. stac925x_cfg_tbl);
  2213. again:
  2214. if (spec->board_config < 0) {
  2215. snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
  2216. "using BIOS defaults\n");
  2217. err = stac92xx_save_bios_config_regs(codec);
  2218. if (err < 0) {
  2219. stac92xx_free(codec);
  2220. return err;
  2221. }
  2222. spec->pin_configs = spec->bios_pin_configs;
  2223. } else if (stac925x_brd_tbl[spec->board_config] != NULL){
  2224. spec->pin_configs = stac925x_brd_tbl[spec->board_config];
  2225. stac92xx_set_config_regs(codec);
  2226. }
  2227. spec->multiout.max_channels = 2;
  2228. spec->multiout.num_dacs = 1;
  2229. spec->multiout.dac_nids = stac925x_dac_nids;
  2230. spec->adc_nids = stac925x_adc_nids;
  2231. spec->mux_nids = stac925x_mux_nids;
  2232. spec->num_muxes = 1;
  2233. spec->num_adcs = 1;
  2234. switch (codec->vendor_id) {
  2235. case 0x83847632: /* STAC9202 */
  2236. case 0x83847633: /* STAC9202D */
  2237. case 0x83847636: /* STAC9251 */
  2238. case 0x83847637: /* STAC9251D */
  2239. spec->num_dmics = STAC925X_NUM_DMICS;
  2240. spec->dmic_nids = stac925x_dmic_nids;
  2241. break;
  2242. default:
  2243. spec->num_dmics = 0;
  2244. break;
  2245. }
  2246. spec->init = stac925x_core_init;
  2247. spec->mixer = stac925x_mixer;
  2248. err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
  2249. if (!err) {
  2250. if (spec->board_config < 0) {
  2251. printk(KERN_WARNING "hda_codec: No auto-config is "
  2252. "available, default to model=ref\n");
  2253. spec->board_config = STAC_925x_REF;
  2254. goto again;
  2255. }
  2256. err = -EINVAL;
  2257. }
  2258. if (err < 0) {
  2259. stac92xx_free(codec);
  2260. return err;
  2261. }
  2262. codec->patch_ops = stac92xx_patch_ops;
  2263. return 0;
  2264. }
  2265. static int patch_stac922x(struct hda_codec *codec)
  2266. {
  2267. struct sigmatel_spec *spec;
  2268. int err;
  2269. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  2270. if (spec == NULL)
  2271. return -ENOMEM;
  2272. codec->spec = spec;
  2273. spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
  2274. spec->pin_nids = stac922x_pin_nids;
  2275. spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
  2276. stac922x_models,
  2277. stac922x_cfg_tbl);
  2278. if (spec->board_config == STAC_INTEL_MAC_V3) {
  2279. spec->gpio_mute = 1;
  2280. /* Intel Macs have all same PCI SSID, so we need to check
  2281. * codec SSID to distinguish the exact models
  2282. */
  2283. printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
  2284. switch (codec->subsystem_id) {
  2285. case 0x106b0800:
  2286. spec->board_config = STAC_INTEL_MAC_V1;
  2287. break;
  2288. case 0x106b0600:
  2289. case 0x106b0700:
  2290. spec->board_config = STAC_INTEL_MAC_V2;
  2291. break;
  2292. case 0x106b0e00:
  2293. case 0x106b0f00:
  2294. case 0x106b1600:
  2295. case 0x106b1700:
  2296. case 0x106b0200:
  2297. case 0x106b1e00:
  2298. spec->board_config = STAC_INTEL_MAC_V3;
  2299. break;
  2300. case 0x106b1a00:
  2301. case 0x00000100:
  2302. spec->board_config = STAC_INTEL_MAC_V4;
  2303. break;
  2304. case 0x106b0a00:
  2305. case 0x106b2200:
  2306. spec->board_config = STAC_INTEL_MAC_V5;
  2307. break;
  2308. }
  2309. }
  2310. again:
  2311. if (spec->board_config < 0) {
  2312. snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
  2313. "using BIOS defaults\n");
  2314. err = stac92xx_save_bios_config_regs(codec);
  2315. if (err < 0) {
  2316. stac92xx_free(codec);
  2317. return err;
  2318. }
  2319. spec->pin_configs = spec->bios_pin_configs;
  2320. } else if (stac922x_brd_tbl[spec->board_config] != NULL) {
  2321. spec->pin_configs = stac922x_brd_tbl[spec->board_config];
  2322. stac92xx_set_config_regs(codec);
  2323. }
  2324. spec->adc_nids = stac922x_adc_nids;
  2325. spec->mux_nids = stac922x_mux_nids;
  2326. spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
  2327. spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
  2328. spec->num_dmics = 0;
  2329. spec->init = stac922x_core_init;
  2330. spec->mixer = stac922x_mixer;
  2331. spec->multiout.dac_nids = spec->dac_nids;
  2332. err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
  2333. if (!err) {
  2334. if (spec->board_config < 0) {
  2335. printk(KERN_WARNING "hda_codec: No auto-config is "
  2336. "available, default to model=ref\n");
  2337. spec->board_config = STAC_D945_REF;
  2338. goto again;
  2339. }
  2340. err = -EINVAL;
  2341. }
  2342. if (err < 0) {
  2343. stac92xx_free(codec);
  2344. return err;
  2345. }
  2346. codec->patch_ops = stac92xx_patch_ops;
  2347. /* Fix Mux capture level; max to 2 */
  2348. snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
  2349. (0 << AC_AMPCAP_OFFSET_SHIFT) |
  2350. (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
  2351. (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
  2352. (0 << AC_AMPCAP_MUTE_SHIFT));
  2353. return 0;
  2354. }
  2355. static int patch_stac927x(struct hda_codec *codec)
  2356. {
  2357. struct sigmatel_spec *spec;
  2358. int err;
  2359. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  2360. if (spec == NULL)
  2361. return -ENOMEM;
  2362. codec->spec = spec;
  2363. spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
  2364. spec->pin_nids = stac927x_pin_nids;
  2365. spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
  2366. stac927x_models,
  2367. stac927x_cfg_tbl);
  2368. again:
  2369. if (spec->board_config < 0) {
  2370. snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC927x, using BIOS defaults\n");
  2371. err = stac92xx_save_bios_config_regs(codec);
  2372. if (err < 0) {
  2373. stac92xx_free(codec);
  2374. return err;
  2375. }
  2376. spec->pin_configs = spec->bios_pin_configs;
  2377. } else if (stac927x_brd_tbl[spec->board_config] != NULL) {
  2378. spec->pin_configs = stac927x_brd_tbl[spec->board_config];
  2379. stac92xx_set_config_regs(codec);
  2380. }
  2381. switch (spec->board_config) {
  2382. case STAC_D965_3ST:
  2383. spec->adc_nids = stac927x_adc_nids;
  2384. spec->mux_nids = stac927x_mux_nids;
  2385. spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
  2386. spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
  2387. spec->num_dmics = 0;
  2388. spec->init = d965_core_init;
  2389. spec->mixer = stac927x_mixer;
  2390. break;
  2391. case STAC_D965_5ST:
  2392. spec->adc_nids = stac927x_adc_nids;
  2393. spec->mux_nids = stac927x_mux_nids;
  2394. spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
  2395. spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
  2396. spec->num_dmics = 0;
  2397. spec->init = d965_core_init;
  2398. spec->mixer = stac927x_mixer;
  2399. break;
  2400. default:
  2401. spec->adc_nids = stac927x_adc_nids;
  2402. spec->mux_nids = stac927x_mux_nids;
  2403. spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
  2404. spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
  2405. spec->num_dmics = 0;
  2406. spec->init = stac927x_core_init;
  2407. spec->mixer = stac927x_mixer;
  2408. }
  2409. spec->multiout.dac_nids = spec->dac_nids;
  2410. /* GPIO0 High = Enable EAPD */
  2411. spec->gpio_mask = spec->gpio_data = 0x00000001;
  2412. stac92xx_enable_gpio_mask(codec);
  2413. err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
  2414. if (!err) {
  2415. if (spec->board_config < 0) {
  2416. printk(KERN_WARNING "hda_codec: No auto-config is "
  2417. "available, default to model=ref\n");
  2418. spec->board_config = STAC_D965_REF;
  2419. goto again;
  2420. }
  2421. err = -EINVAL;
  2422. }
  2423. if (err < 0) {
  2424. stac92xx_free(codec);
  2425. return err;
  2426. }
  2427. codec->patch_ops = stac92xx_patch_ops;
  2428. return 0;
  2429. }
  2430. static int patch_stac9205(struct hda_codec *codec)
  2431. {
  2432. struct sigmatel_spec *spec;
  2433. int err;
  2434. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  2435. if (spec == NULL)
  2436. return -ENOMEM;
  2437. codec->spec = spec;
  2438. spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
  2439. spec->pin_nids = stac9205_pin_nids;
  2440. spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
  2441. stac9205_models,
  2442. stac9205_cfg_tbl);
  2443. again:
  2444. if (spec->board_config < 0) {
  2445. snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
  2446. err = stac92xx_save_bios_config_regs(codec);
  2447. if (err < 0) {
  2448. stac92xx_free(codec);
  2449. return err;
  2450. }
  2451. spec->pin_configs = spec->bios_pin_configs;
  2452. } else {
  2453. spec->pin_configs = stac9205_brd_tbl[spec->board_config];
  2454. stac92xx_set_config_regs(codec);
  2455. }
  2456. spec->adc_nids = stac9205_adc_nids;
  2457. spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
  2458. spec->mux_nids = stac9205_mux_nids;
  2459. spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
  2460. spec->dmic_nids = stac9205_dmic_nids;
  2461. spec->num_dmics = STAC9205_NUM_DMICS;
  2462. spec->dmux_nid = 0x1d;
  2463. spec->init = stac9205_core_init;
  2464. spec->mixer = stac9205_mixer;
  2465. spec->multiout.dac_nids = spec->dac_nids;
  2466. switch (spec->board_config){
  2467. case STAC_9205_DELL_M43:
  2468. /* Enable SPDIF in/out */
  2469. stac92xx_set_config_reg(codec, 0x1f, 0x01441030);
  2470. stac92xx_set_config_reg(codec, 0x20, 0x1c410030);
  2471. spec->gpio_mask = 0x00000007; /* GPIO0-2 */
  2472. /* GPIO0 High = EAPD, GPIO1 Low = DRM,
  2473. * GPIO2 High = Headphone Mute
  2474. */
  2475. spec->gpio_data = 0x00000005;
  2476. break;
  2477. default:
  2478. /* GPIO0 High = EAPD */
  2479. spec->gpio_mask = spec->gpio_data = 0x00000001;
  2480. break;
  2481. }
  2482. stac92xx_enable_gpio_mask(codec);
  2483. err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
  2484. if (!err) {
  2485. if (spec->board_config < 0) {
  2486. printk(KERN_WARNING "hda_codec: No auto-config is "
  2487. "available, default to model=ref\n");
  2488. spec->board_config = STAC_9205_REF;
  2489. goto again;
  2490. }
  2491. err = -EINVAL;
  2492. }
  2493. if (err < 0) {
  2494. stac92xx_free(codec);
  2495. return err;
  2496. }
  2497. codec->patch_ops = stac92xx_patch_ops;
  2498. return 0;
  2499. }
  2500. /*
  2501. * STAC9872 hack
  2502. */
  2503. /* static config for Sony VAIO FE550G and Sony VAIO AR */
  2504. static hda_nid_t vaio_dacs[] = { 0x2 };
  2505. #define VAIO_HP_DAC 0x5
  2506. static hda_nid_t vaio_adcs[] = { 0x8 /*,0x6*/ };
  2507. static hda_nid_t vaio_mux_nids[] = { 0x15 };
  2508. static struct hda_input_mux vaio_mux = {
  2509. .num_items = 3,
  2510. .items = {
  2511. /* { "HP", 0x0 }, */
  2512. { "Mic Jack", 0x1 },
  2513. { "Internal Mic", 0x2 },
  2514. { "PCM", 0x3 },
  2515. }
  2516. };
  2517. static struct hda_verb vaio_init[] = {
  2518. {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
  2519. {0x0a, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | STAC_HP_EVENT},
  2520. {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
  2521. {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
  2522. {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
  2523. {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
  2524. {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
  2525. {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
  2526. {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
  2527. {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
  2528. {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
  2529. {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
  2530. {}
  2531. };
  2532. static struct hda_verb vaio_ar_init[] = {
  2533. {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
  2534. {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
  2535. {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
  2536. {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
  2537. /* {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },*/ /* Optical Out */
  2538. {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
  2539. {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
  2540. {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
  2541. {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
  2542. /* {0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},*/ /* Optical Out */
  2543. {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
  2544. {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
  2545. {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
  2546. {}
  2547. };
  2548. /* bind volumes of both NID 0x02 and 0x05 */
  2549. static struct hda_bind_ctls vaio_bind_master_vol = {
  2550. .ops = &snd_hda_bind_vol,
  2551. .values = {
  2552. HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
  2553. HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
  2554. 0
  2555. },
  2556. };
  2557. /* bind volumes of both NID 0x02 and 0x05 */
  2558. static struct hda_bind_ctls vaio_bind_master_sw = {
  2559. .ops = &snd_hda_bind_sw,
  2560. .values = {
  2561. HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
  2562. HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
  2563. 0,
  2564. },
  2565. };
  2566. static struct snd_kcontrol_new vaio_mixer[] = {
  2567. HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
  2568. HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
  2569. /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
  2570. HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
  2571. HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
  2572. {
  2573. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  2574. .name = "Capture Source",
  2575. .count = 1,
  2576. .info = stac92xx_mux_enum_info,
  2577. .get = stac92xx_mux_enum_get,
  2578. .put = stac92xx_mux_enum_put,
  2579. },
  2580. {}
  2581. };
  2582. static struct snd_kcontrol_new vaio_ar_mixer[] = {
  2583. HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
  2584. HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
  2585. /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
  2586. HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
  2587. HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
  2588. /*HDA_CODEC_MUTE("Optical Out Switch", 0x10, 0, HDA_OUTPUT),
  2589. HDA_CODEC_VOLUME("Optical Out Volume", 0x10, 0, HDA_OUTPUT),*/
  2590. {
  2591. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  2592. .name = "Capture Source",
  2593. .count = 1,
  2594. .info = stac92xx_mux_enum_info,
  2595. .get = stac92xx_mux_enum_get,
  2596. .put = stac92xx_mux_enum_put,
  2597. },
  2598. {}
  2599. };
  2600. static struct hda_codec_ops stac9872_patch_ops = {
  2601. .build_controls = stac92xx_build_controls,
  2602. .build_pcms = stac92xx_build_pcms,
  2603. .init = stac92xx_init,
  2604. .free = stac92xx_free,
  2605. #ifdef SND_HDA_NEEDS_RESUME
  2606. .resume = stac92xx_resume,
  2607. #endif
  2608. };
  2609. static int stac9872_vaio_init(struct hda_codec *codec)
  2610. {
  2611. int err;
  2612. err = stac92xx_init(codec);
  2613. if (err < 0)
  2614. return err;
  2615. if (codec->patch_ops.unsol_event)
  2616. codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
  2617. return 0;
  2618. }
  2619. static void stac9872_vaio_hp_detect(struct hda_codec *codec, unsigned int res)
  2620. {
  2621. if (get_pin_presence(codec, 0x0a)) {
  2622. stac92xx_reset_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
  2623. stac92xx_set_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
  2624. } else {
  2625. stac92xx_reset_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
  2626. stac92xx_set_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
  2627. }
  2628. }
  2629. static void stac9872_vaio_unsol_event(struct hda_codec *codec, unsigned int res)
  2630. {
  2631. switch (res >> 26) {
  2632. case STAC_HP_EVENT:
  2633. stac9872_vaio_hp_detect(codec, res);
  2634. break;
  2635. }
  2636. }
  2637. static struct hda_codec_ops stac9872_vaio_patch_ops = {
  2638. .build_controls = stac92xx_build_controls,
  2639. .build_pcms = stac92xx_build_pcms,
  2640. .init = stac9872_vaio_init,
  2641. .free = stac92xx_free,
  2642. .unsol_event = stac9872_vaio_unsol_event,
  2643. #ifdef CONFIG_PM
  2644. .resume = stac92xx_resume,
  2645. #endif
  2646. };
  2647. enum { /* FE and SZ series. id=0x83847661 and subsys=0x104D0700 or 104D1000. */
  2648. CXD9872RD_VAIO,
  2649. /* Unknown. id=0x83847662 and subsys=0x104D1200 or 104D1000. */
  2650. STAC9872AK_VAIO,
  2651. /* Unknown. id=0x83847661 and subsys=0x104D1200. */
  2652. STAC9872K_VAIO,
  2653. /* AR Series. id=0x83847664 and subsys=104D1300 */
  2654. CXD9872AKD_VAIO,
  2655. STAC_9872_MODELS,
  2656. };
  2657. static const char *stac9872_models[STAC_9872_MODELS] = {
  2658. [CXD9872RD_VAIO] = "vaio",
  2659. [CXD9872AKD_VAIO] = "vaio-ar",
  2660. };
  2661. static struct snd_pci_quirk stac9872_cfg_tbl[] = {
  2662. SND_PCI_QUIRK(0x104d, 0x81e6, "Sony VAIO F/S", CXD9872RD_VAIO),
  2663. SND_PCI_QUIRK(0x104d, 0x81ef, "Sony VAIO F/S", CXD9872RD_VAIO),
  2664. SND_PCI_QUIRK(0x104d, 0x81fd, "Sony VAIO AR", CXD9872AKD_VAIO),
  2665. SND_PCI_QUIRK(0x104d, 0x8205, "Sony VAIO AR", CXD9872AKD_VAIO),
  2666. {}
  2667. };
  2668. static int patch_stac9872(struct hda_codec *codec)
  2669. {
  2670. struct sigmatel_spec *spec;
  2671. int board_config;
  2672. board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
  2673. stac9872_models,
  2674. stac9872_cfg_tbl);
  2675. if (board_config < 0)
  2676. /* unknown config, let generic-parser do its job... */
  2677. return snd_hda_parse_generic_codec(codec);
  2678. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  2679. if (spec == NULL)
  2680. return -ENOMEM;
  2681. codec->spec = spec;
  2682. switch (board_config) {
  2683. case CXD9872RD_VAIO:
  2684. case STAC9872AK_VAIO:
  2685. case STAC9872K_VAIO:
  2686. spec->mixer = vaio_mixer;
  2687. spec->init = vaio_init;
  2688. spec->multiout.max_channels = 2;
  2689. spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
  2690. spec->multiout.dac_nids = vaio_dacs;
  2691. spec->multiout.hp_nid = VAIO_HP_DAC;
  2692. spec->num_adcs = ARRAY_SIZE(vaio_adcs);
  2693. spec->adc_nids = vaio_adcs;
  2694. spec->input_mux = &vaio_mux;
  2695. spec->mux_nids = vaio_mux_nids;
  2696. codec->patch_ops = stac9872_vaio_patch_ops;
  2697. break;
  2698. case CXD9872AKD_VAIO:
  2699. spec->mixer = vaio_ar_mixer;
  2700. spec->init = vaio_ar_init;
  2701. spec->multiout.max_channels = 2;
  2702. spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
  2703. spec->multiout.dac_nids = vaio_dacs;
  2704. spec->multiout.hp_nid = VAIO_HP_DAC;
  2705. spec->num_adcs = ARRAY_SIZE(vaio_adcs);
  2706. spec->adc_nids = vaio_adcs;
  2707. spec->input_mux = &vaio_mux;
  2708. spec->mux_nids = vaio_mux_nids;
  2709. codec->patch_ops = stac9872_patch_ops;
  2710. break;
  2711. }
  2712. return 0;
  2713. }
  2714. /*
  2715. * patch entries
  2716. */
  2717. struct hda_codec_preset snd_hda_preset_sigmatel[] = {
  2718. { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
  2719. { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
  2720. { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
  2721. { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
  2722. { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
  2723. { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
  2724. { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
  2725. { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
  2726. { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
  2727. { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
  2728. { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
  2729. { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
  2730. { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
  2731. { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
  2732. { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
  2733. { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
  2734. { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
  2735. { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
  2736. { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
  2737. { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
  2738. { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
  2739. { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
  2740. { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
  2741. { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
  2742. { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
  2743. { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
  2744. { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
  2745. { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
  2746. { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
  2747. /* The following does not take into account .id=0x83847661 when subsys =
  2748. * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
  2749. * currently not fully supported.
  2750. */
  2751. { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
  2752. { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
  2753. { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
  2754. { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
  2755. { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
  2756. { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
  2757. { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
  2758. { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
  2759. { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
  2760. { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
  2761. { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
  2762. {} /* terminator */
  2763. };