sa11xx-uda1341.c 27 KB

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  1. /*
  2. * Driver for Philips UDA1341TS on Compaq iPAQ H3600 soundcard
  3. * Copyright (C) 2002 Tomas Kasparek <tomas.kasparek@seznam.cz>
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License.
  7. *
  8. * History:
  9. *
  10. * 2002-03-13 Tomas Kasparek initial release - based on h3600-uda1341.c from OSS
  11. * 2002-03-20 Tomas Kasparek playback over ALSA is working
  12. * 2002-03-28 Tomas Kasparek playback over OSS emulation is working
  13. * 2002-03-29 Tomas Kasparek basic capture is working (native ALSA)
  14. * 2002-03-29 Tomas Kasparek capture is working (OSS emulation)
  15. * 2002-04-04 Tomas Kasparek better rates handling (allow non-standard rates)
  16. * 2003-02-14 Brian Avery fixed full duplex mode, other updates
  17. * 2003-02-20 Tomas Kasparek merged updates by Brian (except HAL)
  18. * 2003-04-19 Jaroslav Kysela recoded DMA stuff to follow 2.4.18rmk3-hh24 kernel
  19. * working suspend and resume
  20. * 2003-04-28 Tomas Kasparek updated work by Jaroslav to compile it under 2.5.x again
  21. * merged HAL layer (patches from Brian)
  22. */
  23. /* $Id: sa11xx-uda1341.c,v 1.27 2005/12/07 09:13:42 cladisch Exp $ */
  24. /***************************************************************************************************
  25. *
  26. * To understand what Alsa Drivers should be doing look at "Writing an Alsa Driver" by Takashi Iwai
  27. * available in the Alsa doc section on the website
  28. *
  29. * A few notes to make things clearer. The UDA1341 is hooked up to Serial port 4 on the SA1100.
  30. * We are using SSP mode to talk to the UDA1341. The UDA1341 bit & wordselect clocks are generated
  31. * by this UART. Unfortunately, the clock only runs if the transmit buffer has something in it.
  32. * So, if we are just recording, we feed the transmit DMA stream a bunch of 0x0000 so that the
  33. * transmit buffer is full and the clock keeps going. The zeroes come from FLUSH_BASE_PHYS which
  34. * is a mem loc that always decodes to 0's w/ no off chip access.
  35. *
  36. * Some alsa terminology:
  37. * frame => num_channels * sample_size e.g stereo 16 bit is 2 * 16 = 32 bytes
  38. * period => the least number of bytes that will generate an interrupt e.g. we have a 1024 byte
  39. * buffer and 4 periods in the runtime structure this means we'll get an int every 256
  40. * bytes or 4 times per buffer.
  41. * A number of the sizes are in frames rather than bytes, use frames_to_bytes and
  42. * bytes_to_frames to convert. The easiest way to tell the units is to look at the
  43. * type i.e. runtime-> buffer_size is in frames and its type is snd_pcm_uframes_t
  44. *
  45. * Notes about the pointer fxn:
  46. * The pointer fxn needs to return the offset into the dma buffer in frames.
  47. * Interrupts must be blocked before calling the dma_get_pos fxn to avoid race with interrupts.
  48. *
  49. * Notes about pause/resume
  50. * Implementing this would be complicated so it's skipped. The problem case is:
  51. * A full duplex connection is going, then play is paused. At this point you need to start xmitting
  52. * 0's to keep the record active which means you cant just freeze the dma and resume it later you'd
  53. * need to save off the dma info, and restore it properly on a resume. Yeach!
  54. *
  55. * Notes about transfer methods:
  56. * The async write calls fail. I probably need to implement something else to support them?
  57. *
  58. ***************************************************************************************************/
  59. #include <sound/driver.h>
  60. #include <linux/module.h>
  61. #include <linux/moduleparam.h>
  62. #include <linux/init.h>
  63. #include <linux/err.h>
  64. #include <linux/platform_device.h>
  65. #include <linux/errno.h>
  66. #include <linux/ioctl.h>
  67. #include <linux/delay.h>
  68. #include <linux/slab.h>
  69. #ifdef CONFIG_PM
  70. #include <linux/pm.h>
  71. #endif
  72. #include <asm/hardware.h>
  73. #include <asm/arch/h3600.h>
  74. #include <asm/mach-types.h>
  75. #include <asm/dma.h>
  76. #include <sound/core.h>
  77. #include <sound/pcm.h>
  78. #include <sound/initval.h>
  79. #include <linux/l3/l3.h>
  80. #undef DEBUG_MODE
  81. #undef DEBUG_FUNCTION_NAMES
  82. #include <sound/uda1341.h>
  83. /*
  84. * FIXME: Is this enough as autodetection of 2.4.X-rmkY-hhZ kernels?
  85. * We use DMA stuff from 2.4.18-rmk3-hh24 here to be able to compile this
  86. * module for Familiar 0.6.1
  87. */
  88. /* {{{ Type definitions */
  89. MODULE_AUTHOR("Tomas Kasparek <tomas.kasparek@seznam.cz>");
  90. MODULE_LICENSE("GPL");
  91. MODULE_DESCRIPTION("SA1100/SA1111 + UDA1341TS driver for ALSA");
  92. MODULE_SUPPORTED_DEVICE("{{UDA1341,iPAQ H3600 UDA1341TS}}");
  93. static char *id; /* ID for this card */
  94. module_param(id, charp, 0444);
  95. MODULE_PARM_DESC(id, "ID string for SA1100/SA1111 + UDA1341TS soundcard.");
  96. struct audio_stream {
  97. char *id; /* identification string */
  98. int stream_id; /* numeric identification */
  99. dma_device_t dma_dev; /* device identifier for DMA */
  100. #ifdef HH_VERSION
  101. dmach_t dmach; /* dma channel identification */
  102. #else
  103. dma_regs_t *dma_regs; /* points to our DMA registers */
  104. #endif
  105. unsigned int active:1; /* we are using this stream for transfer now */
  106. int period; /* current transfer period */
  107. int periods; /* current count of periods registerd in the DMA engine */
  108. int tx_spin; /* are we recoding - flag used to do DMA trans. for sync */
  109. unsigned int old_offset;
  110. spinlock_t dma_lock; /* for locking in DMA operations (see dma-sa1100.c in the kernel) */
  111. struct snd_pcm_substream *stream;
  112. };
  113. struct sa11xx_uda1341 {
  114. struct snd_card *card;
  115. struct l3_client *uda1341;
  116. struct snd_pcm *pcm;
  117. long samplerate;
  118. struct audio_stream s[2]; /* playback & capture */
  119. };
  120. static unsigned int rates[] = {
  121. 8000, 10666, 10985, 14647,
  122. 16000, 21970, 22050, 24000,
  123. 29400, 32000, 44100, 48000,
  124. };
  125. static struct snd_pcm_hw_constraint_list hw_constraints_rates = {
  126. .count = ARRAY_SIZE(rates),
  127. .list = rates,
  128. .mask = 0,
  129. };
  130. static struct platform_device *device;
  131. /* }}} */
  132. /* {{{ Clock and sample rate stuff */
  133. /*
  134. * Stop-gap solution until rest of hh.org HAL stuff is merged.
  135. */
  136. #define GPIO_H3600_CLK_SET0 GPIO_GPIO (12)
  137. #define GPIO_H3600_CLK_SET1 GPIO_GPIO (13)
  138. #ifdef CONFIG_SA1100_H3XXX
  139. #define clr_sa11xx_uda1341_egpio(x) clr_h3600_egpio(x)
  140. #define set_sa11xx_uda1341_egpio(x) set_h3600_egpio(x)
  141. #else
  142. #error This driver could serve H3x00 handhelds only!
  143. #endif
  144. static void sa11xx_uda1341_set_audio_clock(long val)
  145. {
  146. switch (val) {
  147. case 24000: case 32000: case 48000: /* 00: 12.288 MHz */
  148. GPCR = GPIO_H3600_CLK_SET0 | GPIO_H3600_CLK_SET1;
  149. break;
  150. case 22050: case 29400: case 44100: /* 01: 11.2896 MHz */
  151. GPSR = GPIO_H3600_CLK_SET0;
  152. GPCR = GPIO_H3600_CLK_SET1;
  153. break;
  154. case 8000: case 10666: case 16000: /* 10: 4.096 MHz */
  155. GPCR = GPIO_H3600_CLK_SET0;
  156. GPSR = GPIO_H3600_CLK_SET1;
  157. break;
  158. case 10985: case 14647: case 21970: /* 11: 5.6245 MHz */
  159. GPSR = GPIO_H3600_CLK_SET0 | GPIO_H3600_CLK_SET1;
  160. break;
  161. }
  162. }
  163. static void sa11xx_uda1341_set_samplerate(struct sa11xx_uda1341 *sa11xx_uda1341, long rate)
  164. {
  165. int clk_div = 0;
  166. int clk=0;
  167. /* We don't want to mess with clocks when frames are in flight */
  168. Ser4SSCR0 &= ~SSCR0_SSE;
  169. /* wait for any frame to complete */
  170. udelay(125);
  171. /*
  172. * We have the following clock sources:
  173. * 4.096 MHz, 5.6245 MHz, 11.2896 MHz, 12.288 MHz
  174. * Those can be divided either by 256, 384 or 512.
  175. * This makes up 12 combinations for the following samplerates...
  176. */
  177. if (rate >= 48000)
  178. rate = 48000;
  179. else if (rate >= 44100)
  180. rate = 44100;
  181. else if (rate >= 32000)
  182. rate = 32000;
  183. else if (rate >= 29400)
  184. rate = 29400;
  185. else if (rate >= 24000)
  186. rate = 24000;
  187. else if (rate >= 22050)
  188. rate = 22050;
  189. else if (rate >= 21970)
  190. rate = 21970;
  191. else if (rate >= 16000)
  192. rate = 16000;
  193. else if (rate >= 14647)
  194. rate = 14647;
  195. else if (rate >= 10985)
  196. rate = 10985;
  197. else if (rate >= 10666)
  198. rate = 10666;
  199. else
  200. rate = 8000;
  201. /* Set the external clock generator */
  202. sa11xx_uda1341_set_audio_clock(rate);
  203. /* Select the clock divisor */
  204. switch (rate) {
  205. case 8000:
  206. case 10985:
  207. case 22050:
  208. case 24000:
  209. clk = F512;
  210. clk_div = SSCR0_SerClkDiv(16);
  211. break;
  212. case 16000:
  213. case 21970:
  214. case 44100:
  215. case 48000:
  216. clk = F256;
  217. clk_div = SSCR0_SerClkDiv(8);
  218. break;
  219. case 10666:
  220. case 14647:
  221. case 29400:
  222. case 32000:
  223. clk = F384;
  224. clk_div = SSCR0_SerClkDiv(12);
  225. break;
  226. }
  227. /* FMT setting should be moved away when other FMTs are added (FIXME) */
  228. l3_command(sa11xx_uda1341->uda1341, CMD_FORMAT, (void *)LSB16);
  229. l3_command(sa11xx_uda1341->uda1341, CMD_FS, (void *)clk);
  230. Ser4SSCR0 = (Ser4SSCR0 & ~0xff00) + clk_div + SSCR0_SSE;
  231. sa11xx_uda1341->samplerate = rate;
  232. }
  233. /* }}} */
  234. /* {{{ HW init and shutdown */
  235. static void sa11xx_uda1341_audio_init(struct sa11xx_uda1341 *sa11xx_uda1341)
  236. {
  237. unsigned long flags;
  238. /* Setup DMA stuff */
  239. sa11xx_uda1341->s[SNDRV_PCM_STREAM_PLAYBACK].id = "UDA1341 out";
  240. sa11xx_uda1341->s[SNDRV_PCM_STREAM_PLAYBACK].stream_id = SNDRV_PCM_STREAM_PLAYBACK;
  241. sa11xx_uda1341->s[SNDRV_PCM_STREAM_PLAYBACK].dma_dev = DMA_Ser4SSPWr;
  242. sa11xx_uda1341->s[SNDRV_PCM_STREAM_CAPTURE].id = "UDA1341 in";
  243. sa11xx_uda1341->s[SNDRV_PCM_STREAM_CAPTURE].stream_id = SNDRV_PCM_STREAM_CAPTURE;
  244. sa11xx_uda1341->s[SNDRV_PCM_STREAM_CAPTURE].dma_dev = DMA_Ser4SSPRd;
  245. /* Initialize the UDA1341 internal state */
  246. /* Setup the uarts */
  247. local_irq_save(flags);
  248. GAFR |= (GPIO_SSP_CLK);
  249. GPDR &= ~(GPIO_SSP_CLK);
  250. Ser4SSCR0 = 0;
  251. Ser4SSCR0 = SSCR0_DataSize(16) + SSCR0_TI + SSCR0_SerClkDiv(8);
  252. Ser4SSCR1 = SSCR1_SClkIactL + SSCR1_SClk1P + SSCR1_ExtClk;
  253. Ser4SSCR0 |= SSCR0_SSE;
  254. local_irq_restore(flags);
  255. /* Enable the audio power */
  256. clr_sa11xx_uda1341_egpio(IPAQ_EGPIO_CODEC_NRESET);
  257. set_sa11xx_uda1341_egpio(IPAQ_EGPIO_AUDIO_ON);
  258. set_sa11xx_uda1341_egpio(IPAQ_EGPIO_QMUTE);
  259. /* Wait for the UDA1341 to wake up */
  260. mdelay(1); //FIXME - was removed by Perex - Why?
  261. /* Initialize the UDA1341 internal state */
  262. l3_open(sa11xx_uda1341->uda1341);
  263. /* external clock configuration (after l3_open - regs must be initialized */
  264. sa11xx_uda1341_set_samplerate(sa11xx_uda1341, sa11xx_uda1341->samplerate);
  265. /* Wait for the UDA1341 to wake up */
  266. set_sa11xx_uda1341_egpio(IPAQ_EGPIO_CODEC_NRESET);
  267. mdelay(1);
  268. /* make the left and right channels unswapped (flip the WS latch) */
  269. Ser4SSDR = 0;
  270. clr_sa11xx_uda1341_egpio(IPAQ_EGPIO_QMUTE);
  271. }
  272. static void sa11xx_uda1341_audio_shutdown(struct sa11xx_uda1341 *sa11xx_uda1341)
  273. {
  274. /* mute on */
  275. set_sa11xx_uda1341_egpio(IPAQ_EGPIO_QMUTE);
  276. /* disable the audio power and all signals leading to the audio chip */
  277. l3_close(sa11xx_uda1341->uda1341);
  278. Ser4SSCR0 = 0;
  279. clr_sa11xx_uda1341_egpio(IPAQ_EGPIO_CODEC_NRESET);
  280. /* power off and mute off */
  281. /* FIXME - is muting off necesary??? */
  282. clr_sa11xx_uda1341_egpio(IPAQ_EGPIO_AUDIO_ON);
  283. clr_sa11xx_uda1341_egpio(IPAQ_EGPIO_QMUTE);
  284. }
  285. /* }}} */
  286. /* {{{ DMA staff */
  287. /*
  288. * these are the address and sizes used to fill the xmit buffer
  289. * so we can get a clock in record only mode
  290. */
  291. #define FORCE_CLOCK_ADDR (dma_addr_t)FLUSH_BASE_PHYS
  292. #define FORCE_CLOCK_SIZE 4096 // was 2048
  293. // FIXME Why this value exactly - wrote comment
  294. #define DMA_BUF_SIZE 8176 /* <= MAX_DMA_SIZE from asm/arch-sa1100/dma.h */
  295. #ifdef HH_VERSION
  296. static int audio_dma_request(struct audio_stream *s, void (*callback)(void *, int))
  297. {
  298. int ret;
  299. ret = sa1100_request_dma(&s->dmach, s->id, s->dma_dev);
  300. if (ret < 0) {
  301. printk(KERN_ERR "unable to grab audio dma 0x%x\n", s->dma_dev);
  302. return ret;
  303. }
  304. sa1100_dma_set_callback(s->dmach, callback);
  305. return 0;
  306. }
  307. static inline void audio_dma_free(struct audio_stream *s)
  308. {
  309. sa1100_free_dma(s->dmach);
  310. s->dmach = -1;
  311. }
  312. #else
  313. static int audio_dma_request(struct audio_stream *s, void (*callback)(void *))
  314. {
  315. int ret;
  316. ret = sa1100_request_dma(s->dma_dev, s->id, callback, s, &s->dma_regs);
  317. if (ret < 0)
  318. printk(KERN_ERR "unable to grab audio dma 0x%x\n", s->dma_dev);
  319. return ret;
  320. }
  321. static void audio_dma_free(struct audio_stream *s)
  322. {
  323. sa1100_free_dma(s->dma_regs);
  324. s->dma_regs = 0;
  325. }
  326. #endif
  327. static u_int audio_get_dma_pos(struct audio_stream *s)
  328. {
  329. struct snd_pcm_substream *substream = s->stream;
  330. struct snd_pcm_runtime *runtime = substream->runtime;
  331. unsigned int offset;
  332. unsigned long flags;
  333. dma_addr_t addr;
  334. // this must be called w/ interrupts locked out see dma-sa1100.c in the kernel
  335. spin_lock_irqsave(&s->dma_lock, flags);
  336. #ifdef HH_VERSION
  337. sa1100_dma_get_current(s->dmach, NULL, &addr);
  338. #else
  339. addr = sa1100_get_dma_pos((s)->dma_regs);
  340. #endif
  341. offset = addr - runtime->dma_addr;
  342. spin_unlock_irqrestore(&s->dma_lock, flags);
  343. offset = bytes_to_frames(runtime,offset);
  344. if (offset >= runtime->buffer_size)
  345. offset = 0;
  346. return offset;
  347. }
  348. /*
  349. * this stops the dma and clears the dma ptrs
  350. */
  351. static void audio_stop_dma(struct audio_stream *s)
  352. {
  353. unsigned long flags;
  354. spin_lock_irqsave(&s->dma_lock, flags);
  355. s->active = 0;
  356. s->period = 0;
  357. /* this stops the dma channel and clears the buffer ptrs */
  358. #ifdef HH_VERSION
  359. sa1100_dma_flush_all(s->dmach);
  360. #else
  361. sa1100_clear_dma(s->dma_regs);
  362. #endif
  363. spin_unlock_irqrestore(&s->dma_lock, flags);
  364. }
  365. static void audio_process_dma(struct audio_stream *s)
  366. {
  367. struct snd_pcm_substream *substream = s->stream;
  368. struct snd_pcm_runtime *runtime;
  369. unsigned int dma_size;
  370. unsigned int offset;
  371. int ret;
  372. /* we are requested to process synchronization DMA transfer */
  373. if (s->tx_spin) {
  374. snd_assert(s->stream_id == SNDRV_PCM_STREAM_PLAYBACK, return);
  375. /* fill the xmit dma buffers and return */
  376. #ifdef HH_VERSION
  377. sa1100_dma_set_spin(s->dmach, FORCE_CLOCK_ADDR, FORCE_CLOCK_SIZE);
  378. #else
  379. while (1) {
  380. ret = sa1100_start_dma(s->dma_regs, FORCE_CLOCK_ADDR, FORCE_CLOCK_SIZE);
  381. if (ret)
  382. return;
  383. }
  384. #endif
  385. return;
  386. }
  387. /* must be set here - only valid for running streams, not for forced_clock dma fills */
  388. runtime = substream->runtime;
  389. while (s->active && s->periods < runtime->periods) {
  390. dma_size = frames_to_bytes(runtime, runtime->period_size);
  391. if (s->old_offset) {
  392. /* a little trick, we need resume from old position */
  393. offset = frames_to_bytes(runtime, s->old_offset - 1);
  394. s->old_offset = 0;
  395. s->periods = 0;
  396. s->period = offset / dma_size;
  397. offset %= dma_size;
  398. dma_size = dma_size - offset;
  399. if (!dma_size)
  400. continue; /* special case */
  401. } else {
  402. offset = dma_size * s->period;
  403. snd_assert(dma_size <= DMA_BUF_SIZE, );
  404. }
  405. #ifdef HH_VERSION
  406. ret = sa1100_dma_queue_buffer(s->dmach, s, runtime->dma_addr + offset, dma_size);
  407. if (ret)
  408. return; //FIXME
  409. #else
  410. ret = sa1100_start_dma((s)->dma_regs, runtime->dma_addr + offset, dma_size);
  411. if (ret) {
  412. printk(KERN_ERR "audio_process_dma: cannot queue DMA buffer (%i)\n", ret);
  413. return;
  414. }
  415. #endif
  416. s->period++;
  417. s->period %= runtime->periods;
  418. s->periods++;
  419. }
  420. }
  421. #ifdef HH_VERSION
  422. static void audio_dma_callback(void *data, int size)
  423. #else
  424. static void audio_dma_callback(void *data)
  425. #endif
  426. {
  427. struct audio_stream *s = data;
  428. /*
  429. * If we are getting a callback for an active stream then we inform
  430. * the PCM middle layer we've finished a period
  431. */
  432. if (s->active)
  433. snd_pcm_period_elapsed(s->stream);
  434. spin_lock(&s->dma_lock);
  435. if (!s->tx_spin && s->periods > 0)
  436. s->periods--;
  437. audio_process_dma(s);
  438. spin_unlock(&s->dma_lock);
  439. }
  440. /* }}} */
  441. /* {{{ PCM setting */
  442. /* {{{ trigger & timer */
  443. static int snd_sa11xx_uda1341_trigger(struct snd_pcm_substream *substream, int cmd)
  444. {
  445. struct sa11xx_uda1341 *chip = snd_pcm_substream_chip(substream);
  446. int stream_id = substream->pstr->stream;
  447. struct audio_stream *s = &chip->s[stream_id];
  448. struct audio_stream *s1 = &chip->s[stream_id ^ 1];
  449. int err = 0;
  450. /* note local interrupts are already disabled in the midlevel code */
  451. spin_lock(&s->dma_lock);
  452. switch (cmd) {
  453. case SNDRV_PCM_TRIGGER_START:
  454. /* now we need to make sure a record only stream has a clock */
  455. if (stream_id == SNDRV_PCM_STREAM_CAPTURE && !s1->active) {
  456. /* we need to force fill the xmit DMA with zeros */
  457. s1->tx_spin = 1;
  458. audio_process_dma(s1);
  459. }
  460. /* this case is when you were recording then you turn on a
  461. * playback stream so we stop (also clears it) the dma first,
  462. * clear the sync flag and then we let it turned on
  463. */
  464. else {
  465. s->tx_spin = 0;
  466. }
  467. /* requested stream startup */
  468. s->active = 1;
  469. audio_process_dma(s);
  470. break;
  471. case SNDRV_PCM_TRIGGER_STOP:
  472. /* requested stream shutdown */
  473. audio_stop_dma(s);
  474. /*
  475. * now we need to make sure a record only stream has a clock
  476. * so if we're stopping a playback with an active capture
  477. * we need to turn the 0 fill dma on for the xmit side
  478. */
  479. if (stream_id == SNDRV_PCM_STREAM_PLAYBACK && s1->active) {
  480. /* we need to force fill the xmit DMA with zeros */
  481. s->tx_spin = 1;
  482. audio_process_dma(s);
  483. }
  484. /*
  485. * we killed a capture only stream, so we should also kill
  486. * the zero fill transmit
  487. */
  488. else {
  489. if (s1->tx_spin) {
  490. s1->tx_spin = 0;
  491. audio_stop_dma(s1);
  492. }
  493. }
  494. break;
  495. case SNDRV_PCM_TRIGGER_SUSPEND:
  496. s->active = 0;
  497. #ifdef HH_VERSION
  498. sa1100_dma_stop(s->dmach);
  499. #else
  500. //FIXME - DMA API
  501. #endif
  502. s->old_offset = audio_get_dma_pos(s) + 1;
  503. #ifdef HH_VERSION
  504. sa1100_dma_flush_all(s->dmach);
  505. #else
  506. //FIXME - DMA API
  507. #endif
  508. s->periods = 0;
  509. break;
  510. case SNDRV_PCM_TRIGGER_RESUME:
  511. s->active = 1;
  512. s->tx_spin = 0;
  513. audio_process_dma(s);
  514. if (stream_id == SNDRV_PCM_STREAM_CAPTURE && !s1->active) {
  515. s1->tx_spin = 1;
  516. audio_process_dma(s1);
  517. }
  518. break;
  519. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  520. #ifdef HH_VERSION
  521. sa1100_dma_stop(s->dmach);
  522. #else
  523. //FIXME - DMA API
  524. #endif
  525. s->active = 0;
  526. if (stream_id == SNDRV_PCM_STREAM_PLAYBACK) {
  527. if (s1->active) {
  528. s->tx_spin = 1;
  529. s->old_offset = audio_get_dma_pos(s) + 1;
  530. #ifdef HH_VERSION
  531. sa1100_dma_flush_all(s->dmach);
  532. #else
  533. //FIXME - DMA API
  534. #endif
  535. audio_process_dma(s);
  536. }
  537. } else {
  538. if (s1->tx_spin) {
  539. s1->tx_spin = 0;
  540. #ifdef HH_VERSION
  541. sa1100_dma_flush_all(s1->dmach);
  542. #else
  543. //FIXME - DMA API
  544. #endif
  545. }
  546. }
  547. break;
  548. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  549. s->active = 1;
  550. if (s->old_offset) {
  551. s->tx_spin = 0;
  552. audio_process_dma(s);
  553. break;
  554. }
  555. if (stream_id == SNDRV_PCM_STREAM_CAPTURE && !s1->active) {
  556. s1->tx_spin = 1;
  557. audio_process_dma(s1);
  558. }
  559. #ifdef HH_VERSION
  560. sa1100_dma_resume(s->dmach);
  561. #else
  562. //FIXME - DMA API
  563. #endif
  564. break;
  565. default:
  566. err = -EINVAL;
  567. break;
  568. }
  569. spin_unlock(&s->dma_lock);
  570. return err;
  571. }
  572. static int snd_sa11xx_uda1341_prepare(struct snd_pcm_substream *substream)
  573. {
  574. struct sa11xx_uda1341 *chip = snd_pcm_substream_chip(substream);
  575. struct snd_pcm_runtime *runtime = substream->runtime;
  576. struct audio_stream *s = &chip->s[substream->pstr->stream];
  577. /* set requested samplerate */
  578. sa11xx_uda1341_set_samplerate(chip, runtime->rate);
  579. /* set requestd format when available */
  580. /* set FMT here !!! FIXME */
  581. s->period = 0;
  582. s->periods = 0;
  583. return 0;
  584. }
  585. static snd_pcm_uframes_t snd_sa11xx_uda1341_pointer(struct snd_pcm_substream *substream)
  586. {
  587. struct sa11xx_uda1341 *chip = snd_pcm_substream_chip(substream);
  588. return audio_get_dma_pos(&chip->s[substream->pstr->stream]);
  589. }
  590. /* }}} */
  591. static struct snd_pcm_hardware snd_sa11xx_uda1341_capture =
  592. {
  593. .info = (SNDRV_PCM_INFO_INTERLEAVED |
  594. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  595. SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID |
  596. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME),
  597. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  598. .rates = (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |\
  599. SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_32000 |\
  600. SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
  601. SNDRV_PCM_RATE_KNOT),
  602. .rate_min = 8000,
  603. .rate_max = 48000,
  604. .channels_min = 2,
  605. .channels_max = 2,
  606. .buffer_bytes_max = 64*1024,
  607. .period_bytes_min = 64,
  608. .period_bytes_max = DMA_BUF_SIZE,
  609. .periods_min = 2,
  610. .periods_max = 255,
  611. .fifo_size = 0,
  612. };
  613. static struct snd_pcm_hardware snd_sa11xx_uda1341_playback =
  614. {
  615. .info = (SNDRV_PCM_INFO_INTERLEAVED |
  616. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  617. SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID |
  618. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME),
  619. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  620. .rates = (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |\
  621. SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_32000 |\
  622. SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
  623. SNDRV_PCM_RATE_KNOT),
  624. .rate_min = 8000,
  625. .rate_max = 48000,
  626. .channels_min = 2,
  627. .channels_max = 2,
  628. .buffer_bytes_max = 64*1024,
  629. .period_bytes_min = 64,
  630. .period_bytes_max = DMA_BUF_SIZE,
  631. .periods_min = 2,
  632. .periods_max = 255,
  633. .fifo_size = 0,
  634. };
  635. static int snd_card_sa11xx_uda1341_open(struct snd_pcm_substream *substream)
  636. {
  637. struct sa11xx_uda1341 *chip = snd_pcm_substream_chip(substream);
  638. struct snd_pcm_runtime *runtime = substream->runtime;
  639. int stream_id = substream->pstr->stream;
  640. int err;
  641. chip->s[stream_id].stream = substream;
  642. if (stream_id == SNDRV_PCM_STREAM_PLAYBACK)
  643. runtime->hw = snd_sa11xx_uda1341_playback;
  644. else
  645. runtime->hw = snd_sa11xx_uda1341_capture;
  646. if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
  647. return err;
  648. if ((err = snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates)) < 0)
  649. return err;
  650. return 0;
  651. }
  652. static int snd_card_sa11xx_uda1341_close(struct snd_pcm_substream *substream)
  653. {
  654. struct sa11xx_uda1341 *chip = snd_pcm_substream_chip(substream);
  655. chip->s[substream->pstr->stream].stream = NULL;
  656. return 0;
  657. }
  658. /* {{{ HW params & free */
  659. static int snd_sa11xx_uda1341_hw_params(struct snd_pcm_substream *substream,
  660. struct snd_pcm_hw_params *hw_params)
  661. {
  662. return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
  663. }
  664. static int snd_sa11xx_uda1341_hw_free(struct snd_pcm_substream *substream)
  665. {
  666. return snd_pcm_lib_free_pages(substream);
  667. }
  668. /* }}} */
  669. static struct snd_pcm_ops snd_card_sa11xx_uda1341_playback_ops = {
  670. .open = snd_card_sa11xx_uda1341_open,
  671. .close = snd_card_sa11xx_uda1341_close,
  672. .ioctl = snd_pcm_lib_ioctl,
  673. .hw_params = snd_sa11xx_uda1341_hw_params,
  674. .hw_free = snd_sa11xx_uda1341_hw_free,
  675. .prepare = snd_sa11xx_uda1341_prepare,
  676. .trigger = snd_sa11xx_uda1341_trigger,
  677. .pointer = snd_sa11xx_uda1341_pointer,
  678. };
  679. static struct snd_pcm_ops snd_card_sa11xx_uda1341_capture_ops = {
  680. .open = snd_card_sa11xx_uda1341_open,
  681. .close = snd_card_sa11xx_uda1341_close,
  682. .ioctl = snd_pcm_lib_ioctl,
  683. .hw_params = snd_sa11xx_uda1341_hw_params,
  684. .hw_free = snd_sa11xx_uda1341_hw_free,
  685. .prepare = snd_sa11xx_uda1341_prepare,
  686. .trigger = snd_sa11xx_uda1341_trigger,
  687. .pointer = snd_sa11xx_uda1341_pointer,
  688. };
  689. static int __init snd_card_sa11xx_uda1341_pcm(struct sa11xx_uda1341 *sa11xx_uda1341, int device)
  690. {
  691. struct snd_pcm *pcm;
  692. int err;
  693. if ((err = snd_pcm_new(sa11xx_uda1341->card, "UDA1341 PCM", device, 1, 1, &pcm)) < 0)
  694. return err;
  695. /*
  696. * this sets up our initial buffers and sets the dma_type to isa.
  697. * isa works but I'm not sure why (or if) it's the right choice
  698. * this may be too large, trying it for now
  699. */
  700. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  701. snd_dma_isa_data(),
  702. 64*1024, 64*1024);
  703. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_card_sa11xx_uda1341_playback_ops);
  704. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_card_sa11xx_uda1341_capture_ops);
  705. pcm->private_data = sa11xx_uda1341;
  706. pcm->info_flags = 0;
  707. strcpy(pcm->name, "UDA1341 PCM");
  708. sa11xx_uda1341_audio_init(sa11xx_uda1341);
  709. /* setup DMA controller */
  710. audio_dma_request(&sa11xx_uda1341->s[SNDRV_PCM_STREAM_PLAYBACK], audio_dma_callback);
  711. audio_dma_request(&sa11xx_uda1341->s[SNDRV_PCM_STREAM_CAPTURE], audio_dma_callback);
  712. sa11xx_uda1341->pcm = pcm;
  713. return 0;
  714. }
  715. /* }}} */
  716. /* {{{ module init & exit */
  717. #ifdef CONFIG_PM
  718. static int snd_sa11xx_uda1341_suspend(struct platform_device *devptr,
  719. pm_message_t state)
  720. {
  721. struct snd_card *card = platform_get_drvdata(devptr);
  722. struct sa11xx_uda1341 *chip = card->private_data;
  723. snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
  724. snd_pcm_suspend_all(chip->pcm);
  725. #ifdef HH_VERSION
  726. sa1100_dma_sleep(chip->s[SNDRV_PCM_STREAM_PLAYBACK].dmach);
  727. sa1100_dma_sleep(chip->s[SNDRV_PCM_STREAM_CAPTURE].dmach);
  728. #else
  729. //FIXME
  730. #endif
  731. l3_command(chip->uda1341, CMD_SUSPEND, NULL);
  732. sa11xx_uda1341_audio_shutdown(chip);
  733. return 0;
  734. }
  735. static int snd_sa11xx_uda1341_resume(struct platform_device *devptr)
  736. {
  737. struct snd_card *card = platform_get_drvdata(devptr);
  738. struct sa11xx_uda1341 *chip = card->private_data;
  739. sa11xx_uda1341_audio_init(chip);
  740. l3_command(chip->uda1341, CMD_RESUME, NULL);
  741. #ifdef HH_VERSION
  742. sa1100_dma_wakeup(chip->s[SNDRV_PCM_STREAM_PLAYBACK].dmach);
  743. sa1100_dma_wakeup(chip->s[SNDRV_PCM_STREAM_CAPTURE].dmach);
  744. #else
  745. //FIXME
  746. #endif
  747. snd_power_change_state(card, SNDRV_CTL_POWER_D0);
  748. return 0;
  749. }
  750. #endif /* COMFIG_PM */
  751. void snd_sa11xx_uda1341_free(struct snd_card *card)
  752. {
  753. struct sa11xx_uda1341 *chip = card->private_data;
  754. audio_dma_free(&chip->s[SNDRV_PCM_STREAM_PLAYBACK]);
  755. audio_dma_free(&chip->s[SNDRV_PCM_STREAM_CAPTURE]);
  756. }
  757. static int __init sa11xx_uda1341_probe(struct platform_device *devptr)
  758. {
  759. int err;
  760. struct snd_card *card;
  761. struct sa11xx_uda1341 *chip;
  762. /* register the soundcard */
  763. card = snd_card_new(-1, id, THIS_MODULE, sizeof(struct sa11xx_uda1341));
  764. if (card == NULL)
  765. return -ENOMEM;
  766. chip = card->private_data;
  767. spin_lock_init(&chip->s[0].dma_lock);
  768. spin_lock_init(&chip->s[1].dma_lock);
  769. card->private_free = snd_sa11xx_uda1341_free;
  770. chip->card = card;
  771. chip->samplerate = AUDIO_RATE_DEFAULT;
  772. // mixer
  773. if ((err = snd_chip_uda1341_mixer_new(card, &chip->uda1341)))
  774. goto nodev;
  775. // PCM
  776. if ((err = snd_card_sa11xx_uda1341_pcm(chip, 0)) < 0)
  777. goto nodev;
  778. strcpy(card->driver, "UDA1341");
  779. strcpy(card->shortname, "H3600 UDA1341TS");
  780. sprintf(card->longname, "Compaq iPAQ H3600 with Philips UDA1341TS");
  781. snd_card_set_dev(card, &devptr->dev);
  782. if ((err = snd_card_register(card)) == 0) {
  783. printk( KERN_INFO "iPAQ audio support initialized\n" );
  784. platform_set_drvdata(devptr, card);
  785. return 0;
  786. }
  787. nodev:
  788. snd_card_free(card);
  789. return err;
  790. }
  791. static int __devexit sa11xx_uda1341_remove(struct platform_device *devptr)
  792. {
  793. snd_card_free(platform_get_drvdata(devptr));
  794. platform_set_drvdata(devptr, NULL);
  795. return 0;
  796. }
  797. #define SA11XX_UDA1341_DRIVER "sa11xx_uda1341"
  798. static struct platform_driver sa11xx_uda1341_driver = {
  799. .probe = sa11xx_uda1341_probe,
  800. .remove = __devexit_p(sa11xx_uda1341_remove),
  801. #ifdef CONFIG_PM
  802. .suspend = snd_sa11xx_uda1341_suspend,
  803. .resume = snd_sa11xx_uda1341_resume,
  804. #endif
  805. .driver = {
  806. .name = SA11XX_UDA1341_DRIVER,
  807. },
  808. };
  809. static int __init sa11xx_uda1341_init(void)
  810. {
  811. int err;
  812. if (!machine_is_h3xxx())
  813. return -ENODEV;
  814. if ((err = platform_driver_register(&sa11xx_uda1341_driver)) < 0)
  815. return err;
  816. device = platform_device_register_simple(SA11XX_UDA1341_DRIVER, -1, NULL, 0);
  817. if (!IS_ERR(device)) {
  818. if (platform_get_drvdata(device))
  819. return 0;
  820. platform_device_unregister(device);
  821. err = -ENODEV;
  822. } else
  823. err = PTR_ERR(device);
  824. platform_driver_unregister(&sa11xx_uda1341_driver);
  825. return err;
  826. }
  827. static void __exit sa11xx_uda1341_exit(void)
  828. {
  829. platform_device_unregister(device);
  830. platform_driver_unregister(&sa11xx_uda1341_driver);
  831. }
  832. module_init(sa11xx_uda1341_init);
  833. module_exit(sa11xx_uda1341_exit);
  834. /* }}} */
  835. /*
  836. * Local variables:
  837. * indent-tabs-mode: t
  838. * End:
  839. */