system.h 8.7 KB

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  1. #ifndef _M68KNOMMU_SYSTEM_H
  2. #define _M68KNOMMU_SYSTEM_H
  3. #include <linux/linkage.h>
  4. #include <asm/segment.h>
  5. #include <asm/entry.h>
  6. /*
  7. * switch_to(n) should switch tasks to task ptr, first checking that
  8. * ptr isn't the current task, in which case it does nothing. This
  9. * also clears the TS-flag if the task we switched to has used the
  10. * math co-processor latest.
  11. */
  12. /*
  13. * switch_to() saves the extra registers, that are not saved
  14. * automatically by SAVE_SWITCH_STACK in resume(), ie. d0-d5 and
  15. * a0-a1. Some of these are used by schedule() and its predecessors
  16. * and so we might get see unexpected behaviors when a task returns
  17. * with unexpected register values.
  18. *
  19. * syscall stores these registers itself and none of them are used
  20. * by syscall after the function in the syscall has been called.
  21. *
  22. * Beware that resume now expects *next to be in d1 and the offset of
  23. * tss to be in a1. This saves a few instructions as we no longer have
  24. * to push them onto the stack and read them back right after.
  25. *
  26. * 02/17/96 - Jes Sorensen (jds@kom.auc.dk)
  27. *
  28. * Changed 96/09/19 by Andreas Schwab
  29. * pass prev in a0, next in a1, offset of tss in d1, and whether
  30. * the mm structures are shared in d2 (to avoid atc flushing).
  31. */
  32. asmlinkage void resume(void);
  33. #define switch_to(prev,next,last) \
  34. { \
  35. void *_last; \
  36. __asm__ __volatile__( \
  37. "movel %1, %%a0\n\t" \
  38. "movel %2, %%a1\n\t" \
  39. "jbsr resume\n\t" \
  40. "movel %%d1, %0\n\t" \
  41. : "=d" (_last) \
  42. : "d" (prev), "d" (next) \
  43. : "cc", "d0", "d1", "d2", "d3", "d4", "d5", "a0", "a1"); \
  44. (last) = _last; \
  45. }
  46. #ifdef CONFIG_COLDFIRE
  47. #define local_irq_enable() __asm__ __volatile__ ( \
  48. "move %/sr,%%d0\n\t" \
  49. "andi.l #0xf8ff,%%d0\n\t" \
  50. "move %%d0,%/sr\n" \
  51. : /* no outputs */ \
  52. : \
  53. : "cc", "%d0", "memory")
  54. #define local_irq_disable() __asm__ __volatile__ ( \
  55. "move %/sr,%%d0\n\t" \
  56. "ori.l #0x0700,%%d0\n\t" \
  57. "move %%d0,%/sr\n" \
  58. : /* no outputs */ \
  59. : \
  60. : "cc", "%d0", "memory")
  61. /* For spinlocks etc */
  62. #define local_irq_save(x) __asm__ __volatile__ ( \
  63. "movew %%sr,%0\n\t" \
  64. "movew #0x0700,%%d0\n\t" \
  65. "or.l %0,%%d0\n\t" \
  66. "movew %%d0,%/sr" \
  67. : "=d" (x) \
  68. : \
  69. : "cc", "%d0", "memory")
  70. #else
  71. /* portable version */ /* FIXME - see entry.h*/
  72. #define ALLOWINT 0xf8ff
  73. #define local_irq_enable() asm volatile ("andiw %0,%%sr": : "i" (ALLOWINT) : "memory")
  74. #define local_irq_disable() asm volatile ("oriw #0x0700,%%sr": : : "memory")
  75. #endif
  76. #define local_save_flags(x) asm volatile ("movew %%sr,%0":"=d" (x) : : "memory")
  77. #define local_irq_restore(x) asm volatile ("movew %0,%%sr": :"d" (x) : "memory")
  78. /* For spinlocks etc */
  79. #ifndef local_irq_save
  80. #define local_irq_save(x) do { local_save_flags(x); local_irq_disable(); } while (0)
  81. #endif
  82. #define irqs_disabled() \
  83. ({ \
  84. unsigned long flags; \
  85. local_save_flags(flags); \
  86. ((flags & 0x0700) == 0x0700); \
  87. })
  88. #define iret() __asm__ __volatile__ ("rte": : :"memory", "sp", "cc")
  89. /*
  90. * Force strict CPU ordering.
  91. * Not really required on m68k...
  92. */
  93. #define nop() asm volatile ("nop"::)
  94. #define mb() asm volatile ("" : : :"memory")
  95. #define rmb() asm volatile ("" : : :"memory")
  96. #define wmb() asm volatile ("" : : :"memory")
  97. #define set_mb(var, value) do { xchg(&var, value); } while (0)
  98. #ifdef CONFIG_SMP
  99. #define smp_mb() mb()
  100. #define smp_rmb() rmb()
  101. #define smp_wmb() wmb()
  102. #define smp_read_barrier_depends() read_barrier_depends()
  103. #else
  104. #define smp_mb() barrier()
  105. #define smp_rmb() barrier()
  106. #define smp_wmb() barrier()
  107. #define smp_read_barrier_depends() do { } while(0)
  108. #endif
  109. #define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
  110. struct __xchg_dummy { unsigned long a[100]; };
  111. #define __xg(x) ((volatile struct __xchg_dummy *)(x))
  112. #ifndef CONFIG_RMW_INSNS
  113. static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size)
  114. {
  115. unsigned long tmp, flags;
  116. local_irq_save(flags);
  117. switch (size) {
  118. case 1:
  119. __asm__ __volatile__
  120. ("moveb %2,%0\n\t"
  121. "moveb %1,%2"
  122. : "=&d" (tmp) : "d" (x), "m" (*__xg(ptr)) : "memory");
  123. break;
  124. case 2:
  125. __asm__ __volatile__
  126. ("movew %2,%0\n\t"
  127. "movew %1,%2"
  128. : "=&d" (tmp) : "d" (x), "m" (*__xg(ptr)) : "memory");
  129. break;
  130. case 4:
  131. __asm__ __volatile__
  132. ("movel %2,%0\n\t"
  133. "movel %1,%2"
  134. : "=&d" (tmp) : "d" (x), "m" (*__xg(ptr)) : "memory");
  135. break;
  136. }
  137. local_irq_restore(flags);
  138. return tmp;
  139. }
  140. #else
  141. static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size)
  142. {
  143. switch (size) {
  144. case 1:
  145. __asm__ __volatile__
  146. ("moveb %2,%0\n\t"
  147. "1:\n\t"
  148. "casb %0,%1,%2\n\t"
  149. "jne 1b"
  150. : "=&d" (x) : "d" (x), "m" (*__xg(ptr)) : "memory");
  151. break;
  152. case 2:
  153. __asm__ __volatile__
  154. ("movew %2,%0\n\t"
  155. "1:\n\t"
  156. "casw %0,%1,%2\n\t"
  157. "jne 1b"
  158. : "=&d" (x) : "d" (x), "m" (*__xg(ptr)) : "memory");
  159. break;
  160. case 4:
  161. __asm__ __volatile__
  162. ("movel %2,%0\n\t"
  163. "1:\n\t"
  164. "casl %0,%1,%2\n\t"
  165. "jne 1b"
  166. : "=&d" (x) : "d" (x), "m" (*__xg(ptr)) : "memory");
  167. break;
  168. }
  169. return x;
  170. }
  171. #endif
  172. /*
  173. * Atomic compare and exchange. Compare OLD with MEM, if identical,
  174. * store NEW in MEM. Return the initial value in MEM. Success is
  175. * indicated by comparing RETURN with OLD.
  176. */
  177. #define __HAVE_ARCH_CMPXCHG 1
  178. static __inline__ unsigned long
  179. cmpxchg(volatile int *p, int old, int new)
  180. {
  181. unsigned long flags;
  182. int prev;
  183. local_irq_save(flags);
  184. if ((prev = *p) == old)
  185. *p = new;
  186. local_irq_restore(flags);
  187. return(prev);
  188. }
  189. #ifdef CONFIG_M68332
  190. #define HARD_RESET_NOW() ({ \
  191. local_irq_disable(); \
  192. asm(" \
  193. movew #0x0000, 0xfffa6a; \
  194. reset; \
  195. /*movew #0x1557, 0xfffa44;*/ \
  196. /*movew #0x0155, 0xfffa46;*/ \
  197. moveal #0, %a0; \
  198. movec %a0, %vbr; \
  199. moveal 0, %sp; \
  200. moveal 4, %a0; \
  201. jmp (%a0); \
  202. "); \
  203. })
  204. #endif
  205. #if defined( CONFIG_M68328 ) || defined( CONFIG_M68EZ328 ) || \
  206. defined (CONFIG_M68360) || defined( CONFIG_M68VZ328 )
  207. #define HARD_RESET_NOW() ({ \
  208. local_irq_disable(); \
  209. asm(" \
  210. moveal #0x10c00000, %a0; \
  211. moveb #0, 0xFFFFF300; \
  212. moveal 0(%a0), %sp; \
  213. moveal 4(%a0), %a0; \
  214. jmp (%a0); \
  215. "); \
  216. })
  217. #endif
  218. #ifdef CONFIG_COLDFIRE
  219. #if defined(CONFIG_M5272) && defined(CONFIG_NETtel)
  220. /*
  221. * Need to account for broken early mask of 5272 silicon. So don't
  222. * jump through the original start address. Jump strait into the
  223. * known start of the FLASH code.
  224. */
  225. #define HARD_RESET_NOW() ({ \
  226. asm(" \
  227. movew #0x2700, %sr; \
  228. jmp 0xf0000400; \
  229. "); \
  230. })
  231. #elif defined(CONFIG_NETtel) || defined(CONFIG_eLIA) || \
  232. defined(CONFIG_SECUREEDGEMP3) || defined(CONFIG_CLEOPATRA)
  233. #define HARD_RESET_NOW() ({ \
  234. asm(" \
  235. movew #0x2700, %sr; \
  236. moveal #0x10000044, %a0; \
  237. movel #0xffffffff, (%a0); \
  238. moveal #0x10000001, %a0; \
  239. moveb #0x00, (%a0); \
  240. moveal #0xf0000004, %a0; \
  241. moveal (%a0), %a0; \
  242. jmp (%a0); \
  243. "); \
  244. })
  245. #elif defined(CONFIG_M5272)
  246. /*
  247. * Retrieve the boot address in flash using CSBR0 and CSOR0
  248. * find the reset vector at flash_address + 4 (e.g. 0x400)
  249. * remap it in the flash's current location (e.g. 0xf0000400)
  250. * and jump there.
  251. */
  252. #define HARD_RESET_NOW() ({ \
  253. asm(" \
  254. movew #0x2700, %%sr; \
  255. move.l %0+0x40,%%d0; \
  256. and.l %0+0x44,%%d0; \
  257. andi.l #0xfffff000,%%d0; \
  258. mov.l %%d0,%%a0; \
  259. or.l 4(%%a0),%%d0; \
  260. mov.l %%d0,%%a0; \
  261. jmp (%%a0);" \
  262. : /* No output */ \
  263. : "o" (*(char *)MCF_MBAR) ); \
  264. })
  265. #elif defined(CONFIG_M528x)
  266. /*
  267. * The MCF528x has a bit (SOFTRST) in memory (Reset Control Register RCR),
  268. * that when set, resets the MCF528x.
  269. */
  270. #define HARD_RESET_NOW() \
  271. ({ \
  272. unsigned char volatile *reset; \
  273. asm("move.w #0x2700, %sr"); \
  274. reset = ((volatile unsigned char *)(MCF_IPSBAR + 0x110000)); \
  275. while(1) \
  276. *reset |= (0x01 << 7);\
  277. })
  278. #elif defined(CONFIG_M523x)
  279. #define HARD_RESET_NOW() ({ \
  280. asm(" \
  281. movew #0x2700, %sr; \
  282. movel #0x01000000, %sp; \
  283. moveal #0x40110000, %a0; \
  284. moveb #0x80, (%a0); \
  285. "); \
  286. })
  287. #elif defined(CONFIG_M520x)
  288. /*
  289. * The MCF5208 has a bit (SOFTRST) in memory (Reset Control Register
  290. * RCR), that when set, resets the MCF5208.
  291. */
  292. #define HARD_RESET_NOW() \
  293. ({ \
  294. unsigned char volatile *reset; \
  295. asm("move.w #0x2700, %sr"); \
  296. reset = ((volatile unsigned char *)(MCF_IPSBAR + 0xA0000)); \
  297. while(1) \
  298. *reset |= 0x80; \
  299. })
  300. #else
  301. #define HARD_RESET_NOW() ({ \
  302. asm(" \
  303. movew #0x2700, %sr; \
  304. moveal #0x4, %a0; \
  305. moveal (%a0), %a0; \
  306. jmp (%a0); \
  307. "); \
  308. })
  309. #endif
  310. #endif
  311. #define arch_align_stack(x) (x)
  312. #endif /* _M68KNOMMU_SYSTEM_H */