lh7a40x_udc.c 50 KB

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  1. /*
  2. * linux/drivers/usb/gadget/lh7a40x_udc.c
  3. * Sharp LH7A40x on-chip full speed USB device controllers
  4. *
  5. * Copyright (C) 2004 Mikko Lahteenmaki, Nordic ID
  6. * Copyright (C) 2004 Bo Henriksen, Nordic ID
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. *
  22. */
  23. #include <linux/platform_device.h>
  24. #include "lh7a40x_udc.h"
  25. //#define DEBUG printk
  26. //#define DEBUG_EP0 printk
  27. //#define DEBUG_SETUP printk
  28. #ifndef DEBUG_EP0
  29. # define DEBUG_EP0(fmt,args...)
  30. #endif
  31. #ifndef DEBUG_SETUP
  32. # define DEBUG_SETUP(fmt,args...)
  33. #endif
  34. #ifndef DEBUG
  35. # define NO_STATES
  36. # define DEBUG(fmt,args...)
  37. #endif
  38. #define DRIVER_DESC "LH7A40x USB Device Controller"
  39. #define DRIVER_VERSION __DATE__
  40. #ifndef _BIT /* FIXME - what happended to _BIT in 2.6.7bk18? */
  41. #define _BIT(x) (1<<(x))
  42. #endif
  43. struct lh7a40x_udc *the_controller;
  44. static const char driver_name[] = "lh7a40x_udc";
  45. static const char driver_desc[] = DRIVER_DESC;
  46. static const char ep0name[] = "ep0-control";
  47. /*
  48. Local definintions.
  49. */
  50. #ifndef NO_STATES
  51. static char *state_names[] = {
  52. "WAIT_FOR_SETUP",
  53. "DATA_STATE_XMIT",
  54. "DATA_STATE_NEED_ZLP",
  55. "WAIT_FOR_OUT_STATUS",
  56. "DATA_STATE_RECV"
  57. };
  58. #endif
  59. /*
  60. Local declarations.
  61. */
  62. static int lh7a40x_ep_enable(struct usb_ep *ep,
  63. const struct usb_endpoint_descriptor *);
  64. static int lh7a40x_ep_disable(struct usb_ep *ep);
  65. static struct usb_request *lh7a40x_alloc_request(struct usb_ep *ep, gfp_t);
  66. static void lh7a40x_free_request(struct usb_ep *ep, struct usb_request *);
  67. static int lh7a40x_queue(struct usb_ep *ep, struct usb_request *, gfp_t);
  68. static int lh7a40x_dequeue(struct usb_ep *ep, struct usb_request *);
  69. static int lh7a40x_set_halt(struct usb_ep *ep, int);
  70. static int lh7a40x_fifo_status(struct usb_ep *ep);
  71. static void lh7a40x_fifo_flush(struct usb_ep *ep);
  72. static void lh7a40x_ep0_kick(struct lh7a40x_udc *dev, struct lh7a40x_ep *ep);
  73. static void lh7a40x_handle_ep0(struct lh7a40x_udc *dev, u32 intr);
  74. static void done(struct lh7a40x_ep *ep, struct lh7a40x_request *req,
  75. int status);
  76. static void pio_irq_enable(int bEndpointAddress);
  77. static void pio_irq_disable(int bEndpointAddress);
  78. static void stop_activity(struct lh7a40x_udc *dev,
  79. struct usb_gadget_driver *driver);
  80. static void flush(struct lh7a40x_ep *ep);
  81. static void udc_enable(struct lh7a40x_udc *dev);
  82. static void udc_set_address(struct lh7a40x_udc *dev, unsigned char address);
  83. static struct usb_ep_ops lh7a40x_ep_ops = {
  84. .enable = lh7a40x_ep_enable,
  85. .disable = lh7a40x_ep_disable,
  86. .alloc_request = lh7a40x_alloc_request,
  87. .free_request = lh7a40x_free_request,
  88. .queue = lh7a40x_queue,
  89. .dequeue = lh7a40x_dequeue,
  90. .set_halt = lh7a40x_set_halt,
  91. .fifo_status = lh7a40x_fifo_status,
  92. .fifo_flush = lh7a40x_fifo_flush,
  93. };
  94. /* Inline code */
  95. static __inline__ int write_packet(struct lh7a40x_ep *ep,
  96. struct lh7a40x_request *req, int max)
  97. {
  98. u8 *buf;
  99. int length, count;
  100. volatile u32 *fifo = (volatile u32 *)ep->fifo;
  101. buf = req->req.buf + req->req.actual;
  102. prefetch(buf);
  103. length = req->req.length - req->req.actual;
  104. length = min(length, max);
  105. req->req.actual += length;
  106. DEBUG("Write %d (max %d), fifo %p\n", length, max, fifo);
  107. count = length;
  108. while (count--) {
  109. *fifo = *buf++;
  110. }
  111. return length;
  112. }
  113. static __inline__ void usb_set_index(u32 ep)
  114. {
  115. *(volatile u32 *)io_p2v(USB_INDEX) = ep;
  116. }
  117. static __inline__ u32 usb_read(u32 port)
  118. {
  119. return *(volatile u32 *)io_p2v(port);
  120. }
  121. static __inline__ void usb_write(u32 val, u32 port)
  122. {
  123. *(volatile u32 *)io_p2v(port) = val;
  124. }
  125. static __inline__ void usb_set(u32 val, u32 port)
  126. {
  127. volatile u32 *ioport = (volatile u32 *)io_p2v(port);
  128. u32 after = (*ioport) | val;
  129. *ioport = after;
  130. }
  131. static __inline__ void usb_clear(u32 val, u32 port)
  132. {
  133. volatile u32 *ioport = (volatile u32 *)io_p2v(port);
  134. u32 after = (*ioport) & ~val;
  135. *ioport = after;
  136. }
  137. /*-------------------------------------------------------------------------*/
  138. #define GPIO_PORTC_DR (0x80000E08)
  139. #define GPIO_PORTC_DDR (0x80000E18)
  140. #define GPIO_PORTC_PDR (0x80000E70)
  141. /* get port C pin data register */
  142. #define get_portc_pdr(bit) ((usb_read(GPIO_PORTC_PDR) & _BIT(bit)) != 0)
  143. /* get port C data direction register */
  144. #define get_portc_ddr(bit) ((usb_read(GPIO_PORTC_DDR) & _BIT(bit)) != 0)
  145. /* set port C data register */
  146. #define set_portc_dr(bit, val) (val ? usb_set(_BIT(bit), GPIO_PORTC_DR) : usb_clear(_BIT(bit), GPIO_PORTC_DR))
  147. /* set port C data direction register */
  148. #define set_portc_ddr(bit, val) (val ? usb_set(_BIT(bit), GPIO_PORTC_DDR) : usb_clear(_BIT(bit), GPIO_PORTC_DDR))
  149. /*
  150. * LPD7A404 GPIO's:
  151. * Port C bit 1 = USB Port 1 Power Enable
  152. * Port C bit 2 = USB Port 1 Data Carrier Detect
  153. */
  154. #define is_usb_connected() get_portc_pdr(2)
  155. #ifdef CONFIG_USB_GADGET_DEBUG_FILES
  156. static const char proc_node_name[] = "driver/udc";
  157. static int
  158. udc_proc_read(char *page, char **start, off_t off, int count,
  159. int *eof, void *_dev)
  160. {
  161. char *buf = page;
  162. struct lh7a40x_udc *dev = _dev;
  163. char *next = buf;
  164. unsigned size = count;
  165. unsigned long flags;
  166. int t;
  167. if (off != 0)
  168. return 0;
  169. local_irq_save(flags);
  170. /* basic device status */
  171. t = scnprintf(next, size,
  172. DRIVER_DESC "\n"
  173. "%s version: %s\n"
  174. "Gadget driver: %s\n"
  175. "Host: %s\n\n",
  176. driver_name, DRIVER_VERSION,
  177. dev->driver ? dev->driver->driver.name : "(none)",
  178. is_usb_connected()? "full speed" : "disconnected");
  179. size -= t;
  180. next += t;
  181. t = scnprintf(next, size,
  182. "GPIO:\n"
  183. " Port C bit 1: %d, dir %d\n"
  184. " Port C bit 2: %d, dir %d\n\n",
  185. get_portc_pdr(1), get_portc_ddr(1),
  186. get_portc_pdr(2), get_portc_ddr(2)
  187. );
  188. size -= t;
  189. next += t;
  190. t = scnprintf(next, size,
  191. "DCP pullup: %d\n\n",
  192. (usb_read(USB_PM) & PM_USB_DCP) != 0);
  193. size -= t;
  194. next += t;
  195. local_irq_restore(flags);
  196. *eof = 1;
  197. return count - size;
  198. }
  199. #define create_proc_files() create_proc_read_entry(proc_node_name, 0, NULL, udc_proc_read, dev)
  200. #define remove_proc_files() remove_proc_entry(proc_node_name, NULL)
  201. #else /* !CONFIG_USB_GADGET_DEBUG_FILES */
  202. #define create_proc_files() do {} while (0)
  203. #define remove_proc_files() do {} while (0)
  204. #endif /* CONFIG_USB_GADGET_DEBUG_FILES */
  205. /*
  206. * udc_disable - disable USB device controller
  207. */
  208. static void udc_disable(struct lh7a40x_udc *dev)
  209. {
  210. DEBUG("%s, %p\n", __FUNCTION__, dev);
  211. udc_set_address(dev, 0);
  212. /* Disable interrupts */
  213. usb_write(0, USB_IN_INT_EN);
  214. usb_write(0, USB_OUT_INT_EN);
  215. usb_write(0, USB_INT_EN);
  216. /* Disable the USB */
  217. usb_write(0, USB_PM);
  218. #ifdef CONFIG_ARCH_LH7A404
  219. /* Disable USB power */
  220. set_portc_dr(1, 0);
  221. #endif
  222. /* if hardware supports it, disconnect from usb */
  223. /* make_usb_disappear(); */
  224. dev->ep0state = WAIT_FOR_SETUP;
  225. dev->gadget.speed = USB_SPEED_UNKNOWN;
  226. dev->usb_address = 0;
  227. }
  228. /*
  229. * udc_reinit - initialize software state
  230. */
  231. static void udc_reinit(struct lh7a40x_udc *dev)
  232. {
  233. u32 i;
  234. DEBUG("%s, %p\n", __FUNCTION__, dev);
  235. /* device/ep0 records init */
  236. INIT_LIST_HEAD(&dev->gadget.ep_list);
  237. INIT_LIST_HEAD(&dev->gadget.ep0->ep_list);
  238. dev->ep0state = WAIT_FOR_SETUP;
  239. /* basic endpoint records init */
  240. for (i = 0; i < UDC_MAX_ENDPOINTS; i++) {
  241. struct lh7a40x_ep *ep = &dev->ep[i];
  242. if (i != 0)
  243. list_add_tail(&ep->ep.ep_list, &dev->gadget.ep_list);
  244. ep->desc = 0;
  245. ep->stopped = 0;
  246. INIT_LIST_HEAD(&ep->queue);
  247. ep->pio_irqs = 0;
  248. }
  249. /* the rest was statically initialized, and is read-only */
  250. }
  251. #define BYTES2MAXP(x) (x / 8)
  252. #define MAXP2BYTES(x) (x * 8)
  253. /* until it's enabled, this UDC should be completely invisible
  254. * to any USB host.
  255. */
  256. static void udc_enable(struct lh7a40x_udc *dev)
  257. {
  258. int ep;
  259. DEBUG("%s, %p\n", __FUNCTION__, dev);
  260. dev->gadget.speed = USB_SPEED_UNKNOWN;
  261. #ifdef CONFIG_ARCH_LH7A404
  262. /* Set Port C bit 1 & 2 as output */
  263. set_portc_ddr(1, 1);
  264. set_portc_ddr(2, 1);
  265. /* Enable USB power */
  266. set_portc_dr(1, 0);
  267. #endif
  268. /*
  269. * C.f Chapter 18.1.3.1 Initializing the USB
  270. */
  271. /* Disable the USB */
  272. usb_clear(PM_USB_ENABLE, USB_PM);
  273. /* Reset APB & I/O sides of the USB */
  274. usb_set(USB_RESET_APB | USB_RESET_IO, USB_RESET);
  275. mdelay(5);
  276. usb_clear(USB_RESET_APB | USB_RESET_IO, USB_RESET);
  277. /* Set MAXP values for each */
  278. for (ep = 0; ep < UDC_MAX_ENDPOINTS; ep++) {
  279. struct lh7a40x_ep *ep_reg = &dev->ep[ep];
  280. u32 csr;
  281. usb_set_index(ep);
  282. switch (ep_reg->ep_type) {
  283. case ep_bulk_in:
  284. case ep_interrupt:
  285. usb_clear(USB_IN_CSR2_USB_DMA_EN | USB_IN_CSR2_AUTO_SET,
  286. ep_reg->csr2);
  287. /* Fall through */
  288. case ep_control:
  289. usb_write(BYTES2MAXP(ep_maxpacket(ep_reg)),
  290. USB_IN_MAXP);
  291. break;
  292. case ep_bulk_out:
  293. usb_clear(USB_OUT_CSR2_USB_DMA_EN |
  294. USB_OUT_CSR2_AUTO_CLR, ep_reg->csr2);
  295. usb_write(BYTES2MAXP(ep_maxpacket(ep_reg)),
  296. USB_OUT_MAXP);
  297. break;
  298. }
  299. /* Read & Write CSR1, just in case */
  300. csr = usb_read(ep_reg->csr1);
  301. usb_write(csr, ep_reg->csr1);
  302. flush(ep_reg);
  303. }
  304. /* Disable interrupts */
  305. usb_write(0, USB_IN_INT_EN);
  306. usb_write(0, USB_OUT_INT_EN);
  307. usb_write(0, USB_INT_EN);
  308. /* Enable interrupts */
  309. usb_set(USB_IN_INT_EP0, USB_IN_INT_EN);
  310. usb_set(USB_INT_RESET_INT | USB_INT_RESUME_INT, USB_INT_EN);
  311. /* Dont enable rest of the interrupts */
  312. /* usb_set(USB_IN_INT_EP3 | USB_IN_INT_EP1 | USB_IN_INT_EP0, USB_IN_INT_EN);
  313. usb_set(USB_OUT_INT_EP2, USB_OUT_INT_EN); */
  314. /* Enable SUSPEND */
  315. usb_set(PM_ENABLE_SUSPEND, USB_PM);
  316. /* Enable the USB */
  317. usb_set(PM_USB_ENABLE, USB_PM);
  318. #ifdef CONFIG_ARCH_LH7A404
  319. /* NOTE: DOES NOT WORK! */
  320. /* Let host detect UDC:
  321. * Software must write a 0 to the PMR:DCP_CTRL bit to turn this
  322. * transistor on and pull the USBDP pin HIGH.
  323. */
  324. /* usb_clear(PM_USB_DCP, USB_PM);
  325. usb_set(PM_USB_DCP, USB_PM); */
  326. #endif
  327. }
  328. /*
  329. Register entry point for the peripheral controller driver.
  330. */
  331. int usb_gadget_register_driver(struct usb_gadget_driver *driver)
  332. {
  333. struct lh7a40x_udc *dev = the_controller;
  334. int retval;
  335. DEBUG("%s: %s\n", __FUNCTION__, driver->driver.name);
  336. if (!driver
  337. || driver->speed != USB_SPEED_FULL
  338. || !driver->bind
  339. || !driver->disconnect
  340. || !driver->setup)
  341. return -EINVAL;
  342. if (!dev)
  343. return -ENODEV;
  344. if (dev->driver)
  345. return -EBUSY;
  346. /* first hook up the driver ... */
  347. dev->driver = driver;
  348. dev->gadget.dev.driver = &driver->driver;
  349. device_add(&dev->gadget.dev);
  350. retval = driver->bind(&dev->gadget);
  351. if (retval) {
  352. printk("%s: bind to driver %s --> error %d\n", dev->gadget.name,
  353. driver->driver.name, retval);
  354. device_del(&dev->gadget.dev);
  355. dev->driver = 0;
  356. dev->gadget.dev.driver = 0;
  357. return retval;
  358. }
  359. /* ... then enable host detection and ep0; and we're ready
  360. * for set_configuration as well as eventual disconnect.
  361. * NOTE: this shouldn't power up until later.
  362. */
  363. printk("%s: registered gadget driver '%s'\n", dev->gadget.name,
  364. driver->driver.name);
  365. udc_enable(dev);
  366. return 0;
  367. }
  368. EXPORT_SYMBOL(usb_gadget_register_driver);
  369. /*
  370. Unregister entry point for the peripheral controller driver.
  371. */
  372. int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
  373. {
  374. struct lh7a40x_udc *dev = the_controller;
  375. unsigned long flags;
  376. if (!dev)
  377. return -ENODEV;
  378. if (!driver || driver != dev->driver || !driver->unbind)
  379. return -EINVAL;
  380. spin_lock_irqsave(&dev->lock, flags);
  381. dev->driver = 0;
  382. stop_activity(dev, driver);
  383. spin_unlock_irqrestore(&dev->lock, flags);
  384. driver->unbind(&dev->gadget);
  385. device_del(&dev->gadget.dev);
  386. udc_disable(dev);
  387. DEBUG("unregistered gadget driver '%s'\n", driver->driver.name);
  388. return 0;
  389. }
  390. EXPORT_SYMBOL(usb_gadget_unregister_driver);
  391. /*-------------------------------------------------------------------------*/
  392. /** Write request to FIFO (max write == maxp size)
  393. * Return: 0 = still running, 1 = completed, negative = errno
  394. * NOTE: INDEX register must be set for EP
  395. */
  396. static int write_fifo(struct lh7a40x_ep *ep, struct lh7a40x_request *req)
  397. {
  398. u32 max;
  399. u32 csr;
  400. max = le16_to_cpu(ep->desc->wMaxPacketSize);
  401. csr = usb_read(ep->csr1);
  402. DEBUG("CSR: %x %d\n", csr, csr & USB_IN_CSR1_FIFO_NOT_EMPTY);
  403. if (!(csr & USB_IN_CSR1_FIFO_NOT_EMPTY)) {
  404. unsigned count;
  405. int is_last, is_short;
  406. count = write_packet(ep, req, max);
  407. usb_set(USB_IN_CSR1_IN_PKT_RDY, ep->csr1);
  408. /* last packet is usually short (or a zlp) */
  409. if (unlikely(count != max))
  410. is_last = is_short = 1;
  411. else {
  412. if (likely(req->req.length != req->req.actual)
  413. || req->req.zero)
  414. is_last = 0;
  415. else
  416. is_last = 1;
  417. /* interrupt/iso maxpacket may not fill the fifo */
  418. is_short = unlikely(max < ep_maxpacket(ep));
  419. }
  420. DEBUG("%s: wrote %s %d bytes%s%s %d left %p\n", __FUNCTION__,
  421. ep->ep.name, count,
  422. is_last ? "/L" : "", is_short ? "/S" : "",
  423. req->req.length - req->req.actual, req);
  424. /* requests complete when all IN data is in the FIFO */
  425. if (is_last) {
  426. done(ep, req, 0);
  427. if (list_empty(&ep->queue)) {
  428. pio_irq_disable(ep_index(ep));
  429. }
  430. return 1;
  431. }
  432. } else {
  433. DEBUG("Hmm.. %d ep FIFO is not empty!\n", ep_index(ep));
  434. }
  435. return 0;
  436. }
  437. /** Read to request from FIFO (max read == bytes in fifo)
  438. * Return: 0 = still running, 1 = completed, negative = errno
  439. * NOTE: INDEX register must be set for EP
  440. */
  441. static int read_fifo(struct lh7a40x_ep *ep, struct lh7a40x_request *req)
  442. {
  443. u32 csr;
  444. u8 *buf;
  445. unsigned bufferspace, count, is_short;
  446. volatile u32 *fifo = (volatile u32 *)ep->fifo;
  447. /* make sure there's a packet in the FIFO. */
  448. csr = usb_read(ep->csr1);
  449. if (!(csr & USB_OUT_CSR1_OUT_PKT_RDY)) {
  450. DEBUG("%s: Packet NOT ready!\n", __FUNCTION__);
  451. return -EINVAL;
  452. }
  453. buf = req->req.buf + req->req.actual;
  454. prefetchw(buf);
  455. bufferspace = req->req.length - req->req.actual;
  456. /* read all bytes from this packet */
  457. count = usb_read(USB_OUT_FIFO_WC1);
  458. req->req.actual += min(count, bufferspace);
  459. is_short = (count < ep->ep.maxpacket);
  460. DEBUG("read %s %02x, %d bytes%s req %p %d/%d\n",
  461. ep->ep.name, csr, count,
  462. is_short ? "/S" : "", req, req->req.actual, req->req.length);
  463. while (likely(count-- != 0)) {
  464. u8 byte = (u8) (*fifo & 0xff);
  465. if (unlikely(bufferspace == 0)) {
  466. /* this happens when the driver's buffer
  467. * is smaller than what the host sent.
  468. * discard the extra data.
  469. */
  470. if (req->req.status != -EOVERFLOW)
  471. printk("%s overflow %d\n", ep->ep.name, count);
  472. req->req.status = -EOVERFLOW;
  473. } else {
  474. *buf++ = byte;
  475. bufferspace--;
  476. }
  477. }
  478. usb_clear(USB_OUT_CSR1_OUT_PKT_RDY, ep->csr1);
  479. /* completion */
  480. if (is_short || req->req.actual == req->req.length) {
  481. done(ep, req, 0);
  482. usb_set(USB_OUT_CSR1_FIFO_FLUSH, ep->csr1);
  483. if (list_empty(&ep->queue))
  484. pio_irq_disable(ep_index(ep));
  485. return 1;
  486. }
  487. /* finished that packet. the next one may be waiting... */
  488. return 0;
  489. }
  490. /*
  491. * done - retire a request; caller blocked irqs
  492. * INDEX register is preserved to keep same
  493. */
  494. static void done(struct lh7a40x_ep *ep, struct lh7a40x_request *req, int status)
  495. {
  496. unsigned int stopped = ep->stopped;
  497. u32 index;
  498. DEBUG("%s, %p\n", __FUNCTION__, ep);
  499. list_del_init(&req->queue);
  500. if (likely(req->req.status == -EINPROGRESS))
  501. req->req.status = status;
  502. else
  503. status = req->req.status;
  504. if (status && status != -ESHUTDOWN)
  505. DEBUG("complete %s req %p stat %d len %u/%u\n",
  506. ep->ep.name, &req->req, status,
  507. req->req.actual, req->req.length);
  508. /* don't modify queue heads during completion callback */
  509. ep->stopped = 1;
  510. /* Read current index (completion may modify it) */
  511. index = usb_read(USB_INDEX);
  512. spin_unlock(&ep->dev->lock);
  513. req->req.complete(&ep->ep, &req->req);
  514. spin_lock(&ep->dev->lock);
  515. /* Restore index */
  516. usb_set_index(index);
  517. ep->stopped = stopped;
  518. }
  519. /** Enable EP interrupt */
  520. static void pio_irq_enable(int ep)
  521. {
  522. DEBUG("%s: %d\n", __FUNCTION__, ep);
  523. switch (ep) {
  524. case 1:
  525. usb_set(USB_IN_INT_EP1, USB_IN_INT_EN);
  526. break;
  527. case 2:
  528. usb_set(USB_OUT_INT_EP2, USB_OUT_INT_EN);
  529. break;
  530. case 3:
  531. usb_set(USB_IN_INT_EP3, USB_IN_INT_EN);
  532. break;
  533. default:
  534. DEBUG("Unknown endpoint: %d\n", ep);
  535. break;
  536. }
  537. }
  538. /** Disable EP interrupt */
  539. static void pio_irq_disable(int ep)
  540. {
  541. DEBUG("%s: %d\n", __FUNCTION__, ep);
  542. switch (ep) {
  543. case 1:
  544. usb_clear(USB_IN_INT_EP1, USB_IN_INT_EN);
  545. break;
  546. case 2:
  547. usb_clear(USB_OUT_INT_EP2, USB_OUT_INT_EN);
  548. break;
  549. case 3:
  550. usb_clear(USB_IN_INT_EP3, USB_IN_INT_EN);
  551. break;
  552. default:
  553. DEBUG("Unknown endpoint: %d\n", ep);
  554. break;
  555. }
  556. }
  557. /*
  558. * nuke - dequeue ALL requests
  559. */
  560. void nuke(struct lh7a40x_ep *ep, int status)
  561. {
  562. struct lh7a40x_request *req;
  563. DEBUG("%s, %p\n", __FUNCTION__, ep);
  564. /* Flush FIFO */
  565. flush(ep);
  566. /* called with irqs blocked */
  567. while (!list_empty(&ep->queue)) {
  568. req = list_entry(ep->queue.next, struct lh7a40x_request, queue);
  569. done(ep, req, status);
  570. }
  571. /* Disable IRQ if EP is enabled (has descriptor) */
  572. if (ep->desc)
  573. pio_irq_disable(ep_index(ep));
  574. }
  575. /*
  576. void nuke_all(struct lh7a40x_udc *dev)
  577. {
  578. int n;
  579. for(n=0; n<UDC_MAX_ENDPOINTS; n++) {
  580. struct lh7a40x_ep *ep = &dev->ep[n];
  581. usb_set_index(n);
  582. nuke(ep, 0);
  583. }
  584. }*/
  585. /*
  586. static void flush_all(struct lh7a40x_udc *dev)
  587. {
  588. int n;
  589. for (n = 0; n < UDC_MAX_ENDPOINTS; n++)
  590. {
  591. struct lh7a40x_ep *ep = &dev->ep[n];
  592. flush(ep);
  593. }
  594. }
  595. */
  596. /** Flush EP
  597. * NOTE: INDEX register must be set before this call
  598. */
  599. static void flush(struct lh7a40x_ep *ep)
  600. {
  601. DEBUG("%s, %p\n", __FUNCTION__, ep);
  602. switch (ep->ep_type) {
  603. case ep_control:
  604. /* check, by implication c.f. 15.1.2.11 */
  605. break;
  606. case ep_bulk_in:
  607. case ep_interrupt:
  608. /* if(csr & USB_IN_CSR1_IN_PKT_RDY) */
  609. usb_set(USB_IN_CSR1_FIFO_FLUSH, ep->csr1);
  610. break;
  611. case ep_bulk_out:
  612. /* if(csr & USB_OUT_CSR1_OUT_PKT_RDY) */
  613. usb_set(USB_OUT_CSR1_FIFO_FLUSH, ep->csr1);
  614. break;
  615. }
  616. }
  617. /**
  618. * lh7a40x_in_epn - handle IN interrupt
  619. */
  620. static void lh7a40x_in_epn(struct lh7a40x_udc *dev, u32 ep_idx, u32 intr)
  621. {
  622. u32 csr;
  623. struct lh7a40x_ep *ep = &dev->ep[ep_idx];
  624. struct lh7a40x_request *req;
  625. usb_set_index(ep_idx);
  626. csr = usb_read(ep->csr1);
  627. DEBUG("%s: %d, csr %x\n", __FUNCTION__, ep_idx, csr);
  628. if (csr & USB_IN_CSR1_SENT_STALL) {
  629. DEBUG("USB_IN_CSR1_SENT_STALL\n");
  630. usb_set(USB_IN_CSR1_SENT_STALL /*|USB_IN_CSR1_SEND_STALL */ ,
  631. ep->csr1);
  632. return;
  633. }
  634. if (!ep->desc) {
  635. DEBUG("%s: NO EP DESC\n", __FUNCTION__);
  636. return;
  637. }
  638. if (list_empty(&ep->queue))
  639. req = 0;
  640. else
  641. req = list_entry(ep->queue.next, struct lh7a40x_request, queue);
  642. DEBUG("req: %p\n", req);
  643. if (!req)
  644. return;
  645. write_fifo(ep, req);
  646. }
  647. /* ********************************************************************************************* */
  648. /* Bulk OUT (recv)
  649. */
  650. static void lh7a40x_out_epn(struct lh7a40x_udc *dev, u32 ep_idx, u32 intr)
  651. {
  652. struct lh7a40x_ep *ep = &dev->ep[ep_idx];
  653. struct lh7a40x_request *req;
  654. DEBUG("%s: %d\n", __FUNCTION__, ep_idx);
  655. usb_set_index(ep_idx);
  656. if (ep->desc) {
  657. u32 csr;
  658. csr = usb_read(ep->csr1);
  659. while ((csr =
  660. usb_read(ep->
  661. csr1)) & (USB_OUT_CSR1_OUT_PKT_RDY |
  662. USB_OUT_CSR1_SENT_STALL)) {
  663. DEBUG("%s: %x\n", __FUNCTION__, csr);
  664. if (csr & USB_OUT_CSR1_SENT_STALL) {
  665. DEBUG("%s: stall sent, flush fifo\n",
  666. __FUNCTION__);
  667. /* usb_set(USB_OUT_CSR1_FIFO_FLUSH, ep->csr1); */
  668. flush(ep);
  669. } else if (csr & USB_OUT_CSR1_OUT_PKT_RDY) {
  670. if (list_empty(&ep->queue))
  671. req = 0;
  672. else
  673. req =
  674. list_entry(ep->queue.next,
  675. struct lh7a40x_request,
  676. queue);
  677. if (!req) {
  678. printk("%s: NULL REQ %d\n",
  679. __FUNCTION__, ep_idx);
  680. flush(ep);
  681. break;
  682. } else {
  683. read_fifo(ep, req);
  684. }
  685. }
  686. }
  687. } else {
  688. /* Throw packet away.. */
  689. printk("%s: No descriptor?!?\n", __FUNCTION__);
  690. flush(ep);
  691. }
  692. }
  693. static void stop_activity(struct lh7a40x_udc *dev,
  694. struct usb_gadget_driver *driver)
  695. {
  696. int i;
  697. /* don't disconnect drivers more than once */
  698. if (dev->gadget.speed == USB_SPEED_UNKNOWN)
  699. driver = 0;
  700. dev->gadget.speed = USB_SPEED_UNKNOWN;
  701. /* prevent new request submissions, kill any outstanding requests */
  702. for (i = 0; i < UDC_MAX_ENDPOINTS; i++) {
  703. struct lh7a40x_ep *ep = &dev->ep[i];
  704. ep->stopped = 1;
  705. usb_set_index(i);
  706. nuke(ep, -ESHUTDOWN);
  707. }
  708. /* report disconnect; the driver is already quiesced */
  709. if (driver) {
  710. spin_unlock(&dev->lock);
  711. driver->disconnect(&dev->gadget);
  712. spin_lock(&dev->lock);
  713. }
  714. /* re-init driver-visible data structures */
  715. udc_reinit(dev);
  716. }
  717. /** Handle USB RESET interrupt
  718. */
  719. static void lh7a40x_reset_intr(struct lh7a40x_udc *dev)
  720. {
  721. #if 0 /* def CONFIG_ARCH_LH7A404 */
  722. /* Does not work always... */
  723. DEBUG("%s: %d\n", __FUNCTION__, dev->usb_address);
  724. if (!dev->usb_address) {
  725. /*usb_set(USB_RESET_IO, USB_RESET);
  726. mdelay(5);
  727. usb_clear(USB_RESET_IO, USB_RESET); */
  728. return;
  729. }
  730. /* Put the USB controller into reset. */
  731. usb_set(USB_RESET_IO, USB_RESET);
  732. /* Set Device ID to 0 */
  733. udc_set_address(dev, 0);
  734. /* Let PLL2 settle down */
  735. mdelay(5);
  736. /* Release the USB controller from reset */
  737. usb_clear(USB_RESET_IO, USB_RESET);
  738. /* Re-enable UDC */
  739. udc_enable(dev);
  740. #endif
  741. dev->gadget.speed = USB_SPEED_FULL;
  742. }
  743. /*
  744. * lh7a40x usb client interrupt handler.
  745. */
  746. static irqreturn_t lh7a40x_udc_irq(int irq, void *_dev)
  747. {
  748. struct lh7a40x_udc *dev = _dev;
  749. DEBUG("\n\n");
  750. spin_lock(&dev->lock);
  751. for (;;) {
  752. u32 intr_in = usb_read(USB_IN_INT);
  753. u32 intr_out = usb_read(USB_OUT_INT);
  754. u32 intr_int = usb_read(USB_INT);
  755. /* Test also against enable bits.. (lh7a40x errata).. Sigh.. */
  756. u32 in_en = usb_read(USB_IN_INT_EN);
  757. u32 out_en = usb_read(USB_OUT_INT_EN);
  758. if (!intr_out && !intr_in && !intr_int)
  759. break;
  760. DEBUG("%s (on state %s)\n", __FUNCTION__,
  761. state_names[dev->ep0state]);
  762. DEBUG("intr_out = %x\n", intr_out);
  763. DEBUG("intr_in = %x\n", intr_in);
  764. DEBUG("intr_int = %x\n", intr_int);
  765. if (intr_in) {
  766. usb_write(intr_in, USB_IN_INT);
  767. if ((intr_in & USB_IN_INT_EP1)
  768. && (in_en & USB_IN_INT_EP1)) {
  769. DEBUG("USB_IN_INT_EP1\n");
  770. lh7a40x_in_epn(dev, 1, intr_in);
  771. }
  772. if ((intr_in & USB_IN_INT_EP3)
  773. && (in_en & USB_IN_INT_EP3)) {
  774. DEBUG("USB_IN_INT_EP3\n");
  775. lh7a40x_in_epn(dev, 3, intr_in);
  776. }
  777. if (intr_in & USB_IN_INT_EP0) {
  778. DEBUG("USB_IN_INT_EP0 (control)\n");
  779. lh7a40x_handle_ep0(dev, intr_in);
  780. }
  781. }
  782. if (intr_out) {
  783. usb_write(intr_out, USB_OUT_INT);
  784. if ((intr_out & USB_OUT_INT_EP2)
  785. && (out_en & USB_OUT_INT_EP2)) {
  786. DEBUG("USB_OUT_INT_EP2\n");
  787. lh7a40x_out_epn(dev, 2, intr_out);
  788. }
  789. }
  790. if (intr_int) {
  791. usb_write(intr_int, USB_INT);
  792. if (intr_int & USB_INT_RESET_INT) {
  793. lh7a40x_reset_intr(dev);
  794. }
  795. if (intr_int & USB_INT_RESUME_INT) {
  796. DEBUG("USB resume\n");
  797. if (dev->gadget.speed != USB_SPEED_UNKNOWN
  798. && dev->driver
  799. && dev->driver->resume
  800. && is_usb_connected()) {
  801. dev->driver->resume(&dev->gadget);
  802. }
  803. }
  804. if (intr_int & USB_INT_SUSPEND_INT) {
  805. DEBUG("USB suspend%s\n",
  806. is_usb_connected()? "" : "+disconnect");
  807. if (!is_usb_connected()) {
  808. stop_activity(dev, dev->driver);
  809. } else if (dev->gadget.speed !=
  810. USB_SPEED_UNKNOWN && dev->driver
  811. && dev->driver->suspend) {
  812. dev->driver->suspend(&dev->gadget);
  813. }
  814. }
  815. }
  816. }
  817. spin_unlock(&dev->lock);
  818. return IRQ_HANDLED;
  819. }
  820. static int lh7a40x_ep_enable(struct usb_ep *_ep,
  821. const struct usb_endpoint_descriptor *desc)
  822. {
  823. struct lh7a40x_ep *ep;
  824. struct lh7a40x_udc *dev;
  825. unsigned long flags;
  826. DEBUG("%s, %p\n", __FUNCTION__, _ep);
  827. ep = container_of(_ep, struct lh7a40x_ep, ep);
  828. if (!_ep || !desc || ep->desc || _ep->name == ep0name
  829. || desc->bDescriptorType != USB_DT_ENDPOINT
  830. || ep->bEndpointAddress != desc->bEndpointAddress
  831. || ep_maxpacket(ep) < le16_to_cpu(desc->wMaxPacketSize)) {
  832. DEBUG("%s, bad ep or descriptor\n", __FUNCTION__);
  833. return -EINVAL;
  834. }
  835. /* xfer types must match, except that interrupt ~= bulk */
  836. if (ep->bmAttributes != desc->bmAttributes
  837. && ep->bmAttributes != USB_ENDPOINT_XFER_BULK
  838. && desc->bmAttributes != USB_ENDPOINT_XFER_INT) {
  839. DEBUG("%s, %s type mismatch\n", __FUNCTION__, _ep->name);
  840. return -EINVAL;
  841. }
  842. /* hardware _could_ do smaller, but driver doesn't */
  843. if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK
  844. && le16_to_cpu(desc->wMaxPacketSize) != ep_maxpacket(ep))
  845. || !desc->wMaxPacketSize) {
  846. DEBUG("%s, bad %s maxpacket\n", __FUNCTION__, _ep->name);
  847. return -ERANGE;
  848. }
  849. dev = ep->dev;
  850. if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) {
  851. DEBUG("%s, bogus device state\n", __FUNCTION__);
  852. return -ESHUTDOWN;
  853. }
  854. spin_lock_irqsave(&ep->dev->lock, flags);
  855. ep->stopped = 0;
  856. ep->desc = desc;
  857. ep->pio_irqs = 0;
  858. ep->ep.maxpacket = le16_to_cpu(desc->wMaxPacketSize);
  859. spin_unlock_irqrestore(&ep->dev->lock, flags);
  860. /* Reset halt state (does flush) */
  861. lh7a40x_set_halt(_ep, 0);
  862. DEBUG("%s: enabled %s\n", __FUNCTION__, _ep->name);
  863. return 0;
  864. }
  865. /** Disable EP
  866. * NOTE: Sets INDEX register
  867. */
  868. static int lh7a40x_ep_disable(struct usb_ep *_ep)
  869. {
  870. struct lh7a40x_ep *ep;
  871. unsigned long flags;
  872. DEBUG("%s, %p\n", __FUNCTION__, _ep);
  873. ep = container_of(_ep, struct lh7a40x_ep, ep);
  874. if (!_ep || !ep->desc) {
  875. DEBUG("%s, %s not enabled\n", __FUNCTION__,
  876. _ep ? ep->ep.name : NULL);
  877. return -EINVAL;
  878. }
  879. spin_lock_irqsave(&ep->dev->lock, flags);
  880. usb_set_index(ep_index(ep));
  881. /* Nuke all pending requests (does flush) */
  882. nuke(ep, -ESHUTDOWN);
  883. /* Disable ep IRQ */
  884. pio_irq_disable(ep_index(ep));
  885. ep->desc = 0;
  886. ep->stopped = 1;
  887. spin_unlock_irqrestore(&ep->dev->lock, flags);
  888. DEBUG("%s: disabled %s\n", __FUNCTION__, _ep->name);
  889. return 0;
  890. }
  891. static struct usb_request *lh7a40x_alloc_request(struct usb_ep *ep,
  892. gfp_t gfp_flags)
  893. {
  894. struct lh7a40x_request *req;
  895. DEBUG("%s, %p\n", __FUNCTION__, ep);
  896. req = kzalloc(sizeof(*req), gfp_flags);
  897. if (!req)
  898. return 0;
  899. INIT_LIST_HEAD(&req->queue);
  900. return &req->req;
  901. }
  902. static void lh7a40x_free_request(struct usb_ep *ep, struct usb_request *_req)
  903. {
  904. struct lh7a40x_request *req;
  905. DEBUG("%s, %p\n", __FUNCTION__, ep);
  906. req = container_of(_req, struct lh7a40x_request, req);
  907. WARN_ON(!list_empty(&req->queue));
  908. kfree(req);
  909. }
  910. /** Queue one request
  911. * Kickstart transfer if needed
  912. * NOTE: Sets INDEX register
  913. */
  914. static int lh7a40x_queue(struct usb_ep *_ep, struct usb_request *_req,
  915. gfp_t gfp_flags)
  916. {
  917. struct lh7a40x_request *req;
  918. struct lh7a40x_ep *ep;
  919. struct lh7a40x_udc *dev;
  920. unsigned long flags;
  921. DEBUG("\n\n\n%s, %p\n", __FUNCTION__, _ep);
  922. req = container_of(_req, struct lh7a40x_request, req);
  923. if (unlikely
  924. (!_req || !_req->complete || !_req->buf
  925. || !list_empty(&req->queue))) {
  926. DEBUG("%s, bad params\n", __FUNCTION__);
  927. return -EINVAL;
  928. }
  929. ep = container_of(_ep, struct lh7a40x_ep, ep);
  930. if (unlikely(!_ep || (!ep->desc && ep->ep.name != ep0name))) {
  931. DEBUG("%s, bad ep\n", __FUNCTION__);
  932. return -EINVAL;
  933. }
  934. dev = ep->dev;
  935. if (unlikely(!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)) {
  936. DEBUG("%s, bogus device state %p\n", __FUNCTION__, dev->driver);
  937. return -ESHUTDOWN;
  938. }
  939. DEBUG("%s queue req %p, len %d buf %p\n", _ep->name, _req, _req->length,
  940. _req->buf);
  941. spin_lock_irqsave(&dev->lock, flags);
  942. _req->status = -EINPROGRESS;
  943. _req->actual = 0;
  944. /* kickstart this i/o queue? */
  945. DEBUG("Add to %d Q %d %d\n", ep_index(ep), list_empty(&ep->queue),
  946. ep->stopped);
  947. if (list_empty(&ep->queue) && likely(!ep->stopped)) {
  948. u32 csr;
  949. if (unlikely(ep_index(ep) == 0)) {
  950. /* EP0 */
  951. list_add_tail(&req->queue, &ep->queue);
  952. lh7a40x_ep0_kick(dev, ep);
  953. req = 0;
  954. } else if (ep_is_in(ep)) {
  955. /* EP1 & EP3 */
  956. usb_set_index(ep_index(ep));
  957. csr = usb_read(ep->csr1);
  958. pio_irq_enable(ep_index(ep));
  959. if ((csr & USB_IN_CSR1_FIFO_NOT_EMPTY) == 0) {
  960. if (write_fifo(ep, req) == 1)
  961. req = 0;
  962. }
  963. } else {
  964. /* EP2 */
  965. usb_set_index(ep_index(ep));
  966. csr = usb_read(ep->csr1);
  967. pio_irq_enable(ep_index(ep));
  968. if (!(csr & USB_OUT_CSR1_FIFO_FULL)) {
  969. if (read_fifo(ep, req) == 1)
  970. req = 0;
  971. }
  972. }
  973. }
  974. /* pio or dma irq handler advances the queue. */
  975. if (likely(req != 0))
  976. list_add_tail(&req->queue, &ep->queue);
  977. spin_unlock_irqrestore(&dev->lock, flags);
  978. return 0;
  979. }
  980. /* dequeue JUST ONE request */
  981. static int lh7a40x_dequeue(struct usb_ep *_ep, struct usb_request *_req)
  982. {
  983. struct lh7a40x_ep *ep;
  984. struct lh7a40x_request *req;
  985. unsigned long flags;
  986. DEBUG("%s, %p\n", __FUNCTION__, _ep);
  987. ep = container_of(_ep, struct lh7a40x_ep, ep);
  988. if (!_ep || ep->ep.name == ep0name)
  989. return -EINVAL;
  990. spin_lock_irqsave(&ep->dev->lock, flags);
  991. /* make sure it's actually queued on this endpoint */
  992. list_for_each_entry(req, &ep->queue, queue) {
  993. if (&req->req == _req)
  994. break;
  995. }
  996. if (&req->req != _req) {
  997. spin_unlock_irqrestore(&ep->dev->lock, flags);
  998. return -EINVAL;
  999. }
  1000. done(ep, req, -ECONNRESET);
  1001. spin_unlock_irqrestore(&ep->dev->lock, flags);
  1002. return 0;
  1003. }
  1004. /** Halt specific EP
  1005. * Return 0 if success
  1006. * NOTE: Sets INDEX register to EP !
  1007. */
  1008. static int lh7a40x_set_halt(struct usb_ep *_ep, int value)
  1009. {
  1010. struct lh7a40x_ep *ep;
  1011. unsigned long flags;
  1012. ep = container_of(_ep, struct lh7a40x_ep, ep);
  1013. if (unlikely(!_ep || (!ep->desc && ep->ep.name != ep0name))) {
  1014. DEBUG("%s, bad ep\n", __FUNCTION__);
  1015. return -EINVAL;
  1016. }
  1017. usb_set_index(ep_index(ep));
  1018. DEBUG("%s, ep %d, val %d\n", __FUNCTION__, ep_index(ep), value);
  1019. spin_lock_irqsave(&ep->dev->lock, flags);
  1020. if (ep_index(ep) == 0) {
  1021. /* EP0 */
  1022. usb_set(EP0_SEND_STALL, ep->csr1);
  1023. } else if (ep_is_in(ep)) {
  1024. u32 csr = usb_read(ep->csr1);
  1025. if (value && ((csr & USB_IN_CSR1_FIFO_NOT_EMPTY)
  1026. || !list_empty(&ep->queue))) {
  1027. /*
  1028. * Attempts to halt IN endpoints will fail (returning -EAGAIN)
  1029. * if any transfer requests are still queued, or if the controller
  1030. * FIFO still holds bytes that the host hasn't collected.
  1031. */
  1032. spin_unlock_irqrestore(&ep->dev->lock, flags);
  1033. DEBUG
  1034. ("Attempt to halt IN endpoint failed (returning -EAGAIN) %d %d\n",
  1035. (csr & USB_IN_CSR1_FIFO_NOT_EMPTY),
  1036. !list_empty(&ep->queue));
  1037. return -EAGAIN;
  1038. }
  1039. flush(ep);
  1040. if (value)
  1041. usb_set(USB_IN_CSR1_SEND_STALL, ep->csr1);
  1042. else {
  1043. usb_clear(USB_IN_CSR1_SEND_STALL, ep->csr1);
  1044. usb_set(USB_IN_CSR1_CLR_DATA_TOGGLE, ep->csr1);
  1045. }
  1046. } else {
  1047. flush(ep);
  1048. if (value)
  1049. usb_set(USB_OUT_CSR1_SEND_STALL, ep->csr1);
  1050. else {
  1051. usb_clear(USB_OUT_CSR1_SEND_STALL, ep->csr1);
  1052. usb_set(USB_OUT_CSR1_CLR_DATA_REG, ep->csr1);
  1053. }
  1054. }
  1055. if (value) {
  1056. ep->stopped = 1;
  1057. } else {
  1058. ep->stopped = 0;
  1059. }
  1060. spin_unlock_irqrestore(&ep->dev->lock, flags);
  1061. DEBUG("%s %s halted\n", _ep->name, value == 0 ? "NOT" : "IS");
  1062. return 0;
  1063. }
  1064. /** Return bytes in EP FIFO
  1065. * NOTE: Sets INDEX register to EP
  1066. */
  1067. static int lh7a40x_fifo_status(struct usb_ep *_ep)
  1068. {
  1069. u32 csr;
  1070. int count = 0;
  1071. struct lh7a40x_ep *ep;
  1072. ep = container_of(_ep, struct lh7a40x_ep, ep);
  1073. if (!_ep) {
  1074. DEBUG("%s, bad ep\n", __FUNCTION__);
  1075. return -ENODEV;
  1076. }
  1077. DEBUG("%s, %d\n", __FUNCTION__, ep_index(ep));
  1078. /* LPD can't report unclaimed bytes from IN fifos */
  1079. if (ep_is_in(ep))
  1080. return -EOPNOTSUPP;
  1081. usb_set_index(ep_index(ep));
  1082. csr = usb_read(ep->csr1);
  1083. if (ep->dev->gadget.speed != USB_SPEED_UNKNOWN ||
  1084. csr & USB_OUT_CSR1_OUT_PKT_RDY) {
  1085. count = usb_read(USB_OUT_FIFO_WC1);
  1086. }
  1087. return count;
  1088. }
  1089. /** Flush EP FIFO
  1090. * NOTE: Sets INDEX register to EP
  1091. */
  1092. static void lh7a40x_fifo_flush(struct usb_ep *_ep)
  1093. {
  1094. struct lh7a40x_ep *ep;
  1095. ep = container_of(_ep, struct lh7a40x_ep, ep);
  1096. if (unlikely(!_ep || (!ep->desc && ep->ep.name != ep0name))) {
  1097. DEBUG("%s, bad ep\n", __FUNCTION__);
  1098. return;
  1099. }
  1100. usb_set_index(ep_index(ep));
  1101. flush(ep);
  1102. }
  1103. /****************************************************************/
  1104. /* End Point 0 related functions */
  1105. /****************************************************************/
  1106. /* return: 0 = still running, 1 = completed, negative = errno */
  1107. static int write_fifo_ep0(struct lh7a40x_ep *ep, struct lh7a40x_request *req)
  1108. {
  1109. u32 max;
  1110. unsigned count;
  1111. int is_last;
  1112. max = ep_maxpacket(ep);
  1113. DEBUG_EP0("%s\n", __FUNCTION__);
  1114. count = write_packet(ep, req, max);
  1115. /* last packet is usually short (or a zlp) */
  1116. if (unlikely(count != max))
  1117. is_last = 1;
  1118. else {
  1119. if (likely(req->req.length != req->req.actual) || req->req.zero)
  1120. is_last = 0;
  1121. else
  1122. is_last = 1;
  1123. }
  1124. DEBUG_EP0("%s: wrote %s %d bytes%s %d left %p\n", __FUNCTION__,
  1125. ep->ep.name, count,
  1126. is_last ? "/L" : "", req->req.length - req->req.actual, req);
  1127. /* requests complete when all IN data is in the FIFO */
  1128. if (is_last) {
  1129. done(ep, req, 0);
  1130. return 1;
  1131. }
  1132. return 0;
  1133. }
  1134. static __inline__ int lh7a40x_fifo_read(struct lh7a40x_ep *ep,
  1135. unsigned char *cp, int max)
  1136. {
  1137. int bytes;
  1138. int count = usb_read(USB_OUT_FIFO_WC1);
  1139. volatile u32 *fifo = (volatile u32 *)ep->fifo;
  1140. if (count > max)
  1141. count = max;
  1142. bytes = count;
  1143. while (count--)
  1144. *cp++ = *fifo & 0xFF;
  1145. return bytes;
  1146. }
  1147. static __inline__ void lh7a40x_fifo_write(struct lh7a40x_ep *ep,
  1148. unsigned char *cp, int count)
  1149. {
  1150. volatile u32 *fifo = (volatile u32 *)ep->fifo;
  1151. DEBUG_EP0("fifo_write: %d %d\n", ep_index(ep), count);
  1152. while (count--)
  1153. *fifo = *cp++;
  1154. }
  1155. static int read_fifo_ep0(struct lh7a40x_ep *ep, struct lh7a40x_request *req)
  1156. {
  1157. u32 csr;
  1158. u8 *buf;
  1159. unsigned bufferspace, count, is_short;
  1160. volatile u32 *fifo = (volatile u32 *)ep->fifo;
  1161. DEBUG_EP0("%s\n", __FUNCTION__);
  1162. csr = usb_read(USB_EP0_CSR);
  1163. if (!(csr & USB_OUT_CSR1_OUT_PKT_RDY))
  1164. return 0;
  1165. buf = req->req.buf + req->req.actual;
  1166. prefetchw(buf);
  1167. bufferspace = req->req.length - req->req.actual;
  1168. /* read all bytes from this packet */
  1169. if (likely(csr & EP0_OUT_PKT_RDY)) {
  1170. count = usb_read(USB_OUT_FIFO_WC1);
  1171. req->req.actual += min(count, bufferspace);
  1172. } else /* zlp */
  1173. count = 0;
  1174. is_short = (count < ep->ep.maxpacket);
  1175. DEBUG_EP0("read %s %02x, %d bytes%s req %p %d/%d\n",
  1176. ep->ep.name, csr, count,
  1177. is_short ? "/S" : "", req, req->req.actual, req->req.length);
  1178. while (likely(count-- != 0)) {
  1179. u8 byte = (u8) (*fifo & 0xff);
  1180. if (unlikely(bufferspace == 0)) {
  1181. /* this happens when the driver's buffer
  1182. * is smaller than what the host sent.
  1183. * discard the extra data.
  1184. */
  1185. if (req->req.status != -EOVERFLOW)
  1186. DEBUG_EP0("%s overflow %d\n", ep->ep.name,
  1187. count);
  1188. req->req.status = -EOVERFLOW;
  1189. } else {
  1190. *buf++ = byte;
  1191. bufferspace--;
  1192. }
  1193. }
  1194. /* completion */
  1195. if (is_short || req->req.actual == req->req.length) {
  1196. done(ep, req, 0);
  1197. return 1;
  1198. }
  1199. /* finished that packet. the next one may be waiting... */
  1200. return 0;
  1201. }
  1202. /**
  1203. * udc_set_address - set the USB address for this device
  1204. * @address:
  1205. *
  1206. * Called from control endpoint function after it decodes a set address setup packet.
  1207. */
  1208. static void udc_set_address(struct lh7a40x_udc *dev, unsigned char address)
  1209. {
  1210. DEBUG_EP0("%s: %d\n", __FUNCTION__, address);
  1211. /* c.f. 15.1.2.2 Table 15-4 address will be used after DATA_END is set */
  1212. dev->usb_address = address;
  1213. usb_set((address & USB_FA_FUNCTION_ADDR), USB_FA);
  1214. usb_set(USB_FA_ADDR_UPDATE | (address & USB_FA_FUNCTION_ADDR), USB_FA);
  1215. /* usb_read(USB_FA); */
  1216. }
  1217. /*
  1218. * DATA_STATE_RECV (OUT_PKT_RDY)
  1219. * - if error
  1220. * set EP0_CLR_OUT | EP0_DATA_END | EP0_SEND_STALL bits
  1221. * - else
  1222. * set EP0_CLR_OUT bit
  1223. if last set EP0_DATA_END bit
  1224. */
  1225. static void lh7a40x_ep0_out(struct lh7a40x_udc *dev, u32 csr)
  1226. {
  1227. struct lh7a40x_request *req;
  1228. struct lh7a40x_ep *ep = &dev->ep[0];
  1229. int ret;
  1230. DEBUG_EP0("%s: %x\n", __FUNCTION__, csr);
  1231. if (list_empty(&ep->queue))
  1232. req = 0;
  1233. else
  1234. req = list_entry(ep->queue.next, struct lh7a40x_request, queue);
  1235. if (req) {
  1236. if (req->req.length == 0) {
  1237. DEBUG_EP0("ZERO LENGTH OUT!\n");
  1238. usb_set((EP0_CLR_OUT | EP0_DATA_END), USB_EP0_CSR);
  1239. dev->ep0state = WAIT_FOR_SETUP;
  1240. return;
  1241. }
  1242. ret = read_fifo_ep0(ep, req);
  1243. if (ret) {
  1244. /* Done! */
  1245. DEBUG_EP0("%s: finished, waiting for status\n",
  1246. __FUNCTION__);
  1247. usb_set((EP0_CLR_OUT | EP0_DATA_END), USB_EP0_CSR);
  1248. dev->ep0state = WAIT_FOR_SETUP;
  1249. } else {
  1250. /* Not done yet.. */
  1251. DEBUG_EP0("%s: not finished\n", __FUNCTION__);
  1252. usb_set(EP0_CLR_OUT, USB_EP0_CSR);
  1253. }
  1254. } else {
  1255. DEBUG_EP0("NO REQ??!\n");
  1256. }
  1257. }
  1258. /*
  1259. * DATA_STATE_XMIT
  1260. */
  1261. static int lh7a40x_ep0_in(struct lh7a40x_udc *dev, u32 csr)
  1262. {
  1263. struct lh7a40x_request *req;
  1264. struct lh7a40x_ep *ep = &dev->ep[0];
  1265. int ret, need_zlp = 0;
  1266. DEBUG_EP0("%s: %x\n", __FUNCTION__, csr);
  1267. if (list_empty(&ep->queue))
  1268. req = 0;
  1269. else
  1270. req = list_entry(ep->queue.next, struct lh7a40x_request, queue);
  1271. if (!req) {
  1272. DEBUG_EP0("%s: NULL REQ\n", __FUNCTION__);
  1273. return 0;
  1274. }
  1275. if (req->req.length == 0) {
  1276. usb_set((EP0_IN_PKT_RDY | EP0_DATA_END), USB_EP0_CSR);
  1277. dev->ep0state = WAIT_FOR_SETUP;
  1278. return 1;
  1279. }
  1280. if (req->req.length - req->req.actual == EP0_PACKETSIZE) {
  1281. /* Next write will end with the packet size, */
  1282. /* so we need Zero-length-packet */
  1283. need_zlp = 1;
  1284. }
  1285. ret = write_fifo_ep0(ep, req);
  1286. if (ret == 1 && !need_zlp) {
  1287. /* Last packet */
  1288. DEBUG_EP0("%s: finished, waiting for status\n", __FUNCTION__);
  1289. usb_set((EP0_IN_PKT_RDY | EP0_DATA_END), USB_EP0_CSR);
  1290. dev->ep0state = WAIT_FOR_SETUP;
  1291. } else {
  1292. DEBUG_EP0("%s: not finished\n", __FUNCTION__);
  1293. usb_set(EP0_IN_PKT_RDY, USB_EP0_CSR);
  1294. }
  1295. if (need_zlp) {
  1296. DEBUG_EP0("%s: Need ZLP!\n", __FUNCTION__);
  1297. usb_set(EP0_IN_PKT_RDY, USB_EP0_CSR);
  1298. dev->ep0state = DATA_STATE_NEED_ZLP;
  1299. }
  1300. return 1;
  1301. }
  1302. static int lh7a40x_handle_get_status(struct lh7a40x_udc *dev,
  1303. struct usb_ctrlrequest *ctrl)
  1304. {
  1305. struct lh7a40x_ep *ep0 = &dev->ep[0];
  1306. struct lh7a40x_ep *qep;
  1307. int reqtype = (ctrl->bRequestType & USB_RECIP_MASK);
  1308. u16 val = 0;
  1309. if (reqtype == USB_RECIP_INTERFACE) {
  1310. /* This is not supported.
  1311. * And according to the USB spec, this one does nothing..
  1312. * Just return 0
  1313. */
  1314. DEBUG_SETUP("GET_STATUS: USB_RECIP_INTERFACE\n");
  1315. } else if (reqtype == USB_RECIP_DEVICE) {
  1316. DEBUG_SETUP("GET_STATUS: USB_RECIP_DEVICE\n");
  1317. val |= (1 << 0); /* Self powered */
  1318. /*val |= (1<<1); *//* Remote wakeup */
  1319. } else if (reqtype == USB_RECIP_ENDPOINT) {
  1320. int ep_num = (ctrl->wIndex & ~USB_DIR_IN);
  1321. DEBUG_SETUP
  1322. ("GET_STATUS: USB_RECIP_ENDPOINT (%d), ctrl->wLength = %d\n",
  1323. ep_num, ctrl->wLength);
  1324. if (ctrl->wLength > 2 || ep_num > 3)
  1325. return -EOPNOTSUPP;
  1326. qep = &dev->ep[ep_num];
  1327. if (ep_is_in(qep) != ((ctrl->wIndex & USB_DIR_IN) ? 1 : 0)
  1328. && ep_index(qep) != 0) {
  1329. return -EOPNOTSUPP;
  1330. }
  1331. usb_set_index(ep_index(qep));
  1332. /* Return status on next IN token */
  1333. switch (qep->ep_type) {
  1334. case ep_control:
  1335. val =
  1336. (usb_read(qep->csr1) & EP0_SEND_STALL) ==
  1337. EP0_SEND_STALL;
  1338. break;
  1339. case ep_bulk_in:
  1340. case ep_interrupt:
  1341. val =
  1342. (usb_read(qep->csr1) & USB_IN_CSR1_SEND_STALL) ==
  1343. USB_IN_CSR1_SEND_STALL;
  1344. break;
  1345. case ep_bulk_out:
  1346. val =
  1347. (usb_read(qep->csr1) & USB_OUT_CSR1_SEND_STALL) ==
  1348. USB_OUT_CSR1_SEND_STALL;
  1349. break;
  1350. }
  1351. /* Back to EP0 index */
  1352. usb_set_index(0);
  1353. DEBUG_SETUP("GET_STATUS, ep: %d (%x), val = %d\n", ep_num,
  1354. ctrl->wIndex, val);
  1355. } else {
  1356. DEBUG_SETUP("Unknown REQ TYPE: %d\n", reqtype);
  1357. return -EOPNOTSUPP;
  1358. }
  1359. /* Clear "out packet ready" */
  1360. usb_set((EP0_CLR_OUT), USB_EP0_CSR);
  1361. /* Put status to FIFO */
  1362. lh7a40x_fifo_write(ep0, (u8 *) & val, sizeof(val));
  1363. /* Issue "In packet ready" */
  1364. usb_set((EP0_IN_PKT_RDY | EP0_DATA_END), USB_EP0_CSR);
  1365. return 0;
  1366. }
  1367. /*
  1368. * WAIT_FOR_SETUP (OUT_PKT_RDY)
  1369. * - read data packet from EP0 FIFO
  1370. * - decode command
  1371. * - if error
  1372. * set EP0_CLR_OUT | EP0_DATA_END | EP0_SEND_STALL bits
  1373. * - else
  1374. * set EP0_CLR_OUT | EP0_DATA_END bits
  1375. */
  1376. static void lh7a40x_ep0_setup(struct lh7a40x_udc *dev, u32 csr)
  1377. {
  1378. struct lh7a40x_ep *ep = &dev->ep[0];
  1379. struct usb_ctrlrequest ctrl;
  1380. int i, bytes, is_in;
  1381. DEBUG_SETUP("%s: %x\n", __FUNCTION__, csr);
  1382. /* Nuke all previous transfers */
  1383. nuke(ep, -EPROTO);
  1384. /* read control req from fifo (8 bytes) */
  1385. bytes = lh7a40x_fifo_read(ep, (unsigned char *)&ctrl, 8);
  1386. DEBUG_SETUP("Read CTRL REQ %d bytes\n", bytes);
  1387. DEBUG_SETUP("CTRL.bRequestType = %d (is_in %d)\n", ctrl.bRequestType,
  1388. ctrl.bRequestType == USB_DIR_IN);
  1389. DEBUG_SETUP("CTRL.bRequest = %d\n", ctrl.bRequest);
  1390. DEBUG_SETUP("CTRL.wLength = %d\n", ctrl.wLength);
  1391. DEBUG_SETUP("CTRL.wValue = %d (%d)\n", ctrl.wValue, ctrl.wValue >> 8);
  1392. DEBUG_SETUP("CTRL.wIndex = %d\n", ctrl.wIndex);
  1393. /* Set direction of EP0 */
  1394. if (likely(ctrl.bRequestType & USB_DIR_IN)) {
  1395. ep->bEndpointAddress |= USB_DIR_IN;
  1396. is_in = 1;
  1397. } else {
  1398. ep->bEndpointAddress &= ~USB_DIR_IN;
  1399. is_in = 0;
  1400. }
  1401. dev->req_pending = 1;
  1402. /* Handle some SETUP packets ourselves */
  1403. switch (ctrl.bRequest) {
  1404. case USB_REQ_SET_ADDRESS:
  1405. if (ctrl.bRequestType != (USB_TYPE_STANDARD | USB_RECIP_DEVICE))
  1406. break;
  1407. DEBUG_SETUP("USB_REQ_SET_ADDRESS (%d)\n", ctrl.wValue);
  1408. udc_set_address(dev, ctrl.wValue);
  1409. usb_set((EP0_CLR_OUT | EP0_DATA_END), USB_EP0_CSR);
  1410. return;
  1411. case USB_REQ_GET_STATUS:{
  1412. if (lh7a40x_handle_get_status(dev, &ctrl) == 0)
  1413. return;
  1414. case USB_REQ_CLEAR_FEATURE:
  1415. case USB_REQ_SET_FEATURE:
  1416. if (ctrl.bRequestType == USB_RECIP_ENDPOINT) {
  1417. struct lh7a40x_ep *qep;
  1418. int ep_num = (ctrl.wIndex & 0x0f);
  1419. /* Support only HALT feature */
  1420. if (ctrl.wValue != 0 || ctrl.wLength != 0
  1421. || ep_num > 3 || ep_num < 1)
  1422. break;
  1423. qep = &dev->ep[ep_num];
  1424. spin_unlock(&dev->lock);
  1425. if (ctrl.bRequest == USB_REQ_SET_FEATURE) {
  1426. DEBUG_SETUP("SET_FEATURE (%d)\n",
  1427. ep_num);
  1428. lh7a40x_set_halt(&qep->ep, 1);
  1429. } else {
  1430. DEBUG_SETUP("CLR_FEATURE (%d)\n",
  1431. ep_num);
  1432. lh7a40x_set_halt(&qep->ep, 0);
  1433. }
  1434. spin_lock(&dev->lock);
  1435. usb_set_index(0);
  1436. /* Reply with a ZLP on next IN token */
  1437. usb_set((EP0_CLR_OUT | EP0_DATA_END),
  1438. USB_EP0_CSR);
  1439. return;
  1440. }
  1441. break;
  1442. }
  1443. default:
  1444. break;
  1445. }
  1446. if (likely(dev->driver)) {
  1447. /* device-2-host (IN) or no data setup command, process immediately */
  1448. spin_unlock(&dev->lock);
  1449. i = dev->driver->setup(&dev->gadget, &ctrl);
  1450. spin_lock(&dev->lock);
  1451. if (i < 0) {
  1452. /* setup processing failed, force stall */
  1453. DEBUG_SETUP
  1454. (" --> ERROR: gadget setup FAILED (stalling), setup returned %d\n",
  1455. i);
  1456. usb_set_index(0);
  1457. usb_set((EP0_CLR_OUT | EP0_DATA_END | EP0_SEND_STALL),
  1458. USB_EP0_CSR);
  1459. /* ep->stopped = 1; */
  1460. dev->ep0state = WAIT_FOR_SETUP;
  1461. }
  1462. }
  1463. }
  1464. /*
  1465. * DATA_STATE_NEED_ZLP
  1466. */
  1467. static void lh7a40x_ep0_in_zlp(struct lh7a40x_udc *dev, u32 csr)
  1468. {
  1469. DEBUG_EP0("%s: %x\n", __FUNCTION__, csr);
  1470. /* c.f. Table 15-14 */
  1471. usb_set((EP0_IN_PKT_RDY | EP0_DATA_END), USB_EP0_CSR);
  1472. dev->ep0state = WAIT_FOR_SETUP;
  1473. }
  1474. /*
  1475. * handle ep0 interrupt
  1476. */
  1477. static void lh7a40x_handle_ep0(struct lh7a40x_udc *dev, u32 intr)
  1478. {
  1479. struct lh7a40x_ep *ep = &dev->ep[0];
  1480. u32 csr;
  1481. /* Set index 0 */
  1482. usb_set_index(0);
  1483. csr = usb_read(USB_EP0_CSR);
  1484. DEBUG_EP0("%s: csr = %x\n", __FUNCTION__, csr);
  1485. /*
  1486. * For overview of what we should be doing see c.f. Chapter 18.1.2.4
  1487. * We will follow that outline here modified by our own global state
  1488. * indication which provides hints as to what we think should be
  1489. * happening..
  1490. */
  1491. /*
  1492. * if SENT_STALL is set
  1493. * - clear the SENT_STALL bit
  1494. */
  1495. if (csr & EP0_SENT_STALL) {
  1496. DEBUG_EP0("%s: EP0_SENT_STALL is set: %x\n", __FUNCTION__, csr);
  1497. usb_clear((EP0_SENT_STALL | EP0_SEND_STALL), USB_EP0_CSR);
  1498. nuke(ep, -ECONNABORTED);
  1499. dev->ep0state = WAIT_FOR_SETUP;
  1500. return;
  1501. }
  1502. /*
  1503. * if a transfer is in progress && IN_PKT_RDY and OUT_PKT_RDY are clear
  1504. * - fill EP0 FIFO
  1505. * - if last packet
  1506. * - set IN_PKT_RDY | DATA_END
  1507. * - else
  1508. * set IN_PKT_RDY
  1509. */
  1510. if (!(csr & (EP0_IN_PKT_RDY | EP0_OUT_PKT_RDY))) {
  1511. DEBUG_EP0("%s: IN_PKT_RDY and OUT_PKT_RDY are clear\n",
  1512. __FUNCTION__);
  1513. switch (dev->ep0state) {
  1514. case DATA_STATE_XMIT:
  1515. DEBUG_EP0("continue with DATA_STATE_XMIT\n");
  1516. lh7a40x_ep0_in(dev, csr);
  1517. return;
  1518. case DATA_STATE_NEED_ZLP:
  1519. DEBUG_EP0("continue with DATA_STATE_NEED_ZLP\n");
  1520. lh7a40x_ep0_in_zlp(dev, csr);
  1521. return;
  1522. default:
  1523. /* Stall? */
  1524. DEBUG_EP0("Odd state!! state = %s\n",
  1525. state_names[dev->ep0state]);
  1526. dev->ep0state = WAIT_FOR_SETUP;
  1527. /* nuke(ep, 0); */
  1528. /* usb_set(EP0_SEND_STALL, ep->csr1); */
  1529. break;
  1530. }
  1531. }
  1532. /*
  1533. * if SETUP_END is set
  1534. * - abort the last transfer
  1535. * - set SERVICED_SETUP_END_BIT
  1536. */
  1537. if (csr & EP0_SETUP_END) {
  1538. DEBUG_EP0("%s: EP0_SETUP_END is set: %x\n", __FUNCTION__, csr);
  1539. usb_set(EP0_CLR_SETUP_END, USB_EP0_CSR);
  1540. nuke(ep, 0);
  1541. dev->ep0state = WAIT_FOR_SETUP;
  1542. }
  1543. /*
  1544. * if EP0_OUT_PKT_RDY is set
  1545. * - read data packet from EP0 FIFO
  1546. * - decode command
  1547. * - if error
  1548. * set SERVICED_OUT_PKT_RDY | DATA_END bits | SEND_STALL
  1549. * - else
  1550. * set SERVICED_OUT_PKT_RDY | DATA_END bits
  1551. */
  1552. if (csr & EP0_OUT_PKT_RDY) {
  1553. DEBUG_EP0("%s: EP0_OUT_PKT_RDY is set: %x\n", __FUNCTION__,
  1554. csr);
  1555. switch (dev->ep0state) {
  1556. case WAIT_FOR_SETUP:
  1557. DEBUG_EP0("WAIT_FOR_SETUP\n");
  1558. lh7a40x_ep0_setup(dev, csr);
  1559. break;
  1560. case DATA_STATE_RECV:
  1561. DEBUG_EP0("DATA_STATE_RECV\n");
  1562. lh7a40x_ep0_out(dev, csr);
  1563. break;
  1564. default:
  1565. /* send stall? */
  1566. DEBUG_EP0("strange state!! 2. send stall? state = %d\n",
  1567. dev->ep0state);
  1568. break;
  1569. }
  1570. }
  1571. }
  1572. static void lh7a40x_ep0_kick(struct lh7a40x_udc *dev, struct lh7a40x_ep *ep)
  1573. {
  1574. u32 csr;
  1575. usb_set_index(0);
  1576. csr = usb_read(USB_EP0_CSR);
  1577. DEBUG_EP0("%s: %x\n", __FUNCTION__, csr);
  1578. /* Clear "out packet ready" */
  1579. usb_set(EP0_CLR_OUT, USB_EP0_CSR);
  1580. if (ep_is_in(ep)) {
  1581. dev->ep0state = DATA_STATE_XMIT;
  1582. lh7a40x_ep0_in(dev, csr);
  1583. } else {
  1584. dev->ep0state = DATA_STATE_RECV;
  1585. lh7a40x_ep0_out(dev, csr);
  1586. }
  1587. }
  1588. /* ---------------------------------------------------------------------------
  1589. * device-scoped parts of the api to the usb controller hardware
  1590. * ---------------------------------------------------------------------------
  1591. */
  1592. static int lh7a40x_udc_get_frame(struct usb_gadget *_gadget)
  1593. {
  1594. u32 frame1 = usb_read(USB_FRM_NUM1); /* Least significant 8 bits */
  1595. u32 frame2 = usb_read(USB_FRM_NUM2); /* Most significant 3 bits */
  1596. DEBUG("%s, %p\n", __FUNCTION__, _gadget);
  1597. return ((frame2 & 0x07) << 8) | (frame1 & 0xff);
  1598. }
  1599. static int lh7a40x_udc_wakeup(struct usb_gadget *_gadget)
  1600. {
  1601. /* host may not have enabled remote wakeup */
  1602. /*if ((UDCCS0 & UDCCS0_DRWF) == 0)
  1603. return -EHOSTUNREACH;
  1604. udc_set_mask_UDCCR(UDCCR_RSM); */
  1605. return -ENOTSUPP;
  1606. }
  1607. static const struct usb_gadget_ops lh7a40x_udc_ops = {
  1608. .get_frame = lh7a40x_udc_get_frame,
  1609. .wakeup = lh7a40x_udc_wakeup,
  1610. /* current versions must always be self-powered */
  1611. };
  1612. static void nop_release(struct device *dev)
  1613. {
  1614. DEBUG("%s %s\n", __FUNCTION__, dev->bus_id);
  1615. }
  1616. static struct lh7a40x_udc memory = {
  1617. .usb_address = 0,
  1618. .gadget = {
  1619. .ops = &lh7a40x_udc_ops,
  1620. .ep0 = &memory.ep[0].ep,
  1621. .name = driver_name,
  1622. .dev = {
  1623. .bus_id = "gadget",
  1624. .release = nop_release,
  1625. },
  1626. },
  1627. /* control endpoint */
  1628. .ep[0] = {
  1629. .ep = {
  1630. .name = ep0name,
  1631. .ops = &lh7a40x_ep_ops,
  1632. .maxpacket = EP0_PACKETSIZE,
  1633. },
  1634. .dev = &memory,
  1635. .bEndpointAddress = 0,
  1636. .bmAttributes = 0,
  1637. .ep_type = ep_control,
  1638. .fifo = io_p2v(USB_EP0_FIFO),
  1639. .csr1 = USB_EP0_CSR,
  1640. .csr2 = USB_EP0_CSR,
  1641. },
  1642. /* first group of endpoints */
  1643. .ep[1] = {
  1644. .ep = {
  1645. .name = "ep1in-bulk",
  1646. .ops = &lh7a40x_ep_ops,
  1647. .maxpacket = 64,
  1648. },
  1649. .dev = &memory,
  1650. .bEndpointAddress = USB_DIR_IN | 1,
  1651. .bmAttributes = USB_ENDPOINT_XFER_BULK,
  1652. .ep_type = ep_bulk_in,
  1653. .fifo = io_p2v(USB_EP1_FIFO),
  1654. .csr1 = USB_IN_CSR1,
  1655. .csr2 = USB_IN_CSR2,
  1656. },
  1657. .ep[2] = {
  1658. .ep = {
  1659. .name = "ep2out-bulk",
  1660. .ops = &lh7a40x_ep_ops,
  1661. .maxpacket = 64,
  1662. },
  1663. .dev = &memory,
  1664. .bEndpointAddress = 2,
  1665. .bmAttributes = USB_ENDPOINT_XFER_BULK,
  1666. .ep_type = ep_bulk_out,
  1667. .fifo = io_p2v(USB_EP2_FIFO),
  1668. .csr1 = USB_OUT_CSR1,
  1669. .csr2 = USB_OUT_CSR2,
  1670. },
  1671. .ep[3] = {
  1672. .ep = {
  1673. .name = "ep3in-int",
  1674. .ops = &lh7a40x_ep_ops,
  1675. .maxpacket = 64,
  1676. },
  1677. .dev = &memory,
  1678. .bEndpointAddress = USB_DIR_IN | 3,
  1679. .bmAttributes = USB_ENDPOINT_XFER_INT,
  1680. .ep_type = ep_interrupt,
  1681. .fifo = io_p2v(USB_EP3_FIFO),
  1682. .csr1 = USB_IN_CSR1,
  1683. .csr2 = USB_IN_CSR2,
  1684. },
  1685. };
  1686. /*
  1687. * probe - binds to the platform device
  1688. */
  1689. static int lh7a40x_udc_probe(struct platform_device *pdev)
  1690. {
  1691. struct lh7a40x_udc *dev = &memory;
  1692. int retval;
  1693. DEBUG("%s: %p\n", __FUNCTION__, pdev);
  1694. spin_lock_init(&dev->lock);
  1695. dev->dev = &pdev->dev;
  1696. device_initialize(&dev->gadget.dev);
  1697. dev->gadget.dev.parent = &pdev->dev;
  1698. the_controller = dev;
  1699. platform_set_drvdata(pdev, dev);
  1700. udc_disable(dev);
  1701. udc_reinit(dev);
  1702. /* irq setup after old hardware state is cleaned up */
  1703. retval =
  1704. request_irq(IRQ_USBINTR, lh7a40x_udc_irq, IRQF_DISABLED, driver_name,
  1705. dev);
  1706. if (retval != 0) {
  1707. DEBUG(KERN_ERR "%s: can't get irq %i, err %d\n", driver_name,
  1708. IRQ_USBINTR, retval);
  1709. return -EBUSY;
  1710. }
  1711. create_proc_files();
  1712. return retval;
  1713. }
  1714. static int lh7a40x_udc_remove(struct platform_device *pdev)
  1715. {
  1716. struct lh7a40x_udc *dev = platform_get_drvdata(pdev);
  1717. DEBUG("%s: %p\n", __FUNCTION__, pdev);
  1718. if (dev->driver)
  1719. return -EBUSY;
  1720. udc_disable(dev);
  1721. remove_proc_files();
  1722. free_irq(IRQ_USBINTR, dev);
  1723. platform_set_drvdata(pdev, 0);
  1724. the_controller = 0;
  1725. return 0;
  1726. }
  1727. /*-------------------------------------------------------------------------*/
  1728. static struct platform_driver udc_driver = {
  1729. .probe = lh7a40x_udc_probe,
  1730. .remove = lh7a40x_udc_remove,
  1731. /* FIXME power management support */
  1732. /* .suspend = ... disable UDC */
  1733. /* .resume = ... re-enable UDC */
  1734. .driver = {
  1735. .name = (char *)driver_name,
  1736. .owner = THIS_MODULE,
  1737. },
  1738. };
  1739. static int __init udc_init(void)
  1740. {
  1741. DEBUG("%s: %s version %s\n", __FUNCTION__, driver_name, DRIVER_VERSION);
  1742. return platform_driver_register(&udc_driver);
  1743. }
  1744. static void __exit udc_exit(void)
  1745. {
  1746. platform_driver_unregister(&udc_driver);
  1747. }
  1748. module_init(udc_init);
  1749. module_exit(udc_exit);
  1750. MODULE_DESCRIPTION(DRIVER_DESC);
  1751. MODULE_AUTHOR("Mikko Lahteenmaki, Bo Henriksen");
  1752. MODULE_LICENSE("GPL");