sym53c416.c 26 KB

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  1. /*
  2. * sym53c416.c
  3. * Low-level SCSI driver for sym53c416 chip.
  4. * Copyright (C) 1998 Lieven Willems (lw_linux@hotmail.com)
  5. *
  6. * Changes :
  7. *
  8. * Marcelo Tosatti <marcelo@conectiva.com.br> : Added io_request_lock locking
  9. * Alan Cox <alan@redhat.com> : Cleaned up code formatting
  10. * Fixed an irq locking bug
  11. * Added ISAPnP support
  12. * Bjoern A. Zeeb <bzeeb@zabbadoz.net> : Initial irq locking updates
  13. * Added another card with ISAPnP support
  14. *
  15. * LILO command line usage: sym53c416=<PORTBASE>[,<IRQ>]
  16. *
  17. * This program is free software; you can redistribute it and/or modify it
  18. * under the terms of the GNU General Public License as published by the
  19. * Free Software Foundation; either version 2, or (at your option) any
  20. * later version.
  21. *
  22. * This program is distributed in the hope that it will be useful, but
  23. * WITHOUT ANY WARRANTY; without even the implied warranty of
  24. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  25. * General Public License for more details.
  26. *
  27. */
  28. #include <linux/module.h>
  29. #include <linux/kernel.h>
  30. #include <linux/types.h>
  31. #include <linux/init.h>
  32. #include <linux/string.h>
  33. #include <linux/ioport.h>
  34. #include <linux/interrupt.h>
  35. #include <linux/delay.h>
  36. #include <linux/proc_fs.h>
  37. #include <linux/spinlock.h>
  38. #include <asm/dma.h>
  39. #include <asm/system.h>
  40. #include <asm/io.h>
  41. #include <linux/blkdev.h>
  42. #include <linux/isapnp.h>
  43. #include "scsi.h"
  44. #include <scsi/scsi_host.h>
  45. #include "sym53c416.h"
  46. #define VERSION_STRING "Version 1.0.0-ac"
  47. #define TC_LOW 0x00 /* Transfer counter low */
  48. #define TC_MID 0x01 /* Transfer counter mid */
  49. #define SCSI_FIFO 0x02 /* SCSI FIFO register */
  50. #define COMMAND_REG 0x03 /* Command Register */
  51. #define STATUS_REG 0x04 /* Status Register (READ) */
  52. #define DEST_BUS_ID 0x04 /* Destination Bus ID (WRITE) */
  53. #define INT_REG 0x05 /* Interrupt Register (READ) */
  54. #define TOM 0x05 /* Time out multiplier (WRITE) */
  55. #define STP 0x06 /* Synchronous Transfer period */
  56. #define SYNC_OFFSET 0x07 /* Synchronous Offset */
  57. #define CONF_REG_1 0x08 /* Configuration register 1 */
  58. #define CONF_REG_2 0x0B /* Configuration register 2 */
  59. #define CONF_REG_3 0x0C /* Configuration register 3 */
  60. #define CONF_REG_4 0x0D /* Configuration register 4 */
  61. #define TC_HIGH 0x0E /* Transfer counter high */
  62. #define PIO_FIFO_1 0x10 /* PIO FIFO register 1 */
  63. #define PIO_FIFO_2 0x11 /* PIO FIFO register 2 */
  64. #define PIO_FIFO_3 0x12 /* PIO FIFO register 3 */
  65. #define PIO_FIFO_4 0x13 /* PIO FIFO register 4 */
  66. #define PIO_FIFO_CNT 0x14 /* PIO FIFO count */
  67. #define PIO_INT_REG 0x15 /* PIO interrupt register */
  68. #define CONF_REG_5 0x16 /* Configuration register 5 */
  69. #define FEATURE_EN 0x1D /* Feature Enable register */
  70. /* Configuration register 1 entries: */
  71. /* Bits 2-0: SCSI ID of host adapter */
  72. #define SCM 0x80 /* Slow Cable Mode */
  73. #define SRID 0x40 /* SCSI Reset Interrupt Disable */
  74. #define PTM 0x20 /* Parity Test Mode */
  75. #define EPC 0x10 /* Enable Parity Checking */
  76. #define CTME 0x08 /* Special Test Mode */
  77. /* Configuration register 2 entries: */
  78. #define FE 0x40 /* Features Enable */
  79. #define SCSI2 0x08 /* SCSI 2 Enable */
  80. #define TBPA 0x04 /* Target Bad Parity Abort */
  81. /* Configuration register 3 entries: */
  82. #define IDMRC 0x80 /* ID Message Reserved Check */
  83. #define QTE 0x40 /* Queue Tag Enable */
  84. #define CDB10 0x20 /* Command Descriptor Block 10 */
  85. #define FSCSI 0x10 /* FastSCSI */
  86. #define FCLK 0x08 /* FastClock */
  87. /* Configuration register 4 entries: */
  88. #define RBS 0x08 /* Register bank select */
  89. #define EAN 0x04 /* Enable Active Negotiation */
  90. /* Configuration register 5 entries: */
  91. #define LPSR 0x80 /* Lower Power SCSI Reset */
  92. #define IE 0x20 /* Interrupt Enable */
  93. #define LPM 0x02 /* Low Power Mode */
  94. #define WSE0 0x01 /* 0WS Enable */
  95. /* Interrupt register entries: */
  96. #define SRST 0x80 /* SCSI Reset */
  97. #define ILCMD 0x40 /* Illegal Command */
  98. #define DIS 0x20 /* Disconnect */
  99. #define BS 0x10 /* Bus Service */
  100. #define FC 0x08 /* Function Complete */
  101. #define RESEL 0x04 /* Reselected */
  102. #define SI 0x03 /* Selection Interrupt */
  103. /* Status Register Entries: */
  104. #define SCI 0x80 /* SCSI Core Int */
  105. #define GE 0x40 /* Gross Error */
  106. #define PE 0x20 /* Parity Error */
  107. #define TC 0x10 /* Terminal Count */
  108. #define VGC 0x08 /* Valid Group Code */
  109. #define PHBITS 0x07 /* Phase bits */
  110. /* PIO Interrupt Register Entries: */
  111. #define SCI 0x80 /* SCSI Core Int */
  112. #define PFI 0x40 /* PIO FIFO Interrupt */
  113. #define FULL 0x20 /* PIO FIFO Full */
  114. #define EMPTY 0x10 /* PIO FIFO Empty */
  115. #define CE 0x08 /* Collision Error */
  116. #define OUE 0x04 /* Overflow / Underflow error */
  117. #define FIE 0x02 /* Full Interrupt Enable */
  118. #define EIE 0x01 /* Empty Interrupt Enable */
  119. /* SYM53C416 SCSI phases (lower 3 bits of SYM53C416_STATUS_REG) */
  120. #define PHASE_DATA_OUT 0x00
  121. #define PHASE_DATA_IN 0x01
  122. #define PHASE_COMMAND 0x02
  123. #define PHASE_STATUS 0x03
  124. #define PHASE_RESERVED_1 0x04
  125. #define PHASE_RESERVED_2 0x05
  126. #define PHASE_MESSAGE_OUT 0x06
  127. #define PHASE_MESSAGE_IN 0x07
  128. /* SYM53C416 core commands */
  129. #define NOOP 0x00
  130. #define FLUSH_FIFO 0x01
  131. #define RESET_CHIP 0x02
  132. #define RESET_SCSI_BUS 0x03
  133. #define DISABLE_SEL_RESEL 0x45
  134. #define RESEL_SEQ 0x40
  135. #define SEL_WITHOUT_ATN_SEQ 0x41
  136. #define SEL_WITH_ATN_SEQ 0x42
  137. #define SEL_WITH_ATN_AND_STOP_SEQ 0x43
  138. #define ENABLE_SEL_RESEL 0x44
  139. #define SEL_WITH_ATN3_SEQ 0x46
  140. #define RESEL3_SEQ 0x47
  141. #define SND_MSG 0x20
  142. #define SND_STAT 0x21
  143. #define SND_DATA 0x22
  144. #define DISCONNECT_SEQ 0x23
  145. #define TERMINATE_SEQ 0x24
  146. #define TARGET_COMM_COMPLETE_SEQ 0x25
  147. #define DISCONN 0x27
  148. #define RECV_MSG_SEQ 0x28
  149. #define RECV_CMD 0x29
  150. #define RECV_DATA 0x2A
  151. #define RECV_CMD_SEQ 0x2B
  152. #define TARGET_ABORT_PIO 0x04
  153. #define TRANSFER_INFORMATION 0x10
  154. #define INIT_COMM_COMPLETE_SEQ 0x11
  155. #define MSG_ACCEPTED 0x12
  156. #define TRANSFER_PAD 0x18
  157. #define SET_ATN 0x1A
  158. #define RESET_ATN 0x1B
  159. #define ILLEGAL 0xFF
  160. #define PIO_MODE 0x80
  161. #define IO_RANGE 0x20 /* 0x00 - 0x1F */
  162. #define ID "sym53c416" /* Attention: copied to the sym53c416.h */
  163. #define PIO_SIZE 128 /* Size of PIO fifo is 128 bytes */
  164. #define READ_TIMEOUT 150
  165. #define WRITE_TIMEOUT 150
  166. #ifdef MODULE
  167. #define sym53c416_base sym53c416
  168. #define sym53c416_base_1 sym53c416_1
  169. #define sym53c416_base_2 sym53c416_2
  170. #define sym53c416_base_3 sym53c416_3
  171. static unsigned int sym53c416_base[2] = {0,0};
  172. static unsigned int sym53c416_base_1[2] = {0,0};
  173. static unsigned int sym53c416_base_2[2] = {0,0};
  174. static unsigned int sym53c416_base_3[2] = {0,0};
  175. #endif
  176. #define MAXHOSTS 4
  177. #define SG_ADDRESS(buffer) ((char *) (page_address((buffer)->page)+(buffer)->offset))
  178. enum phases
  179. {
  180. idle,
  181. data_out,
  182. data_in,
  183. command_ph,
  184. status_ph,
  185. message_out,
  186. message_in
  187. };
  188. typedef struct
  189. {
  190. int base;
  191. int irq;
  192. int scsi_id;
  193. } host;
  194. static host hosts[MAXHOSTS] = {
  195. {0, 0, SYM53C416_SCSI_ID},
  196. {0, 0, SYM53C416_SCSI_ID},
  197. {0, 0, SYM53C416_SCSI_ID},
  198. {0, 0, SYM53C416_SCSI_ID}
  199. };
  200. static int host_index = 0;
  201. static char info[120];
  202. static Scsi_Cmnd *current_command = NULL;
  203. static int fastpio = 1;
  204. static int probeaddrs[] = {0x200, 0x220, 0x240, 0};
  205. static void sym53c416_set_transfer_counter(int base, unsigned int len)
  206. {
  207. /* Program Transfer Counter */
  208. outb(len & 0x0000FF, base + TC_LOW);
  209. outb((len & 0x00FF00) >> 8, base + TC_MID);
  210. outb((len & 0xFF0000) >> 16, base + TC_HIGH);
  211. }
  212. static DEFINE_SPINLOCK(sym53c416_lock);
  213. /* Returns the number of bytes read */
  214. static __inline__ unsigned int sym53c416_read(int base, unsigned char *buffer, unsigned int len)
  215. {
  216. unsigned int orig_len = len;
  217. unsigned long flags = 0;
  218. unsigned int bytes_left;
  219. unsigned long i;
  220. int timeout = READ_TIMEOUT;
  221. /* Do transfer */
  222. spin_lock_irqsave(&sym53c416_lock, flags);
  223. while(len && timeout)
  224. {
  225. bytes_left = inb(base + PIO_FIFO_CNT); /* Number of bytes in the PIO FIFO */
  226. if(fastpio && bytes_left > 3)
  227. {
  228. insl(base + PIO_FIFO_1, buffer, bytes_left >> 2);
  229. buffer += bytes_left & 0xFC;
  230. len -= bytes_left & 0xFC;
  231. }
  232. else if(bytes_left > 0)
  233. {
  234. len -= bytes_left;
  235. for(; bytes_left > 0; bytes_left--)
  236. *(buffer++) = inb(base + PIO_FIFO_1);
  237. }
  238. else
  239. {
  240. i = jiffies + timeout;
  241. spin_unlock_irqrestore(&sym53c416_lock, flags);
  242. while(time_before(jiffies, i) && (inb(base + PIO_INT_REG) & EMPTY) && timeout)
  243. if(inb(base + PIO_INT_REG) & SCI)
  244. timeout = 0;
  245. spin_lock_irqsave(&sym53c416_lock, flags);
  246. if(inb(base + PIO_INT_REG) & EMPTY)
  247. timeout = 0;
  248. }
  249. }
  250. spin_unlock_irqrestore(&sym53c416_lock, flags);
  251. return orig_len - len;
  252. }
  253. /* Returns the number of bytes written */
  254. static __inline__ unsigned int sym53c416_write(int base, unsigned char *buffer, unsigned int len)
  255. {
  256. unsigned int orig_len = len;
  257. unsigned long flags = 0;
  258. unsigned int bufferfree;
  259. unsigned long i;
  260. unsigned int timeout = WRITE_TIMEOUT;
  261. /* Do transfer */
  262. spin_lock_irqsave(&sym53c416_lock, flags);
  263. while(len && timeout)
  264. {
  265. bufferfree = PIO_SIZE - inb(base + PIO_FIFO_CNT);
  266. if(bufferfree > len)
  267. bufferfree = len;
  268. if(fastpio && bufferfree > 3)
  269. {
  270. outsl(base + PIO_FIFO_1, buffer, bufferfree >> 2);
  271. buffer += bufferfree & 0xFC;
  272. len -= bufferfree & 0xFC;
  273. }
  274. else if(bufferfree > 0)
  275. {
  276. len -= bufferfree;
  277. for(; bufferfree > 0; bufferfree--)
  278. outb(*(buffer++), base + PIO_FIFO_1);
  279. }
  280. else
  281. {
  282. i = jiffies + timeout;
  283. spin_unlock_irqrestore(&sym53c416_lock, flags);
  284. while(time_before(jiffies, i) && (inb(base + PIO_INT_REG) & FULL) && timeout)
  285. ;
  286. spin_lock_irqsave(&sym53c416_lock, flags);
  287. if(inb(base + PIO_INT_REG) & FULL)
  288. timeout = 0;
  289. }
  290. }
  291. spin_unlock_irqrestore(&sym53c416_lock, flags);
  292. return orig_len - len;
  293. }
  294. static irqreturn_t sym53c416_intr_handle(int irq, void *dev_id)
  295. {
  296. struct Scsi_Host *dev = dev_id;
  297. int base = 0;
  298. int i;
  299. unsigned long flags = 0;
  300. unsigned char status_reg, pio_int_reg, int_reg;
  301. struct scatterlist *sg;
  302. unsigned int tot_trans = 0;
  303. /* We search the base address of the host adapter which caused the interrupt */
  304. /* FIXME: should pass dev_id sensibly as hosts[i] */
  305. for(i = 0; i < host_index && !base; i++)
  306. if(irq == hosts[i].irq)
  307. base = hosts[i].base;
  308. /* If no adapter found, we cannot handle the interrupt. Leave a message */
  309. /* and continue. This should never happen... */
  310. if(!base)
  311. {
  312. printk(KERN_ERR "sym53c416: No host adapter defined for interrupt %d\n", irq);
  313. return IRQ_NONE;
  314. }
  315. /* Now we have the base address and we can start handling the interrupt */
  316. spin_lock_irqsave(dev->host_lock,flags);
  317. status_reg = inb(base + STATUS_REG);
  318. pio_int_reg = inb(base + PIO_INT_REG);
  319. int_reg = inb(base + INT_REG);
  320. spin_unlock_irqrestore(dev->host_lock, flags);
  321. /* First, we handle error conditions */
  322. if(int_reg & SCI) /* SCSI Reset */
  323. {
  324. printk(KERN_DEBUG "sym53c416: Reset received\n");
  325. current_command->SCp.phase = idle;
  326. current_command->result = DID_RESET << 16;
  327. spin_lock_irqsave(dev->host_lock, flags);
  328. current_command->scsi_done(current_command);
  329. spin_unlock_irqrestore(dev->host_lock, flags);
  330. goto out;
  331. }
  332. if(int_reg & ILCMD) /* Illegal Command */
  333. {
  334. printk(KERN_WARNING "sym53c416: Illegal Command: 0x%02x.\n", inb(base + COMMAND_REG));
  335. current_command->SCp.phase = idle;
  336. current_command->result = DID_ERROR << 16;
  337. spin_lock_irqsave(dev->host_lock, flags);
  338. current_command->scsi_done(current_command);
  339. spin_unlock_irqrestore(dev->host_lock, flags);
  340. goto out;
  341. }
  342. if(status_reg & GE) /* Gross Error */
  343. {
  344. printk(KERN_WARNING "sym53c416: Controller reports gross error.\n");
  345. current_command->SCp.phase = idle;
  346. current_command->result = DID_ERROR << 16;
  347. spin_lock_irqsave(dev->host_lock, flags);
  348. current_command->scsi_done(current_command);
  349. spin_unlock_irqrestore(dev->host_lock, flags);
  350. goto out;
  351. }
  352. if(status_reg & PE) /* Parity Error */
  353. {
  354. printk(KERN_WARNING "sym53c416:SCSI parity error.\n");
  355. current_command->SCp.phase = idle;
  356. current_command->result = DID_PARITY << 16;
  357. spin_lock_irqsave(dev->host_lock, flags);
  358. current_command->scsi_done(current_command);
  359. spin_unlock_irqrestore(dev->host_lock, flags);
  360. goto out;
  361. }
  362. if(pio_int_reg & (CE | OUE))
  363. {
  364. printk(KERN_WARNING "sym53c416: PIO interrupt error.\n");
  365. current_command->SCp.phase = idle;
  366. current_command->result = DID_ERROR << 16;
  367. spin_lock_irqsave(dev->host_lock, flags);
  368. current_command->scsi_done(current_command);
  369. spin_unlock_irqrestore(dev->host_lock, flags);
  370. goto out;
  371. }
  372. if(int_reg & DIS) /* Disconnect */
  373. {
  374. if(current_command->SCp.phase != message_in)
  375. current_command->result = DID_NO_CONNECT << 16;
  376. else
  377. current_command->result = (current_command->SCp.Status & 0xFF) | ((current_command->SCp.Message & 0xFF) << 8) | (DID_OK << 16);
  378. current_command->SCp.phase = idle;
  379. spin_lock_irqsave(dev->host_lock, flags);
  380. current_command->scsi_done(current_command);
  381. spin_unlock_irqrestore(dev->host_lock, flags);
  382. goto out;
  383. }
  384. /* Now we handle SCSI phases */
  385. switch(status_reg & PHBITS) /* Filter SCSI phase out of status reg */
  386. {
  387. case PHASE_DATA_OUT:
  388. {
  389. if(int_reg & BS)
  390. {
  391. current_command->SCp.phase = data_out;
  392. outb(FLUSH_FIFO, base + COMMAND_REG);
  393. sym53c416_set_transfer_counter(base,
  394. scsi_bufflen(current_command));
  395. outb(TRANSFER_INFORMATION | PIO_MODE, base + COMMAND_REG);
  396. scsi_for_each_sg(current_command,
  397. sg, scsi_sg_count(current_command), i) {
  398. tot_trans += sym53c416_write(base,
  399. SG_ADDRESS(sg),
  400. sg->length);
  401. }
  402. if(tot_trans < current_command->underflow)
  403. printk(KERN_WARNING "sym53c416: Underflow, wrote %d bytes, request for %d bytes.\n", tot_trans, current_command->underflow);
  404. }
  405. break;
  406. }
  407. case PHASE_DATA_IN:
  408. {
  409. if(int_reg & BS)
  410. {
  411. current_command->SCp.phase = data_in;
  412. outb(FLUSH_FIFO, base + COMMAND_REG);
  413. sym53c416_set_transfer_counter(base,
  414. scsi_bufflen(current_command));
  415. outb(TRANSFER_INFORMATION | PIO_MODE, base + COMMAND_REG);
  416. scsi_for_each_sg(current_command,
  417. sg, scsi_sg_count(current_command), i) {
  418. tot_trans += sym53c416_read(base,
  419. SG_ADDRESS(sg),
  420. sg->length);
  421. }
  422. if(tot_trans < current_command->underflow)
  423. printk(KERN_WARNING "sym53c416: Underflow, read %d bytes, request for %d bytes.\n", tot_trans, current_command->underflow);
  424. }
  425. break;
  426. }
  427. case PHASE_COMMAND:
  428. {
  429. current_command->SCp.phase = command_ph;
  430. printk(KERN_ERR "sym53c416: Unknown interrupt in command phase.\n");
  431. break;
  432. }
  433. case PHASE_STATUS:
  434. {
  435. current_command->SCp.phase = status_ph;
  436. outb(FLUSH_FIFO, base + COMMAND_REG);
  437. outb(INIT_COMM_COMPLETE_SEQ, base + COMMAND_REG);
  438. break;
  439. }
  440. case PHASE_RESERVED_1:
  441. case PHASE_RESERVED_2:
  442. {
  443. printk(KERN_ERR "sym53c416: Reserved phase occurred.\n");
  444. break;
  445. }
  446. case PHASE_MESSAGE_OUT:
  447. {
  448. current_command->SCp.phase = message_out;
  449. outb(SET_ATN, base + COMMAND_REG);
  450. outb(MSG_ACCEPTED, base + COMMAND_REG);
  451. break;
  452. }
  453. case PHASE_MESSAGE_IN:
  454. {
  455. current_command->SCp.phase = message_in;
  456. current_command->SCp.Status = inb(base + SCSI_FIFO);
  457. current_command->SCp.Message = inb(base + SCSI_FIFO);
  458. if(current_command->SCp.Message == SAVE_POINTERS || current_command->SCp.Message == DISCONNECT)
  459. outb(SET_ATN, base + COMMAND_REG);
  460. outb(MSG_ACCEPTED, base + COMMAND_REG);
  461. break;
  462. }
  463. }
  464. out:
  465. return IRQ_HANDLED;
  466. }
  467. static void sym53c416_init(int base, int scsi_id)
  468. {
  469. outb(RESET_CHIP, base + COMMAND_REG);
  470. outb(NOOP, base + COMMAND_REG);
  471. outb(0x99, base + TOM); /* Time out of 250 ms */
  472. outb(0x05, base + STP);
  473. outb(0x00, base + SYNC_OFFSET);
  474. outb(EPC | scsi_id, base + CONF_REG_1);
  475. outb(FE | SCSI2 | TBPA, base + CONF_REG_2);
  476. outb(IDMRC | QTE | CDB10 | FSCSI | FCLK, base + CONF_REG_3);
  477. outb(0x83 | EAN, base + CONF_REG_4);
  478. outb(IE | WSE0, base + CONF_REG_5);
  479. outb(0, base + FEATURE_EN);
  480. }
  481. static int sym53c416_probeirq(int base, int scsi_id)
  482. {
  483. int irq, irqs;
  484. unsigned long i;
  485. /* Clear interrupt register */
  486. inb(base + INT_REG);
  487. /* Start probing for irq's */
  488. irqs = probe_irq_on();
  489. /* Reinit chip */
  490. sym53c416_init(base, scsi_id);
  491. /* Cause interrupt */
  492. outb(NOOP, base + COMMAND_REG);
  493. outb(ILLEGAL, base + COMMAND_REG);
  494. outb(0x07, base + DEST_BUS_ID);
  495. outb(0x00, base + DEST_BUS_ID);
  496. /* Wait for interrupt to occur */
  497. i = jiffies + 20;
  498. while(time_before(jiffies, i) && !(inb(base + STATUS_REG) & SCI))
  499. barrier();
  500. if(time_before_eq(i, jiffies)) /* timed out */
  501. return 0;
  502. /* Get occurred irq */
  503. irq = probe_irq_off(irqs);
  504. sym53c416_init(base, scsi_id);
  505. return irq;
  506. }
  507. /* Setup: sym53c416=base,irq */
  508. void sym53c416_setup(char *str, int *ints)
  509. {
  510. int i;
  511. if(host_index >= MAXHOSTS)
  512. {
  513. printk(KERN_WARNING "sym53c416: Too many hosts defined\n");
  514. return;
  515. }
  516. if(ints[0] < 1 || ints[0] > 2)
  517. {
  518. printk(KERN_ERR "sym53c416: Wrong number of parameters:\n");
  519. printk(KERN_ERR "sym53c416: usage: sym53c416=<base>[,<irq>]\n");
  520. return;
  521. }
  522. for(i = 0; i < host_index && i >= 0; i++)
  523. if(hosts[i].base == ints[1])
  524. i = -2;
  525. if(i >= 0)
  526. {
  527. hosts[host_index].base = ints[1];
  528. hosts[host_index].irq = (ints[0] == 2)? ints[2] : 0;
  529. host_index++;
  530. }
  531. }
  532. static int sym53c416_test(int base)
  533. {
  534. outb(RESET_CHIP, base + COMMAND_REG);
  535. outb(NOOP, base + COMMAND_REG);
  536. if(inb(base + COMMAND_REG) != NOOP)
  537. return 0;
  538. if(!inb(base + TC_HIGH) || inb(base + TC_HIGH) == 0xFF)
  539. return 0;
  540. if((inb(base + PIO_INT_REG) & (FULL | EMPTY | CE | OUE | FIE | EIE)) != EMPTY)
  541. return 0;
  542. return 1;
  543. }
  544. static struct isapnp_device_id id_table[] __devinitdata = {
  545. { ISAPNP_ANY_ID, ISAPNP_ANY_ID,
  546. ISAPNP_VENDOR('S','L','I'), ISAPNP_FUNCTION(0x4161), 0 },
  547. { ISAPNP_ANY_ID, ISAPNP_ANY_ID,
  548. ISAPNP_VENDOR('S','L','I'), ISAPNP_FUNCTION(0x4163), 0 },
  549. { ISAPNP_DEVICE_SINGLE_END }
  550. };
  551. MODULE_DEVICE_TABLE(isapnp, id_table);
  552. static void sym53c416_probe(void)
  553. {
  554. int *base = probeaddrs;
  555. int ints[2];
  556. ints[0] = 1;
  557. for(; *base; base++) {
  558. if (request_region(*base, IO_RANGE, ID)) {
  559. if (sym53c416_test(*base)) {
  560. ints[1] = *base;
  561. sym53c416_setup(NULL, ints);
  562. }
  563. release_region(*base, IO_RANGE);
  564. }
  565. }
  566. }
  567. int __init sym53c416_detect(struct scsi_host_template *tpnt)
  568. {
  569. unsigned long flags;
  570. struct Scsi_Host * shpnt = NULL;
  571. int i;
  572. int count;
  573. struct pnp_dev *idev = NULL;
  574. #ifdef MODULE
  575. int ints[3];
  576. ints[0] = 2;
  577. if(sym53c416_base)
  578. {
  579. ints[1] = sym53c416_base[0];
  580. ints[2] = sym53c416_base[1];
  581. sym53c416_setup(NULL, ints);
  582. }
  583. if(sym53c416_base_1)
  584. {
  585. ints[1] = sym53c416_base_1[0];
  586. ints[2] = sym53c416_base_1[1];
  587. sym53c416_setup(NULL, ints);
  588. }
  589. if(sym53c416_base_2)
  590. {
  591. ints[1] = sym53c416_base_2[0];
  592. ints[2] = sym53c416_base_2[1];
  593. sym53c416_setup(NULL, ints);
  594. }
  595. if(sym53c416_base_3)
  596. {
  597. ints[1] = sym53c416_base_3[0];
  598. ints[2] = sym53c416_base_3[1];
  599. sym53c416_setup(NULL, ints);
  600. }
  601. #endif
  602. printk(KERN_INFO "sym53c416.c: %s\n", VERSION_STRING);
  603. for (i=0; id_table[i].vendor != 0; i++) {
  604. while((idev=pnp_find_dev(NULL, id_table[i].vendor,
  605. id_table[i].function, idev))!=NULL)
  606. {
  607. int i[3];
  608. if(pnp_device_attach(idev)<0)
  609. {
  610. printk(KERN_WARNING "sym53c416: unable to attach PnP device.\n");
  611. continue;
  612. }
  613. if(pnp_activate_dev(idev) < 0)
  614. {
  615. printk(KERN_WARNING "sym53c416: unable to activate PnP device.\n");
  616. pnp_device_detach(idev);
  617. continue;
  618. }
  619. i[0] = 2;
  620. i[1] = pnp_port_start(idev, 0);
  621. i[2] = pnp_irq(idev, 0);
  622. printk(KERN_INFO "sym53c416: ISAPnP card found and configured at 0x%X, IRQ %d.\n",
  623. i[1], i[2]);
  624. sym53c416_setup(NULL, i);
  625. }
  626. }
  627. sym53c416_probe();
  628. /* Now we register and set up each host adapter found... */
  629. for(count = 0, i = 0; i < host_index; i++) {
  630. if (!request_region(hosts[i].base, IO_RANGE, ID))
  631. continue;
  632. if (!sym53c416_test(hosts[i].base)) {
  633. printk(KERN_WARNING "No sym53c416 found at address 0x%03x\n", hosts[i].base);
  634. goto fail_release_region;
  635. }
  636. /* We don't have an irq yet, so we should probe for one */
  637. if (!hosts[i].irq)
  638. hosts[i].irq = sym53c416_probeirq(hosts[i].base, hosts[i].scsi_id);
  639. if (!hosts[i].irq)
  640. goto fail_release_region;
  641. shpnt = scsi_register(tpnt, 0);
  642. if (!shpnt)
  643. goto fail_release_region;
  644. /* Request for specified IRQ */
  645. if (request_irq(hosts[i].irq, sym53c416_intr_handle, 0, ID, shpnt))
  646. goto fail_free_host;
  647. spin_lock_irqsave(&sym53c416_lock, flags);
  648. shpnt->unique_id = hosts[i].base;
  649. shpnt->io_port = hosts[i].base;
  650. shpnt->n_io_port = IO_RANGE;
  651. shpnt->irq = hosts[i].irq;
  652. shpnt->this_id = hosts[i].scsi_id;
  653. sym53c416_init(hosts[i].base, hosts[i].scsi_id);
  654. count++;
  655. spin_unlock_irqrestore(&sym53c416_lock, flags);
  656. continue;
  657. fail_free_host:
  658. scsi_unregister(shpnt);
  659. fail_release_region:
  660. release_region(hosts[i].base, IO_RANGE);
  661. }
  662. return count;
  663. }
  664. const char *sym53c416_info(struct Scsi_Host *SChost)
  665. {
  666. int i;
  667. int base = SChost->io_port;
  668. int irq = SChost->irq;
  669. int scsi_id = 0;
  670. int rev = inb(base + TC_HIGH);
  671. for(i = 0; i < host_index; i++)
  672. if(hosts[i].base == base)
  673. scsi_id = hosts[i].scsi_id;
  674. sprintf(info, "Symbios Logic 53c416 (rev. %d) at 0x%03x, irq %d, SCSI-ID %d, %s pio", rev, base, irq, scsi_id, (fastpio)? "fast" : "slow");
  675. return info;
  676. }
  677. int sym53c416_queuecommand(Scsi_Cmnd *SCpnt, void (*done)(Scsi_Cmnd *))
  678. {
  679. int base;
  680. unsigned long flags = 0;
  681. int i;
  682. /* Store base register as we can have more than one controller in the system */
  683. base = SCpnt->device->host->io_port;
  684. current_command = SCpnt; /* set current command */
  685. current_command->scsi_done = done; /* set ptr to done function */
  686. current_command->SCp.phase = command_ph; /* currect phase is the command phase */
  687. current_command->SCp.Status = 0;
  688. current_command->SCp.Message = 0;
  689. spin_lock_irqsave(&sym53c416_lock, flags);
  690. outb(scmd_id(SCpnt), base + DEST_BUS_ID); /* Set scsi id target */
  691. outb(FLUSH_FIFO, base + COMMAND_REG); /* Flush SCSI and PIO FIFO's */
  692. /* Write SCSI command into the SCSI fifo */
  693. for(i = 0; i < SCpnt->cmd_len; i++)
  694. outb(SCpnt->cmnd[i], base + SCSI_FIFO);
  695. /* Start selection sequence */
  696. outb(SEL_WITHOUT_ATN_SEQ, base + COMMAND_REG);
  697. /* Now an interrupt will be generated which we will catch in out interrupt routine */
  698. spin_unlock_irqrestore(&sym53c416_lock, flags);
  699. return 0;
  700. }
  701. static int sym53c416_host_reset(Scsi_Cmnd *SCpnt)
  702. {
  703. int base;
  704. int scsi_id = -1;
  705. int i;
  706. unsigned long flags;
  707. spin_lock_irqsave(&sym53c416_lock, flags);
  708. /* printk("sym53c416_reset\n"); */
  709. base = SCpnt->device->host->io_port;
  710. /* search scsi_id - fixme, we shouldnt need to iterate for this! */
  711. for(i = 0; i < host_index && scsi_id == -1; i++)
  712. if(hosts[i].base == base)
  713. scsi_id = hosts[i].scsi_id;
  714. outb(RESET_CHIP, base + COMMAND_REG);
  715. outb(NOOP | PIO_MODE, base + COMMAND_REG);
  716. outb(RESET_SCSI_BUS, base + COMMAND_REG);
  717. sym53c416_init(base, scsi_id);
  718. spin_unlock_irqrestore(&sym53c416_lock, flags);
  719. return SUCCESS;
  720. }
  721. static int sym53c416_release(struct Scsi_Host *shost)
  722. {
  723. if (shost->irq)
  724. free_irq(shost->irq, shost);
  725. if (shost->io_port && shost->n_io_port)
  726. release_region(shost->io_port, shost->n_io_port);
  727. return 0;
  728. }
  729. static int sym53c416_bios_param(struct scsi_device *sdev,
  730. struct block_device *dev,
  731. sector_t capacity, int *ip)
  732. {
  733. int size;
  734. size = capacity;
  735. ip[0] = 64; /* heads */
  736. ip[1] = 32; /* sectors */
  737. if((ip[2] = size >> 11) > 1024) /* cylinders, test for big disk */
  738. {
  739. ip[0] = 255; /* heads */
  740. ip[1] = 63; /* sectors */
  741. ip[2] = size / (255 * 63); /* cylinders */
  742. }
  743. return 0;
  744. }
  745. /* Loadable module support */
  746. #ifdef MODULE
  747. MODULE_AUTHOR("Lieven Willems");
  748. MODULE_LICENSE("GPL");
  749. module_param_array(sym53c416, uint, NULL, 0);
  750. module_param_array(sym53c416_1, uint, NULL, 0);
  751. module_param_array(sym53c416_2, uint, NULL, 0);
  752. module_param_array(sym53c416_3, uint, NULL, 0);
  753. #endif
  754. static struct scsi_host_template driver_template = {
  755. .proc_name = "sym53c416",
  756. .name = "Symbios Logic 53c416",
  757. .detect = sym53c416_detect,
  758. .info = sym53c416_info,
  759. .queuecommand = sym53c416_queuecommand,
  760. .eh_host_reset_handler =sym53c416_host_reset,
  761. .release = sym53c416_release,
  762. .bios_param = sym53c416_bios_param,
  763. .can_queue = 1,
  764. .this_id = SYM53C416_SCSI_ID,
  765. .sg_tablesize = 32,
  766. .cmd_per_lun = 1,
  767. .unchecked_isa_dma = 1,
  768. .use_clustering = ENABLE_CLUSTERING,
  769. .use_sg_chaining = ENABLE_SG_CHAINING,
  770. };
  771. #include "scsi_module.c"