nsp32.c 89 KB

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  1. /*
  2. * NinjaSCSI-32Bi Cardbus, NinjaSCSI-32UDE PCI/CardBus SCSI driver
  3. * Copyright (C) 2001, 2002, 2003
  4. * YOKOTA Hiroshi <yokota@netlab.is.tsukuba.ac.jp>
  5. * GOTO Masanori <gotom@debian.or.jp>, <gotom@debian.org>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2, or (at your option)
  10. * any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. *
  18. * Revision History:
  19. * 1.0: Initial Release.
  20. * 1.1: Add /proc SDTR status.
  21. * Remove obsolete error handler nsp32_reset.
  22. * Some clean up.
  23. * 1.2: PowerPC (big endian) support.
  24. */
  25. #include <linux/version.h>
  26. #include <linux/module.h>
  27. #include <linux/init.h>
  28. #include <linux/kernel.h>
  29. #include <linux/slab.h>
  30. #include <linux/string.h>
  31. #include <linux/timer.h>
  32. #include <linux/ioport.h>
  33. #include <linux/major.h>
  34. #include <linux/blkdev.h>
  35. #include <linux/interrupt.h>
  36. #include <linux/pci.h>
  37. #include <linux/delay.h>
  38. #include <linux/ctype.h>
  39. #include <linux/dma-mapping.h>
  40. #include <asm/dma.h>
  41. #include <asm/system.h>
  42. #include <asm/io.h>
  43. #include <scsi/scsi.h>
  44. #include <scsi/scsi_cmnd.h>
  45. #include <scsi/scsi_device.h>
  46. #include <scsi/scsi_host.h>
  47. #include <scsi/scsi_ioctl.h>
  48. #include "nsp32.h"
  49. /***********************************************************************
  50. * Module parameters
  51. */
  52. static int trans_mode = 0; /* default: BIOS */
  53. module_param (trans_mode, int, 0);
  54. MODULE_PARM_DESC(trans_mode, "transfer mode (0: BIOS(default) 1: Async 2: Ultra20M");
  55. #define ASYNC_MODE 1
  56. #define ULTRA20M_MODE 2
  57. static int auto_param = 0; /* default: ON */
  58. module_param (auto_param, bool, 0);
  59. MODULE_PARM_DESC(auto_param, "AutoParameter mode (0: ON(default) 1: OFF)");
  60. static int disc_priv = 1; /* default: OFF */
  61. module_param (disc_priv, bool, 0);
  62. MODULE_PARM_DESC(disc_priv, "disconnection privilege mode (0: ON 1: OFF(default))");
  63. MODULE_AUTHOR("YOKOTA Hiroshi <yokota@netlab.is.tsukuba.ac.jp>, GOTO Masanori <gotom@debian.or.jp>");
  64. MODULE_DESCRIPTION("Workbit NinjaSCSI-32Bi/UDE CardBus/PCI SCSI host bus adapter module");
  65. MODULE_LICENSE("GPL");
  66. static const char *nsp32_release_version = "1.2";
  67. /****************************************************************************
  68. * Supported hardware
  69. */
  70. static struct pci_device_id nsp32_pci_table[] __devinitdata = {
  71. {
  72. .vendor = PCI_VENDOR_ID_IODATA,
  73. .device = PCI_DEVICE_ID_NINJASCSI_32BI_CBSC_II,
  74. .subvendor = PCI_ANY_ID,
  75. .subdevice = PCI_ANY_ID,
  76. .driver_data = MODEL_IODATA,
  77. },
  78. {
  79. .vendor = PCI_VENDOR_ID_WORKBIT,
  80. .device = PCI_DEVICE_ID_NINJASCSI_32BI_KME,
  81. .subvendor = PCI_ANY_ID,
  82. .subdevice = PCI_ANY_ID,
  83. .driver_data = MODEL_KME,
  84. },
  85. {
  86. .vendor = PCI_VENDOR_ID_WORKBIT,
  87. .device = PCI_DEVICE_ID_NINJASCSI_32BI_WBT,
  88. .subvendor = PCI_ANY_ID,
  89. .subdevice = PCI_ANY_ID,
  90. .driver_data = MODEL_WORKBIT,
  91. },
  92. {
  93. .vendor = PCI_VENDOR_ID_WORKBIT,
  94. .device = PCI_DEVICE_ID_WORKBIT_STANDARD,
  95. .subvendor = PCI_ANY_ID,
  96. .subdevice = PCI_ANY_ID,
  97. .driver_data = MODEL_PCI_WORKBIT,
  98. },
  99. {
  100. .vendor = PCI_VENDOR_ID_WORKBIT,
  101. .device = PCI_DEVICE_ID_NINJASCSI_32BI_LOGITEC,
  102. .subvendor = PCI_ANY_ID,
  103. .subdevice = PCI_ANY_ID,
  104. .driver_data = MODEL_LOGITEC,
  105. },
  106. {
  107. .vendor = PCI_VENDOR_ID_WORKBIT,
  108. .device = PCI_DEVICE_ID_NINJASCSI_32BIB_LOGITEC,
  109. .subvendor = PCI_ANY_ID,
  110. .subdevice = PCI_ANY_ID,
  111. .driver_data = MODEL_PCI_LOGITEC,
  112. },
  113. {
  114. .vendor = PCI_VENDOR_ID_WORKBIT,
  115. .device = PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO,
  116. .subvendor = PCI_ANY_ID,
  117. .subdevice = PCI_ANY_ID,
  118. .driver_data = MODEL_PCI_MELCO,
  119. },
  120. {
  121. .vendor = PCI_VENDOR_ID_WORKBIT,
  122. .device = PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO_II,
  123. .subvendor = PCI_ANY_ID,
  124. .subdevice = PCI_ANY_ID,
  125. .driver_data = MODEL_PCI_MELCO,
  126. },
  127. {0,0,},
  128. };
  129. MODULE_DEVICE_TABLE(pci, nsp32_pci_table);
  130. static nsp32_hw_data nsp32_data_base; /* probe <-> detect glue */
  131. /*
  132. * Period/AckWidth speed conversion table
  133. *
  134. * Note: This period/ackwidth speed table must be in descending order.
  135. */
  136. static nsp32_sync_table nsp32_sync_table_40M[] = {
  137. /* {PNo, AW, SP, EP, SREQ smpl} Speed(MB/s) Period AckWidth */
  138. {0x1, 0, 0x0c, 0x0c, SMPL_40M}, /* 20.0 : 50ns, 25ns */
  139. {0x2, 0, 0x0d, 0x18, SMPL_40M}, /* 13.3 : 75ns, 25ns */
  140. {0x3, 1, 0x19, 0x19, SMPL_40M}, /* 10.0 : 100ns, 50ns */
  141. {0x4, 1, 0x1a, 0x1f, SMPL_20M}, /* 8.0 : 125ns, 50ns */
  142. {0x5, 2, 0x20, 0x25, SMPL_20M}, /* 6.7 : 150ns, 75ns */
  143. {0x6, 2, 0x26, 0x31, SMPL_20M}, /* 5.7 : 175ns, 75ns */
  144. {0x7, 3, 0x32, 0x32, SMPL_20M}, /* 5.0 : 200ns, 100ns */
  145. {0x8, 3, 0x33, 0x38, SMPL_10M}, /* 4.4 : 225ns, 100ns */
  146. {0x9, 3, 0x39, 0x3e, SMPL_10M}, /* 4.0 : 250ns, 100ns */
  147. };
  148. static nsp32_sync_table nsp32_sync_table_20M[] = {
  149. {0x1, 0, 0x19, 0x19, SMPL_40M}, /* 10.0 : 100ns, 50ns */
  150. {0x2, 0, 0x1a, 0x25, SMPL_20M}, /* 6.7 : 150ns, 50ns */
  151. {0x3, 1, 0x26, 0x32, SMPL_20M}, /* 5.0 : 200ns, 100ns */
  152. {0x4, 1, 0x33, 0x3e, SMPL_10M}, /* 4.0 : 250ns, 100ns */
  153. {0x5, 2, 0x3f, 0x4b, SMPL_10M}, /* 3.3 : 300ns, 150ns */
  154. {0x6, 2, 0x4c, 0x57, SMPL_10M}, /* 2.8 : 350ns, 150ns */
  155. {0x7, 3, 0x58, 0x64, SMPL_10M}, /* 2.5 : 400ns, 200ns */
  156. {0x8, 3, 0x65, 0x70, SMPL_10M}, /* 2.2 : 450ns, 200ns */
  157. {0x9, 3, 0x71, 0x7d, SMPL_10M}, /* 2.0 : 500ns, 200ns */
  158. };
  159. static nsp32_sync_table nsp32_sync_table_pci[] = {
  160. {0x1, 0, 0x0c, 0x0f, SMPL_40M}, /* 16.6 : 60ns, 30ns */
  161. {0x2, 0, 0x10, 0x16, SMPL_40M}, /* 11.1 : 90ns, 30ns */
  162. {0x3, 1, 0x17, 0x1e, SMPL_20M}, /* 8.3 : 120ns, 60ns */
  163. {0x4, 1, 0x1f, 0x25, SMPL_20M}, /* 6.7 : 150ns, 60ns */
  164. {0x5, 2, 0x26, 0x2d, SMPL_20M}, /* 5.6 : 180ns, 90ns */
  165. {0x6, 2, 0x2e, 0x34, SMPL_10M}, /* 4.8 : 210ns, 90ns */
  166. {0x7, 3, 0x35, 0x3c, SMPL_10M}, /* 4.2 : 240ns, 120ns */
  167. {0x8, 3, 0x3d, 0x43, SMPL_10M}, /* 3.7 : 270ns, 120ns */
  168. {0x9, 3, 0x44, 0x4b, SMPL_10M}, /* 3.3 : 300ns, 120ns */
  169. };
  170. /*
  171. * function declaration
  172. */
  173. /* module entry point */
  174. static int __devinit nsp32_probe (struct pci_dev *, const struct pci_device_id *);
  175. static void __devexit nsp32_remove(struct pci_dev *);
  176. static int __init init_nsp32 (void);
  177. static void __exit exit_nsp32 (void);
  178. /* struct struct scsi_host_template */
  179. static int nsp32_proc_info (struct Scsi_Host *, char *, char **, off_t, int, int);
  180. static int nsp32_detect (struct pci_dev *pdev);
  181. static int nsp32_queuecommand(struct scsi_cmnd *,
  182. void (*done)(struct scsi_cmnd *));
  183. static const char *nsp32_info (struct Scsi_Host *);
  184. static int nsp32_release (struct Scsi_Host *);
  185. /* SCSI error handler */
  186. static int nsp32_eh_abort (struct scsi_cmnd *);
  187. static int nsp32_eh_bus_reset (struct scsi_cmnd *);
  188. static int nsp32_eh_host_reset(struct scsi_cmnd *);
  189. /* generate SCSI message */
  190. static void nsp32_build_identify(struct scsi_cmnd *);
  191. static void nsp32_build_nop (struct scsi_cmnd *);
  192. static void nsp32_build_reject (struct scsi_cmnd *);
  193. static void nsp32_build_sdtr (struct scsi_cmnd *, unsigned char, unsigned char);
  194. /* SCSI message handler */
  195. static int nsp32_busfree_occur(struct scsi_cmnd *, unsigned short);
  196. static void nsp32_msgout_occur (struct scsi_cmnd *);
  197. static void nsp32_msgin_occur (struct scsi_cmnd *, unsigned long, unsigned short);
  198. static int nsp32_setup_sg_table (struct scsi_cmnd *);
  199. static int nsp32_selection_autopara(struct scsi_cmnd *);
  200. static int nsp32_selection_autoscsi(struct scsi_cmnd *);
  201. static void nsp32_scsi_done (struct scsi_cmnd *);
  202. static int nsp32_arbitration (struct scsi_cmnd *, unsigned int);
  203. static int nsp32_reselection (struct scsi_cmnd *, unsigned char);
  204. static void nsp32_adjust_busfree (struct scsi_cmnd *, unsigned int);
  205. static void nsp32_restart_autoscsi (struct scsi_cmnd *, unsigned short);
  206. /* SCSI SDTR */
  207. static void nsp32_analyze_sdtr (struct scsi_cmnd *);
  208. static int nsp32_search_period_entry(nsp32_hw_data *, nsp32_target *, unsigned char);
  209. static void nsp32_set_async (nsp32_hw_data *, nsp32_target *);
  210. static void nsp32_set_max_sync (nsp32_hw_data *, nsp32_target *, unsigned char *, unsigned char *);
  211. static void nsp32_set_sync_entry (nsp32_hw_data *, nsp32_target *, int, unsigned char);
  212. /* SCSI bus status handler */
  213. static void nsp32_wait_req (nsp32_hw_data *, int);
  214. static void nsp32_wait_sack (nsp32_hw_data *, int);
  215. static void nsp32_sack_assert (nsp32_hw_data *);
  216. static void nsp32_sack_negate (nsp32_hw_data *);
  217. static void nsp32_do_bus_reset(nsp32_hw_data *);
  218. /* hardware interrupt handler */
  219. static irqreturn_t do_nsp32_isr(int, void *);
  220. /* initialize hardware */
  221. static int nsp32hw_init(nsp32_hw_data *);
  222. /* EEPROM handler */
  223. static int nsp32_getprom_param (nsp32_hw_data *);
  224. static int nsp32_getprom_at24 (nsp32_hw_data *);
  225. static int nsp32_getprom_c16 (nsp32_hw_data *);
  226. static void nsp32_prom_start (nsp32_hw_data *);
  227. static void nsp32_prom_stop (nsp32_hw_data *);
  228. static int nsp32_prom_read (nsp32_hw_data *, int);
  229. static int nsp32_prom_read_bit (nsp32_hw_data *);
  230. static void nsp32_prom_write_bit(nsp32_hw_data *, int);
  231. static void nsp32_prom_set (nsp32_hw_data *, int, int);
  232. static int nsp32_prom_get (nsp32_hw_data *, int);
  233. /* debug/warning/info message */
  234. static void nsp32_message (const char *, int, char *, char *, ...);
  235. #ifdef NSP32_DEBUG
  236. static void nsp32_dmessage(const char *, int, int, char *, ...);
  237. #endif
  238. /*
  239. * max_sectors is currently limited up to 128.
  240. */
  241. static struct scsi_host_template nsp32_template = {
  242. .proc_name = "nsp32",
  243. .name = "Workbit NinjaSCSI-32Bi/UDE",
  244. .proc_info = nsp32_proc_info,
  245. .info = nsp32_info,
  246. .queuecommand = nsp32_queuecommand,
  247. .can_queue = 1,
  248. .sg_tablesize = NSP32_SG_SIZE,
  249. .max_sectors = 128,
  250. .cmd_per_lun = 1,
  251. .this_id = NSP32_HOST_SCSIID,
  252. .use_clustering = DISABLE_CLUSTERING,
  253. .use_sg_chaining = ENABLE_SG_CHAINING,
  254. .eh_abort_handler = nsp32_eh_abort,
  255. .eh_bus_reset_handler = nsp32_eh_bus_reset,
  256. .eh_host_reset_handler = nsp32_eh_host_reset,
  257. /* .highmem_io = 1, */
  258. };
  259. #include "nsp32_io.h"
  260. /***********************************************************************
  261. * debug, error print
  262. */
  263. #ifndef NSP32_DEBUG
  264. # define NSP32_DEBUG_MASK 0x000000
  265. # define nsp32_msg(type, args...) nsp32_message ("", 0, (type), args)
  266. # define nsp32_dbg(mask, args...) /* */
  267. #else
  268. # define NSP32_DEBUG_MASK 0xffffff
  269. # define nsp32_msg(type, args...) \
  270. nsp32_message (__FUNCTION__, __LINE__, (type), args)
  271. # define nsp32_dbg(mask, args...) \
  272. nsp32_dmessage(__FUNCTION__, __LINE__, (mask), args)
  273. #endif
  274. #define NSP32_DEBUG_QUEUECOMMAND BIT(0)
  275. #define NSP32_DEBUG_REGISTER BIT(1)
  276. #define NSP32_DEBUG_AUTOSCSI BIT(2)
  277. #define NSP32_DEBUG_INTR BIT(3)
  278. #define NSP32_DEBUG_SGLIST BIT(4)
  279. #define NSP32_DEBUG_BUSFREE BIT(5)
  280. #define NSP32_DEBUG_CDB_CONTENTS BIT(6)
  281. #define NSP32_DEBUG_RESELECTION BIT(7)
  282. #define NSP32_DEBUG_MSGINOCCUR BIT(8)
  283. #define NSP32_DEBUG_EEPROM BIT(9)
  284. #define NSP32_DEBUG_MSGOUTOCCUR BIT(10)
  285. #define NSP32_DEBUG_BUSRESET BIT(11)
  286. #define NSP32_DEBUG_RESTART BIT(12)
  287. #define NSP32_DEBUG_SYNC BIT(13)
  288. #define NSP32_DEBUG_WAIT BIT(14)
  289. #define NSP32_DEBUG_TARGETFLAG BIT(15)
  290. #define NSP32_DEBUG_PROC BIT(16)
  291. #define NSP32_DEBUG_INIT BIT(17)
  292. #define NSP32_SPECIAL_PRINT_REGISTER BIT(20)
  293. #define NSP32_DEBUG_BUF_LEN 100
  294. static void nsp32_message(const char *func, int line, char *type, char *fmt, ...)
  295. {
  296. va_list args;
  297. char buf[NSP32_DEBUG_BUF_LEN];
  298. va_start(args, fmt);
  299. vsnprintf(buf, sizeof(buf), fmt, args);
  300. va_end(args);
  301. #ifndef NSP32_DEBUG
  302. printk("%snsp32: %s\n", type, buf);
  303. #else
  304. printk("%snsp32: %s (%d): %s\n", type, func, line, buf);
  305. #endif
  306. }
  307. #ifdef NSP32_DEBUG
  308. static void nsp32_dmessage(const char *func, int line, int mask, char *fmt, ...)
  309. {
  310. va_list args;
  311. char buf[NSP32_DEBUG_BUF_LEN];
  312. va_start(args, fmt);
  313. vsnprintf(buf, sizeof(buf), fmt, args);
  314. va_end(args);
  315. if (mask & NSP32_DEBUG_MASK) {
  316. printk("nsp32-debug: 0x%x %s (%d): %s\n", mask, func, line, buf);
  317. }
  318. }
  319. #endif
  320. #ifdef NSP32_DEBUG
  321. # include "nsp32_debug.c"
  322. #else
  323. # define show_command(arg) /* */
  324. # define show_busphase(arg) /* */
  325. # define show_autophase(arg) /* */
  326. #endif
  327. /*
  328. * IDENTIFY Message
  329. */
  330. static void nsp32_build_identify(struct scsi_cmnd *SCpnt)
  331. {
  332. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  333. int pos = data->msgout_len;
  334. int mode = FALSE;
  335. /* XXX: Auto DiscPriv detection is progressing... */
  336. if (disc_priv == 0) {
  337. /* mode = TRUE; */
  338. }
  339. data->msgoutbuf[pos] = IDENTIFY(mode, SCpnt->device->lun); pos++;
  340. data->msgout_len = pos;
  341. }
  342. /*
  343. * SDTR Message Routine
  344. */
  345. static void nsp32_build_sdtr(struct scsi_cmnd *SCpnt,
  346. unsigned char period,
  347. unsigned char offset)
  348. {
  349. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  350. int pos = data->msgout_len;
  351. data->msgoutbuf[pos] = EXTENDED_MESSAGE; pos++;
  352. data->msgoutbuf[pos] = EXTENDED_SDTR_LEN; pos++;
  353. data->msgoutbuf[pos] = EXTENDED_SDTR; pos++;
  354. data->msgoutbuf[pos] = period; pos++;
  355. data->msgoutbuf[pos] = offset; pos++;
  356. data->msgout_len = pos;
  357. }
  358. /*
  359. * No Operation Message
  360. */
  361. static void nsp32_build_nop(struct scsi_cmnd *SCpnt)
  362. {
  363. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  364. int pos = data->msgout_len;
  365. if (pos != 0) {
  366. nsp32_msg(KERN_WARNING,
  367. "Some messages are already contained!");
  368. return;
  369. }
  370. data->msgoutbuf[pos] = NOP; pos++;
  371. data->msgout_len = pos;
  372. }
  373. /*
  374. * Reject Message
  375. */
  376. static void nsp32_build_reject(struct scsi_cmnd *SCpnt)
  377. {
  378. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  379. int pos = data->msgout_len;
  380. data->msgoutbuf[pos] = MESSAGE_REJECT; pos++;
  381. data->msgout_len = pos;
  382. }
  383. /*
  384. * timer
  385. */
  386. #if 0
  387. static void nsp32_start_timer(struct scsi_cmnd *SCpnt, int time)
  388. {
  389. unsigned int base = SCpnt->host->io_port;
  390. nsp32_dbg(NSP32_DEBUG_INTR, "timer=%d", time);
  391. if (time & (~TIMER_CNT_MASK)) {
  392. nsp32_dbg(NSP32_DEBUG_INTR, "timer set overflow");
  393. }
  394. nsp32_write2(base, TIMER_SET, time & TIMER_CNT_MASK);
  395. }
  396. #endif
  397. /*
  398. * set SCSI command and other parameter to asic, and start selection phase
  399. */
  400. static int nsp32_selection_autopara(struct scsi_cmnd *SCpnt)
  401. {
  402. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  403. unsigned int base = SCpnt->device->host->io_port;
  404. unsigned int host_id = SCpnt->device->host->this_id;
  405. unsigned char target = scmd_id(SCpnt);
  406. nsp32_autoparam *param = data->autoparam;
  407. unsigned char phase;
  408. int i, ret;
  409. unsigned int msgout;
  410. u16_le s;
  411. nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "in");
  412. /*
  413. * check bus free
  414. */
  415. phase = nsp32_read1(base, SCSI_BUS_MONITOR);
  416. if (phase != BUSMON_BUS_FREE) {
  417. nsp32_msg(KERN_WARNING, "bus busy");
  418. show_busphase(phase & BUSMON_PHASE_MASK);
  419. SCpnt->result = DID_BUS_BUSY << 16;
  420. return FALSE;
  421. }
  422. /*
  423. * message out
  424. *
  425. * Note: If the range of msgout_len is 1 - 3, fill scsi_msgout.
  426. * over 3 messages needs another routine.
  427. */
  428. if (data->msgout_len == 0) {
  429. nsp32_msg(KERN_ERR, "SCSI MsgOut without any message!");
  430. SCpnt->result = DID_ERROR << 16;
  431. return FALSE;
  432. } else if (data->msgout_len > 0 && data->msgout_len <= 3) {
  433. msgout = 0;
  434. for (i = 0; i < data->msgout_len; i++) {
  435. /*
  436. * the sending order of the message is:
  437. * MCNT 3: MSG#0 -> MSG#1 -> MSG#2
  438. * MCNT 2: MSG#1 -> MSG#2
  439. * MCNT 1: MSG#2
  440. */
  441. msgout >>= 8;
  442. msgout |= ((unsigned int)(data->msgoutbuf[i]) << 24);
  443. }
  444. msgout |= MV_VALID; /* MV valid */
  445. msgout |= (unsigned int)data->msgout_len; /* len */
  446. } else {
  447. /* data->msgout_len > 3 */
  448. msgout = 0;
  449. }
  450. // nsp_dbg(NSP32_DEBUG_AUTOSCSI, "sel time out=0x%x\n", nsp32_read2(base, SEL_TIME_OUT));
  451. // nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME);
  452. /*
  453. * setup asic parameter
  454. */
  455. memset(param, 0, sizeof(nsp32_autoparam));
  456. /* cdb */
  457. for (i = 0; i < SCpnt->cmd_len; i++) {
  458. param->cdb[4 * i] = SCpnt->cmnd[i];
  459. }
  460. /* outgoing messages */
  461. param->msgout = cpu_to_le32(msgout);
  462. /* syncreg, ackwidth, target id, SREQ sampling rate */
  463. param->syncreg = data->cur_target->syncreg;
  464. param->ackwidth = data->cur_target->ackwidth;
  465. param->target_id = BIT(host_id) | BIT(target);
  466. param->sample_reg = data->cur_target->sample_reg;
  467. // nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "sample rate=0x%x\n", data->cur_target->sample_reg);
  468. /* command control */
  469. param->command_control = cpu_to_le16(CLEAR_CDB_FIFO_POINTER |
  470. AUTOSCSI_START |
  471. AUTO_MSGIN_00_OR_04 |
  472. AUTO_MSGIN_02 |
  473. AUTO_ATN );
  474. /* transfer control */
  475. s = 0;
  476. switch (data->trans_method) {
  477. case NSP32_TRANSFER_BUSMASTER:
  478. s |= BM_START;
  479. break;
  480. case NSP32_TRANSFER_MMIO:
  481. s |= CB_MMIO_MODE;
  482. break;
  483. case NSP32_TRANSFER_PIO:
  484. s |= CB_IO_MODE;
  485. break;
  486. default:
  487. nsp32_msg(KERN_ERR, "unknown trans_method");
  488. break;
  489. }
  490. /*
  491. * OR-ed BLIEND_MODE, FIFO intr is decreased, instead of PCI bus waits.
  492. * For bus master transfer, it's taken off.
  493. */
  494. s |= (TRANSFER_GO | ALL_COUNTER_CLR);
  495. param->transfer_control = cpu_to_le16(s);
  496. /* sg table addr */
  497. param->sgt_pointer = cpu_to_le32(data->cur_lunt->sglun_paddr);
  498. /*
  499. * transfer parameter to ASIC
  500. */
  501. nsp32_write4(base, SGT_ADR, data->auto_paddr);
  502. nsp32_write2(base, COMMAND_CONTROL, CLEAR_CDB_FIFO_POINTER |
  503. AUTO_PARAMETER );
  504. /*
  505. * Check arbitration
  506. */
  507. ret = nsp32_arbitration(SCpnt, base);
  508. return ret;
  509. }
  510. /*
  511. * Selection with AUTO SCSI (without AUTO PARAMETER)
  512. */
  513. static int nsp32_selection_autoscsi(struct scsi_cmnd *SCpnt)
  514. {
  515. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  516. unsigned int base = SCpnt->device->host->io_port;
  517. unsigned int host_id = SCpnt->device->host->this_id;
  518. unsigned char target = scmd_id(SCpnt);
  519. unsigned char phase;
  520. int status;
  521. unsigned short command = 0;
  522. unsigned int msgout = 0;
  523. unsigned short execph;
  524. int i;
  525. nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "in");
  526. /*
  527. * IRQ disable
  528. */
  529. nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
  530. /*
  531. * check bus line
  532. */
  533. phase = nsp32_read1(base, SCSI_BUS_MONITOR);
  534. if(((phase & BUSMON_BSY) == 1) || (phase & BUSMON_SEL) == 1) {
  535. nsp32_msg(KERN_WARNING, "bus busy");
  536. SCpnt->result = DID_BUS_BUSY << 16;
  537. status = 1;
  538. goto out;
  539. }
  540. /*
  541. * clear execph
  542. */
  543. execph = nsp32_read2(base, SCSI_EXECUTE_PHASE);
  544. /*
  545. * clear FIFO counter to set CDBs
  546. */
  547. nsp32_write2(base, COMMAND_CONTROL, CLEAR_CDB_FIFO_POINTER);
  548. /*
  549. * set CDB0 - CDB15
  550. */
  551. for (i = 0; i < SCpnt->cmd_len; i++) {
  552. nsp32_write1(base, COMMAND_DATA, SCpnt->cmnd[i]);
  553. }
  554. nsp32_dbg(NSP32_DEBUG_CDB_CONTENTS, "CDB[0]=[0x%x]", SCpnt->cmnd[0]);
  555. /*
  556. * set SCSIOUT LATCH(initiator)/TARGET(target) (OR-ed) ID
  557. */
  558. nsp32_write1(base, SCSI_OUT_LATCH_TARGET_ID, BIT(host_id) | BIT(target));
  559. /*
  560. * set SCSI MSGOUT REG
  561. *
  562. * Note: If the range of msgout_len is 1 - 3, fill scsi_msgout.
  563. * over 3 messages needs another routine.
  564. */
  565. if (data->msgout_len == 0) {
  566. nsp32_msg(KERN_ERR, "SCSI MsgOut without any message!");
  567. SCpnt->result = DID_ERROR << 16;
  568. status = 1;
  569. goto out;
  570. } else if (data->msgout_len > 0 && data->msgout_len <= 3) {
  571. msgout = 0;
  572. for (i = 0; i < data->msgout_len; i++) {
  573. /*
  574. * the sending order of the message is:
  575. * MCNT 3: MSG#0 -> MSG#1 -> MSG#2
  576. * MCNT 2: MSG#1 -> MSG#2
  577. * MCNT 1: MSG#2
  578. */
  579. msgout >>= 8;
  580. msgout |= ((unsigned int)(data->msgoutbuf[i]) << 24);
  581. }
  582. msgout |= MV_VALID; /* MV valid */
  583. msgout |= (unsigned int)data->msgout_len; /* len */
  584. nsp32_write4(base, SCSI_MSG_OUT, msgout);
  585. } else {
  586. /* data->msgout_len > 3 */
  587. nsp32_write4(base, SCSI_MSG_OUT, 0);
  588. }
  589. /*
  590. * set selection timeout(= 250ms)
  591. */
  592. nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME);
  593. /*
  594. * set SREQ hazard killer sampling rate
  595. *
  596. * TODO: sample_rate (BASE+0F) is 0 when internal clock = 40MHz.
  597. * check other internal clock!
  598. */
  599. nsp32_write1(base, SREQ_SMPL_RATE, data->cur_target->sample_reg);
  600. /*
  601. * clear Arbit
  602. */
  603. nsp32_write1(base, SET_ARBIT, ARBIT_CLEAR);
  604. /*
  605. * set SYNCREG
  606. * Don't set BM_START_ADR before setting this register.
  607. */
  608. nsp32_write1(base, SYNC_REG, data->cur_target->syncreg);
  609. /*
  610. * set ACKWIDTH
  611. */
  612. nsp32_write1(base, ACK_WIDTH, data->cur_target->ackwidth);
  613. nsp32_dbg(NSP32_DEBUG_AUTOSCSI,
  614. "syncreg=0x%x, ackwidth=0x%x, sgtpaddr=0x%x, id=0x%x",
  615. nsp32_read1(base, SYNC_REG), nsp32_read1(base, ACK_WIDTH),
  616. nsp32_read4(base, SGT_ADR), nsp32_read1(base, SCSI_OUT_LATCH_TARGET_ID));
  617. nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "msgout_len=%d, msgout=0x%x",
  618. data->msgout_len, msgout);
  619. /*
  620. * set SGT ADDR (physical address)
  621. */
  622. nsp32_write4(base, SGT_ADR, data->cur_lunt->sglun_paddr);
  623. /*
  624. * set TRANSFER CONTROL REG
  625. */
  626. command = 0;
  627. command |= (TRANSFER_GO | ALL_COUNTER_CLR);
  628. if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
  629. if (scsi_bufflen(SCpnt) > 0) {
  630. command |= BM_START;
  631. }
  632. } else if (data->trans_method & NSP32_TRANSFER_MMIO) {
  633. command |= CB_MMIO_MODE;
  634. } else if (data->trans_method & NSP32_TRANSFER_PIO) {
  635. command |= CB_IO_MODE;
  636. }
  637. nsp32_write2(base, TRANSFER_CONTROL, command);
  638. /*
  639. * start AUTO SCSI, kick off arbitration
  640. */
  641. command = (CLEAR_CDB_FIFO_POINTER |
  642. AUTOSCSI_START |
  643. AUTO_MSGIN_00_OR_04 |
  644. AUTO_MSGIN_02 |
  645. AUTO_ATN );
  646. nsp32_write2(base, COMMAND_CONTROL, command);
  647. /*
  648. * Check arbitration
  649. */
  650. status = nsp32_arbitration(SCpnt, base);
  651. out:
  652. /*
  653. * IRQ enable
  654. */
  655. nsp32_write2(base, IRQ_CONTROL, 0);
  656. return status;
  657. }
  658. /*
  659. * Arbitration Status Check
  660. *
  661. * Note: Arbitration counter is waited during ARBIT_GO is not lifting.
  662. * Using udelay(1) consumes CPU time and system time, but
  663. * arbitration delay time is defined minimal 2.4us in SCSI
  664. * specification, thus udelay works as coarse grained wait timer.
  665. */
  666. static int nsp32_arbitration(struct scsi_cmnd *SCpnt, unsigned int base)
  667. {
  668. unsigned char arbit;
  669. int status = TRUE;
  670. int time = 0;
  671. do {
  672. arbit = nsp32_read1(base, ARBIT_STATUS);
  673. time++;
  674. } while ((arbit & (ARBIT_WIN | ARBIT_FAIL)) == 0 &&
  675. (time <= ARBIT_TIMEOUT_TIME));
  676. nsp32_dbg(NSP32_DEBUG_AUTOSCSI,
  677. "arbit: 0x%x, delay time: %d", arbit, time);
  678. if (arbit & ARBIT_WIN) {
  679. /* Arbitration succeeded */
  680. SCpnt->result = DID_OK << 16;
  681. nsp32_index_write1(base, EXT_PORT, LED_ON); /* PCI LED on */
  682. } else if (arbit & ARBIT_FAIL) {
  683. /* Arbitration failed */
  684. SCpnt->result = DID_BUS_BUSY << 16;
  685. status = FALSE;
  686. } else {
  687. /*
  688. * unknown error or ARBIT_GO timeout,
  689. * something lock up! guess no connection.
  690. */
  691. nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "arbit timeout");
  692. SCpnt->result = DID_NO_CONNECT << 16;
  693. status = FALSE;
  694. }
  695. /*
  696. * clear Arbit
  697. */
  698. nsp32_write1(base, SET_ARBIT, ARBIT_CLEAR);
  699. return status;
  700. }
  701. /*
  702. * reselection
  703. *
  704. * Note: This reselection routine is called from msgin_occur,
  705. * reselection target id&lun must be already set.
  706. * SCSI-2 says IDENTIFY implies RESTORE_POINTER operation.
  707. */
  708. static int nsp32_reselection(struct scsi_cmnd *SCpnt, unsigned char newlun)
  709. {
  710. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  711. unsigned int host_id = SCpnt->device->host->this_id;
  712. unsigned int base = SCpnt->device->host->io_port;
  713. unsigned char tmpid, newid;
  714. nsp32_dbg(NSP32_DEBUG_RESELECTION, "enter");
  715. /*
  716. * calculate reselected SCSI ID
  717. */
  718. tmpid = nsp32_read1(base, RESELECT_ID);
  719. tmpid &= (~BIT(host_id));
  720. newid = 0;
  721. while (tmpid) {
  722. if (tmpid & 1) {
  723. break;
  724. }
  725. tmpid >>= 1;
  726. newid++;
  727. }
  728. /*
  729. * If reselected New ID:LUN is not existed
  730. * or current nexus is not existed, unexpected
  731. * reselection is occurred. Send reject message.
  732. */
  733. if (newid >= ARRAY_SIZE(data->lunt) || newlun >= ARRAY_SIZE(data->lunt[0])) {
  734. nsp32_msg(KERN_WARNING, "unknown id/lun");
  735. return FALSE;
  736. } else if(data->lunt[newid][newlun].SCpnt == NULL) {
  737. nsp32_msg(KERN_WARNING, "no SCSI command is processing");
  738. return FALSE;
  739. }
  740. data->cur_id = newid;
  741. data->cur_lun = newlun;
  742. data->cur_target = &(data->target[newid]);
  743. data->cur_lunt = &(data->lunt[newid][newlun]);
  744. /* reset SACK/SavedACK counter (or ALL clear?) */
  745. nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
  746. return TRUE;
  747. }
  748. /*
  749. * nsp32_setup_sg_table - build scatter gather list for transfer data
  750. * with bus master.
  751. *
  752. * Note: NinjaSCSI-32Bi/UDE bus master can not transfer over 64KB at a time.
  753. */
  754. static int nsp32_setup_sg_table(struct scsi_cmnd *SCpnt)
  755. {
  756. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  757. struct scatterlist *sg;
  758. nsp32_sgtable *sgt = data->cur_lunt->sglun->sgt;
  759. int num, i;
  760. u32_le l;
  761. if (sgt == NULL) {
  762. nsp32_dbg(NSP32_DEBUG_SGLIST, "SGT == null");
  763. return FALSE;
  764. }
  765. num = scsi_dma_map(SCpnt);
  766. if (!num)
  767. return TRUE;
  768. else if (num < 0)
  769. return FALSE;
  770. else {
  771. scsi_for_each_sg(SCpnt, sg, num, i) {
  772. /*
  773. * Build nsp32_sglist, substitute sg dma addresses.
  774. */
  775. sgt[i].addr = cpu_to_le32(sg_dma_address(sg));
  776. sgt[i].len = cpu_to_le32(sg_dma_len(sg));
  777. if (le32_to_cpu(sgt[i].len) > 0x10000) {
  778. nsp32_msg(KERN_ERR,
  779. "can't transfer over 64KB at a time, size=0x%lx", le32_to_cpu(sgt[i].len));
  780. return FALSE;
  781. }
  782. nsp32_dbg(NSP32_DEBUG_SGLIST,
  783. "num 0x%x : addr 0x%lx len 0x%lx",
  784. i,
  785. le32_to_cpu(sgt[i].addr),
  786. le32_to_cpu(sgt[i].len ));
  787. }
  788. /* set end mark */
  789. l = le32_to_cpu(sgt[num-1].len);
  790. sgt[num-1].len = cpu_to_le32(l | SGTEND);
  791. }
  792. return TRUE;
  793. }
  794. static int nsp32_queuecommand(struct scsi_cmnd *SCpnt, void (*done)(struct scsi_cmnd *))
  795. {
  796. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  797. nsp32_target *target;
  798. nsp32_lunt *cur_lunt;
  799. int ret;
  800. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
  801. "enter. target: 0x%x LUN: 0x%x cmnd: 0x%x cmndlen: 0x%x "
  802. "use_sg: 0x%x reqbuf: 0x%lx reqlen: 0x%x",
  803. SCpnt->device->id, SCpnt->device->lun, SCpnt->cmnd[0], SCpnt->cmd_len,
  804. scsi_sg_count(SCpnt), scsi_sglist(SCpnt), scsi_bufflen(SCpnt));
  805. if (data->CurrentSC != NULL) {
  806. nsp32_msg(KERN_ERR, "Currentsc != NULL. Cancel this command request");
  807. data->CurrentSC = NULL;
  808. SCpnt->result = DID_NO_CONNECT << 16;
  809. done(SCpnt);
  810. return 0;
  811. }
  812. /* check target ID is not same as this initiator ID */
  813. if (scmd_id(SCpnt) == SCpnt->device->host->this_id) {
  814. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "terget==host???");
  815. SCpnt->result = DID_BAD_TARGET << 16;
  816. done(SCpnt);
  817. return 0;
  818. }
  819. /* check target LUN is allowable value */
  820. if (SCpnt->device->lun >= MAX_LUN) {
  821. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "no more lun");
  822. SCpnt->result = DID_BAD_TARGET << 16;
  823. done(SCpnt);
  824. return 0;
  825. }
  826. show_command(SCpnt);
  827. SCpnt->scsi_done = done;
  828. data->CurrentSC = SCpnt;
  829. SCpnt->SCp.Status = CHECK_CONDITION;
  830. SCpnt->SCp.Message = 0;
  831. scsi_set_resid(SCpnt, scsi_bufflen(SCpnt));
  832. SCpnt->SCp.ptr = (char *)scsi_sglist(SCpnt);
  833. SCpnt->SCp.this_residual = scsi_bufflen(SCpnt);
  834. SCpnt->SCp.buffer = NULL;
  835. SCpnt->SCp.buffers_residual = 0;
  836. /* initialize data */
  837. data->msgout_len = 0;
  838. data->msgin_len = 0;
  839. cur_lunt = &(data->lunt[SCpnt->device->id][SCpnt->device->lun]);
  840. cur_lunt->SCpnt = SCpnt;
  841. cur_lunt->save_datp = 0;
  842. cur_lunt->msgin03 = FALSE;
  843. data->cur_lunt = cur_lunt;
  844. data->cur_id = SCpnt->device->id;
  845. data->cur_lun = SCpnt->device->lun;
  846. ret = nsp32_setup_sg_table(SCpnt);
  847. if (ret == FALSE) {
  848. nsp32_msg(KERN_ERR, "SGT fail");
  849. SCpnt->result = DID_ERROR << 16;
  850. nsp32_scsi_done(SCpnt);
  851. return 0;
  852. }
  853. /* Build IDENTIFY */
  854. nsp32_build_identify(SCpnt);
  855. /*
  856. * If target is the first time to transfer after the reset
  857. * (target don't have SDTR_DONE and SDTR_INITIATOR), sync
  858. * message SDTR is needed to do synchronous transfer.
  859. */
  860. target = &data->target[scmd_id(SCpnt)];
  861. data->cur_target = target;
  862. if (!(target->sync_flag & (SDTR_DONE | SDTR_INITIATOR | SDTR_TARGET))) {
  863. unsigned char period, offset;
  864. if (trans_mode != ASYNC_MODE) {
  865. nsp32_set_max_sync(data, target, &period, &offset);
  866. nsp32_build_sdtr(SCpnt, period, offset);
  867. target->sync_flag |= SDTR_INITIATOR;
  868. } else {
  869. nsp32_set_async(data, target);
  870. target->sync_flag |= SDTR_DONE;
  871. }
  872. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
  873. "SDTR: entry: %d start_period: 0x%x offset: 0x%x\n",
  874. target->limit_entry, period, offset);
  875. } else if (target->sync_flag & SDTR_INITIATOR) {
  876. /*
  877. * It was negotiating SDTR with target, sending from the
  878. * initiator, but there are no chance to remove this flag.
  879. * Set async because we don't get proper negotiation.
  880. */
  881. nsp32_set_async(data, target);
  882. target->sync_flag &= ~SDTR_INITIATOR;
  883. target->sync_flag |= SDTR_DONE;
  884. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
  885. "SDTR_INITIATOR: fall back to async");
  886. } else if (target->sync_flag & SDTR_TARGET) {
  887. /*
  888. * It was negotiating SDTR with target, sending from target,
  889. * but there are no chance to remove this flag. Set async
  890. * because we don't get proper negotiation.
  891. */
  892. nsp32_set_async(data, target);
  893. target->sync_flag &= ~SDTR_TARGET;
  894. target->sync_flag |= SDTR_DONE;
  895. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
  896. "Unknown SDTR from target is reached, fall back to async.");
  897. }
  898. nsp32_dbg(NSP32_DEBUG_TARGETFLAG,
  899. "target: %d sync_flag: 0x%x syncreg: 0x%x ackwidth: 0x%x",
  900. SCpnt->device->id, target->sync_flag, target->syncreg,
  901. target->ackwidth);
  902. /* Selection */
  903. if (auto_param == 0) {
  904. ret = nsp32_selection_autopara(SCpnt);
  905. } else {
  906. ret = nsp32_selection_autoscsi(SCpnt);
  907. }
  908. if (ret != TRUE) {
  909. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "selection fail");
  910. nsp32_scsi_done(SCpnt);
  911. }
  912. return 0;
  913. }
  914. /* initialize asic */
  915. static int nsp32hw_init(nsp32_hw_data *data)
  916. {
  917. unsigned int base = data->BaseAddress;
  918. unsigned short irq_stat;
  919. unsigned long lc_reg;
  920. unsigned char power;
  921. lc_reg = nsp32_index_read4(base, CFG_LATE_CACHE);
  922. if ((lc_reg & 0xff00) == 0) {
  923. lc_reg |= (0x20 << 8);
  924. nsp32_index_write2(base, CFG_LATE_CACHE, lc_reg & 0xffff);
  925. }
  926. nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
  927. nsp32_write2(base, TRANSFER_CONTROL, 0);
  928. nsp32_write4(base, BM_CNT, 0);
  929. nsp32_write2(base, SCSI_EXECUTE_PHASE, 0);
  930. do {
  931. irq_stat = nsp32_read2(base, IRQ_STATUS);
  932. nsp32_dbg(NSP32_DEBUG_INIT, "irq_stat 0x%x", irq_stat);
  933. } while (irq_stat & IRQSTATUS_ANY_IRQ);
  934. /*
  935. * Fill FIFO_FULL_SHLD, FIFO_EMPTY_SHLD. Below parameter is
  936. * designated by specification.
  937. */
  938. if ((data->trans_method & NSP32_TRANSFER_PIO) ||
  939. (data->trans_method & NSP32_TRANSFER_MMIO)) {
  940. nsp32_index_write1(base, FIFO_FULL_SHLD_COUNT, 0x40);
  941. nsp32_index_write1(base, FIFO_EMPTY_SHLD_COUNT, 0x40);
  942. } else if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
  943. nsp32_index_write1(base, FIFO_FULL_SHLD_COUNT, 0x10);
  944. nsp32_index_write1(base, FIFO_EMPTY_SHLD_COUNT, 0x60);
  945. } else {
  946. nsp32_dbg(NSP32_DEBUG_INIT, "unknown transfer mode");
  947. }
  948. nsp32_dbg(NSP32_DEBUG_INIT, "full 0x%x emp 0x%x",
  949. nsp32_index_read1(base, FIFO_FULL_SHLD_COUNT),
  950. nsp32_index_read1(base, FIFO_EMPTY_SHLD_COUNT));
  951. nsp32_index_write1(base, CLOCK_DIV, data->clock);
  952. nsp32_index_write1(base, BM_CYCLE, MEMRD_CMD1 | SGT_AUTO_PARA_MEMED_CMD);
  953. nsp32_write1(base, PARITY_CONTROL, 0); /* parity check is disable */
  954. /*
  955. * initialize MISC_WRRD register
  956. *
  957. * Note: Designated parameters is obeyed as following:
  958. * MISC_SCSI_DIRECTION_DETECTOR_SELECT: It must be set.
  959. * MISC_MASTER_TERMINATION_SELECT: It must be set.
  960. * MISC_BMREQ_NEGATE_TIMING_SEL: It should be set.
  961. * MISC_AUTOSEL_TIMING_SEL: It should be set.
  962. * MISC_BMSTOP_CHANGE2_NONDATA_PHASE: It should be set.
  963. * MISC_DELAYED_BMSTART: It's selected for safety.
  964. *
  965. * Note: If MISC_BMSTOP_CHANGE2_NONDATA_PHASE is set, then
  966. * we have to set TRANSFERCONTROL_BM_START as 0 and set
  967. * appropriate value before restarting bus master transfer.
  968. */
  969. nsp32_index_write2(base, MISC_WR,
  970. (SCSI_DIRECTION_DETECTOR_SELECT |
  971. DELAYED_BMSTART |
  972. MASTER_TERMINATION_SELECT |
  973. BMREQ_NEGATE_TIMING_SEL |
  974. AUTOSEL_TIMING_SEL |
  975. BMSTOP_CHANGE2_NONDATA_PHASE));
  976. nsp32_index_write1(base, TERM_PWR_CONTROL, 0);
  977. power = nsp32_index_read1(base, TERM_PWR_CONTROL);
  978. if (!(power & SENSE)) {
  979. nsp32_msg(KERN_INFO, "term power on");
  980. nsp32_index_write1(base, TERM_PWR_CONTROL, BPWR);
  981. }
  982. nsp32_write2(base, TIMER_SET, TIMER_STOP);
  983. nsp32_write2(base, TIMER_SET, TIMER_STOP); /* Required 2 times */
  984. nsp32_write1(base, SYNC_REG, 0);
  985. nsp32_write1(base, ACK_WIDTH, 0);
  986. nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME);
  987. /*
  988. * enable to select designated IRQ (except for
  989. * IRQSELECT_SERR, IRQSELECT_PERR, IRQSELECT_BMCNTERR)
  990. */
  991. nsp32_index_write2(base, IRQ_SELECT, IRQSELECT_TIMER_IRQ |
  992. IRQSELECT_SCSIRESET_IRQ |
  993. IRQSELECT_FIFO_SHLD_IRQ |
  994. IRQSELECT_RESELECT_IRQ |
  995. IRQSELECT_PHASE_CHANGE_IRQ |
  996. IRQSELECT_AUTO_SCSI_SEQ_IRQ |
  997. // IRQSELECT_BMCNTERR_IRQ |
  998. IRQSELECT_TARGET_ABORT_IRQ |
  999. IRQSELECT_MASTER_ABORT_IRQ );
  1000. nsp32_write2(base, IRQ_CONTROL, 0);
  1001. /* PCI LED off */
  1002. nsp32_index_write1(base, EXT_PORT_DDR, LED_OFF);
  1003. nsp32_index_write1(base, EXT_PORT, LED_OFF);
  1004. return TRUE;
  1005. }
  1006. /* interrupt routine */
  1007. static irqreturn_t do_nsp32_isr(int irq, void *dev_id)
  1008. {
  1009. nsp32_hw_data *data = dev_id;
  1010. unsigned int base = data->BaseAddress;
  1011. struct scsi_cmnd *SCpnt = data->CurrentSC;
  1012. unsigned short auto_stat, irq_stat, trans_stat;
  1013. unsigned char busmon, busphase;
  1014. unsigned long flags;
  1015. int ret;
  1016. int handled = 0;
  1017. struct Scsi_Host *host = data->Host;
  1018. spin_lock_irqsave(host->host_lock, flags);
  1019. /*
  1020. * IRQ check, then enable IRQ mask
  1021. */
  1022. irq_stat = nsp32_read2(base, IRQ_STATUS);
  1023. nsp32_dbg(NSP32_DEBUG_INTR,
  1024. "enter IRQ: %d, IRQstatus: 0x%x", irq, irq_stat);
  1025. /* is this interrupt comes from Ninja asic? */
  1026. if ((irq_stat & IRQSTATUS_ANY_IRQ) == 0) {
  1027. nsp32_dbg(NSP32_DEBUG_INTR, "shared interrupt: irq other 0x%x", irq_stat);
  1028. goto out2;
  1029. }
  1030. handled = 1;
  1031. nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
  1032. busmon = nsp32_read1(base, SCSI_BUS_MONITOR);
  1033. busphase = busmon & BUSMON_PHASE_MASK;
  1034. trans_stat = nsp32_read2(base, TRANSFER_STATUS);
  1035. if ((irq_stat == 0xffff) && (trans_stat == 0xffff)) {
  1036. nsp32_msg(KERN_INFO, "card disconnect");
  1037. if (data->CurrentSC != NULL) {
  1038. nsp32_msg(KERN_INFO, "clean up current SCSI command");
  1039. SCpnt->result = DID_BAD_TARGET << 16;
  1040. nsp32_scsi_done(SCpnt);
  1041. }
  1042. goto out;
  1043. }
  1044. /* Timer IRQ */
  1045. if (irq_stat & IRQSTATUS_TIMER_IRQ) {
  1046. nsp32_dbg(NSP32_DEBUG_INTR, "timer stop");
  1047. nsp32_write2(base, TIMER_SET, TIMER_STOP);
  1048. goto out;
  1049. }
  1050. /* SCSI reset */
  1051. if (irq_stat & IRQSTATUS_SCSIRESET_IRQ) {
  1052. nsp32_msg(KERN_INFO, "detected someone do bus reset");
  1053. nsp32_do_bus_reset(data);
  1054. if (SCpnt != NULL) {
  1055. SCpnt->result = DID_RESET << 16;
  1056. nsp32_scsi_done(SCpnt);
  1057. }
  1058. goto out;
  1059. }
  1060. if (SCpnt == NULL) {
  1061. nsp32_msg(KERN_WARNING, "SCpnt==NULL this can't be happened");
  1062. nsp32_msg(KERN_WARNING, "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat);
  1063. goto out;
  1064. }
  1065. /*
  1066. * AutoSCSI Interrupt.
  1067. * Note: This interrupt is occurred when AutoSCSI is finished. Then
  1068. * check SCSIEXECUTEPHASE, and do appropriate action. Each phases are
  1069. * recorded when AutoSCSI sequencer has been processed.
  1070. */
  1071. if(irq_stat & IRQSTATUS_AUTOSCSI_IRQ) {
  1072. /* getting SCSI executed phase */
  1073. auto_stat = nsp32_read2(base, SCSI_EXECUTE_PHASE);
  1074. nsp32_write2(base, SCSI_EXECUTE_PHASE, 0);
  1075. /* Selection Timeout, go busfree phase. */
  1076. if (auto_stat & SELECTION_TIMEOUT) {
  1077. nsp32_dbg(NSP32_DEBUG_INTR,
  1078. "selection timeout occurred");
  1079. SCpnt->result = DID_TIME_OUT << 16;
  1080. nsp32_scsi_done(SCpnt);
  1081. goto out;
  1082. }
  1083. if (auto_stat & MSGOUT_PHASE) {
  1084. /*
  1085. * MsgOut phase was processed.
  1086. * If MSG_IN_OCCUER is not set, then MsgOut phase is
  1087. * completed. Thus, msgout_len must reset. Otherwise,
  1088. * nothing to do here. If MSG_OUT_OCCUER is occurred,
  1089. * then we will encounter the condition and check.
  1090. */
  1091. if (!(auto_stat & MSG_IN_OCCUER) &&
  1092. (data->msgout_len <= 3)) {
  1093. /*
  1094. * !MSG_IN_OCCUER && msgout_len <=3
  1095. * ---> AutoSCSI with MSGOUTreg is processed.
  1096. */
  1097. data->msgout_len = 0;
  1098. };
  1099. nsp32_dbg(NSP32_DEBUG_INTR, "MsgOut phase processed");
  1100. }
  1101. if ((auto_stat & DATA_IN_PHASE) &&
  1102. (scsi_get_resid(SCpnt) > 0) &&
  1103. ((nsp32_read2(base, FIFO_REST_CNT) & FIFO_REST_MASK) != 0)) {
  1104. printk( "auto+fifo\n");
  1105. //nsp32_pio_read(SCpnt);
  1106. }
  1107. if (auto_stat & (DATA_IN_PHASE | DATA_OUT_PHASE)) {
  1108. /* DATA_IN_PHASE/DATA_OUT_PHASE was processed. */
  1109. nsp32_dbg(NSP32_DEBUG_INTR,
  1110. "Data in/out phase processed");
  1111. /* read BMCNT, SGT pointer addr */
  1112. nsp32_dbg(NSP32_DEBUG_INTR, "BMCNT=0x%lx",
  1113. nsp32_read4(base, BM_CNT));
  1114. nsp32_dbg(NSP32_DEBUG_INTR, "addr=0x%lx",
  1115. nsp32_read4(base, SGT_ADR));
  1116. nsp32_dbg(NSP32_DEBUG_INTR, "SACK=0x%lx",
  1117. nsp32_read4(base, SACK_CNT));
  1118. nsp32_dbg(NSP32_DEBUG_INTR, "SSACK=0x%lx",
  1119. nsp32_read4(base, SAVED_SACK_CNT));
  1120. scsi_set_resid(SCpnt, 0); /* all data transfered! */
  1121. }
  1122. /*
  1123. * MsgIn Occur
  1124. */
  1125. if (auto_stat & MSG_IN_OCCUER) {
  1126. nsp32_msgin_occur(SCpnt, irq_stat, auto_stat);
  1127. }
  1128. /*
  1129. * MsgOut Occur
  1130. */
  1131. if (auto_stat & MSG_OUT_OCCUER) {
  1132. nsp32_msgout_occur(SCpnt);
  1133. }
  1134. /*
  1135. * Bus Free Occur
  1136. */
  1137. if (auto_stat & BUS_FREE_OCCUER) {
  1138. ret = nsp32_busfree_occur(SCpnt, auto_stat);
  1139. if (ret == TRUE) {
  1140. goto out;
  1141. }
  1142. }
  1143. if (auto_stat & STATUS_PHASE) {
  1144. /*
  1145. * Read CSB and substitute CSB for SCpnt->result
  1146. * to save status phase stutas byte.
  1147. * scsi error handler checks host_byte (DID_*:
  1148. * low level driver to indicate status), then checks
  1149. * status_byte (SCSI status byte).
  1150. */
  1151. SCpnt->result = (int)nsp32_read1(base, SCSI_CSB_IN);
  1152. }
  1153. if (auto_stat & ILLEGAL_PHASE) {
  1154. /* Illegal phase is detected. SACK is not back. */
  1155. nsp32_msg(KERN_WARNING,
  1156. "AUTO SCSI ILLEGAL PHASE OCCUR!!!!");
  1157. /* TODO: currently we don't have any action... bus reset? */
  1158. /*
  1159. * To send back SACK, assert, wait, and negate.
  1160. */
  1161. nsp32_sack_assert(data);
  1162. nsp32_wait_req(data, NEGATE);
  1163. nsp32_sack_negate(data);
  1164. }
  1165. if (auto_stat & COMMAND_PHASE) {
  1166. /* nothing to do */
  1167. nsp32_dbg(NSP32_DEBUG_INTR, "Command phase processed");
  1168. }
  1169. if (auto_stat & AUTOSCSI_BUSY) {
  1170. /* AutoSCSI is running */
  1171. }
  1172. show_autophase(auto_stat);
  1173. }
  1174. /* FIFO_SHLD_IRQ */
  1175. if (irq_stat & IRQSTATUS_FIFO_SHLD_IRQ) {
  1176. nsp32_dbg(NSP32_DEBUG_INTR, "FIFO IRQ");
  1177. switch(busphase) {
  1178. case BUSPHASE_DATA_OUT:
  1179. nsp32_dbg(NSP32_DEBUG_INTR, "fifo/write");
  1180. //nsp32_pio_write(SCpnt);
  1181. break;
  1182. case BUSPHASE_DATA_IN:
  1183. nsp32_dbg(NSP32_DEBUG_INTR, "fifo/read");
  1184. //nsp32_pio_read(SCpnt);
  1185. break;
  1186. case BUSPHASE_STATUS:
  1187. nsp32_dbg(NSP32_DEBUG_INTR, "fifo/status");
  1188. SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN);
  1189. break;
  1190. default:
  1191. nsp32_dbg(NSP32_DEBUG_INTR, "fifo/other phase");
  1192. nsp32_dbg(NSP32_DEBUG_INTR, "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat);
  1193. show_busphase(busphase);
  1194. break;
  1195. }
  1196. goto out;
  1197. }
  1198. /* Phase Change IRQ */
  1199. if (irq_stat & IRQSTATUS_PHASE_CHANGE_IRQ) {
  1200. nsp32_dbg(NSP32_DEBUG_INTR, "phase change IRQ");
  1201. switch(busphase) {
  1202. case BUSPHASE_MESSAGE_IN:
  1203. nsp32_dbg(NSP32_DEBUG_INTR, "phase chg/msg in");
  1204. nsp32_msgin_occur(SCpnt, irq_stat, 0);
  1205. break;
  1206. default:
  1207. nsp32_msg(KERN_WARNING, "phase chg/other phase?");
  1208. nsp32_msg(KERN_WARNING, "irq_stat=0x%x trans_stat=0x%x\n",
  1209. irq_stat, trans_stat);
  1210. show_busphase(busphase);
  1211. break;
  1212. }
  1213. goto out;
  1214. }
  1215. /* PCI_IRQ */
  1216. if (irq_stat & IRQSTATUS_PCI_IRQ) {
  1217. nsp32_dbg(NSP32_DEBUG_INTR, "PCI IRQ occurred");
  1218. /* Do nothing */
  1219. }
  1220. /* BMCNTERR_IRQ */
  1221. if (irq_stat & IRQSTATUS_BMCNTERR_IRQ) {
  1222. nsp32_msg(KERN_ERR, "Received unexpected BMCNTERR IRQ! ");
  1223. /*
  1224. * TODO: To be implemented improving bus master
  1225. * transfer reliablity when BMCNTERR is occurred in
  1226. * AutoSCSI phase described in specification.
  1227. */
  1228. }
  1229. #if 0
  1230. nsp32_dbg(NSP32_DEBUG_INTR,
  1231. "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat);
  1232. show_busphase(busphase);
  1233. #endif
  1234. out:
  1235. /* disable IRQ mask */
  1236. nsp32_write2(base, IRQ_CONTROL, 0);
  1237. out2:
  1238. spin_unlock_irqrestore(host->host_lock, flags);
  1239. nsp32_dbg(NSP32_DEBUG_INTR, "exit");
  1240. return IRQ_RETVAL(handled);
  1241. }
  1242. #undef SPRINTF
  1243. #define SPRINTF(args...) \
  1244. do { \
  1245. if(length > (pos - buffer)) { \
  1246. pos += snprintf(pos, length - (pos - buffer) + 1, ## args); \
  1247. nsp32_dbg(NSP32_DEBUG_PROC, "buffer=0x%p pos=0x%p length=%d %d\n", buffer, pos, length, length - (pos - buffer));\
  1248. } \
  1249. } while(0)
  1250. static int nsp32_proc_info(struct Scsi_Host *host, char *buffer, char **start,
  1251. off_t offset, int length, int inout)
  1252. {
  1253. char *pos = buffer;
  1254. int thislength;
  1255. unsigned long flags;
  1256. nsp32_hw_data *data;
  1257. int hostno;
  1258. unsigned int base;
  1259. unsigned char mode_reg;
  1260. int id, speed;
  1261. long model;
  1262. /* Write is not supported, just return. */
  1263. if (inout == TRUE) {
  1264. return -EINVAL;
  1265. }
  1266. hostno = host->host_no;
  1267. data = (nsp32_hw_data *)host->hostdata;
  1268. base = host->io_port;
  1269. SPRINTF("NinjaSCSI-32 status\n\n");
  1270. SPRINTF("Driver version: %s, $Revision: 1.33 $\n", nsp32_release_version);
  1271. SPRINTF("SCSI host No.: %d\n", hostno);
  1272. SPRINTF("IRQ: %d\n", host->irq);
  1273. SPRINTF("IO: 0x%lx-0x%lx\n", host->io_port, host->io_port + host->n_io_port - 1);
  1274. SPRINTF("MMIO(virtual address): 0x%lx-0x%lx\n", host->base, host->base + data->MmioLength - 1);
  1275. SPRINTF("sg_tablesize: %d\n", host->sg_tablesize);
  1276. SPRINTF("Chip revision: 0x%x\n", (nsp32_read2(base, INDEX_REG) >> 8) & 0xff);
  1277. mode_reg = nsp32_index_read1(base, CHIP_MODE);
  1278. model = data->pci_devid->driver_data;
  1279. #ifdef CONFIG_PM
  1280. SPRINTF("Power Management: %s\n", (mode_reg & OPTF) ? "yes" : "no");
  1281. #endif
  1282. SPRINTF("OEM: %ld, %s\n", (mode_reg & (OEM0|OEM1)), nsp32_model[model]);
  1283. spin_lock_irqsave(&(data->Lock), flags);
  1284. SPRINTF("CurrentSC: 0x%p\n\n", data->CurrentSC);
  1285. spin_unlock_irqrestore(&(data->Lock), flags);
  1286. SPRINTF("SDTR status\n");
  1287. for (id = 0; id < ARRAY_SIZE(data->target); id++) {
  1288. SPRINTF("id %d: ", id);
  1289. if (id == host->this_id) {
  1290. SPRINTF("----- NinjaSCSI-32 host adapter\n");
  1291. continue;
  1292. }
  1293. if (data->target[id].sync_flag == SDTR_DONE) {
  1294. if (data->target[id].period == 0 &&
  1295. data->target[id].offset == ASYNC_OFFSET ) {
  1296. SPRINTF("async");
  1297. } else {
  1298. SPRINTF(" sync");
  1299. }
  1300. } else {
  1301. SPRINTF(" none");
  1302. }
  1303. if (data->target[id].period != 0) {
  1304. speed = 1000000 / (data->target[id].period * 4);
  1305. SPRINTF(" transfer %d.%dMB/s, offset %d",
  1306. speed / 1000,
  1307. speed % 1000,
  1308. data->target[id].offset
  1309. );
  1310. }
  1311. SPRINTF("\n");
  1312. }
  1313. thislength = pos - (buffer + offset);
  1314. if(thislength < 0) {
  1315. *start = NULL;
  1316. return 0;
  1317. }
  1318. thislength = min(thislength, length);
  1319. *start = buffer + offset;
  1320. return thislength;
  1321. }
  1322. #undef SPRINTF
  1323. /*
  1324. * Reset parameters and call scsi_done for data->cur_lunt.
  1325. * Be careful setting SCpnt->result = DID_* before calling this function.
  1326. */
  1327. static void nsp32_scsi_done(struct scsi_cmnd *SCpnt)
  1328. {
  1329. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1330. unsigned int base = SCpnt->device->host->io_port;
  1331. scsi_dma_unmap(SCpnt);
  1332. /*
  1333. * clear TRANSFERCONTROL_BM_START
  1334. */
  1335. nsp32_write2(base, TRANSFER_CONTROL, 0);
  1336. nsp32_write4(base, BM_CNT, 0);
  1337. /*
  1338. * call scsi_done
  1339. */
  1340. (*SCpnt->scsi_done)(SCpnt);
  1341. /*
  1342. * reset parameters
  1343. */
  1344. data->cur_lunt->SCpnt = NULL;
  1345. data->cur_lunt = NULL;
  1346. data->cur_target = NULL;
  1347. data->CurrentSC = NULL;
  1348. }
  1349. /*
  1350. * Bus Free Occur
  1351. *
  1352. * Current Phase is BUSFREE. AutoSCSI is automatically execute BUSFREE phase
  1353. * with ACK reply when below condition is matched:
  1354. * MsgIn 00: Command Complete.
  1355. * MsgIn 02: Save Data Pointer.
  1356. * MsgIn 04: Diconnect.
  1357. * In other case, unexpected BUSFREE is detected.
  1358. */
  1359. static int nsp32_busfree_occur(struct scsi_cmnd *SCpnt, unsigned short execph)
  1360. {
  1361. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1362. unsigned int base = SCpnt->device->host->io_port;
  1363. nsp32_dbg(NSP32_DEBUG_BUSFREE, "enter execph=0x%x", execph);
  1364. show_autophase(execph);
  1365. nsp32_write4(base, BM_CNT, 0);
  1366. nsp32_write2(base, TRANSFER_CONTROL, 0);
  1367. /*
  1368. * MsgIn 02: Save Data Pointer
  1369. *
  1370. * VALID:
  1371. * Save Data Pointer is received. Adjust pointer.
  1372. *
  1373. * NO-VALID:
  1374. * SCSI-3 says if Save Data Pointer is not received, then we restart
  1375. * processing and we can't adjust any SCSI data pointer in next data
  1376. * phase.
  1377. */
  1378. if (execph & MSGIN_02_VALID) {
  1379. nsp32_dbg(NSP32_DEBUG_BUSFREE, "MsgIn02_Valid");
  1380. /*
  1381. * Check sack_cnt/saved_sack_cnt, then adjust sg table if
  1382. * needed.
  1383. */
  1384. if (!(execph & MSGIN_00_VALID) &&
  1385. ((execph & DATA_IN_PHASE) || (execph & DATA_OUT_PHASE))) {
  1386. unsigned int sacklen, s_sacklen;
  1387. /*
  1388. * Read SACK count and SAVEDSACK count, then compare.
  1389. */
  1390. sacklen = nsp32_read4(base, SACK_CNT );
  1391. s_sacklen = nsp32_read4(base, SAVED_SACK_CNT);
  1392. /*
  1393. * If SAVEDSACKCNT == 0, it means SavedDataPointer is
  1394. * come after data transfering.
  1395. */
  1396. if (s_sacklen > 0) {
  1397. /*
  1398. * Comparing between sack and savedsack to
  1399. * check the condition of AutoMsgIn03.
  1400. *
  1401. * If they are same, set msgin03 == TRUE,
  1402. * COMMANDCONTROL_AUTO_MSGIN_03 is enabled at
  1403. * reselection. On the other hand, if they
  1404. * aren't same, set msgin03 == FALSE, and
  1405. * COMMANDCONTROL_AUTO_MSGIN_03 is disabled at
  1406. * reselection.
  1407. */
  1408. if (sacklen != s_sacklen) {
  1409. data->cur_lunt->msgin03 = FALSE;
  1410. } else {
  1411. data->cur_lunt->msgin03 = TRUE;
  1412. }
  1413. nsp32_adjust_busfree(SCpnt, s_sacklen);
  1414. }
  1415. }
  1416. /* This value has not substitude with valid value yet... */
  1417. //data->cur_lunt->save_datp = data->cur_datp;
  1418. } else {
  1419. /*
  1420. * no processing.
  1421. */
  1422. }
  1423. if (execph & MSGIN_03_VALID) {
  1424. /* MsgIn03 was valid to be processed. No need processing. */
  1425. }
  1426. /*
  1427. * target SDTR check
  1428. */
  1429. if (data->cur_target->sync_flag & SDTR_INITIATOR) {
  1430. /*
  1431. * SDTR negotiation pulled by the initiator has not
  1432. * finished yet. Fall back to ASYNC mode.
  1433. */
  1434. nsp32_set_async(data, data->cur_target);
  1435. data->cur_target->sync_flag &= ~SDTR_INITIATOR;
  1436. data->cur_target->sync_flag |= SDTR_DONE;
  1437. } else if (data->cur_target->sync_flag & SDTR_TARGET) {
  1438. /*
  1439. * SDTR negotiation pulled by the target has been
  1440. * negotiating.
  1441. */
  1442. if (execph & (MSGIN_00_VALID | MSGIN_04_VALID)) {
  1443. /*
  1444. * If valid message is received, then
  1445. * negotiation is succeeded.
  1446. */
  1447. } else {
  1448. /*
  1449. * On the contrary, if unexpected bus free is
  1450. * occurred, then negotiation is failed. Fall
  1451. * back to ASYNC mode.
  1452. */
  1453. nsp32_set_async(data, data->cur_target);
  1454. }
  1455. data->cur_target->sync_flag &= ~SDTR_TARGET;
  1456. data->cur_target->sync_flag |= SDTR_DONE;
  1457. }
  1458. /*
  1459. * It is always ensured by SCSI standard that initiator
  1460. * switches into Bus Free Phase after
  1461. * receiving message 00 (Command Complete), 04 (Disconnect).
  1462. * It's the reason that processing here is valid.
  1463. */
  1464. if (execph & MSGIN_00_VALID) {
  1465. /* MsgIn 00: Command Complete */
  1466. nsp32_dbg(NSP32_DEBUG_BUSFREE, "command complete");
  1467. SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN);
  1468. SCpnt->SCp.Message = 0;
  1469. nsp32_dbg(NSP32_DEBUG_BUSFREE,
  1470. "normal end stat=0x%x resid=0x%x\n",
  1471. SCpnt->SCp.Status, scsi_get_resid(SCpnt));
  1472. SCpnt->result = (DID_OK << 16) |
  1473. (SCpnt->SCp.Message << 8) |
  1474. (SCpnt->SCp.Status << 0);
  1475. nsp32_scsi_done(SCpnt);
  1476. /* All operation is done */
  1477. return TRUE;
  1478. } else if (execph & MSGIN_04_VALID) {
  1479. /* MsgIn 04: Disconnect */
  1480. SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN);
  1481. SCpnt->SCp.Message = 4;
  1482. nsp32_dbg(NSP32_DEBUG_BUSFREE, "disconnect");
  1483. return TRUE;
  1484. } else {
  1485. /* Unexpected bus free */
  1486. nsp32_msg(KERN_WARNING, "unexpected bus free occurred");
  1487. /* DID_ERROR? */
  1488. //SCpnt->result = (DID_OK << 16) | (SCpnt->SCp.Message << 8) | (SCpnt->SCp.Status << 0);
  1489. SCpnt->result = DID_ERROR << 16;
  1490. nsp32_scsi_done(SCpnt);
  1491. return TRUE;
  1492. }
  1493. return FALSE;
  1494. }
  1495. /*
  1496. * nsp32_adjust_busfree - adjusting SG table
  1497. *
  1498. * Note: This driver adjust the SG table using SCSI ACK
  1499. * counter instead of BMCNT counter!
  1500. */
  1501. static void nsp32_adjust_busfree(struct scsi_cmnd *SCpnt, unsigned int s_sacklen)
  1502. {
  1503. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1504. int old_entry = data->cur_entry;
  1505. int new_entry;
  1506. int sg_num = data->cur_lunt->sg_num;
  1507. nsp32_sgtable *sgt = data->cur_lunt->sglun->sgt;
  1508. unsigned int restlen, sentlen;
  1509. u32_le len, addr;
  1510. nsp32_dbg(NSP32_DEBUG_SGLIST, "old resid=0x%x", scsi_get_resid(SCpnt));
  1511. /* adjust saved SACK count with 4 byte start address boundary */
  1512. s_sacklen -= le32_to_cpu(sgt[old_entry].addr) & 3;
  1513. /*
  1514. * calculate new_entry from sack count and each sgt[].len
  1515. * calculate the byte which is intent to send
  1516. */
  1517. sentlen = 0;
  1518. for (new_entry = old_entry; new_entry < sg_num; new_entry++) {
  1519. sentlen += (le32_to_cpu(sgt[new_entry].len) & ~SGTEND);
  1520. if (sentlen > s_sacklen) {
  1521. break;
  1522. }
  1523. }
  1524. /* all sgt is processed */
  1525. if (new_entry == sg_num) {
  1526. goto last;
  1527. }
  1528. if (sentlen == s_sacklen) {
  1529. /* XXX: confirm it's ok or not */
  1530. /* In this case, it's ok because we are at
  1531. the head element of the sg. restlen is correctly calculated. */
  1532. }
  1533. /* calculate the rest length for transfering */
  1534. restlen = sentlen - s_sacklen;
  1535. /* update adjusting current SG table entry */
  1536. len = le32_to_cpu(sgt[new_entry].len);
  1537. addr = le32_to_cpu(sgt[new_entry].addr);
  1538. addr += (len - restlen);
  1539. sgt[new_entry].addr = cpu_to_le32(addr);
  1540. sgt[new_entry].len = cpu_to_le32(restlen);
  1541. /* set cur_entry with new_entry */
  1542. data->cur_entry = new_entry;
  1543. return;
  1544. last:
  1545. if (scsi_get_resid(SCpnt) < sentlen) {
  1546. nsp32_msg(KERN_ERR, "resid underflow");
  1547. }
  1548. scsi_set_resid(SCpnt, scsi_get_resid(SCpnt) - sentlen);
  1549. nsp32_dbg(NSP32_DEBUG_SGLIST, "new resid=0x%x", scsi_get_resid(SCpnt));
  1550. /* update hostdata and lun */
  1551. return;
  1552. }
  1553. /*
  1554. * It's called MsgOut phase occur.
  1555. * NinjaSCSI-32Bi/UDE automatically processes up to 3 messages in
  1556. * message out phase. It, however, has more than 3 messages,
  1557. * HBA creates the interrupt and we have to process by hand.
  1558. */
  1559. static void nsp32_msgout_occur(struct scsi_cmnd *SCpnt)
  1560. {
  1561. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1562. unsigned int base = SCpnt->device->host->io_port;
  1563. //unsigned short command;
  1564. long new_sgtp;
  1565. int i;
  1566. nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR,
  1567. "enter: msgout_len: 0x%x", data->msgout_len);
  1568. /*
  1569. * If MsgOut phase is occurred without having any
  1570. * message, then No_Operation is sent (SCSI-2).
  1571. */
  1572. if (data->msgout_len == 0) {
  1573. nsp32_build_nop(SCpnt);
  1574. }
  1575. /*
  1576. * Set SGTP ADDR current entry for restarting AUTOSCSI,
  1577. * because SGTP is incremented next point.
  1578. * There is few statement in the specification...
  1579. */
  1580. new_sgtp = data->cur_lunt->sglun_paddr +
  1581. (data->cur_lunt->cur_entry * sizeof(nsp32_sgtable));
  1582. /*
  1583. * send messages
  1584. */
  1585. for (i = 0; i < data->msgout_len; i++) {
  1586. nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR,
  1587. "%d : 0x%x", i, data->msgoutbuf[i]);
  1588. /*
  1589. * Check REQ is asserted.
  1590. */
  1591. nsp32_wait_req(data, ASSERT);
  1592. if (i == (data->msgout_len - 1)) {
  1593. /*
  1594. * If the last message, set the AutoSCSI restart
  1595. * before send back the ack message. AutoSCSI
  1596. * restart automatically negate ATN signal.
  1597. */
  1598. //command = (AUTO_MSGIN_00_OR_04 | AUTO_MSGIN_02);
  1599. //nsp32_restart_autoscsi(SCpnt, command);
  1600. nsp32_write2(base, COMMAND_CONTROL,
  1601. (CLEAR_CDB_FIFO_POINTER |
  1602. AUTO_COMMAND_PHASE |
  1603. AUTOSCSI_RESTART |
  1604. AUTO_MSGIN_00_OR_04 |
  1605. AUTO_MSGIN_02 ));
  1606. }
  1607. /*
  1608. * Write data with SACK, then wait sack is
  1609. * automatically negated.
  1610. */
  1611. nsp32_write1(base, SCSI_DATA_WITH_ACK, data->msgoutbuf[i]);
  1612. nsp32_wait_sack(data, NEGATE);
  1613. nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR, "bus: 0x%x\n",
  1614. nsp32_read1(base, SCSI_BUS_MONITOR));
  1615. };
  1616. data->msgout_len = 0;
  1617. nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR, "exit");
  1618. }
  1619. /*
  1620. * Restart AutoSCSI
  1621. *
  1622. * Note: Restarting AutoSCSI needs set:
  1623. * SYNC_REG, ACK_WIDTH, SGT_ADR, TRANSFER_CONTROL
  1624. */
  1625. static void nsp32_restart_autoscsi(struct scsi_cmnd *SCpnt, unsigned short command)
  1626. {
  1627. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1628. unsigned int base = data->BaseAddress;
  1629. unsigned short transfer = 0;
  1630. nsp32_dbg(NSP32_DEBUG_RESTART, "enter");
  1631. if (data->cur_target == NULL || data->cur_lunt == NULL) {
  1632. nsp32_msg(KERN_ERR, "Target or Lun is invalid");
  1633. }
  1634. /*
  1635. * set SYNC_REG
  1636. * Don't set BM_START_ADR before setting this register.
  1637. */
  1638. nsp32_write1(base, SYNC_REG, data->cur_target->syncreg);
  1639. /*
  1640. * set ACKWIDTH
  1641. */
  1642. nsp32_write1(base, ACK_WIDTH, data->cur_target->ackwidth);
  1643. /*
  1644. * set SREQ hazard killer sampling rate
  1645. */
  1646. nsp32_write1(base, SREQ_SMPL_RATE, data->cur_target->sample_reg);
  1647. /*
  1648. * set SGT ADDR (physical address)
  1649. */
  1650. nsp32_write4(base, SGT_ADR, data->cur_lunt->sglun_paddr);
  1651. /*
  1652. * set TRANSFER CONTROL REG
  1653. */
  1654. transfer = 0;
  1655. transfer |= (TRANSFER_GO | ALL_COUNTER_CLR);
  1656. if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
  1657. if (scsi_bufflen(SCpnt) > 0) {
  1658. transfer |= BM_START;
  1659. }
  1660. } else if (data->trans_method & NSP32_TRANSFER_MMIO) {
  1661. transfer |= CB_MMIO_MODE;
  1662. } else if (data->trans_method & NSP32_TRANSFER_PIO) {
  1663. transfer |= CB_IO_MODE;
  1664. }
  1665. nsp32_write2(base, TRANSFER_CONTROL, transfer);
  1666. /*
  1667. * restart AutoSCSI
  1668. *
  1669. * TODO: COMMANDCONTROL_AUTO_COMMAND_PHASE is needed ?
  1670. */
  1671. command |= (CLEAR_CDB_FIFO_POINTER |
  1672. AUTO_COMMAND_PHASE |
  1673. AUTOSCSI_RESTART );
  1674. nsp32_write2(base, COMMAND_CONTROL, command);
  1675. nsp32_dbg(NSP32_DEBUG_RESTART, "exit");
  1676. }
  1677. /*
  1678. * cannot run automatically message in occur
  1679. */
  1680. static void nsp32_msgin_occur(struct scsi_cmnd *SCpnt,
  1681. unsigned long irq_status,
  1682. unsigned short execph)
  1683. {
  1684. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1685. unsigned int base = SCpnt->device->host->io_port;
  1686. unsigned char msg;
  1687. unsigned char msgtype;
  1688. unsigned char newlun;
  1689. unsigned short command = 0;
  1690. int msgclear = TRUE;
  1691. long new_sgtp;
  1692. int ret;
  1693. /*
  1694. * read first message
  1695. * Use SCSIDATA_W_ACK instead of SCSIDATAIN, because the procedure
  1696. * of Message-In have to be processed before sending back SCSI ACK.
  1697. */
  1698. msg = nsp32_read1(base, SCSI_DATA_IN);
  1699. data->msginbuf[(unsigned char)data->msgin_len] = msg;
  1700. msgtype = data->msginbuf[0];
  1701. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR,
  1702. "enter: msglen: 0x%x msgin: 0x%x msgtype: 0x%x",
  1703. data->msgin_len, msg, msgtype);
  1704. /*
  1705. * TODO: We need checking whether bus phase is message in?
  1706. */
  1707. /*
  1708. * assert SCSI ACK
  1709. */
  1710. nsp32_sack_assert(data);
  1711. /*
  1712. * processing IDENTIFY
  1713. */
  1714. if (msgtype & 0x80) {
  1715. if (!(irq_status & IRQSTATUS_RESELECT_OCCUER)) {
  1716. /* Invalid (non reselect) phase */
  1717. goto reject;
  1718. }
  1719. newlun = msgtype & 0x1f; /* TODO: SPI-3 compliant? */
  1720. ret = nsp32_reselection(SCpnt, newlun);
  1721. if (ret == TRUE) {
  1722. goto restart;
  1723. } else {
  1724. goto reject;
  1725. }
  1726. }
  1727. /*
  1728. * processing messages except for IDENTIFY
  1729. *
  1730. * TODO: Messages are all SCSI-2 terminology. SCSI-3 compliance is TODO.
  1731. */
  1732. switch (msgtype) {
  1733. /*
  1734. * 1-byte message
  1735. */
  1736. case COMMAND_COMPLETE:
  1737. case DISCONNECT:
  1738. /*
  1739. * These messages should not be occurred.
  1740. * They should be processed on AutoSCSI sequencer.
  1741. */
  1742. nsp32_msg(KERN_WARNING,
  1743. "unexpected message of AutoSCSI MsgIn: 0x%x", msg);
  1744. break;
  1745. case RESTORE_POINTERS:
  1746. /*
  1747. * AutoMsgIn03 is disabled, and HBA gets this message.
  1748. */
  1749. if ((execph & DATA_IN_PHASE) || (execph & DATA_OUT_PHASE)) {
  1750. unsigned int s_sacklen;
  1751. s_sacklen = nsp32_read4(base, SAVED_SACK_CNT);
  1752. if ((execph & MSGIN_02_VALID) && (s_sacklen > 0)) {
  1753. nsp32_adjust_busfree(SCpnt, s_sacklen);
  1754. } else {
  1755. /* No need to rewrite SGT */
  1756. }
  1757. }
  1758. data->cur_lunt->msgin03 = FALSE;
  1759. /* Update with the new value */
  1760. /* reset SACK/SavedACK counter (or ALL clear?) */
  1761. nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
  1762. /*
  1763. * set new sg pointer
  1764. */
  1765. new_sgtp = data->cur_lunt->sglun_paddr +
  1766. (data->cur_lunt->cur_entry * sizeof(nsp32_sgtable));
  1767. nsp32_write4(base, SGT_ADR, new_sgtp);
  1768. break;
  1769. case SAVE_POINTERS:
  1770. /*
  1771. * These messages should not be occurred.
  1772. * They should be processed on AutoSCSI sequencer.
  1773. */
  1774. nsp32_msg (KERN_WARNING,
  1775. "unexpected message of AutoSCSI MsgIn: SAVE_POINTERS");
  1776. break;
  1777. case MESSAGE_REJECT:
  1778. /* If previous message_out is sending SDTR, and get
  1779. message_reject from target, SDTR negotiation is failed */
  1780. if (data->cur_target->sync_flag &
  1781. (SDTR_INITIATOR | SDTR_TARGET)) {
  1782. /*
  1783. * Current target is negotiating SDTR, but it's
  1784. * failed. Fall back to async transfer mode, and set
  1785. * SDTR_DONE.
  1786. */
  1787. nsp32_set_async(data, data->cur_target);
  1788. data->cur_target->sync_flag &= ~SDTR_INITIATOR;
  1789. data->cur_target->sync_flag |= SDTR_DONE;
  1790. }
  1791. break;
  1792. case LINKED_CMD_COMPLETE:
  1793. case LINKED_FLG_CMD_COMPLETE:
  1794. /* queue tag is not supported currently */
  1795. nsp32_msg (KERN_WARNING,
  1796. "unsupported message: 0x%x", msgtype);
  1797. break;
  1798. case INITIATE_RECOVERY:
  1799. /* staring ECA (Extended Contingent Allegiance) state. */
  1800. /* This message is declined in SPI2 or later. */
  1801. goto reject;
  1802. /*
  1803. * 2-byte message
  1804. */
  1805. case SIMPLE_QUEUE_TAG:
  1806. case 0x23:
  1807. /*
  1808. * 0x23: Ignore_Wide_Residue is not declared in scsi.h.
  1809. * No support is needed.
  1810. */
  1811. if (data->msgin_len >= 1) {
  1812. goto reject;
  1813. }
  1814. /* current position is 1-byte of 2 byte */
  1815. msgclear = FALSE;
  1816. break;
  1817. /*
  1818. * extended message
  1819. */
  1820. case EXTENDED_MESSAGE:
  1821. if (data->msgin_len < 1) {
  1822. /*
  1823. * Current position does not reach 2-byte
  1824. * (2-byte is extended message length).
  1825. */
  1826. msgclear = FALSE;
  1827. break;
  1828. }
  1829. if ((data->msginbuf[1] + 1) > data->msgin_len) {
  1830. /*
  1831. * Current extended message has msginbuf[1] + 2
  1832. * (msgin_len starts counting from 0, so buf[1] + 1).
  1833. * If current message position is not finished,
  1834. * continue receiving message.
  1835. */
  1836. msgclear = FALSE;
  1837. break;
  1838. }
  1839. /*
  1840. * Reach here means regular length of each type of
  1841. * extended messages.
  1842. */
  1843. switch (data->msginbuf[2]) {
  1844. case EXTENDED_MODIFY_DATA_POINTER:
  1845. /* TODO */
  1846. goto reject; /* not implemented yet */
  1847. break;
  1848. case EXTENDED_SDTR:
  1849. /*
  1850. * Exchange this message between initiator and target.
  1851. */
  1852. if (data->msgin_len != EXTENDED_SDTR_LEN + 1) {
  1853. /*
  1854. * received inappropriate message.
  1855. */
  1856. goto reject;
  1857. break;
  1858. }
  1859. nsp32_analyze_sdtr(SCpnt);
  1860. break;
  1861. case EXTENDED_EXTENDED_IDENTIFY:
  1862. /* SCSI-I only, not supported. */
  1863. goto reject; /* not implemented yet */
  1864. break;
  1865. case EXTENDED_WDTR:
  1866. goto reject; /* not implemented yet */
  1867. break;
  1868. default:
  1869. goto reject;
  1870. }
  1871. break;
  1872. default:
  1873. goto reject;
  1874. }
  1875. restart:
  1876. if (msgclear == TRUE) {
  1877. data->msgin_len = 0;
  1878. /*
  1879. * If restarting AutoSCSI, but there are some message to out
  1880. * (msgout_len > 0), set AutoATN, and set SCSIMSGOUT as 0
  1881. * (MV_VALID = 0). When commandcontrol is written with
  1882. * AutoSCSI restart, at the same time MsgOutOccur should be
  1883. * happened (however, such situation is really possible...?).
  1884. */
  1885. if (data->msgout_len > 0) {
  1886. nsp32_write4(base, SCSI_MSG_OUT, 0);
  1887. command |= AUTO_ATN;
  1888. }
  1889. /*
  1890. * restart AutoSCSI
  1891. * If it's failed, COMMANDCONTROL_AUTO_COMMAND_PHASE is needed.
  1892. */
  1893. command |= (AUTO_MSGIN_00_OR_04 | AUTO_MSGIN_02);
  1894. /*
  1895. * If current msgin03 is TRUE, then flag on.
  1896. */
  1897. if (data->cur_lunt->msgin03 == TRUE) {
  1898. command |= AUTO_MSGIN_03;
  1899. }
  1900. data->cur_lunt->msgin03 = FALSE;
  1901. } else {
  1902. data->msgin_len++;
  1903. }
  1904. /*
  1905. * restart AutoSCSI
  1906. */
  1907. nsp32_restart_autoscsi(SCpnt, command);
  1908. /*
  1909. * wait SCSI REQ negate for REQ-ACK handshake
  1910. */
  1911. nsp32_wait_req(data, NEGATE);
  1912. /*
  1913. * negate SCSI ACK
  1914. */
  1915. nsp32_sack_negate(data);
  1916. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit");
  1917. return;
  1918. reject:
  1919. nsp32_msg(KERN_WARNING,
  1920. "invalid or unsupported MessageIn, rejected. "
  1921. "current msg: 0x%x (len: 0x%x), processing msg: 0x%x",
  1922. msg, data->msgin_len, msgtype);
  1923. nsp32_build_reject(SCpnt);
  1924. data->msgin_len = 0;
  1925. goto restart;
  1926. }
  1927. /*
  1928. *
  1929. */
  1930. static void nsp32_analyze_sdtr(struct scsi_cmnd *SCpnt)
  1931. {
  1932. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1933. nsp32_target *target = data->cur_target;
  1934. nsp32_sync_table *synct;
  1935. unsigned char get_period = data->msginbuf[3];
  1936. unsigned char get_offset = data->msginbuf[4];
  1937. int entry;
  1938. int syncnum;
  1939. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "enter");
  1940. synct = data->synct;
  1941. syncnum = data->syncnum;
  1942. /*
  1943. * If this inititor sent the SDTR message, then target responds SDTR,
  1944. * initiator SYNCREG, ACKWIDTH from SDTR parameter.
  1945. * Messages are not appropriate, then send back reject message.
  1946. * If initiator did not send the SDTR, but target sends SDTR,
  1947. * initiator calculator the appropriate parameter and send back SDTR.
  1948. */
  1949. if (target->sync_flag & SDTR_INITIATOR) {
  1950. /*
  1951. * Initiator sent SDTR, the target responds and
  1952. * send back negotiation SDTR.
  1953. */
  1954. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "target responds SDTR");
  1955. target->sync_flag &= ~SDTR_INITIATOR;
  1956. target->sync_flag |= SDTR_DONE;
  1957. /*
  1958. * offset:
  1959. */
  1960. if (get_offset > SYNC_OFFSET) {
  1961. /*
  1962. * Negotiation is failed, the target send back
  1963. * unexpected offset value.
  1964. */
  1965. goto reject;
  1966. }
  1967. if (get_offset == ASYNC_OFFSET) {
  1968. /*
  1969. * Negotiation is succeeded, the target want
  1970. * to fall back into asynchronous transfer mode.
  1971. */
  1972. goto async;
  1973. }
  1974. /*
  1975. * period:
  1976. * Check whether sync period is too short. If too short,
  1977. * fall back to async mode. If it's ok, then investigate
  1978. * the received sync period. If sync period is acceptable
  1979. * between sync table start_period and end_period, then
  1980. * set this I_T nexus as sent offset and period.
  1981. * If it's not acceptable, send back reject and fall back
  1982. * to async mode.
  1983. */
  1984. if (get_period < data->synct[0].period_num) {
  1985. /*
  1986. * Negotiation is failed, the target send back
  1987. * unexpected period value.
  1988. */
  1989. goto reject;
  1990. }
  1991. entry = nsp32_search_period_entry(data, target, get_period);
  1992. if (entry < 0) {
  1993. /*
  1994. * Target want to use long period which is not
  1995. * acceptable NinjaSCSI-32Bi/UDE.
  1996. */
  1997. goto reject;
  1998. }
  1999. /*
  2000. * Set new sync table and offset in this I_T nexus.
  2001. */
  2002. nsp32_set_sync_entry(data, target, entry, get_offset);
  2003. } else {
  2004. /* Target send SDTR to initiator. */
  2005. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "target send SDTR");
  2006. target->sync_flag |= SDTR_INITIATOR;
  2007. /* offset: */
  2008. if (get_offset > SYNC_OFFSET) {
  2009. /* send back as SYNC_OFFSET */
  2010. get_offset = SYNC_OFFSET;
  2011. }
  2012. /* period: */
  2013. if (get_period < data->synct[0].period_num) {
  2014. get_period = data->synct[0].period_num;
  2015. }
  2016. entry = nsp32_search_period_entry(data, target, get_period);
  2017. if (get_offset == ASYNC_OFFSET || entry < 0) {
  2018. nsp32_set_async(data, target);
  2019. nsp32_build_sdtr(SCpnt, 0, ASYNC_OFFSET);
  2020. } else {
  2021. nsp32_set_sync_entry(data, target, entry, get_offset);
  2022. nsp32_build_sdtr(SCpnt, get_period, get_offset);
  2023. }
  2024. }
  2025. target->period = get_period;
  2026. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit");
  2027. return;
  2028. reject:
  2029. /*
  2030. * If the current message is unacceptable, send back to the target
  2031. * with reject message.
  2032. */
  2033. nsp32_build_reject(SCpnt);
  2034. async:
  2035. nsp32_set_async(data, target); /* set as ASYNC transfer mode */
  2036. target->period = 0;
  2037. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit: set async");
  2038. return;
  2039. }
  2040. /*
  2041. * Search config entry number matched in sync_table from given
  2042. * target and speed period value. If failed to search, return negative value.
  2043. */
  2044. static int nsp32_search_period_entry(nsp32_hw_data *data,
  2045. nsp32_target *target,
  2046. unsigned char period)
  2047. {
  2048. int i;
  2049. if (target->limit_entry >= data->syncnum) {
  2050. nsp32_msg(KERN_ERR, "limit_entry exceeds syncnum!");
  2051. target->limit_entry = 0;
  2052. }
  2053. for (i = target->limit_entry; i < data->syncnum; i++) {
  2054. if (period >= data->synct[i].start_period &&
  2055. period <= data->synct[i].end_period) {
  2056. break;
  2057. }
  2058. }
  2059. /*
  2060. * Check given period value is over the sync_table value.
  2061. * If so, return max value.
  2062. */
  2063. if (i == data->syncnum) {
  2064. i = -1;
  2065. }
  2066. return i;
  2067. }
  2068. /*
  2069. * target <-> initiator use ASYNC transfer
  2070. */
  2071. static void nsp32_set_async(nsp32_hw_data *data, nsp32_target *target)
  2072. {
  2073. unsigned char period = data->synct[target->limit_entry].period_num;
  2074. target->offset = ASYNC_OFFSET;
  2075. target->period = 0;
  2076. target->syncreg = TO_SYNCREG(period, ASYNC_OFFSET);
  2077. target->ackwidth = 0;
  2078. target->sample_reg = 0;
  2079. nsp32_dbg(NSP32_DEBUG_SYNC, "set async");
  2080. }
  2081. /*
  2082. * target <-> initiator use maximum SYNC transfer
  2083. */
  2084. static void nsp32_set_max_sync(nsp32_hw_data *data,
  2085. nsp32_target *target,
  2086. unsigned char *period,
  2087. unsigned char *offset)
  2088. {
  2089. unsigned char period_num, ackwidth;
  2090. period_num = data->synct[target->limit_entry].period_num;
  2091. *period = data->synct[target->limit_entry].start_period;
  2092. ackwidth = data->synct[target->limit_entry].ackwidth;
  2093. *offset = SYNC_OFFSET;
  2094. target->syncreg = TO_SYNCREG(period_num, *offset);
  2095. target->ackwidth = ackwidth;
  2096. target->offset = *offset;
  2097. target->sample_reg = 0; /* disable SREQ sampling */
  2098. }
  2099. /*
  2100. * target <-> initiator use entry number speed
  2101. */
  2102. static void nsp32_set_sync_entry(nsp32_hw_data *data,
  2103. nsp32_target *target,
  2104. int entry,
  2105. unsigned char offset)
  2106. {
  2107. unsigned char period, ackwidth, sample_rate;
  2108. period = data->synct[entry].period_num;
  2109. ackwidth = data->synct[entry].ackwidth;
  2110. offset = offset;
  2111. sample_rate = data->synct[entry].sample_rate;
  2112. target->syncreg = TO_SYNCREG(period, offset);
  2113. target->ackwidth = ackwidth;
  2114. target->offset = offset;
  2115. target->sample_reg = sample_rate | SAMPLING_ENABLE;
  2116. nsp32_dbg(NSP32_DEBUG_SYNC, "set sync");
  2117. }
  2118. /*
  2119. * It waits until SCSI REQ becomes assertion or negation state.
  2120. *
  2121. * Note: If nsp32_msgin_occur is called, we asserts SCSI ACK. Then
  2122. * connected target responds SCSI REQ negation. We have to wait
  2123. * SCSI REQ becomes negation in order to negate SCSI ACK signal for
  2124. * REQ-ACK handshake.
  2125. */
  2126. static void nsp32_wait_req(nsp32_hw_data *data, int state)
  2127. {
  2128. unsigned int base = data->BaseAddress;
  2129. int wait_time = 0;
  2130. unsigned char bus, req_bit;
  2131. if (!((state == ASSERT) || (state == NEGATE))) {
  2132. nsp32_msg(KERN_ERR, "unknown state designation");
  2133. }
  2134. /* REQ is BIT(5) */
  2135. req_bit = (state == ASSERT ? BUSMON_REQ : 0);
  2136. do {
  2137. bus = nsp32_read1(base, SCSI_BUS_MONITOR);
  2138. if ((bus & BUSMON_REQ) == req_bit) {
  2139. nsp32_dbg(NSP32_DEBUG_WAIT,
  2140. "wait_time: %d", wait_time);
  2141. return;
  2142. }
  2143. udelay(1);
  2144. wait_time++;
  2145. } while (wait_time < REQSACK_TIMEOUT_TIME);
  2146. nsp32_msg(KERN_WARNING, "wait REQ timeout, req_bit: 0x%x", req_bit);
  2147. }
  2148. /*
  2149. * It waits until SCSI SACK becomes assertion or negation state.
  2150. */
  2151. static void nsp32_wait_sack(nsp32_hw_data *data, int state)
  2152. {
  2153. unsigned int base = data->BaseAddress;
  2154. int wait_time = 0;
  2155. unsigned char bus, ack_bit;
  2156. if (!((state == ASSERT) || (state == NEGATE))) {
  2157. nsp32_msg(KERN_ERR, "unknown state designation");
  2158. }
  2159. /* ACK is BIT(4) */
  2160. ack_bit = (state == ASSERT ? BUSMON_ACK : 0);
  2161. do {
  2162. bus = nsp32_read1(base, SCSI_BUS_MONITOR);
  2163. if ((bus & BUSMON_ACK) == ack_bit) {
  2164. nsp32_dbg(NSP32_DEBUG_WAIT,
  2165. "wait_time: %d", wait_time);
  2166. return;
  2167. }
  2168. udelay(1);
  2169. wait_time++;
  2170. } while (wait_time < REQSACK_TIMEOUT_TIME);
  2171. nsp32_msg(KERN_WARNING, "wait SACK timeout, ack_bit: 0x%x", ack_bit);
  2172. }
  2173. /*
  2174. * assert SCSI ACK
  2175. *
  2176. * Note: SCSI ACK assertion needs with ACKENB=1, AUTODIRECTION=1.
  2177. */
  2178. static void nsp32_sack_assert(nsp32_hw_data *data)
  2179. {
  2180. unsigned int base = data->BaseAddress;
  2181. unsigned char busctrl;
  2182. busctrl = nsp32_read1(base, SCSI_BUS_CONTROL);
  2183. busctrl |= (BUSCTL_ACK | AUTODIRECTION | ACKENB);
  2184. nsp32_write1(base, SCSI_BUS_CONTROL, busctrl);
  2185. }
  2186. /*
  2187. * negate SCSI ACK
  2188. */
  2189. static void nsp32_sack_negate(nsp32_hw_data *data)
  2190. {
  2191. unsigned int base = data->BaseAddress;
  2192. unsigned char busctrl;
  2193. busctrl = nsp32_read1(base, SCSI_BUS_CONTROL);
  2194. busctrl &= ~BUSCTL_ACK;
  2195. nsp32_write1(base, SCSI_BUS_CONTROL, busctrl);
  2196. }
  2197. /*
  2198. * Note: n_io_port is defined as 0x7f because I/O register port is
  2199. * assigned as:
  2200. * 0x800-0x8ff: memory mapped I/O port
  2201. * 0x900-0xbff: (map same 0x800-0x8ff I/O port image repeatedly)
  2202. * 0xc00-0xfff: CardBus status registers
  2203. */
  2204. static int nsp32_detect(struct pci_dev *pdev)
  2205. {
  2206. struct Scsi_Host *host; /* registered host structure */
  2207. struct resource *res;
  2208. nsp32_hw_data *data;
  2209. int ret;
  2210. int i, j;
  2211. nsp32_dbg(NSP32_DEBUG_REGISTER, "enter");
  2212. /*
  2213. * register this HBA as SCSI device
  2214. */
  2215. host = scsi_host_alloc(&nsp32_template, sizeof(nsp32_hw_data));
  2216. if (host == NULL) {
  2217. nsp32_msg (KERN_ERR, "failed to scsi register");
  2218. goto err;
  2219. }
  2220. /*
  2221. * set nsp32_hw_data
  2222. */
  2223. data = (nsp32_hw_data *)host->hostdata;
  2224. memcpy(data, &nsp32_data_base, sizeof(nsp32_hw_data));
  2225. host->irq = data->IrqNumber;
  2226. host->io_port = data->BaseAddress;
  2227. host->unique_id = data->BaseAddress;
  2228. host->n_io_port = data->NumAddress;
  2229. host->base = (unsigned long)data->MmioAddress;
  2230. data->Host = host;
  2231. spin_lock_init(&(data->Lock));
  2232. data->cur_lunt = NULL;
  2233. data->cur_target = NULL;
  2234. /*
  2235. * Bus master transfer mode is supported currently.
  2236. */
  2237. data->trans_method = NSP32_TRANSFER_BUSMASTER;
  2238. /*
  2239. * Set clock div, CLOCK_4 (HBA has own external clock, and
  2240. * dividing * 100ns/4).
  2241. * Currently CLOCK_4 has only tested, not for CLOCK_2/PCICLK yet.
  2242. */
  2243. data->clock = CLOCK_4;
  2244. /*
  2245. * Select appropriate nsp32_sync_table and set I_CLOCKDIV.
  2246. */
  2247. switch (data->clock) {
  2248. case CLOCK_4:
  2249. /* If data->clock is CLOCK_4, then select 40M sync table. */
  2250. data->synct = nsp32_sync_table_40M;
  2251. data->syncnum = ARRAY_SIZE(nsp32_sync_table_40M);
  2252. break;
  2253. case CLOCK_2:
  2254. /* If data->clock is CLOCK_2, then select 20M sync table. */
  2255. data->synct = nsp32_sync_table_20M;
  2256. data->syncnum = ARRAY_SIZE(nsp32_sync_table_20M);
  2257. break;
  2258. case PCICLK:
  2259. /* If data->clock is PCICLK, then select pci sync table. */
  2260. data->synct = nsp32_sync_table_pci;
  2261. data->syncnum = ARRAY_SIZE(nsp32_sync_table_pci);
  2262. break;
  2263. default:
  2264. nsp32_msg(KERN_WARNING,
  2265. "Invalid clock div is selected, set CLOCK_4.");
  2266. /* Use default value CLOCK_4 */
  2267. data->clock = CLOCK_4;
  2268. data->synct = nsp32_sync_table_40M;
  2269. data->syncnum = ARRAY_SIZE(nsp32_sync_table_40M);
  2270. }
  2271. /*
  2272. * setup nsp32_lunt
  2273. */
  2274. /*
  2275. * setup DMA
  2276. */
  2277. if (pci_set_dma_mask(pdev, DMA_32BIT_MASK) != 0) {
  2278. nsp32_msg (KERN_ERR, "failed to set PCI DMA mask");
  2279. goto scsi_unregister;
  2280. }
  2281. /*
  2282. * allocate autoparam DMA resource.
  2283. */
  2284. data->autoparam = pci_alloc_consistent(pdev, sizeof(nsp32_autoparam), &(data->auto_paddr));
  2285. if (data->autoparam == NULL) {
  2286. nsp32_msg(KERN_ERR, "failed to allocate DMA memory");
  2287. goto scsi_unregister;
  2288. }
  2289. /*
  2290. * allocate scatter-gather DMA resource.
  2291. */
  2292. data->sg_list = pci_alloc_consistent(pdev, NSP32_SG_TABLE_SIZE,
  2293. &(data->sg_paddr));
  2294. if (data->sg_list == NULL) {
  2295. nsp32_msg(KERN_ERR, "failed to allocate DMA memory");
  2296. goto free_autoparam;
  2297. }
  2298. for (i = 0; i < ARRAY_SIZE(data->lunt); i++) {
  2299. for (j = 0; j < ARRAY_SIZE(data->lunt[0]); j++) {
  2300. int offset = i * ARRAY_SIZE(data->lunt[0]) + j;
  2301. nsp32_lunt tmp = {
  2302. .SCpnt = NULL,
  2303. .save_datp = 0,
  2304. .msgin03 = FALSE,
  2305. .sg_num = 0,
  2306. .cur_entry = 0,
  2307. .sglun = &(data->sg_list[offset]),
  2308. .sglun_paddr = data->sg_paddr + (offset * sizeof(nsp32_sglun)),
  2309. };
  2310. data->lunt[i][j] = tmp;
  2311. }
  2312. }
  2313. /*
  2314. * setup target
  2315. */
  2316. for (i = 0; i < ARRAY_SIZE(data->target); i++) {
  2317. nsp32_target *target = &(data->target[i]);
  2318. target->limit_entry = 0;
  2319. target->sync_flag = 0;
  2320. nsp32_set_async(data, target);
  2321. }
  2322. /*
  2323. * EEPROM check
  2324. */
  2325. ret = nsp32_getprom_param(data);
  2326. if (ret == FALSE) {
  2327. data->resettime = 3; /* default 3 */
  2328. }
  2329. /*
  2330. * setup HBA
  2331. */
  2332. nsp32hw_init(data);
  2333. snprintf(data->info_str, sizeof(data->info_str),
  2334. "NinjaSCSI-32Bi/UDE: irq %d, io 0x%lx+0x%x",
  2335. host->irq, host->io_port, host->n_io_port);
  2336. /*
  2337. * SCSI bus reset
  2338. *
  2339. * Note: It's important to reset SCSI bus in initialization phase.
  2340. * NinjaSCSI-32Bi/UDE HBA EEPROM seems to exchange SDTR when
  2341. * system is coming up, so SCSI devices connected to HBA is set as
  2342. * un-asynchronous mode. It brings the merit that this HBA is
  2343. * ready to start synchronous transfer without any preparation,
  2344. * but we are difficult to control transfer speed. In addition,
  2345. * it prevents device transfer speed from effecting EEPROM start-up
  2346. * SDTR. NinjaSCSI-32Bi/UDE has the feature if EEPROM is set as
  2347. * Auto Mode, then FAST-10M is selected when SCSI devices are
  2348. * connected same or more than 4 devices. It should be avoided
  2349. * depending on this specification. Thus, resetting the SCSI bus
  2350. * restores all connected SCSI devices to asynchronous mode, then
  2351. * this driver set SDTR safely later, and we can control all SCSI
  2352. * device transfer mode.
  2353. */
  2354. nsp32_do_bus_reset(data);
  2355. ret = request_irq(host->irq, do_nsp32_isr, IRQF_SHARED, "nsp32", data);
  2356. if (ret < 0) {
  2357. nsp32_msg(KERN_ERR, "Unable to allocate IRQ for NinjaSCSI32 "
  2358. "SCSI PCI controller. Interrupt: %d", host->irq);
  2359. goto free_sg_list;
  2360. }
  2361. /*
  2362. * PCI IO register
  2363. */
  2364. res = request_region(host->io_port, host->n_io_port, "nsp32");
  2365. if (res == NULL) {
  2366. nsp32_msg(KERN_ERR,
  2367. "I/O region 0x%lx+0x%lx is already used",
  2368. data->BaseAddress, data->NumAddress);
  2369. goto free_irq;
  2370. }
  2371. ret = scsi_add_host(host, &pdev->dev);
  2372. if (ret) {
  2373. nsp32_msg(KERN_ERR, "failed to add scsi host");
  2374. goto free_region;
  2375. }
  2376. scsi_scan_host(host);
  2377. pci_set_drvdata(pdev, host);
  2378. return 0;
  2379. free_region:
  2380. release_region(host->io_port, host->n_io_port);
  2381. free_irq:
  2382. free_irq(host->irq, data);
  2383. free_sg_list:
  2384. pci_free_consistent(pdev, NSP32_SG_TABLE_SIZE,
  2385. data->sg_list, data->sg_paddr);
  2386. free_autoparam:
  2387. pci_free_consistent(pdev, sizeof(nsp32_autoparam),
  2388. data->autoparam, data->auto_paddr);
  2389. scsi_unregister:
  2390. scsi_host_put(host);
  2391. err:
  2392. return 1;
  2393. }
  2394. static int nsp32_release(struct Scsi_Host *host)
  2395. {
  2396. nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
  2397. if (data->autoparam) {
  2398. pci_free_consistent(data->Pci, sizeof(nsp32_autoparam),
  2399. data->autoparam, data->auto_paddr);
  2400. }
  2401. if (data->sg_list) {
  2402. pci_free_consistent(data->Pci, NSP32_SG_TABLE_SIZE,
  2403. data->sg_list, data->sg_paddr);
  2404. }
  2405. if (host->irq) {
  2406. free_irq(host->irq, data);
  2407. }
  2408. if (host->io_port && host->n_io_port) {
  2409. release_region(host->io_port, host->n_io_port);
  2410. }
  2411. if (data->MmioAddress) {
  2412. iounmap(data->MmioAddress);
  2413. }
  2414. return 0;
  2415. }
  2416. static const char *nsp32_info(struct Scsi_Host *shpnt)
  2417. {
  2418. nsp32_hw_data *data = (nsp32_hw_data *)shpnt->hostdata;
  2419. return data->info_str;
  2420. }
  2421. /****************************************************************************
  2422. * error handler
  2423. */
  2424. static int nsp32_eh_abort(struct scsi_cmnd *SCpnt)
  2425. {
  2426. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  2427. unsigned int base = SCpnt->device->host->io_port;
  2428. nsp32_msg(KERN_WARNING, "abort");
  2429. if (data->cur_lunt->SCpnt == NULL) {
  2430. nsp32_dbg(NSP32_DEBUG_BUSRESET, "abort failed");
  2431. return FAILED;
  2432. }
  2433. if (data->cur_target->sync_flag & (SDTR_INITIATOR | SDTR_TARGET)) {
  2434. /* reset SDTR negotiation */
  2435. data->cur_target->sync_flag = 0;
  2436. nsp32_set_async(data, data->cur_target);
  2437. }
  2438. nsp32_write2(base, TRANSFER_CONTROL, 0);
  2439. nsp32_write2(base, BM_CNT, 0);
  2440. SCpnt->result = DID_ABORT << 16;
  2441. nsp32_scsi_done(SCpnt);
  2442. nsp32_dbg(NSP32_DEBUG_BUSRESET, "abort success");
  2443. return SUCCESS;
  2444. }
  2445. static int nsp32_eh_bus_reset(struct scsi_cmnd *SCpnt)
  2446. {
  2447. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  2448. unsigned int base = SCpnt->device->host->io_port;
  2449. spin_lock_irq(SCpnt->device->host->host_lock);
  2450. nsp32_msg(KERN_INFO, "Bus Reset");
  2451. nsp32_dbg(NSP32_DEBUG_BUSRESET, "SCpnt=0x%x", SCpnt);
  2452. nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
  2453. nsp32_do_bus_reset(data);
  2454. nsp32_write2(base, IRQ_CONTROL, 0);
  2455. spin_unlock_irq(SCpnt->device->host->host_lock);
  2456. return SUCCESS; /* SCSI bus reset is succeeded at any time. */
  2457. }
  2458. static void nsp32_do_bus_reset(nsp32_hw_data *data)
  2459. {
  2460. unsigned int base = data->BaseAddress;
  2461. unsigned short intrdat;
  2462. int i;
  2463. nsp32_dbg(NSP32_DEBUG_BUSRESET, "in");
  2464. /*
  2465. * stop all transfer
  2466. * clear TRANSFERCONTROL_BM_START
  2467. * clear counter
  2468. */
  2469. nsp32_write2(base, TRANSFER_CONTROL, 0);
  2470. nsp32_write4(base, BM_CNT, 0);
  2471. nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
  2472. /*
  2473. * fall back to asynchronous transfer mode
  2474. * initialize SDTR negotiation flag
  2475. */
  2476. for (i = 0; i < ARRAY_SIZE(data->target); i++) {
  2477. nsp32_target *target = &data->target[i];
  2478. target->sync_flag = 0;
  2479. nsp32_set_async(data, target);
  2480. }
  2481. /*
  2482. * reset SCSI bus
  2483. */
  2484. nsp32_write1(base, SCSI_BUS_CONTROL, BUSCTL_RST);
  2485. udelay(RESET_HOLD_TIME);
  2486. nsp32_write1(base, SCSI_BUS_CONTROL, 0);
  2487. for(i = 0; i < 5; i++) {
  2488. intrdat = nsp32_read2(base, IRQ_STATUS); /* dummy read */
  2489. nsp32_dbg(NSP32_DEBUG_BUSRESET, "irq:1: 0x%x", intrdat);
  2490. }
  2491. data->CurrentSC = NULL;
  2492. }
  2493. static int nsp32_eh_host_reset(struct scsi_cmnd *SCpnt)
  2494. {
  2495. struct Scsi_Host *host = SCpnt->device->host;
  2496. unsigned int base = SCpnt->device->host->io_port;
  2497. nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
  2498. nsp32_msg(KERN_INFO, "Host Reset");
  2499. nsp32_dbg(NSP32_DEBUG_BUSRESET, "SCpnt=0x%x", SCpnt);
  2500. spin_lock_irq(SCpnt->device->host->host_lock);
  2501. nsp32hw_init(data);
  2502. nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
  2503. nsp32_do_bus_reset(data);
  2504. nsp32_write2(base, IRQ_CONTROL, 0);
  2505. spin_unlock_irq(SCpnt->device->host->host_lock);
  2506. return SUCCESS; /* Host reset is succeeded at any time. */
  2507. }
  2508. /**************************************************************************
  2509. * EEPROM handler
  2510. */
  2511. /*
  2512. * getting EEPROM parameter
  2513. */
  2514. static int nsp32_getprom_param(nsp32_hw_data *data)
  2515. {
  2516. int vendor = data->pci_devid->vendor;
  2517. int device = data->pci_devid->device;
  2518. int ret, val, i;
  2519. /*
  2520. * EEPROM checking.
  2521. */
  2522. ret = nsp32_prom_read(data, 0x7e);
  2523. if (ret != 0x55) {
  2524. nsp32_msg(KERN_INFO, "No EEPROM detected: 0x%x", ret);
  2525. return FALSE;
  2526. }
  2527. ret = nsp32_prom_read(data, 0x7f);
  2528. if (ret != 0xaa) {
  2529. nsp32_msg(KERN_INFO, "Invalid number: 0x%x", ret);
  2530. return FALSE;
  2531. }
  2532. /*
  2533. * check EEPROM type
  2534. */
  2535. if (vendor == PCI_VENDOR_ID_WORKBIT &&
  2536. device == PCI_DEVICE_ID_WORKBIT_STANDARD) {
  2537. ret = nsp32_getprom_c16(data);
  2538. } else if (vendor == PCI_VENDOR_ID_WORKBIT &&
  2539. device == PCI_DEVICE_ID_NINJASCSI_32BIB_LOGITEC) {
  2540. ret = nsp32_getprom_at24(data);
  2541. } else if (vendor == PCI_VENDOR_ID_WORKBIT &&
  2542. device == PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO ) {
  2543. ret = nsp32_getprom_at24(data);
  2544. } else {
  2545. nsp32_msg(KERN_WARNING, "Unknown EEPROM");
  2546. ret = FALSE;
  2547. }
  2548. /* for debug : SPROM data full checking */
  2549. for (i = 0; i <= 0x1f; i++) {
  2550. val = nsp32_prom_read(data, i);
  2551. nsp32_dbg(NSP32_DEBUG_EEPROM,
  2552. "rom address 0x%x : 0x%x", i, val);
  2553. }
  2554. return ret;
  2555. }
  2556. /*
  2557. * AT24C01A (Logitec: LHA-600S), AT24C02 (Melco Buffalo: IFC-USLP) data map:
  2558. *
  2559. * ROMADDR
  2560. * 0x00 - 0x06 : Device Synchronous Transfer Period (SCSI ID 0 - 6)
  2561. * Value 0x0: ASYNC, 0x0c: Ultra-20M, 0x19: Fast-10M
  2562. * 0x07 : HBA Synchronous Transfer Period
  2563. * Value 0: AutoSync, 1: Manual Setting
  2564. * 0x08 - 0x0f : Not Used? (0x0)
  2565. * 0x10 : Bus Termination
  2566. * Value 0: Auto[ON], 1: ON, 2: OFF
  2567. * 0x11 : Not Used? (0)
  2568. * 0x12 : Bus Reset Delay Time (0x03)
  2569. * 0x13 : Bootable CD Support
  2570. * Value 0: Disable, 1: Enable
  2571. * 0x14 : Device Scan
  2572. * Bit 7 6 5 4 3 2 1 0
  2573. * | <----------------->
  2574. * | SCSI ID: Value 0: Skip, 1: YES
  2575. * |-> Value 0: ALL scan, Value 1: Manual
  2576. * 0x15 - 0x1b : Not Used? (0)
  2577. * 0x1c : Constant? (0x01) (clock div?)
  2578. * 0x1d - 0x7c : Not Used (0xff)
  2579. * 0x7d : Not Used? (0xff)
  2580. * 0x7e : Constant (0x55), Validity signature
  2581. * 0x7f : Constant (0xaa), Validity signature
  2582. */
  2583. static int nsp32_getprom_at24(nsp32_hw_data *data)
  2584. {
  2585. int ret, i;
  2586. int auto_sync;
  2587. nsp32_target *target;
  2588. int entry;
  2589. /*
  2590. * Reset time which is designated by EEPROM.
  2591. *
  2592. * TODO: Not used yet.
  2593. */
  2594. data->resettime = nsp32_prom_read(data, 0x12);
  2595. /*
  2596. * HBA Synchronous Transfer Period
  2597. *
  2598. * Note: auto_sync = 0: auto, 1: manual. Ninja SCSI HBA spec says
  2599. * that if auto_sync is 0 (auto), and connected SCSI devices are
  2600. * same or lower than 3, then transfer speed is set as ULTRA-20M.
  2601. * On the contrary if connected SCSI devices are same or higher
  2602. * than 4, then transfer speed is set as FAST-10M.
  2603. *
  2604. * I break this rule. The number of connected SCSI devices are
  2605. * only ignored. If auto_sync is 0 (auto), then transfer speed is
  2606. * forced as ULTRA-20M.
  2607. */
  2608. ret = nsp32_prom_read(data, 0x07);
  2609. switch (ret) {
  2610. case 0:
  2611. auto_sync = TRUE;
  2612. break;
  2613. case 1:
  2614. auto_sync = FALSE;
  2615. break;
  2616. default:
  2617. nsp32_msg(KERN_WARNING,
  2618. "Unsupported Auto Sync mode. Fall back to manual mode.");
  2619. auto_sync = TRUE;
  2620. }
  2621. if (trans_mode == ULTRA20M_MODE) {
  2622. auto_sync = TRUE;
  2623. }
  2624. /*
  2625. * each device Synchronous Transfer Period
  2626. */
  2627. for (i = 0; i < NSP32_HOST_SCSIID; i++) {
  2628. target = &data->target[i];
  2629. if (auto_sync == TRUE) {
  2630. target->limit_entry = 0; /* set as ULTRA20M */
  2631. } else {
  2632. ret = nsp32_prom_read(data, i);
  2633. entry = nsp32_search_period_entry(data, target, ret);
  2634. if (entry < 0) {
  2635. /* search failed... set maximum speed */
  2636. entry = 0;
  2637. }
  2638. target->limit_entry = entry;
  2639. }
  2640. }
  2641. return TRUE;
  2642. }
  2643. /*
  2644. * C16 110 (I-O Data: SC-NBD) data map:
  2645. *
  2646. * ROMADDR
  2647. * 0x00 - 0x06 : Device Synchronous Transfer Period (SCSI ID 0 - 6)
  2648. * Value 0x0: 20MB/S, 0x1: 10MB/S, 0x2: 5MB/S, 0x3: ASYNC
  2649. * 0x07 : 0 (HBA Synchronous Transfer Period: Auto Sync)
  2650. * 0x08 - 0x0f : Not Used? (0x0)
  2651. * 0x10 : Transfer Mode
  2652. * Value 0: PIO, 1: Busmater
  2653. * 0x11 : Bus Reset Delay Time (0x00-0x20)
  2654. * 0x12 : Bus Termination
  2655. * Value 0: Disable, 1: Enable
  2656. * 0x13 - 0x19 : Disconnection
  2657. * Value 0: Disable, 1: Enable
  2658. * 0x1a - 0x7c : Not Used? (0)
  2659. * 0x7d : Not Used? (0xf8)
  2660. * 0x7e : Constant (0x55), Validity signature
  2661. * 0x7f : Constant (0xaa), Validity signature
  2662. */
  2663. static int nsp32_getprom_c16(nsp32_hw_data *data)
  2664. {
  2665. int ret, i;
  2666. nsp32_target *target;
  2667. int entry, val;
  2668. /*
  2669. * Reset time which is designated by EEPROM.
  2670. *
  2671. * TODO: Not used yet.
  2672. */
  2673. data->resettime = nsp32_prom_read(data, 0x11);
  2674. /*
  2675. * each device Synchronous Transfer Period
  2676. */
  2677. for (i = 0; i < NSP32_HOST_SCSIID; i++) {
  2678. target = &data->target[i];
  2679. ret = nsp32_prom_read(data, i);
  2680. switch (ret) {
  2681. case 0: /* 20MB/s */
  2682. val = 0x0c;
  2683. break;
  2684. case 1: /* 10MB/s */
  2685. val = 0x19;
  2686. break;
  2687. case 2: /* 5MB/s */
  2688. val = 0x32;
  2689. break;
  2690. case 3: /* ASYNC */
  2691. val = 0x00;
  2692. break;
  2693. default: /* default 20MB/s */
  2694. val = 0x0c;
  2695. break;
  2696. }
  2697. entry = nsp32_search_period_entry(data, target, val);
  2698. if (entry < 0 || trans_mode == ULTRA20M_MODE) {
  2699. /* search failed... set maximum speed */
  2700. entry = 0;
  2701. }
  2702. target->limit_entry = entry;
  2703. }
  2704. return TRUE;
  2705. }
  2706. /*
  2707. * Atmel AT24C01A (drived in 5V) serial EEPROM routines
  2708. */
  2709. static int nsp32_prom_read(nsp32_hw_data *data, int romaddr)
  2710. {
  2711. int i, val;
  2712. /* start condition */
  2713. nsp32_prom_start(data);
  2714. /* device address */
  2715. nsp32_prom_write_bit(data, 1); /* 1 */
  2716. nsp32_prom_write_bit(data, 0); /* 0 */
  2717. nsp32_prom_write_bit(data, 1); /* 1 */
  2718. nsp32_prom_write_bit(data, 0); /* 0 */
  2719. nsp32_prom_write_bit(data, 0); /* A2: 0 (GND) */
  2720. nsp32_prom_write_bit(data, 0); /* A1: 0 (GND) */
  2721. nsp32_prom_write_bit(data, 0); /* A0: 0 (GND) */
  2722. /* R/W: W for dummy write */
  2723. nsp32_prom_write_bit(data, 0);
  2724. /* ack */
  2725. nsp32_prom_write_bit(data, 0);
  2726. /* word address */
  2727. for (i = 7; i >= 0; i--) {
  2728. nsp32_prom_write_bit(data, ((romaddr >> i) & 1));
  2729. }
  2730. /* ack */
  2731. nsp32_prom_write_bit(data, 0);
  2732. /* start condition */
  2733. nsp32_prom_start(data);
  2734. /* device address */
  2735. nsp32_prom_write_bit(data, 1); /* 1 */
  2736. nsp32_prom_write_bit(data, 0); /* 0 */
  2737. nsp32_prom_write_bit(data, 1); /* 1 */
  2738. nsp32_prom_write_bit(data, 0); /* 0 */
  2739. nsp32_prom_write_bit(data, 0); /* A2: 0 (GND) */
  2740. nsp32_prom_write_bit(data, 0); /* A1: 0 (GND) */
  2741. nsp32_prom_write_bit(data, 0); /* A0: 0 (GND) */
  2742. /* R/W: R */
  2743. nsp32_prom_write_bit(data, 1);
  2744. /* ack */
  2745. nsp32_prom_write_bit(data, 0);
  2746. /* data... */
  2747. val = 0;
  2748. for (i = 7; i >= 0; i--) {
  2749. val += (nsp32_prom_read_bit(data) << i);
  2750. }
  2751. /* no ack */
  2752. nsp32_prom_write_bit(data, 1);
  2753. /* stop condition */
  2754. nsp32_prom_stop(data);
  2755. return val;
  2756. }
  2757. static void nsp32_prom_set(nsp32_hw_data *data, int bit, int val)
  2758. {
  2759. int base = data->BaseAddress;
  2760. int tmp;
  2761. tmp = nsp32_index_read1(base, SERIAL_ROM_CTL);
  2762. if (val == 0) {
  2763. tmp &= ~bit;
  2764. } else {
  2765. tmp |= bit;
  2766. }
  2767. nsp32_index_write1(base, SERIAL_ROM_CTL, tmp);
  2768. udelay(10);
  2769. }
  2770. static int nsp32_prom_get(nsp32_hw_data *data, int bit)
  2771. {
  2772. int base = data->BaseAddress;
  2773. int tmp, ret;
  2774. if (bit != SDA) {
  2775. nsp32_msg(KERN_ERR, "return value is not appropriate");
  2776. return 0;
  2777. }
  2778. tmp = nsp32_index_read1(base, SERIAL_ROM_CTL) & bit;
  2779. if (tmp == 0) {
  2780. ret = 0;
  2781. } else {
  2782. ret = 1;
  2783. }
  2784. udelay(10);
  2785. return ret;
  2786. }
  2787. static void nsp32_prom_start (nsp32_hw_data *data)
  2788. {
  2789. /* start condition */
  2790. nsp32_prom_set(data, SCL, 1);
  2791. nsp32_prom_set(data, SDA, 1);
  2792. nsp32_prom_set(data, ENA, 1); /* output mode */
  2793. nsp32_prom_set(data, SDA, 0); /* keeping SCL=1 and transiting
  2794. * SDA 1->0 is start condition */
  2795. nsp32_prom_set(data, SCL, 0);
  2796. }
  2797. static void nsp32_prom_stop (nsp32_hw_data *data)
  2798. {
  2799. /* stop condition */
  2800. nsp32_prom_set(data, SCL, 1);
  2801. nsp32_prom_set(data, SDA, 0);
  2802. nsp32_prom_set(data, ENA, 1); /* output mode */
  2803. nsp32_prom_set(data, SDA, 1);
  2804. nsp32_prom_set(data, SCL, 0);
  2805. }
  2806. static void nsp32_prom_write_bit(nsp32_hw_data *data, int val)
  2807. {
  2808. /* write */
  2809. nsp32_prom_set(data, SDA, val);
  2810. nsp32_prom_set(data, SCL, 1 );
  2811. nsp32_prom_set(data, SCL, 0 );
  2812. }
  2813. static int nsp32_prom_read_bit(nsp32_hw_data *data)
  2814. {
  2815. int val;
  2816. /* read */
  2817. nsp32_prom_set(data, ENA, 0); /* input mode */
  2818. nsp32_prom_set(data, SCL, 1);
  2819. val = nsp32_prom_get(data, SDA);
  2820. nsp32_prom_set(data, SCL, 0);
  2821. nsp32_prom_set(data, ENA, 1); /* output mode */
  2822. return val;
  2823. }
  2824. /**************************************************************************
  2825. * Power Management
  2826. */
  2827. #ifdef CONFIG_PM
  2828. /* Device suspended */
  2829. static int nsp32_suspend(struct pci_dev *pdev, pm_message_t state)
  2830. {
  2831. struct Scsi_Host *host = pci_get_drvdata(pdev);
  2832. nsp32_msg(KERN_INFO, "pci-suspend: pdev=0x%p, state=%ld, slot=%s, host=0x%p", pdev, state, pci_name(pdev), host);
  2833. pci_save_state (pdev);
  2834. pci_disable_device (pdev);
  2835. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  2836. return 0;
  2837. }
  2838. /* Device woken up */
  2839. static int nsp32_resume(struct pci_dev *pdev)
  2840. {
  2841. struct Scsi_Host *host = pci_get_drvdata(pdev);
  2842. nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
  2843. unsigned short reg;
  2844. nsp32_msg(KERN_INFO, "pci-resume: pdev=0x%p, slot=%s, host=0x%p", pdev, pci_name(pdev), host);
  2845. pci_set_power_state(pdev, PCI_D0);
  2846. pci_enable_wake (pdev, PCI_D0, 0);
  2847. pci_restore_state (pdev);
  2848. reg = nsp32_read2(data->BaseAddress, INDEX_REG);
  2849. nsp32_msg(KERN_INFO, "io=0x%x reg=0x%x", data->BaseAddress, reg);
  2850. if (reg == 0xffff) {
  2851. nsp32_msg(KERN_INFO, "missing device. abort resume.");
  2852. return 0;
  2853. }
  2854. nsp32hw_init (data);
  2855. nsp32_do_bus_reset(data);
  2856. nsp32_msg(KERN_INFO, "resume success");
  2857. return 0;
  2858. }
  2859. #endif
  2860. /************************************************************************
  2861. * PCI/Cardbus probe/remove routine
  2862. */
  2863. static int __devinit nsp32_probe(struct pci_dev *pdev, const struct pci_device_id *id)
  2864. {
  2865. int ret;
  2866. nsp32_hw_data *data = &nsp32_data_base;
  2867. nsp32_dbg(NSP32_DEBUG_REGISTER, "enter");
  2868. ret = pci_enable_device(pdev);
  2869. if (ret) {
  2870. nsp32_msg(KERN_ERR, "failed to enable pci device");
  2871. return ret;
  2872. }
  2873. data->Pci = pdev;
  2874. data->pci_devid = id;
  2875. data->IrqNumber = pdev->irq;
  2876. data->BaseAddress = pci_resource_start(pdev, 0);
  2877. data->NumAddress = pci_resource_len (pdev, 0);
  2878. data->MmioAddress = ioremap_nocache(pci_resource_start(pdev, 1),
  2879. pci_resource_len (pdev, 1));
  2880. data->MmioLength = pci_resource_len (pdev, 1);
  2881. pci_set_master(pdev);
  2882. ret = nsp32_detect(pdev);
  2883. nsp32_msg(KERN_INFO, "irq: %i mmio: %p+0x%lx slot: %s model: %s",
  2884. pdev->irq,
  2885. data->MmioAddress, data->MmioLength,
  2886. pci_name(pdev),
  2887. nsp32_model[id->driver_data]);
  2888. nsp32_dbg(NSP32_DEBUG_REGISTER, "exit %d", ret);
  2889. return ret;
  2890. }
  2891. static void __devexit nsp32_remove(struct pci_dev *pdev)
  2892. {
  2893. struct Scsi_Host *host = pci_get_drvdata(pdev);
  2894. nsp32_dbg(NSP32_DEBUG_REGISTER, "enter");
  2895. scsi_remove_host(host);
  2896. nsp32_release(host);
  2897. scsi_host_put(host);
  2898. }
  2899. static struct pci_driver nsp32_driver = {
  2900. .name = "nsp32",
  2901. .id_table = nsp32_pci_table,
  2902. .probe = nsp32_probe,
  2903. .remove = __devexit_p(nsp32_remove),
  2904. #ifdef CONFIG_PM
  2905. .suspend = nsp32_suspend,
  2906. .resume = nsp32_resume,
  2907. #endif
  2908. };
  2909. /*********************************************************************
  2910. * Moule entry point
  2911. */
  2912. static int __init init_nsp32(void) {
  2913. nsp32_msg(KERN_INFO, "loading...");
  2914. return pci_register_driver(&nsp32_driver);
  2915. }
  2916. static void __exit exit_nsp32(void) {
  2917. nsp32_msg(KERN_INFO, "unloading...");
  2918. pci_unregister_driver(&nsp32_driver);
  2919. }
  2920. module_init(init_nsp32);
  2921. module_exit(exit_nsp32);
  2922. /* end */