aic94xx_hwi.h 10 KB

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  1. /*
  2. * Aic94xx SAS/SATA driver hardware interface header file.
  3. *
  4. * Copyright (C) 2005 Adaptec, Inc. All rights reserved.
  5. * Copyright (C) 2005 Luben Tuikov <luben_tuikov@adaptec.com>
  6. *
  7. * This file is licensed under GPLv2.
  8. *
  9. * This file is part of the aic94xx driver.
  10. *
  11. * The aic94xx driver is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License as
  13. * published by the Free Software Foundation; version 2 of the
  14. * License.
  15. *
  16. * The aic94xx driver is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  19. * General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with the aic94xx driver; if not, write to the Free Software
  23. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  24. *
  25. */
  26. #ifndef _AIC94XX_HWI_H_
  27. #define _AIC94XX_HWI_H_
  28. #include <linux/interrupt.h>
  29. #include <linux/pci.h>
  30. #include <linux/dma-mapping.h>
  31. #include <scsi/libsas.h>
  32. #include "aic94xx.h"
  33. #include "aic94xx_sas.h"
  34. /* Define ASD_MAX_PHYS to the maximum phys ever. Currently 8. */
  35. #define ASD_MAX_PHYS 8
  36. #define ASD_PCBA_SN_SIZE 12
  37. struct asd_ha_addrspace {
  38. void __iomem *addr;
  39. unsigned long start; /* pci resource start */
  40. unsigned long len; /* pci resource len */
  41. unsigned long flags; /* pci resource flags */
  42. /* addresses internal to the host adapter */
  43. u32 swa_base; /* mmspace 1 (MBAR1) uses this only */
  44. u32 swb_base;
  45. u32 swc_base;
  46. };
  47. struct bios_struct {
  48. int present;
  49. u8 maj;
  50. u8 min;
  51. u32 bld;
  52. };
  53. struct unit_element_struct {
  54. u16 num;
  55. u16 size;
  56. void *area;
  57. };
  58. struct flash_struct {
  59. u32 bar;
  60. int present;
  61. int wide;
  62. u8 manuf;
  63. u8 dev_id;
  64. u8 sec_prot;
  65. u32 dir_offs;
  66. };
  67. struct asd_phy_desc {
  68. /* From CTRL-A settings, then set to what is appropriate */
  69. u8 sas_addr[SAS_ADDR_SIZE];
  70. u8 max_sas_lrate;
  71. u8 min_sas_lrate;
  72. u8 max_sata_lrate;
  73. u8 min_sata_lrate;
  74. u8 flags;
  75. #define ASD_CRC_DIS 1
  76. #define ASD_SATA_SPINUP_HOLD 2
  77. u8 phy_control_0; /* mode 5 reg 0x160 */
  78. u8 phy_control_1; /* mode 5 reg 0x161 */
  79. u8 phy_control_2; /* mode 5 reg 0x162 */
  80. u8 phy_control_3; /* mode 5 reg 0x163 */
  81. };
  82. struct asd_dma_tok {
  83. void *vaddr;
  84. dma_addr_t dma_handle;
  85. size_t size;
  86. };
  87. struct hw_profile {
  88. struct bios_struct bios;
  89. struct unit_element_struct ue;
  90. struct flash_struct flash;
  91. u8 sas_addr[SAS_ADDR_SIZE];
  92. char pcba_sn[ASD_PCBA_SN_SIZE+1];
  93. u8 enabled_phys; /* mask of enabled phys */
  94. struct asd_phy_desc phy_desc[ASD_MAX_PHYS];
  95. u32 max_scbs; /* absolute sequencer scb queue size */
  96. struct asd_dma_tok *scb_ext;
  97. u32 max_ddbs;
  98. struct asd_dma_tok *ddb_ext;
  99. spinlock_t ddb_lock;
  100. void *ddb_bitmap;
  101. int num_phys; /* ENABLEABLE */
  102. int max_phys; /* REPORTED + ENABLEABLE */
  103. unsigned addr_range; /* max # of addrs; max # of possible ports */
  104. unsigned port_name_base;
  105. unsigned dev_name_base;
  106. unsigned sata_name_base;
  107. };
  108. struct asd_ascb {
  109. struct list_head list;
  110. struct asd_ha_struct *ha;
  111. struct scb *scb; /* equals dma_scb->vaddr */
  112. struct asd_dma_tok dma_scb;
  113. struct asd_dma_tok *sg_arr;
  114. void (*tasklet_complete)(struct asd_ascb *, struct done_list_struct *);
  115. u8 uldd_timer:1;
  116. /* internally generated command */
  117. struct timer_list timer;
  118. struct completion completion;
  119. u8 tag_valid:1;
  120. __be16 tag; /* error recovery only */
  121. /* If this is an Empty SCB, index of first edb in seq->edb_arr. */
  122. int edb_index;
  123. /* Used by the timer timeout function. */
  124. int tc_index;
  125. void *uldd_task;
  126. };
  127. #define ASD_DL_SIZE_BITS 0x8
  128. #define ASD_DL_SIZE (1<<(2+ASD_DL_SIZE_BITS))
  129. #define ASD_DEF_DL_TOGGLE 0x01
  130. struct asd_seq_data {
  131. spinlock_t pend_q_lock;
  132. u16 scbpro;
  133. int pending;
  134. struct list_head pend_q;
  135. int can_queue; /* per adapter */
  136. struct asd_dma_tok next_scb; /* next scb to be delivered to CSEQ */
  137. spinlock_t tc_index_lock;
  138. void **tc_index_array;
  139. void *tc_index_bitmap;
  140. int tc_index_bitmap_bits;
  141. struct tasklet_struct dl_tasklet;
  142. struct done_list_struct *dl; /* array of done list entries, equals */
  143. struct asd_dma_tok *actual_dl; /* actual_dl->vaddr */
  144. int dl_toggle;
  145. int dl_next;
  146. int num_edbs;
  147. struct asd_dma_tok **edb_arr;
  148. int num_escbs;
  149. struct asd_ascb **escb_arr; /* array of pointers to escbs */
  150. };
  151. /* This is an internal port structure. These are used to get accurate
  152. * phy_mask for updating DDB 0.
  153. */
  154. struct asd_port {
  155. u8 sas_addr[SAS_ADDR_SIZE];
  156. u8 attached_sas_addr[SAS_ADDR_SIZE];
  157. u32 phy_mask;
  158. int num_phys;
  159. };
  160. /* This is the Host Adapter structure. It describes the hardware
  161. * SAS adapter.
  162. */
  163. struct asd_ha_struct {
  164. struct pci_dev *pcidev;
  165. const char *name;
  166. struct sas_ha_struct sas_ha;
  167. u8 revision_id;
  168. int iospace;
  169. spinlock_t iolock;
  170. struct asd_ha_addrspace io_handle[2];
  171. struct hw_profile hw_prof;
  172. struct asd_phy phys[ASD_MAX_PHYS];
  173. spinlock_t asd_ports_lock;
  174. struct asd_port asd_ports[ASD_MAX_PHYS];
  175. struct asd_sas_port ports[ASD_MAX_PHYS];
  176. struct dma_pool *scb_pool;
  177. struct asd_seq_data seq; /* sequencer related */
  178. };
  179. /* ---------- Common macros ---------- */
  180. #define ASD_BUSADDR_LO(__dma_handle) ((u32)(__dma_handle))
  181. #define ASD_BUSADDR_HI(__dma_handle) (((sizeof(dma_addr_t))==8) \
  182. ? ((u32)((__dma_handle) >> 32)) \
  183. : ((u32)0))
  184. #define dev_to_asd_ha(__dev) pci_get_drvdata(to_pci_dev(__dev))
  185. #define SCB_SITE_VALID(__site_no) (((__site_no) & 0xF0FF) != 0x00FF \
  186. && ((__site_no) & 0xF0FF) > 0x001F)
  187. /* For each bit set in __lseq_mask, set __lseq to equal the bit
  188. * position of the set bit and execute the statement following.
  189. * __mc is the temporary mask, used as a mask "counter".
  190. */
  191. #define for_each_sequencer(__lseq_mask, __mc, __lseq) \
  192. for ((__mc)=(__lseq_mask),(__lseq)=0;(__mc)!=0;(__lseq++),(__mc)>>=1)\
  193. if (((__mc) & 1))
  194. #define for_each_phy(__lseq_mask, __mc, __lseq) \
  195. for ((__mc)=(__lseq_mask),(__lseq)=0;(__mc)!=0;(__lseq++),(__mc)>>=1)\
  196. if (((__mc) & 1))
  197. #define PHY_ENABLED(_HA, _I) ((_HA)->hw_prof.enabled_phys & (1<<(_I)))
  198. /* ---------- DMA allocs ---------- */
  199. static inline struct asd_dma_tok *asd_dmatok_alloc(gfp_t flags)
  200. {
  201. return kmem_cache_alloc(asd_dma_token_cache, flags);
  202. }
  203. static inline void asd_dmatok_free(struct asd_dma_tok *token)
  204. {
  205. kmem_cache_free(asd_dma_token_cache, token);
  206. }
  207. static inline struct asd_dma_tok *asd_alloc_coherent(struct asd_ha_struct *
  208. asd_ha, size_t size,
  209. gfp_t flags)
  210. {
  211. struct asd_dma_tok *token = asd_dmatok_alloc(flags);
  212. if (token) {
  213. token->size = size;
  214. token->vaddr = dma_alloc_coherent(&asd_ha->pcidev->dev,
  215. token->size,
  216. &token->dma_handle,
  217. flags);
  218. if (!token->vaddr) {
  219. asd_dmatok_free(token);
  220. token = NULL;
  221. }
  222. }
  223. return token;
  224. }
  225. static inline void asd_free_coherent(struct asd_ha_struct *asd_ha,
  226. struct asd_dma_tok *token)
  227. {
  228. if (token) {
  229. dma_free_coherent(&asd_ha->pcidev->dev, token->size,
  230. token->vaddr, token->dma_handle);
  231. asd_dmatok_free(token);
  232. }
  233. }
  234. static inline void asd_init_ascb(struct asd_ha_struct *asd_ha,
  235. struct asd_ascb *ascb)
  236. {
  237. INIT_LIST_HEAD(&ascb->list);
  238. ascb->scb = ascb->dma_scb.vaddr;
  239. ascb->ha = asd_ha;
  240. ascb->timer.function = NULL;
  241. init_timer(&ascb->timer);
  242. ascb->tc_index = -1;
  243. init_completion(&ascb->completion);
  244. }
  245. /* Must be called with the tc_index_lock held!
  246. */
  247. static inline void asd_tc_index_release(struct asd_seq_data *seq, int index)
  248. {
  249. seq->tc_index_array[index] = NULL;
  250. clear_bit(index, seq->tc_index_bitmap);
  251. }
  252. /* Must be called with the tc_index_lock held!
  253. */
  254. static inline int asd_tc_index_get(struct asd_seq_data *seq, void *ptr)
  255. {
  256. int index;
  257. index = find_first_zero_bit(seq->tc_index_bitmap,
  258. seq->tc_index_bitmap_bits);
  259. if (index == seq->tc_index_bitmap_bits)
  260. return -1;
  261. seq->tc_index_array[index] = ptr;
  262. set_bit(index, seq->tc_index_bitmap);
  263. return index;
  264. }
  265. /* Must be called with the tc_index_lock held!
  266. */
  267. static inline void *asd_tc_index_find(struct asd_seq_data *seq, int index)
  268. {
  269. return seq->tc_index_array[index];
  270. }
  271. /**
  272. * asd_ascb_free -- free a single aSCB after is has completed
  273. * @ascb: pointer to the aSCB of interest
  274. *
  275. * This frees an aSCB after it has been executed/completed by
  276. * the sequencer.
  277. */
  278. static inline void asd_ascb_free(struct asd_ascb *ascb)
  279. {
  280. if (ascb) {
  281. struct asd_ha_struct *asd_ha = ascb->ha;
  282. unsigned long flags;
  283. BUG_ON(!list_empty(&ascb->list));
  284. spin_lock_irqsave(&ascb->ha->seq.tc_index_lock, flags);
  285. asd_tc_index_release(&ascb->ha->seq, ascb->tc_index);
  286. spin_unlock_irqrestore(&ascb->ha->seq.tc_index_lock, flags);
  287. dma_pool_free(asd_ha->scb_pool, ascb->dma_scb.vaddr,
  288. ascb->dma_scb.dma_handle);
  289. kmem_cache_free(asd_ascb_cache, ascb);
  290. }
  291. }
  292. /**
  293. * asd_ascb_list_free -- free a list of ascbs
  294. * @ascb_list: a list of ascbs
  295. *
  296. * This function will free a list of ascbs allocated by asd_ascb_alloc_list.
  297. * It is used when say the scb queueing function returned QUEUE_FULL,
  298. * and we do not need the ascbs any more.
  299. */
  300. static inline void asd_ascb_free_list(struct asd_ascb *ascb_list)
  301. {
  302. LIST_HEAD(list);
  303. struct list_head *n, *pos;
  304. __list_add(&list, ascb_list->list.prev, &ascb_list->list);
  305. list_for_each_safe(pos, n, &list) {
  306. list_del_init(pos);
  307. asd_ascb_free(list_entry(pos, struct asd_ascb, list));
  308. }
  309. }
  310. /* ---------- Function declarations ---------- */
  311. int asd_init_hw(struct asd_ha_struct *asd_ha);
  312. irqreturn_t asd_hw_isr(int irq, void *dev_id);
  313. struct asd_ascb *asd_ascb_alloc_list(struct asd_ha_struct
  314. *asd_ha, int *num,
  315. gfp_t gfp_mask);
  316. int asd_post_ascb_list(struct asd_ha_struct *asd_ha, struct asd_ascb *ascb,
  317. int num);
  318. int asd_post_escb_list(struct asd_ha_struct *asd_ha, struct asd_ascb *ascb,
  319. int num);
  320. int asd_init_post_escbs(struct asd_ha_struct *asd_ha);
  321. void asd_build_control_phy(struct asd_ascb *ascb, int phy_id, u8 subfunc);
  322. void asd_control_led(struct asd_ha_struct *asd_ha, int phy_id, int op);
  323. void asd_turn_led(struct asd_ha_struct *asd_ha, int phy_id, int op);
  324. int asd_enable_phys(struct asd_ha_struct *asd_ha, const u8 phy_mask);
  325. void asd_build_initiate_link_adm_task(struct asd_ascb *ascb, int phy_id,
  326. u8 subfunc);
  327. void asd_ascb_timedout(unsigned long data);
  328. int asd_chip_hardrst(struct asd_ha_struct *asd_ha);
  329. #endif