a100u2w.c 36 KB

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  1. /*
  2. * Initio A100 device driver for Linux.
  3. *
  4. * Copyright (c) 1994-1998 Initio Corporation
  5. * Copyright (c) 2003-2004 Christoph Hellwig
  6. * All rights reserved.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2, or (at your option)
  11. * any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; see the file COPYING. If not, write to
  20. * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
  21. *
  22. * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  23. * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  24. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  25. * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
  26. * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  27. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  28. * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  29. * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  30. * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  31. * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  32. * SUCH DAMAGE.
  33. */
  34. /*
  35. * Revision History:
  36. * 07/02/98 hl - v.91n Initial drivers.
  37. * 09/14/98 hl - v1.01 Support new Kernel.
  38. * 09/22/98 hl - v1.01a Support reset.
  39. * 09/24/98 hl - v1.01b Fixed reset.
  40. * 10/05/98 hl - v1.02 split the source code and release.
  41. * 12/19/98 bv - v1.02a Use spinlocks for 2.1.95 and up
  42. * 01/31/99 bv - v1.02b Use mdelay instead of waitForPause
  43. * 08/08/99 bv - v1.02c Use waitForPause again.
  44. * 06/25/02 Doug Ledford <dledford@redhat.com> - v1.02d
  45. * - Remove limit on number of controllers
  46. * - Port to DMA mapping API
  47. * - Clean up interrupt handler registration
  48. * - Fix memory leaks
  49. * - Fix allocation of scsi host structs and private data
  50. * 11/18/03 Christoph Hellwig <hch@lst.de>
  51. * - Port to new probing API
  52. * - Fix some more leaks in init failure cases
  53. * 9/28/04 Christoph Hellwig <hch@lst.de>
  54. * - merge the two source files
  55. * - remove internal queueing code
  56. * 14/06/07 Alan Cox <alan@redhat.com>
  57. * - Grand cleanup and Linuxisation
  58. */
  59. #include <linux/module.h>
  60. #include <linux/errno.h>
  61. #include <linux/delay.h>
  62. #include <linux/interrupt.h>
  63. #include <linux/pci.h>
  64. #include <linux/init.h>
  65. #include <linux/blkdev.h>
  66. #include <linux/spinlock.h>
  67. #include <linux/kernel.h>
  68. #include <linux/string.h>
  69. #include <linux/ioport.h>
  70. #include <linux/slab.h>
  71. #include <linux/dma-mapping.h>
  72. #include <asm/io.h>
  73. #include <asm/irq.h>
  74. #include <scsi/scsi.h>
  75. #include <scsi/scsi_cmnd.h>
  76. #include <scsi/scsi_device.h>
  77. #include <scsi/scsi_host.h>
  78. #include "a100u2w.h"
  79. static struct orc_scb *__orc_alloc_scb(struct orc_host * host);
  80. static void inia100_scb_handler(struct orc_host *host, struct orc_scb *scb);
  81. static struct orc_nvram nvram, *nvramp = &nvram;
  82. static u8 default_nvram[64] =
  83. {
  84. /*----------header -------------*/
  85. 0x01, /* 0x00: Sub System Vendor ID 0 */
  86. 0x11, /* 0x01: Sub System Vendor ID 1 */
  87. 0x60, /* 0x02: Sub System ID 0 */
  88. 0x10, /* 0x03: Sub System ID 1 */
  89. 0x00, /* 0x04: SubClass */
  90. 0x01, /* 0x05: Vendor ID 0 */
  91. 0x11, /* 0x06: Vendor ID 1 */
  92. 0x60, /* 0x07: Device ID 0 */
  93. 0x10, /* 0x08: Device ID 1 */
  94. 0x00, /* 0x09: Reserved */
  95. 0x00, /* 0x0A: Reserved */
  96. 0x01, /* 0x0B: Revision of Data Structure */
  97. /* -- Host Adapter Structure --- */
  98. 0x01, /* 0x0C: Number Of SCSI Channel */
  99. 0x01, /* 0x0D: BIOS Configuration 1 */
  100. 0x00, /* 0x0E: BIOS Configuration 2 */
  101. 0x00, /* 0x0F: BIOS Configuration 3 */
  102. /* --- SCSI Channel 0 Configuration --- */
  103. 0x07, /* 0x10: H/A ID */
  104. 0x83, /* 0x11: Channel Configuration */
  105. 0x20, /* 0x12: MAX TAG per target */
  106. 0x0A, /* 0x13: SCSI Reset Recovering time */
  107. 0x00, /* 0x14: Channel Configuration4 */
  108. 0x00, /* 0x15: Channel Configuration5 */
  109. /* SCSI Channel 0 Target Configuration */
  110. /* 0x16-0x25 */
  111. 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8,
  112. 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8,
  113. /* --- SCSI Channel 1 Configuration --- */
  114. 0x07, /* 0x26: H/A ID */
  115. 0x83, /* 0x27: Channel Configuration */
  116. 0x20, /* 0x28: MAX TAG per target */
  117. 0x0A, /* 0x29: SCSI Reset Recovering time */
  118. 0x00, /* 0x2A: Channel Configuration4 */
  119. 0x00, /* 0x2B: Channel Configuration5 */
  120. /* SCSI Channel 1 Target Configuration */
  121. /* 0x2C-0x3B */
  122. 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8,
  123. 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8,
  124. 0x00, /* 0x3C: Reserved */
  125. 0x00, /* 0x3D: Reserved */
  126. 0x00, /* 0x3E: Reserved */
  127. 0x00 /* 0x3F: Checksum */
  128. };
  129. static u8 wait_chip_ready(struct orc_host * host)
  130. {
  131. int i;
  132. for (i = 0; i < 10; i++) { /* Wait 1 second for report timeout */
  133. if (inb(host->base + ORC_HCTRL) & HOSTSTOP) /* Wait HOSTSTOP set */
  134. return 1;
  135. mdelay(100);
  136. }
  137. return 0;
  138. }
  139. static u8 wait_firmware_ready(struct orc_host * host)
  140. {
  141. int i;
  142. for (i = 0; i < 10; i++) { /* Wait 1 second for report timeout */
  143. if (inb(host->base + ORC_HSTUS) & RREADY) /* Wait READY set */
  144. return 1;
  145. mdelay(100); /* wait 100ms before try again */
  146. }
  147. return 0;
  148. }
  149. /***************************************************************************/
  150. static u8 wait_scsi_reset_done(struct orc_host * host)
  151. {
  152. int i;
  153. for (i = 0; i < 10; i++) { /* Wait 1 second for report timeout */
  154. if (!(inb(host->base + ORC_HCTRL) & SCSIRST)) /* Wait SCSIRST done */
  155. return 1;
  156. mdelay(100); /* wait 100ms before try again */
  157. }
  158. return 0;
  159. }
  160. /***************************************************************************/
  161. static u8 wait_HDO_off(struct orc_host * host)
  162. {
  163. int i;
  164. for (i = 0; i < 10; i++) { /* Wait 1 second for report timeout */
  165. if (!(inb(host->base + ORC_HCTRL) & HDO)) /* Wait HDO off */
  166. return 1;
  167. mdelay(100); /* wait 100ms before try again */
  168. }
  169. return 0;
  170. }
  171. /***************************************************************************/
  172. static u8 wait_hdi_set(struct orc_host * host, u8 * data)
  173. {
  174. int i;
  175. for (i = 0; i < 10; i++) { /* Wait 1 second for report timeout */
  176. if ((*data = inb(host->base + ORC_HSTUS)) & HDI)
  177. return 1; /* Wait HDI set */
  178. mdelay(100); /* wait 100ms before try again */
  179. }
  180. return 0;
  181. }
  182. /***************************************************************************/
  183. static unsigned short orc_read_fwrev(struct orc_host * host)
  184. {
  185. u16 version;
  186. u8 data;
  187. outb(ORC_CMD_VERSION, host->base + ORC_HDATA);
  188. outb(HDO, host->base + ORC_HCTRL);
  189. if (wait_HDO_off(host) == 0) /* Wait HDO off */
  190. return 0;
  191. if (wait_hdi_set(host, &data) == 0) /* Wait HDI set */
  192. return 0;
  193. version = inb(host->base + ORC_HDATA);
  194. outb(data, host->base + ORC_HSTUS); /* Clear HDI */
  195. if (wait_hdi_set(host, &data) == 0) /* Wait HDI set */
  196. return 0;
  197. version |= inb(host->base + ORC_HDATA) << 8;
  198. outb(data, host->base + ORC_HSTUS); /* Clear HDI */
  199. return version;
  200. }
  201. /***************************************************************************/
  202. static u8 orc_nv_write(struct orc_host * host, unsigned char address, unsigned char value)
  203. {
  204. outb(ORC_CMD_SET_NVM, host->base + ORC_HDATA); /* Write command */
  205. outb(HDO, host->base + ORC_HCTRL);
  206. if (wait_HDO_off(host) == 0) /* Wait HDO off */
  207. return 0;
  208. outb(address, host->base + ORC_HDATA); /* Write address */
  209. outb(HDO, host->base + ORC_HCTRL);
  210. if (wait_HDO_off(host) == 0) /* Wait HDO off */
  211. return 0;
  212. outb(value, host->base + ORC_HDATA); /* Write value */
  213. outb(HDO, host->base + ORC_HCTRL);
  214. if (wait_HDO_off(host) == 0) /* Wait HDO off */
  215. return 0;
  216. return 1;
  217. }
  218. /***************************************************************************/
  219. static u8 orc_nv_read(struct orc_host * host, u8 address, u8 *ptr)
  220. {
  221. unsigned char data;
  222. outb(ORC_CMD_GET_NVM, host->base + ORC_HDATA); /* Write command */
  223. outb(HDO, host->base + ORC_HCTRL);
  224. if (wait_HDO_off(host) == 0) /* Wait HDO off */
  225. return 0;
  226. outb(address, host->base + ORC_HDATA); /* Write address */
  227. outb(HDO, host->base + ORC_HCTRL);
  228. if (wait_HDO_off(host) == 0) /* Wait HDO off */
  229. return 0;
  230. if (wait_hdi_set(host, &data) == 0) /* Wait HDI set */
  231. return 0;
  232. *ptr = inb(host->base + ORC_HDATA);
  233. outb(data, host->base + ORC_HSTUS); /* Clear HDI */
  234. return 1;
  235. }
  236. /**
  237. * orc_exec_sb - Queue an SCB with the HA
  238. * @host: host adapter the SCB belongs to
  239. * @scb: SCB to queue for execution
  240. */
  241. static void orc_exec_scb(struct orc_host * host, struct orc_scb * scb)
  242. {
  243. scb->status = ORCSCB_POST;
  244. outb(scb->scbidx, host->base + ORC_PQUEUE);
  245. }
  246. /**
  247. * se2_rd_all - read SCSI parameters from EEPROM
  248. * @host: Host whose EEPROM is being loaded
  249. *
  250. * Read SCSI H/A configuration parameters from serial EEPROM
  251. */
  252. static int se2_rd_all(struct orc_host * host)
  253. {
  254. int i;
  255. u8 *np, chksum = 0;
  256. np = (u8 *) nvramp;
  257. for (i = 0; i < 64; i++, np++) { /* <01> */
  258. if (orc_nv_read(host, (u8) i, np) == 0)
  259. return -1;
  260. }
  261. /*------ Is ckecksum ok ? ------*/
  262. np = (u8 *) nvramp;
  263. for (i = 0; i < 63; i++)
  264. chksum += *np++;
  265. if (nvramp->CheckSum != (u8) chksum)
  266. return -1;
  267. return 1;
  268. }
  269. /**
  270. * se2_update_all - update the EEPROM
  271. * @host: Host whose EEPROM is being updated
  272. *
  273. * Update changed bytes in the EEPROM image.
  274. */
  275. static void se2_update_all(struct orc_host * host)
  276. { /* setup default pattern */
  277. int i;
  278. u8 *np, *np1, chksum = 0;
  279. /* Calculate checksum first */
  280. np = (u8 *) default_nvram;
  281. for (i = 0; i < 63; i++)
  282. chksum += *np++;
  283. *np = chksum;
  284. np = (u8 *) default_nvram;
  285. np1 = (u8 *) nvramp;
  286. for (i = 0; i < 64; i++, np++, np1++) {
  287. if (*np != *np1)
  288. orc_nv_write(host, (u8) i, *np);
  289. }
  290. }
  291. /**
  292. * read_eeprom - load EEPROM
  293. * @host: Host EEPROM to read
  294. *
  295. * Read the EEPROM for a given host. If it is invalid or fails
  296. * the restore the defaults and use them.
  297. */
  298. static void read_eeprom(struct orc_host * host)
  299. {
  300. if (se2_rd_all(host) != 1) {
  301. se2_update_all(host); /* setup default pattern */
  302. se2_rd_all(host); /* load again */
  303. }
  304. }
  305. /**
  306. * orc_load_firmware - initialise firmware
  307. * @host: Host to set up
  308. *
  309. * Load the firmware from the EEPROM into controller SRAM. This
  310. * is basically a 4K block copy and then a 4K block read to check
  311. * correctness. The rest is convulted by the indirect interfaces
  312. * in the hardware
  313. */
  314. static u8 orc_load_firmware(struct orc_host * host)
  315. {
  316. u32 data32;
  317. u16 bios_addr;
  318. u16 i;
  319. u8 *data32_ptr, data;
  320. /* Set up the EEPROM for access */
  321. data = inb(host->base + ORC_GCFG);
  322. outb(data | EEPRG, host->base + ORC_GCFG); /* Enable EEPROM programming */
  323. outb(0x00, host->base + ORC_EBIOSADR2);
  324. outw(0x0000, host->base + ORC_EBIOSADR0);
  325. if (inb(host->base + ORC_EBIOSDATA) != 0x55) {
  326. outb(data, host->base + ORC_GCFG); /* Disable EEPROM programming */
  327. return 0;
  328. }
  329. outw(0x0001, host->base + ORC_EBIOSADR0);
  330. if (inb(host->base + ORC_EBIOSDATA) != 0xAA) {
  331. outb(data, host->base + ORC_GCFG); /* Disable EEPROM programming */
  332. return 0;
  333. }
  334. outb(PRGMRST | DOWNLOAD, host->base + ORC_RISCCTL); /* Enable SRAM programming */
  335. data32_ptr = (u8 *) & data32;
  336. data32 = 0; /* Initial FW address to 0 */
  337. outw(0x0010, host->base + ORC_EBIOSADR0);
  338. *data32_ptr = inb(host->base + ORC_EBIOSDATA); /* Read from BIOS */
  339. outw(0x0011, host->base + ORC_EBIOSADR0);
  340. *(data32_ptr + 1) = inb(host->base + ORC_EBIOSDATA); /* Read from BIOS */
  341. outw(0x0012, host->base + ORC_EBIOSADR0);
  342. *(data32_ptr + 2) = inb(host->base + ORC_EBIOSDATA); /* Read from BIOS */
  343. outw(*(data32_ptr + 2), host->base + ORC_EBIOSADR2);
  344. outl(data32, host->base + ORC_FWBASEADR); /* Write FW address */
  345. /* Copy the code from the BIOS to the SRAM */
  346. bios_addr = (u16) data32; /* FW code locate at BIOS address + ? */
  347. for (i = 0, data32_ptr = (u8 *) & data32; /* Download the code */
  348. i < 0x1000; /* Firmware code size = 4K */
  349. i++, bios_addr++) {
  350. outw(bios_addr, host->base + ORC_EBIOSADR0);
  351. *data32_ptr++ = inb(host->base + ORC_EBIOSDATA); /* Read from BIOS */
  352. if ((i % 4) == 3) {
  353. outl(data32, host->base + ORC_RISCRAM); /* Write every 4 bytes */
  354. data32_ptr = (u8 *) & data32;
  355. }
  356. }
  357. /* Go back and check they match */
  358. outb(PRGMRST | DOWNLOAD, host->base + ORC_RISCCTL); /* Reset program count 0 */
  359. bios_addr -= 0x1000; /* Reset the BIOS adddress */
  360. for (i = 0, data32_ptr = (u8 *) & data32; /* Check the code */
  361. i < 0x1000; /* Firmware code size = 4K */
  362. i++, bios_addr++) {
  363. outw(bios_addr, host->base + ORC_EBIOSADR0);
  364. *data32_ptr++ = inb(host->base + ORC_EBIOSDATA); /* Read from BIOS */
  365. if ((i % 4) == 3) {
  366. if (inl(host->base + ORC_RISCRAM) != data32) {
  367. outb(PRGMRST, host->base + ORC_RISCCTL); /* Reset program to 0 */
  368. outb(data, host->base + ORC_GCFG); /*Disable EEPROM programming */
  369. return 0;
  370. }
  371. data32_ptr = (u8 *) & data32;
  372. }
  373. }
  374. /* Success */
  375. outb(PRGMRST, host->base + ORC_RISCCTL); /* Reset program to 0 */
  376. outb(data, host->base + ORC_GCFG); /* Disable EEPROM programming */
  377. return 1;
  378. }
  379. /***************************************************************************/
  380. static void setup_SCBs(struct orc_host * host)
  381. {
  382. struct orc_scb *scb;
  383. int i;
  384. struct orc_extended_scb *escb;
  385. dma_addr_t escb_phys;
  386. /* Setup SCB base and SCB Size registers */
  387. outb(ORC_MAXQUEUE, host->base + ORC_SCBSIZE); /* Total number of SCBs */
  388. /* SCB base address 0 */
  389. outl(host->scb_phys, host->base + ORC_SCBBASE0);
  390. /* SCB base address 1 */
  391. outl(host->scb_phys, host->base + ORC_SCBBASE1);
  392. /* setup scatter list address with one buffer */
  393. scb = host->scb_virt;
  394. escb = host->escb_virt;
  395. for (i = 0; i < ORC_MAXQUEUE; i++) {
  396. escb_phys = (host->escb_phys + (sizeof(struct orc_extended_scb) * i));
  397. scb->sg_addr = (u32) escb_phys;
  398. scb->sense_addr = (u32) escb_phys;
  399. scb->escb = escb;
  400. scb->scbidx = i;
  401. scb++;
  402. escb++;
  403. }
  404. }
  405. /**
  406. * init_alloc_map - initialise allocation map
  407. * @host: host map to configure
  408. *
  409. * Initialise the allocation maps for this device. If the device
  410. * is not quiescent the caller must hold the allocation lock
  411. */
  412. static void init_alloc_map(struct orc_host * host)
  413. {
  414. u8 i, j;
  415. for (i = 0; i < MAX_CHANNELS; i++) {
  416. for (j = 0; j < 8; j++) {
  417. host->allocation_map[i][j] = 0xffffffff;
  418. }
  419. }
  420. }
  421. /**
  422. * init_orchid - initialise the host adapter
  423. * @host:host adapter to initialise
  424. *
  425. * Initialise the controller and if neccessary load the firmware.
  426. *
  427. * Returns -1 if the initialisation fails.
  428. */
  429. static int init_orchid(struct orc_host * host)
  430. {
  431. u8 *ptr;
  432. u16 revision;
  433. u8 i;
  434. init_alloc_map(host);
  435. outb(0xFF, host->base + ORC_GIMSK); /* Disable all interrupts */
  436. if (inb(host->base + ORC_HSTUS) & RREADY) { /* Orchid is ready */
  437. revision = orc_read_fwrev(host);
  438. if (revision == 0xFFFF) {
  439. outb(DEVRST, host->base + ORC_HCTRL); /* Reset Host Adapter */
  440. if (wait_chip_ready(host) == 0)
  441. return -1;
  442. orc_load_firmware(host); /* Download FW */
  443. setup_SCBs(host); /* Setup SCB base and SCB Size registers */
  444. outb(0x00, host->base + ORC_HCTRL); /* clear HOSTSTOP */
  445. if (wait_firmware_ready(host) == 0)
  446. return -1;
  447. /* Wait for firmware ready */
  448. } else {
  449. setup_SCBs(host); /* Setup SCB base and SCB Size registers */
  450. }
  451. } else { /* Orchid is not Ready */
  452. outb(DEVRST, host->base + ORC_HCTRL); /* Reset Host Adapter */
  453. if (wait_chip_ready(host) == 0)
  454. return -1;
  455. orc_load_firmware(host); /* Download FW */
  456. setup_SCBs(host); /* Setup SCB base and SCB Size registers */
  457. outb(HDO, host->base + ORC_HCTRL); /* Do Hardware Reset & */
  458. /* clear HOSTSTOP */
  459. if (wait_firmware_ready(host) == 0) /* Wait for firmware ready */
  460. return -1;
  461. }
  462. /* Load an EEProm copy into RAM */
  463. /* Assumes single threaded at this point */
  464. read_eeprom(host);
  465. if (nvramp->revision != 1)
  466. return -1;
  467. host->scsi_id = nvramp->scsi_id;
  468. host->BIOScfg = nvramp->BIOSConfig1;
  469. host->max_targets = MAX_TARGETS;
  470. ptr = (u8 *) & (nvramp->Target00Config);
  471. for (i = 0; i < 16; ptr++, i++) {
  472. host->target_flag[i] = *ptr;
  473. host->max_tags[i] = ORC_MAXTAGS;
  474. }
  475. if (nvramp->SCSI0Config & NCC_BUSRESET)
  476. host->flags |= HCF_SCSI_RESET;
  477. outb(0xFB, host->base + ORC_GIMSK); /* enable RP FIFO interrupt */
  478. return 0;
  479. }
  480. /**
  481. * orc_reset_scsi_bus - perform bus reset
  482. * @host: host being reset
  483. *
  484. * Perform a full bus reset on the adapter.
  485. */
  486. static int orc_reset_scsi_bus(struct orc_host * host)
  487. { /* I need Host Control Block Information */
  488. unsigned long flags;
  489. spin_lock_irqsave(&host->allocation_lock, flags);
  490. init_alloc_map(host);
  491. /* reset scsi bus */
  492. outb(SCSIRST, host->base + ORC_HCTRL);
  493. /* FIXME: We can spend up to a second with the lock held and
  494. interrupts off here */
  495. if (wait_scsi_reset_done(host) == 0) {
  496. spin_unlock_irqrestore(&host->allocation_lock, flags);
  497. return FAILED;
  498. } else {
  499. spin_unlock_irqrestore(&host->allocation_lock, flags);
  500. return SUCCESS;
  501. }
  502. }
  503. /**
  504. * orc_device_reset - device reset handler
  505. * @host: host to reset
  506. * @cmd: command causing the reset
  507. * @target; target device
  508. *
  509. * Reset registers, reset a hanging bus and kill active and disconnected
  510. * commands for target w/o soft reset
  511. */
  512. static int orc_device_reset(struct orc_host * host, struct scsi_cmnd *cmd, unsigned int target)
  513. { /* I need Host Control Block Information */
  514. struct orc_scb *scb;
  515. struct orc_extended_scb *escb;
  516. struct orc_scb *host_scb;
  517. u8 i;
  518. unsigned long flags;
  519. spin_lock_irqsave(&(host->allocation_lock), flags);
  520. scb = (struct orc_scb *) NULL;
  521. escb = (struct orc_extended_scb *) NULL;
  522. /* setup scatter list address with one buffer */
  523. host_scb = host->scb_virt;
  524. /* FIXME: is this safe if we then fail to issue the reset or race
  525. a completion ? */
  526. init_alloc_map(host);
  527. /* Find the scb corresponding to the command */
  528. for (i = 0; i < ORC_MAXQUEUE; i++) {
  529. escb = host_scb->escb;
  530. if (host_scb->status && escb->srb == cmd)
  531. break;
  532. host_scb++;
  533. }
  534. if (i == ORC_MAXQUEUE) {
  535. printk(KERN_ERR "Unable to Reset - No SCB Found\n");
  536. spin_unlock_irqrestore(&(host->allocation_lock), flags);
  537. return FAILED;
  538. }
  539. /* Allocate a new SCB for the reset command to the firmware */
  540. if ((scb = __orc_alloc_scb(host)) == NULL) {
  541. /* Can't happen.. */
  542. spin_unlock_irqrestore(&(host->allocation_lock), flags);
  543. return FAILED;
  544. }
  545. /* Reset device is handled by the firmare, we fill in an SCB and
  546. fire it at the controller, it does the rest */
  547. scb->opcode = ORC_BUSDEVRST;
  548. scb->target = target;
  549. scb->hastat = 0;
  550. scb->tastat = 0;
  551. scb->status = 0x0;
  552. scb->link = 0xFF;
  553. scb->reserved0 = 0;
  554. scb->reserved1 = 0;
  555. scb->xferlen = 0;
  556. scb->sg_len = 0;
  557. escb->srb = NULL;
  558. escb->srb = cmd;
  559. orc_exec_scb(host, scb); /* Start execute SCB */
  560. spin_unlock_irqrestore(&host->allocation_lock, flags);
  561. return SUCCESS;
  562. }
  563. /**
  564. * __orc_alloc_scb - allocate an SCB
  565. * @host: host to allocate from
  566. *
  567. * Allocate an SCB and return a pointer to the SCB object. NULL
  568. * is returned if no SCB is free. The caller must already hold
  569. * the allocator lock at this point.
  570. */
  571. static struct orc_scb *__orc_alloc_scb(struct orc_host * host)
  572. {
  573. u8 channel;
  574. unsigned long idx;
  575. u8 index;
  576. u8 i;
  577. channel = host->index;
  578. for (i = 0; i < 8; i++) {
  579. for (index = 0; index < 32; index++) {
  580. if ((host->allocation_map[channel][i] >> index) & 0x01) {
  581. host->allocation_map[channel][i] &= ~(1 << index);
  582. break;
  583. }
  584. }
  585. idx = index + 32 * i;
  586. /* Translate the index to a structure instance */
  587. return (struct orc_scb *) ((unsigned long) host->scb_virt + (idx * sizeof(struct orc_scb)));
  588. }
  589. return NULL;
  590. }
  591. /**
  592. * orc_alloc_scb - allocate an SCB
  593. * @host: host to allocate from
  594. *
  595. * Allocate an SCB and return a pointer to the SCB object. NULL
  596. * is returned if no SCB is free.
  597. */
  598. static struct orc_scb *orc_alloc_scb(struct orc_host * host)
  599. {
  600. struct orc_scb *scb;
  601. unsigned long flags;
  602. spin_lock_irqsave(&host->allocation_lock, flags);
  603. scb = __orc_alloc_scb(host);
  604. spin_unlock_irqrestore(&host->allocation_lock, flags);
  605. return scb;
  606. }
  607. /**
  608. * orc_release_scb - release an SCB
  609. * @host: host owning the SCB
  610. * @scb: SCB that is now free
  611. *
  612. * Called to return a completed SCB to the allocation pool. Before
  613. * calling the SCB must be out of use on both the host and the HA.
  614. */
  615. static void orc_release_scb(struct orc_host *host, struct orc_scb *scb)
  616. {
  617. unsigned long flags;
  618. u8 index, i, channel;
  619. spin_lock_irqsave(&(host->allocation_lock), flags);
  620. channel = host->index; /* Channel */
  621. index = scb->scbidx;
  622. i = index / 32;
  623. index %= 32;
  624. host->allocation_map[channel][i] |= (1 << index);
  625. spin_unlock_irqrestore(&(host->allocation_lock), flags);
  626. }
  627. /**
  628. * orchid_abort_scb - abort a command
  629. *
  630. * Abort a queued command that has been passed to the firmware layer
  631. * if possible. This is all handled by the firmware. We aks the firmware
  632. * and it either aborts the command or fails
  633. */
  634. static int orchid_abort_scb(struct orc_host * host, struct orc_scb * scb)
  635. {
  636. unsigned char data, status;
  637. outb(ORC_CMD_ABORT_SCB, host->base + ORC_HDATA); /* Write command */
  638. outb(HDO, host->base + ORC_HCTRL);
  639. if (wait_HDO_off(host) == 0) /* Wait HDO off */
  640. return 0;
  641. outb(scb->scbidx, host->base + ORC_HDATA); /* Write address */
  642. outb(HDO, host->base + ORC_HCTRL);
  643. if (wait_HDO_off(host) == 0) /* Wait HDO off */
  644. return 0;
  645. if (wait_hdi_set(host, &data) == 0) /* Wait HDI set */
  646. return 0;
  647. status = inb(host->base + ORC_HDATA);
  648. outb(data, host->base + ORC_HSTUS); /* Clear HDI */
  649. if (status == 1) /* 0 - Successfully */
  650. return 0; /* 1 - Fail */
  651. return 1;
  652. }
  653. static int inia100_abort_cmd(struct orc_host * host, struct scsi_cmnd *cmd)
  654. {
  655. struct orc_extended_scb *escb;
  656. struct orc_scb *scb;
  657. u8 i;
  658. unsigned long flags;
  659. spin_lock_irqsave(&(host->allocation_lock), flags);
  660. scb = host->scb_virt;
  661. /* Walk the queue until we find the SCB that belongs to the command
  662. block. This isn't a performance critical path so a walk in the park
  663. here does no harm */
  664. for (i = 0; i < ORC_MAXQUEUE; i++, scb++) {
  665. escb = scb->escb;
  666. if (scb->status && escb->srb == cmd) {
  667. if (scb->tag_msg == 0) {
  668. goto out;
  669. } else {
  670. /* Issue an ABORT to the firmware */
  671. if (orchid_abort_scb(host, scb)) {
  672. escb->srb = NULL;
  673. spin_unlock_irqrestore(&host->allocation_lock, flags);
  674. return SUCCESS;
  675. } else
  676. goto out;
  677. }
  678. }
  679. }
  680. out:
  681. spin_unlock_irqrestore(&host->allocation_lock, flags);
  682. return FAILED;
  683. }
  684. /**
  685. * orc_interrupt - IRQ processing
  686. * @host: Host causing the interrupt
  687. *
  688. * This function is called from the IRQ handler and protected
  689. * by the host lock. While the controller reports that there are
  690. * scb's for processing we pull them off the controller, turn the
  691. * index into a host address pointer to the scb and call the scb
  692. * handler.
  693. *
  694. * Returns IRQ_HANDLED if any SCBs were processed, IRQ_NONE otherwise
  695. */
  696. static irqreturn_t orc_interrupt(struct orc_host * host)
  697. {
  698. u8 scb_index;
  699. struct orc_scb *scb;
  700. /* Check if we have an SCB queued for servicing */
  701. if (inb(host->base + ORC_RQUEUECNT) == 0)
  702. return IRQ_NONE;
  703. do {
  704. /* Get the SCB index of the SCB to service */
  705. scb_index = inb(host->base + ORC_RQUEUE);
  706. /* Translate it back to a host pointer */
  707. scb = (struct orc_scb *) ((unsigned long) host->scb_virt + (unsigned long) (sizeof(struct orc_scb) * scb_index));
  708. scb->status = 0x0;
  709. /* Process the SCB */
  710. inia100_scb_handler(host, scb);
  711. } while (inb(host->base + ORC_RQUEUECNT));
  712. return IRQ_HANDLED;
  713. } /* End of I1060Interrupt() */
  714. /**
  715. * inia100_build_scb - build SCB
  716. * @host: host owing the control block
  717. * @scb: control block to use
  718. * @cmd: Mid layer command
  719. *
  720. * Build a host adapter control block from the SCSI mid layer command
  721. */
  722. static void inia100_build_scb(struct orc_host * host, struct orc_scb * scb, struct scsi_cmnd * cmd)
  723. { /* Create corresponding SCB */
  724. struct scatterlist *sg;
  725. struct orc_sgent *sgent; /* Pointer to SG list */
  726. int i, count_sg;
  727. struct orc_extended_scb *escb;
  728. /* Links between the escb, scb and Linux scsi midlayer cmd */
  729. escb = scb->escb;
  730. escb->srb = cmd;
  731. sgent = NULL;
  732. /* Set up the SCB to do a SCSI command block */
  733. scb->opcode = ORC_EXECSCSI;
  734. scb->flags = SCF_NO_DCHK; /* Clear done bit */
  735. scb->target = cmd->device->id;
  736. scb->lun = cmd->device->lun;
  737. scb->reserved0 = 0;
  738. scb->reserved1 = 0;
  739. scb->sg_len = 0;
  740. scb->xferlen = (u32) scsi_bufflen(cmd);
  741. sgent = (struct orc_sgent *) & escb->sglist[0];
  742. count_sg = scsi_dma_map(cmd);
  743. BUG_ON(count_sg < 0);
  744. /* Build the scatter gather lists */
  745. if (count_sg) {
  746. scb->sg_len = (u32) (count_sg * 8);
  747. scsi_for_each_sg(cmd, sg, count_sg, i) {
  748. sgent->base = (u32) sg_dma_address(sg);
  749. sgent->length = (u32) sg_dma_len(sg);
  750. sgent++;
  751. }
  752. } else {
  753. scb->sg_len = 0;
  754. sgent->base = 0;
  755. sgent->length = 0;
  756. }
  757. scb->sg_addr = (u32) scb->sense_addr;
  758. scb->hastat = 0;
  759. scb->tastat = 0;
  760. scb->link = 0xFF;
  761. scb->sense_len = SENSE_SIZE;
  762. scb->cdb_len = cmd->cmd_len;
  763. if (scb->cdb_len >= IMAX_CDB) {
  764. printk("max cdb length= %x\b", cmd->cmd_len);
  765. scb->cdb_len = IMAX_CDB;
  766. }
  767. scb->ident = cmd->device->lun | DISC_ALLOW;
  768. if (cmd->device->tagged_supported) { /* Tag Support */
  769. scb->tag_msg = SIMPLE_QUEUE_TAG; /* Do simple tag only */
  770. } else {
  771. scb->tag_msg = 0; /* No tag support */
  772. }
  773. memcpy(&scb->cdb[0], &cmd->cmnd, scb->cdb_len);
  774. }
  775. /**
  776. * inia100_queue - queue command with host
  777. * @cmd: Command block
  778. * @done: Completion function
  779. *
  780. * Called by the mid layer to queue a command. Process the command
  781. * block, build the host specific scb structures and if there is room
  782. * queue the command down to the controller
  783. */
  784. static int inia100_queue(struct scsi_cmnd * cmd, void (*done) (struct scsi_cmnd *))
  785. {
  786. struct orc_scb *scb;
  787. struct orc_host *host; /* Point to Host adapter control block */
  788. host = (struct orc_host *) cmd->device->host->hostdata;
  789. cmd->scsi_done = done;
  790. /* Get free SCSI control block */
  791. if ((scb = orc_alloc_scb(host)) == NULL)
  792. return SCSI_MLQUEUE_HOST_BUSY;
  793. inia100_build_scb(host, scb, cmd);
  794. orc_exec_scb(host, scb); /* Start execute SCB */
  795. return 0;
  796. }
  797. /*****************************************************************************
  798. Function name : inia100_abort
  799. Description : Abort a queued command.
  800. (commands that are on the bus can't be aborted easily)
  801. Input : host - Pointer to host adapter structure
  802. Output : None.
  803. Return : pSRB - Pointer to SCSI request block.
  804. *****************************************************************************/
  805. static int inia100_abort(struct scsi_cmnd * cmd)
  806. {
  807. struct orc_host *host;
  808. host = (struct orc_host *) cmd->device->host->hostdata;
  809. return inia100_abort_cmd(host, cmd);
  810. }
  811. /*****************************************************************************
  812. Function name : inia100_reset
  813. Description : Reset registers, reset a hanging bus and
  814. kill active and disconnected commands for target w/o soft reset
  815. Input : host - Pointer to host adapter structure
  816. Output : None.
  817. Return : pSRB - Pointer to SCSI request block.
  818. *****************************************************************************/
  819. static int inia100_bus_reset(struct scsi_cmnd * cmd)
  820. { /* I need Host Control Block Information */
  821. struct orc_host *host;
  822. host = (struct orc_host *) cmd->device->host->hostdata;
  823. return orc_reset_scsi_bus(host);
  824. }
  825. /*****************************************************************************
  826. Function name : inia100_device_reset
  827. Description : Reset the device
  828. Input : host - Pointer to host adapter structure
  829. Output : None.
  830. Return : pSRB - Pointer to SCSI request block.
  831. *****************************************************************************/
  832. static int inia100_device_reset(struct scsi_cmnd * cmd)
  833. { /* I need Host Control Block Information */
  834. struct orc_host *host;
  835. host = (struct orc_host *) cmd->device->host->hostdata;
  836. return orc_device_reset(host, cmd, scmd_id(cmd));
  837. }
  838. /**
  839. * inia100_scb_handler - interrupt callback
  840. * @host: Host causing the interrupt
  841. * @scb: SCB the controller returned as needing processing
  842. *
  843. * Perform completion processing on a control block. Do the conversions
  844. * from host to SCSI midlayer error coding, save any sense data and
  845. * the complete with the midlayer and recycle the scb.
  846. */
  847. static void inia100_scb_handler(struct orc_host *host, struct orc_scb *scb)
  848. {
  849. struct scsi_cmnd *cmd; /* Pointer to SCSI request block */
  850. struct orc_extended_scb *escb;
  851. escb = scb->escb;
  852. if ((cmd = (struct scsi_cmnd *) escb->srb) == NULL) {
  853. printk(KERN_ERR "inia100_scb_handler: SRB pointer is empty\n");
  854. orc_release_scb(host, scb); /* Release SCB for current channel */
  855. return;
  856. }
  857. escb->srb = NULL;
  858. switch (scb->hastat) {
  859. case 0x0:
  860. case 0xa: /* Linked command complete without error and linked normally */
  861. case 0xb: /* Linked command complete without error interrupt generated */
  862. scb->hastat = 0;
  863. break;
  864. case 0x11: /* Selection time out-The initiator selection or target
  865. reselection was not complete within the SCSI Time out period */
  866. scb->hastat = DID_TIME_OUT;
  867. break;
  868. case 0x14: /* Target bus phase sequence failure-An invalid bus phase or bus
  869. phase sequence was requested by the target. The host adapter
  870. will generate a SCSI Reset Condition, notifying the host with
  871. a SCRD interrupt */
  872. scb->hastat = DID_RESET;
  873. break;
  874. case 0x1a: /* SCB Aborted. 07/21/98 */
  875. scb->hastat = DID_ABORT;
  876. break;
  877. case 0x12: /* Data overrun/underrun-The target attempted to transfer more data
  878. than was allocated by the Data Length field or the sum of the
  879. Scatter / Gather Data Length fields. */
  880. case 0x13: /* Unexpected bus free-The target dropped the SCSI BSY at an unexpected time. */
  881. case 0x16: /* Invalid CCB Operation Code-The first byte of the CCB was invalid. */
  882. default:
  883. printk(KERN_DEBUG "inia100: %x %x\n", scb->hastat, scb->tastat);
  884. scb->hastat = DID_ERROR; /* Couldn't find any better */
  885. break;
  886. }
  887. if (scb->tastat == 2) { /* Check condition */
  888. memcpy((unsigned char *) &cmd->sense_buffer[0],
  889. (unsigned char *) &escb->sglist[0], SENSE_SIZE);
  890. }
  891. cmd->result = scb->tastat | (scb->hastat << 16);
  892. scsi_dma_unmap(cmd);
  893. cmd->scsi_done(cmd); /* Notify system DONE */
  894. orc_release_scb(host, scb); /* Release SCB for current channel */
  895. }
  896. /**
  897. * inia100_intr - interrupt handler
  898. * @irqno: Interrupt value
  899. * @devid: Host adapter
  900. *
  901. * Entry point for IRQ handling. All the real work is performed
  902. * by orc_interrupt.
  903. */
  904. static irqreturn_t inia100_intr(int irqno, void *devid)
  905. {
  906. struct Scsi_Host *shost = (struct Scsi_Host *)devid;
  907. struct orc_host *host = (struct orc_host *)shost->hostdata;
  908. unsigned long flags;
  909. irqreturn_t res;
  910. spin_lock_irqsave(shost->host_lock, flags);
  911. res = orc_interrupt(host);
  912. spin_unlock_irqrestore(shost->host_lock, flags);
  913. return res;
  914. }
  915. static struct scsi_host_template inia100_template = {
  916. .proc_name = "inia100",
  917. .name = inia100_REVID,
  918. .queuecommand = inia100_queue,
  919. .eh_abort_handler = inia100_abort,
  920. .eh_bus_reset_handler = inia100_bus_reset,
  921. .eh_device_reset_handler = inia100_device_reset,
  922. .can_queue = 1,
  923. .this_id = 1,
  924. .sg_tablesize = SG_ALL,
  925. .cmd_per_lun = 1,
  926. .use_clustering = ENABLE_CLUSTERING,
  927. .use_sg_chaining = ENABLE_SG_CHAINING,
  928. };
  929. static int __devinit inia100_probe_one(struct pci_dev *pdev,
  930. const struct pci_device_id *id)
  931. {
  932. struct Scsi_Host *shost;
  933. struct orc_host *host;
  934. unsigned long port, bios;
  935. int error = -ENODEV;
  936. u32 sz;
  937. unsigned long biosaddr;
  938. char *bios_phys;
  939. if (pci_enable_device(pdev))
  940. goto out;
  941. if (pci_set_dma_mask(pdev, DMA_32BIT_MASK)) {
  942. printk(KERN_WARNING "Unable to set 32bit DMA "
  943. "on inia100 adapter, ignoring.\n");
  944. goto out_disable_device;
  945. }
  946. pci_set_master(pdev);
  947. port = pci_resource_start(pdev, 0);
  948. if (!request_region(port, 256, "inia100")) {
  949. printk(KERN_WARNING "inia100: io port 0x%lx, is busy.\n", port);
  950. goto out_disable_device;
  951. }
  952. /* <02> read from base address + 0x50 offset to get the bios value. */
  953. bios = inw(port + 0x50);
  954. shost = scsi_host_alloc(&inia100_template, sizeof(struct orc_host));
  955. if (!shost)
  956. goto out_release_region;
  957. host = (struct orc_host *)shost->hostdata;
  958. host->pdev = pdev;
  959. host->base = port;
  960. host->BIOScfg = bios;
  961. spin_lock_init(&host->allocation_lock);
  962. /* Get total memory needed for SCB */
  963. sz = ORC_MAXQUEUE * sizeof(struct orc_scb);
  964. host->scb_virt = pci_alloc_consistent(pdev, sz,
  965. &host->scb_phys);
  966. if (!host->scb_virt) {
  967. printk("inia100: SCB memory allocation error\n");
  968. goto out_host_put;
  969. }
  970. memset(host->scb_virt, 0, sz);
  971. /* Get total memory needed for ESCB */
  972. sz = ORC_MAXQUEUE * sizeof(struct orc_extended_scb);
  973. host->escb_virt = pci_alloc_consistent(pdev, sz,
  974. &host->escb_phys);
  975. if (!host->escb_virt) {
  976. printk("inia100: ESCB memory allocation error\n");
  977. goto out_free_scb_array;
  978. }
  979. memset(host->escb_virt, 0, sz);
  980. biosaddr = host->BIOScfg;
  981. biosaddr = (biosaddr << 4);
  982. bios_phys = phys_to_virt(biosaddr);
  983. if (init_orchid(host)) { /* Initialize orchid chip */
  984. printk("inia100: initial orchid fail!!\n");
  985. goto out_free_escb_array;
  986. }
  987. shost->io_port = host->base;
  988. shost->n_io_port = 0xff;
  989. shost->can_queue = ORC_MAXQUEUE;
  990. shost->unique_id = shost->io_port;
  991. shost->max_id = host->max_targets;
  992. shost->max_lun = 16;
  993. shost->irq = pdev->irq;
  994. shost->this_id = host->scsi_id; /* Assign HCS index */
  995. shost->sg_tablesize = TOTAL_SG_ENTRY;
  996. /* Initial orc chip */
  997. error = request_irq(pdev->irq, inia100_intr, IRQF_SHARED,
  998. "inia100", shost);
  999. if (error < 0) {
  1000. printk(KERN_WARNING "inia100: unable to get irq %d\n",
  1001. pdev->irq);
  1002. goto out_free_escb_array;
  1003. }
  1004. pci_set_drvdata(pdev, shost);
  1005. error = scsi_add_host(shost, &pdev->dev);
  1006. if (error)
  1007. goto out_free_irq;
  1008. scsi_scan_host(shost);
  1009. return 0;
  1010. out_free_irq:
  1011. free_irq(shost->irq, shost);
  1012. out_free_escb_array:
  1013. pci_free_consistent(pdev, ORC_MAXQUEUE * sizeof(struct orc_extended_scb),
  1014. host->escb_virt, host->escb_phys);
  1015. out_free_scb_array:
  1016. pci_free_consistent(pdev, ORC_MAXQUEUE * sizeof(struct orc_scb),
  1017. host->scb_virt, host->scb_phys);
  1018. out_host_put:
  1019. scsi_host_put(shost);
  1020. out_release_region:
  1021. release_region(port, 256);
  1022. out_disable_device:
  1023. pci_disable_device(pdev);
  1024. out:
  1025. return error;
  1026. }
  1027. static void __devexit inia100_remove_one(struct pci_dev *pdev)
  1028. {
  1029. struct Scsi_Host *shost = pci_get_drvdata(pdev);
  1030. struct orc_host *host = (struct orc_host *)shost->hostdata;
  1031. scsi_remove_host(shost);
  1032. free_irq(shost->irq, shost);
  1033. pci_free_consistent(pdev, ORC_MAXQUEUE * sizeof(struct orc_extended_scb),
  1034. host->escb_virt, host->escb_phys);
  1035. pci_free_consistent(pdev, ORC_MAXQUEUE * sizeof(struct orc_scb),
  1036. host->scb_virt, host->scb_phys);
  1037. release_region(shost->io_port, 256);
  1038. scsi_host_put(shost);
  1039. }
  1040. static struct pci_device_id inia100_pci_tbl[] = {
  1041. {PCI_VENDOR_ID_INIT, 0x1060, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  1042. {0,}
  1043. };
  1044. MODULE_DEVICE_TABLE(pci, inia100_pci_tbl);
  1045. static struct pci_driver inia100_pci_driver = {
  1046. .name = "inia100",
  1047. .id_table = inia100_pci_tbl,
  1048. .probe = inia100_probe_one,
  1049. .remove = __devexit_p(inia100_remove_one),
  1050. };
  1051. static int __init inia100_init(void)
  1052. {
  1053. return pci_register_driver(&inia100_pci_driver);
  1054. }
  1055. static void __exit inia100_exit(void)
  1056. {
  1057. pci_unregister_driver(&inia100_pci_driver);
  1058. }
  1059. MODULE_DESCRIPTION("Initio A100U2W SCSI driver");
  1060. MODULE_AUTHOR("Initio Corporation");
  1061. MODULE_LICENSE("Dual BSD/GPL");
  1062. module_init(inia100_init);
  1063. module_exit(inia100_exit);