rtc-x1205.c 15 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625
  1. /*
  2. * An i2c driver for the Xicor/Intersil X1205 RTC
  3. * Copyright 2004 Karen Spearel
  4. * Copyright 2005 Alessandro Zummo
  5. *
  6. * please send all reports to:
  7. * Karen Spearel <kas111 at gmail dot com>
  8. * Alessandro Zummo <a.zummo@towertech.it>
  9. *
  10. * based on a lot of other RTC drivers.
  11. *
  12. * Information and datasheet:
  13. * http://www.intersil.com/cda/deviceinfo/0,1477,X1205,00.html
  14. *
  15. * This program is free software; you can redistribute it and/or modify
  16. * it under the terms of the GNU General Public License version 2 as
  17. * published by the Free Software Foundation.
  18. */
  19. #include <linux/i2c.h>
  20. #include <linux/bcd.h>
  21. #include <linux/rtc.h>
  22. #include <linux/delay.h>
  23. #define DRV_VERSION "1.0.7"
  24. /* Addresses to scan: none. This chip is located at
  25. * 0x6f and uses a two bytes register addressing.
  26. * Two bytes need to be written to read a single register,
  27. * while most other chips just require one and take the second
  28. * one as the data to be written. To prevent corrupting
  29. * unknown chips, the user must explicitly set the probe parameter.
  30. */
  31. static unsigned short normal_i2c[] = { I2C_CLIENT_END };
  32. /* Insmod parameters */
  33. I2C_CLIENT_INSMOD;
  34. /* offsets into CCR area */
  35. #define CCR_SEC 0
  36. #define CCR_MIN 1
  37. #define CCR_HOUR 2
  38. #define CCR_MDAY 3
  39. #define CCR_MONTH 4
  40. #define CCR_YEAR 5
  41. #define CCR_WDAY 6
  42. #define CCR_Y2K 7
  43. #define X1205_REG_SR 0x3F /* status register */
  44. #define X1205_REG_Y2K 0x37
  45. #define X1205_REG_DW 0x36
  46. #define X1205_REG_YR 0x35
  47. #define X1205_REG_MO 0x34
  48. #define X1205_REG_DT 0x33
  49. #define X1205_REG_HR 0x32
  50. #define X1205_REG_MN 0x31
  51. #define X1205_REG_SC 0x30
  52. #define X1205_REG_DTR 0x13
  53. #define X1205_REG_ATR 0x12
  54. #define X1205_REG_INT 0x11
  55. #define X1205_REG_0 0x10
  56. #define X1205_REG_Y2K1 0x0F
  57. #define X1205_REG_DWA1 0x0E
  58. #define X1205_REG_YRA1 0x0D
  59. #define X1205_REG_MOA1 0x0C
  60. #define X1205_REG_DTA1 0x0B
  61. #define X1205_REG_HRA1 0x0A
  62. #define X1205_REG_MNA1 0x09
  63. #define X1205_REG_SCA1 0x08
  64. #define X1205_REG_Y2K0 0x07
  65. #define X1205_REG_DWA0 0x06
  66. #define X1205_REG_YRA0 0x05
  67. #define X1205_REG_MOA0 0x04
  68. #define X1205_REG_DTA0 0x03
  69. #define X1205_REG_HRA0 0x02
  70. #define X1205_REG_MNA0 0x01
  71. #define X1205_REG_SCA0 0x00
  72. #define X1205_CCR_BASE 0x30 /* Base address of CCR */
  73. #define X1205_ALM0_BASE 0x00 /* Base address of ALARM0 */
  74. #define X1205_SR_RTCF 0x01 /* Clock failure */
  75. #define X1205_SR_WEL 0x02 /* Write Enable Latch */
  76. #define X1205_SR_RWEL 0x04 /* Register Write Enable */
  77. #define X1205_DTR_DTR0 0x01
  78. #define X1205_DTR_DTR1 0x02
  79. #define X1205_DTR_DTR2 0x04
  80. #define X1205_HR_MIL 0x80 /* Set in ccr.hour for 24 hr mode */
  81. /* Prototypes */
  82. static int x1205_attach(struct i2c_adapter *adapter);
  83. static int x1205_detach(struct i2c_client *client);
  84. static int x1205_probe(struct i2c_adapter *adapter, int address, int kind);
  85. static struct i2c_driver x1205_driver = {
  86. .driver = {
  87. .name = "x1205",
  88. },
  89. .id = I2C_DRIVERID_X1205,
  90. .attach_adapter = &x1205_attach,
  91. .detach_client = &x1205_detach,
  92. };
  93. /*
  94. * In the routines that deal directly with the x1205 hardware, we use
  95. * rtc_time -- month 0-11, hour 0-23, yr = calendar year-epoch
  96. * Epoch is initialized as 2000. Time is set to UTC.
  97. */
  98. static int x1205_get_datetime(struct i2c_client *client, struct rtc_time *tm,
  99. unsigned char reg_base)
  100. {
  101. unsigned char dt_addr[2] = { 0, reg_base };
  102. unsigned char buf[8];
  103. struct i2c_msg msgs[] = {
  104. { client->addr, 0, 2, dt_addr }, /* setup read ptr */
  105. { client->addr, I2C_M_RD, 8, buf }, /* read date */
  106. };
  107. /* read date registers */
  108. if ((i2c_transfer(client->adapter, &msgs[0], 2)) != 2) {
  109. dev_err(&client->dev, "%s: read error\n", __FUNCTION__);
  110. return -EIO;
  111. }
  112. dev_dbg(&client->dev,
  113. "%s: raw read data - sec=%02x, min=%02x, hr=%02x, "
  114. "mday=%02x, mon=%02x, year=%02x, wday=%02x, y2k=%02x\n",
  115. __FUNCTION__,
  116. buf[0], buf[1], buf[2], buf[3],
  117. buf[4], buf[5], buf[6], buf[7]);
  118. tm->tm_sec = BCD2BIN(buf[CCR_SEC]);
  119. tm->tm_min = BCD2BIN(buf[CCR_MIN]);
  120. tm->tm_hour = BCD2BIN(buf[CCR_HOUR] & 0x3F); /* hr is 0-23 */
  121. tm->tm_mday = BCD2BIN(buf[CCR_MDAY]);
  122. tm->tm_mon = BCD2BIN(buf[CCR_MONTH]) - 1; /* mon is 0-11 */
  123. tm->tm_year = BCD2BIN(buf[CCR_YEAR])
  124. + (BCD2BIN(buf[CCR_Y2K]) * 100) - 1900;
  125. tm->tm_wday = buf[CCR_WDAY];
  126. dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
  127. "mday=%d, mon=%d, year=%d, wday=%d\n",
  128. __FUNCTION__,
  129. tm->tm_sec, tm->tm_min, tm->tm_hour,
  130. tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
  131. return 0;
  132. }
  133. static int x1205_get_status(struct i2c_client *client, unsigned char *sr)
  134. {
  135. static unsigned char sr_addr[2] = { 0, X1205_REG_SR };
  136. struct i2c_msg msgs[] = {
  137. { client->addr, 0, 2, sr_addr }, /* setup read ptr */
  138. { client->addr, I2C_M_RD, 1, sr }, /* read status */
  139. };
  140. /* read status register */
  141. if ((i2c_transfer(client->adapter, &msgs[0], 2)) != 2) {
  142. dev_err(&client->dev, "%s: read error\n", __FUNCTION__);
  143. return -EIO;
  144. }
  145. return 0;
  146. }
  147. static int x1205_set_datetime(struct i2c_client *client, struct rtc_time *tm,
  148. int datetoo, u8 reg_base)
  149. {
  150. int i, xfer;
  151. unsigned char buf[8];
  152. static const unsigned char wel[3] = { 0, X1205_REG_SR,
  153. X1205_SR_WEL };
  154. static const unsigned char rwel[3] = { 0, X1205_REG_SR,
  155. X1205_SR_WEL | X1205_SR_RWEL };
  156. static const unsigned char diswe[3] = { 0, X1205_REG_SR, 0 };
  157. dev_dbg(&client->dev,
  158. "%s: secs=%d, mins=%d, hours=%d\n",
  159. __FUNCTION__,
  160. tm->tm_sec, tm->tm_min, tm->tm_hour);
  161. buf[CCR_SEC] = BIN2BCD(tm->tm_sec);
  162. buf[CCR_MIN] = BIN2BCD(tm->tm_min);
  163. /* set hour and 24hr bit */
  164. buf[CCR_HOUR] = BIN2BCD(tm->tm_hour) | X1205_HR_MIL;
  165. /* should we also set the date? */
  166. if (datetoo) {
  167. dev_dbg(&client->dev,
  168. "%s: mday=%d, mon=%d, year=%d, wday=%d\n",
  169. __FUNCTION__,
  170. tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
  171. buf[CCR_MDAY] = BIN2BCD(tm->tm_mday);
  172. /* month, 1 - 12 */
  173. buf[CCR_MONTH] = BIN2BCD(tm->tm_mon + 1);
  174. /* year, since the rtc epoch*/
  175. buf[CCR_YEAR] = BIN2BCD(tm->tm_year % 100);
  176. buf[CCR_WDAY] = tm->tm_wday & 0x07;
  177. buf[CCR_Y2K] = BIN2BCD(tm->tm_year / 100);
  178. }
  179. /* this sequence is required to unlock the chip */
  180. if ((xfer = i2c_master_send(client, wel, 3)) != 3) {
  181. dev_err(&client->dev, "%s: wel - %d\n", __FUNCTION__, xfer);
  182. return -EIO;
  183. }
  184. if ((xfer = i2c_master_send(client, rwel, 3)) != 3) {
  185. dev_err(&client->dev, "%s: rwel - %d\n", __FUNCTION__, xfer);
  186. return -EIO;
  187. }
  188. /* write register's data */
  189. for (i = 0; i < (datetoo ? 8 : 3); i++) {
  190. unsigned char rdata[3] = { 0, reg_base + i, buf[i] };
  191. xfer = i2c_master_send(client, rdata, 3);
  192. if (xfer != 3) {
  193. dev_err(&client->dev,
  194. "%s: xfer=%d addr=%02x, data=%02x\n",
  195. __FUNCTION__,
  196. xfer, rdata[1], rdata[2]);
  197. return -EIO;
  198. }
  199. };
  200. /* disable further writes */
  201. if ((xfer = i2c_master_send(client, diswe, 3)) != 3) {
  202. dev_err(&client->dev, "%s: diswe - %d\n", __FUNCTION__, xfer);
  203. return -EIO;
  204. }
  205. return 0;
  206. }
  207. static int x1205_fix_osc(struct i2c_client *client)
  208. {
  209. int err;
  210. struct rtc_time tm;
  211. tm.tm_hour = tm.tm_min = tm.tm_sec = 0;
  212. if ((err = x1205_set_datetime(client, &tm, 0, X1205_CCR_BASE)) < 0)
  213. dev_err(&client->dev,
  214. "unable to restart the oscillator\n");
  215. return err;
  216. }
  217. static int x1205_get_dtrim(struct i2c_client *client, int *trim)
  218. {
  219. unsigned char dtr;
  220. static unsigned char dtr_addr[2] = { 0, X1205_REG_DTR };
  221. struct i2c_msg msgs[] = {
  222. { client->addr, 0, 2, dtr_addr }, /* setup read ptr */
  223. { client->addr, I2C_M_RD, 1, &dtr }, /* read dtr */
  224. };
  225. /* read dtr register */
  226. if ((i2c_transfer(client->adapter, &msgs[0], 2)) != 2) {
  227. dev_err(&client->dev, "%s: read error\n", __FUNCTION__);
  228. return -EIO;
  229. }
  230. dev_dbg(&client->dev, "%s: raw dtr=%x\n", __FUNCTION__, dtr);
  231. *trim = 0;
  232. if (dtr & X1205_DTR_DTR0)
  233. *trim += 20;
  234. if (dtr & X1205_DTR_DTR1)
  235. *trim += 10;
  236. if (dtr & X1205_DTR_DTR2)
  237. *trim = -*trim;
  238. return 0;
  239. }
  240. static int x1205_get_atrim(struct i2c_client *client, int *trim)
  241. {
  242. s8 atr;
  243. static unsigned char atr_addr[2] = { 0, X1205_REG_ATR };
  244. struct i2c_msg msgs[] = {
  245. { client->addr, 0, 2, atr_addr }, /* setup read ptr */
  246. { client->addr, I2C_M_RD, 1, &atr }, /* read atr */
  247. };
  248. /* read atr register */
  249. if ((i2c_transfer(client->adapter, &msgs[0], 2)) != 2) {
  250. dev_err(&client->dev, "%s: read error\n", __FUNCTION__);
  251. return -EIO;
  252. }
  253. dev_dbg(&client->dev, "%s: raw atr=%x\n", __FUNCTION__, atr);
  254. /* atr is a two's complement value on 6 bits,
  255. * perform sign extension. The formula is
  256. * Catr = (atr * 0.25pF) + 11.00pF.
  257. */
  258. if (atr & 0x20)
  259. atr |= 0xC0;
  260. dev_dbg(&client->dev, "%s: raw atr=%x (%d)\n", __FUNCTION__, atr, atr);
  261. *trim = (atr * 250) + 11000;
  262. dev_dbg(&client->dev, "%s: real=%d\n", __FUNCTION__, *trim);
  263. return 0;
  264. }
  265. struct x1205_limit
  266. {
  267. unsigned char reg, mask, min, max;
  268. };
  269. static int x1205_validate_client(struct i2c_client *client)
  270. {
  271. int i, xfer;
  272. /* Probe array. We will read the register at the specified
  273. * address and check if the given bits are zero.
  274. */
  275. static const unsigned char probe_zero_pattern[] = {
  276. /* register, mask */
  277. X1205_REG_SR, 0x18,
  278. X1205_REG_DTR, 0xF8,
  279. X1205_REG_ATR, 0xC0,
  280. X1205_REG_INT, 0x18,
  281. X1205_REG_0, 0xFF,
  282. };
  283. static const struct x1205_limit probe_limits_pattern[] = {
  284. /* register, mask, min, max */
  285. { X1205_REG_Y2K, 0xFF, 19, 20 },
  286. { X1205_REG_DW, 0xFF, 0, 6 },
  287. { X1205_REG_YR, 0xFF, 0, 99 },
  288. { X1205_REG_MO, 0xFF, 0, 12 },
  289. { X1205_REG_DT, 0xFF, 0, 31 },
  290. { X1205_REG_HR, 0x7F, 0, 23 },
  291. { X1205_REG_MN, 0xFF, 0, 59 },
  292. { X1205_REG_SC, 0xFF, 0, 59 },
  293. { X1205_REG_Y2K1, 0xFF, 19, 20 },
  294. { X1205_REG_Y2K0, 0xFF, 19, 20 },
  295. };
  296. /* check that registers have bits a 0 where expected */
  297. for (i = 0; i < ARRAY_SIZE(probe_zero_pattern); i += 2) {
  298. unsigned char buf;
  299. unsigned char addr[2] = { 0, probe_zero_pattern[i] };
  300. struct i2c_msg msgs[2] = {
  301. { client->addr, 0, 2, addr },
  302. { client->addr, I2C_M_RD, 1, &buf },
  303. };
  304. if ((xfer = i2c_transfer(client->adapter, msgs, 2)) != 2) {
  305. dev_err(&client->dev,
  306. "%s: could not read register %x\n",
  307. __FUNCTION__, probe_zero_pattern[i]);
  308. return -EIO;
  309. }
  310. if ((buf & probe_zero_pattern[i+1]) != 0) {
  311. dev_err(&client->dev,
  312. "%s: register=%02x, zero pattern=%d, value=%x\n",
  313. __FUNCTION__, probe_zero_pattern[i], i, buf);
  314. return -ENODEV;
  315. }
  316. }
  317. /* check limits (only registers with bcd values) */
  318. for (i = 0; i < ARRAY_SIZE(probe_limits_pattern); i++) {
  319. unsigned char reg, value;
  320. unsigned char addr[2] = { 0, probe_limits_pattern[i].reg };
  321. struct i2c_msg msgs[2] = {
  322. { client->addr, 0, 2, addr },
  323. { client->addr, I2C_M_RD, 1, &reg },
  324. };
  325. if ((xfer = i2c_transfer(client->adapter, msgs, 2)) != 2) {
  326. dev_err(&client->dev,
  327. "%s: could not read register %x\n",
  328. __FUNCTION__, probe_limits_pattern[i].reg);
  329. return -EIO;
  330. }
  331. value = BCD2BIN(reg & probe_limits_pattern[i].mask);
  332. if (value > probe_limits_pattern[i].max ||
  333. value < probe_limits_pattern[i].min) {
  334. dev_dbg(&client->dev,
  335. "%s: register=%x, lim pattern=%d, value=%d\n",
  336. __FUNCTION__, probe_limits_pattern[i].reg,
  337. i, value);
  338. return -ENODEV;
  339. }
  340. }
  341. return 0;
  342. }
  343. static int x1205_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
  344. {
  345. return x1205_get_datetime(to_i2c_client(dev),
  346. &alrm->time, X1205_ALM0_BASE);
  347. }
  348. static int x1205_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
  349. {
  350. return x1205_set_datetime(to_i2c_client(dev),
  351. &alrm->time, 1, X1205_ALM0_BASE);
  352. }
  353. static int x1205_rtc_read_time(struct device *dev, struct rtc_time *tm)
  354. {
  355. return x1205_get_datetime(to_i2c_client(dev),
  356. tm, X1205_CCR_BASE);
  357. }
  358. static int x1205_rtc_set_time(struct device *dev, struct rtc_time *tm)
  359. {
  360. return x1205_set_datetime(to_i2c_client(dev),
  361. tm, 1, X1205_CCR_BASE);
  362. }
  363. static int x1205_rtc_proc(struct device *dev, struct seq_file *seq)
  364. {
  365. int err, dtrim, atrim;
  366. if ((err = x1205_get_dtrim(to_i2c_client(dev), &dtrim)) == 0)
  367. seq_printf(seq, "digital_trim\t: %d ppm\n", dtrim);
  368. if ((err = x1205_get_atrim(to_i2c_client(dev), &atrim)) == 0)
  369. seq_printf(seq, "analog_trim\t: %d.%02d pF\n",
  370. atrim / 1000, atrim % 1000);
  371. return 0;
  372. }
  373. static const struct rtc_class_ops x1205_rtc_ops = {
  374. .proc = x1205_rtc_proc,
  375. .read_time = x1205_rtc_read_time,
  376. .set_time = x1205_rtc_set_time,
  377. .read_alarm = x1205_rtc_read_alarm,
  378. .set_alarm = x1205_rtc_set_alarm,
  379. };
  380. static ssize_t x1205_sysfs_show_atrim(struct device *dev,
  381. struct device_attribute *attr, char *buf)
  382. {
  383. int err, atrim;
  384. err = x1205_get_atrim(to_i2c_client(dev), &atrim);
  385. if (err)
  386. return err;
  387. return sprintf(buf, "%d.%02d pF\n", atrim / 1000, atrim % 1000);
  388. }
  389. static DEVICE_ATTR(atrim, S_IRUGO, x1205_sysfs_show_atrim, NULL);
  390. static ssize_t x1205_sysfs_show_dtrim(struct device *dev,
  391. struct device_attribute *attr, char *buf)
  392. {
  393. int err, dtrim;
  394. err = x1205_get_dtrim(to_i2c_client(dev), &dtrim);
  395. if (err)
  396. return err;
  397. return sprintf(buf, "%d ppm\n", dtrim);
  398. }
  399. static DEVICE_ATTR(dtrim, S_IRUGO, x1205_sysfs_show_dtrim, NULL);
  400. static int x1205_attach(struct i2c_adapter *adapter)
  401. {
  402. return i2c_probe(adapter, &addr_data, x1205_probe);
  403. }
  404. static int x1205_probe(struct i2c_adapter *adapter, int address, int kind)
  405. {
  406. int err = 0;
  407. unsigned char sr;
  408. struct i2c_client *client;
  409. struct rtc_device *rtc;
  410. dev_dbg(&adapter->dev, "%s\n", __FUNCTION__);
  411. if (!i2c_check_functionality(adapter, I2C_FUNC_I2C)) {
  412. err = -ENODEV;
  413. goto exit;
  414. }
  415. if (!(client = kzalloc(sizeof(struct i2c_client), GFP_KERNEL))) {
  416. err = -ENOMEM;
  417. goto exit;
  418. }
  419. /* I2C client */
  420. client->addr = address;
  421. client->driver = &x1205_driver;
  422. client->adapter = adapter;
  423. strlcpy(client->name, x1205_driver.driver.name, I2C_NAME_SIZE);
  424. /* Verify the chip is really an X1205 */
  425. if (kind < 0) {
  426. if (x1205_validate_client(client) < 0) {
  427. err = -ENODEV;
  428. goto exit_kfree;
  429. }
  430. }
  431. /* Inform the i2c layer */
  432. if ((err = i2c_attach_client(client)))
  433. goto exit_kfree;
  434. dev_info(&client->dev, "chip found, driver version " DRV_VERSION "\n");
  435. rtc = rtc_device_register(x1205_driver.driver.name, &client->dev,
  436. &x1205_rtc_ops, THIS_MODULE);
  437. if (IS_ERR(rtc)) {
  438. err = PTR_ERR(rtc);
  439. goto exit_detach;
  440. }
  441. i2c_set_clientdata(client, rtc);
  442. /* Check for power failures and eventualy enable the osc */
  443. if ((err = x1205_get_status(client, &sr)) == 0) {
  444. if (sr & X1205_SR_RTCF) {
  445. dev_err(&client->dev,
  446. "power failure detected, "
  447. "please set the clock\n");
  448. udelay(50);
  449. x1205_fix_osc(client);
  450. }
  451. }
  452. else
  453. dev_err(&client->dev, "couldn't read status\n");
  454. err = device_create_file(&client->dev, &dev_attr_atrim);
  455. if (err) goto exit_devreg;
  456. err = device_create_file(&client->dev, &dev_attr_dtrim);
  457. if (err) goto exit_atrim;
  458. return 0;
  459. exit_atrim:
  460. device_remove_file(&client->dev, &dev_attr_atrim);
  461. exit_devreg:
  462. rtc_device_unregister(rtc);
  463. exit_detach:
  464. i2c_detach_client(client);
  465. exit_kfree:
  466. kfree(client);
  467. exit:
  468. return err;
  469. }
  470. static int x1205_detach(struct i2c_client *client)
  471. {
  472. int err;
  473. struct rtc_device *rtc = i2c_get_clientdata(client);
  474. if (rtc)
  475. rtc_device_unregister(rtc);
  476. if ((err = i2c_detach_client(client)))
  477. return err;
  478. kfree(client);
  479. return 0;
  480. }
  481. static int __init x1205_init(void)
  482. {
  483. return i2c_add_driver(&x1205_driver);
  484. }
  485. static void __exit x1205_exit(void)
  486. {
  487. i2c_del_driver(&x1205_driver);
  488. }
  489. MODULE_AUTHOR(
  490. "Karen Spearel <kas111 at gmail dot com>, "
  491. "Alessandro Zummo <a.zummo@towertech.it>");
  492. MODULE_DESCRIPTION("Xicor/Intersil X1205 RTC driver");
  493. MODULE_LICENSE("GPL");
  494. MODULE_VERSION(DRV_VERSION);
  495. module_init(x1205_init);
  496. module_exit(x1205_exit);