rtc-at32ap700x.c 7.1 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317
  1. /*
  2. * An RTC driver for the AVR32 AT32AP700x processor series.
  3. *
  4. * Copyright (C) 2007 Atmel Corporation
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License version 2 as published
  8. * by the Free Software Foundation.
  9. */
  10. #include <linux/module.h>
  11. #include <linux/kernel.h>
  12. #include <linux/platform_device.h>
  13. #include <linux/rtc.h>
  14. #include <linux/io.h>
  15. /*
  16. * This is a bare-bones RTC. It runs during most system sleep states, but has
  17. * no battery backup and gets reset during system restart. It must be
  18. * initialized from an external clock (network, I2C, etc) before it can be of
  19. * much use.
  20. *
  21. * The alarm functionality is limited by the hardware, not supporting
  22. * periodic interrupts.
  23. */
  24. #define RTC_CTRL 0x00
  25. #define RTC_CTRL_EN 0
  26. #define RTC_CTRL_PCLR 1
  27. #define RTC_CTRL_TOPEN 2
  28. #define RTC_CTRL_PSEL 8
  29. #define RTC_VAL 0x04
  30. #define RTC_TOP 0x08
  31. #define RTC_IER 0x10
  32. #define RTC_IER_TOPI 0
  33. #define RTC_IDR 0x14
  34. #define RTC_IDR_TOPI 0
  35. #define RTC_IMR 0x18
  36. #define RTC_IMR_TOPI 0
  37. #define RTC_ISR 0x1c
  38. #define RTC_ISR_TOPI 0
  39. #define RTC_ICR 0x20
  40. #define RTC_ICR_TOPI 0
  41. #define RTC_BIT(name) (1 << RTC_##name)
  42. #define RTC_BF(name, value) ((value) << RTC_##name)
  43. #define rtc_readl(dev, reg) \
  44. __raw_readl((dev)->regs + RTC_##reg)
  45. #define rtc_writel(dev, reg, value) \
  46. __raw_writel((value), (dev)->regs + RTC_##reg)
  47. struct rtc_at32ap700x {
  48. struct rtc_device *rtc;
  49. void __iomem *regs;
  50. unsigned long alarm_time;
  51. unsigned long irq;
  52. /* Protect against concurrent register access. */
  53. spinlock_t lock;
  54. };
  55. static int at32_rtc_readtime(struct device *dev, struct rtc_time *tm)
  56. {
  57. struct rtc_at32ap700x *rtc = dev_get_drvdata(dev);
  58. unsigned long now;
  59. now = rtc_readl(rtc, VAL);
  60. rtc_time_to_tm(now, tm);
  61. return 0;
  62. }
  63. static int at32_rtc_settime(struct device *dev, struct rtc_time *tm)
  64. {
  65. struct rtc_at32ap700x *rtc = dev_get_drvdata(dev);
  66. unsigned long now;
  67. int ret;
  68. ret = rtc_tm_to_time(tm, &now);
  69. if (ret == 0)
  70. rtc_writel(rtc, VAL, now);
  71. return ret;
  72. }
  73. static int at32_rtc_readalarm(struct device *dev, struct rtc_wkalrm *alrm)
  74. {
  75. struct rtc_at32ap700x *rtc = dev_get_drvdata(dev);
  76. rtc_time_to_tm(rtc->alarm_time, &alrm->time);
  77. alrm->pending = rtc_readl(rtc, IMR) & RTC_BIT(IMR_TOPI) ? 1 : 0;
  78. return 0;
  79. }
  80. static int at32_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
  81. {
  82. struct rtc_at32ap700x *rtc = dev_get_drvdata(dev);
  83. unsigned long rtc_unix_time;
  84. unsigned long alarm_unix_time;
  85. int ret;
  86. rtc_unix_time = rtc_readl(rtc, VAL);
  87. ret = rtc_tm_to_time(&alrm->time, &alarm_unix_time);
  88. if (ret)
  89. return ret;
  90. if (alarm_unix_time < rtc_unix_time)
  91. return -EINVAL;
  92. spin_lock_irq(&rtc->lock);
  93. rtc->alarm_time = alarm_unix_time;
  94. rtc_writel(rtc, TOP, rtc->alarm_time);
  95. if (alrm->pending)
  96. rtc_writel(rtc, CTRL, rtc_readl(rtc, CTRL)
  97. | RTC_BIT(CTRL_TOPEN));
  98. else
  99. rtc_writel(rtc, CTRL, rtc_readl(rtc, CTRL)
  100. & ~RTC_BIT(CTRL_TOPEN));
  101. spin_unlock_irq(&rtc->lock);
  102. return ret;
  103. }
  104. static int at32_rtc_ioctl(struct device *dev, unsigned int cmd,
  105. unsigned long arg)
  106. {
  107. struct rtc_at32ap700x *rtc = dev_get_drvdata(dev);
  108. int ret = 0;
  109. spin_lock_irq(&rtc->lock);
  110. switch (cmd) {
  111. case RTC_AIE_ON:
  112. if (rtc_readl(rtc, VAL) > rtc->alarm_time) {
  113. ret = -EINVAL;
  114. break;
  115. }
  116. rtc_writel(rtc, CTRL, rtc_readl(rtc, CTRL)
  117. | RTC_BIT(CTRL_TOPEN));
  118. rtc_writel(rtc, ICR, RTC_BIT(ICR_TOPI));
  119. rtc_writel(rtc, IER, RTC_BIT(IER_TOPI));
  120. break;
  121. case RTC_AIE_OFF:
  122. rtc_writel(rtc, CTRL, rtc_readl(rtc, CTRL)
  123. & ~RTC_BIT(CTRL_TOPEN));
  124. rtc_writel(rtc, IDR, RTC_BIT(IDR_TOPI));
  125. rtc_writel(rtc, ICR, RTC_BIT(ICR_TOPI));
  126. break;
  127. default:
  128. ret = -ENOIOCTLCMD;
  129. break;
  130. }
  131. spin_unlock_irq(&rtc->lock);
  132. return ret;
  133. }
  134. static irqreturn_t at32_rtc_interrupt(int irq, void *dev_id)
  135. {
  136. struct rtc_at32ap700x *rtc = (struct rtc_at32ap700x *)dev_id;
  137. unsigned long isr = rtc_readl(rtc, ISR);
  138. unsigned long events = 0;
  139. int ret = IRQ_NONE;
  140. spin_lock(&rtc->lock);
  141. if (isr & RTC_BIT(ISR_TOPI)) {
  142. rtc_writel(rtc, ICR, RTC_BIT(ICR_TOPI));
  143. rtc_writel(rtc, IDR, RTC_BIT(IDR_TOPI));
  144. rtc_writel(rtc, CTRL, rtc_readl(rtc, CTRL)
  145. & ~RTC_BIT(CTRL_TOPEN));
  146. rtc_writel(rtc, VAL, rtc->alarm_time);
  147. events = RTC_AF | RTC_IRQF;
  148. rtc_update_irq(rtc->rtc, 1, events);
  149. ret = IRQ_HANDLED;
  150. }
  151. spin_unlock(&rtc->lock);
  152. return ret;
  153. }
  154. static struct rtc_class_ops at32_rtc_ops = {
  155. .ioctl = at32_rtc_ioctl,
  156. .read_time = at32_rtc_readtime,
  157. .set_time = at32_rtc_settime,
  158. .read_alarm = at32_rtc_readalarm,
  159. .set_alarm = at32_rtc_setalarm,
  160. };
  161. static int __init at32_rtc_probe(struct platform_device *pdev)
  162. {
  163. struct resource *regs;
  164. struct rtc_at32ap700x *rtc;
  165. int irq = -1;
  166. int ret;
  167. rtc = kzalloc(sizeof(struct rtc_at32ap700x), GFP_KERNEL);
  168. if (!rtc) {
  169. dev_dbg(&pdev->dev, "out of memory\n");
  170. return -ENOMEM;
  171. }
  172. regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  173. if (!regs) {
  174. dev_dbg(&pdev->dev, "no mmio resource defined\n");
  175. ret = -ENXIO;
  176. goto out;
  177. }
  178. irq = platform_get_irq(pdev, 0);
  179. if (irq < 0) {
  180. dev_dbg(&pdev->dev, "could not get irq\n");
  181. ret = -ENXIO;
  182. goto out;
  183. }
  184. ret = request_irq(irq, at32_rtc_interrupt, IRQF_SHARED, "rtc", rtc);
  185. if (ret) {
  186. dev_dbg(&pdev->dev, "could not request irq %d\n", irq);
  187. goto out;
  188. }
  189. rtc->irq = irq;
  190. rtc->regs = ioremap(regs->start, regs->end - regs->start + 1);
  191. if (!rtc->regs) {
  192. ret = -ENOMEM;
  193. dev_dbg(&pdev->dev, "could not map I/O memory\n");
  194. goto out_free_irq;
  195. }
  196. spin_lock_init(&rtc->lock);
  197. /*
  198. * Maybe init RTC: count from zero at 1 Hz, disable wrap irq.
  199. *
  200. * Do not reset VAL register, as it can hold an old time
  201. * from last JTAG reset.
  202. */
  203. if (!(rtc_readl(rtc, CTRL) & RTC_BIT(CTRL_EN))) {
  204. rtc_writel(rtc, CTRL, RTC_BIT(CTRL_PCLR));
  205. rtc_writel(rtc, IDR, RTC_BIT(IDR_TOPI));
  206. rtc_writel(rtc, CTRL, RTC_BF(CTRL_PSEL, 0xe)
  207. | RTC_BIT(CTRL_EN));
  208. }
  209. rtc->rtc = rtc_device_register(pdev->name, &pdev->dev,
  210. &at32_rtc_ops, THIS_MODULE);
  211. if (IS_ERR(rtc->rtc)) {
  212. dev_dbg(&pdev->dev, "could not register rtc device\n");
  213. ret = PTR_ERR(rtc->rtc);
  214. goto out_iounmap;
  215. }
  216. platform_set_drvdata(pdev, rtc);
  217. dev_info(&pdev->dev, "Atmel RTC for AT32AP700x at %08lx irq %ld\n",
  218. (unsigned long)rtc->regs, rtc->irq);
  219. return 0;
  220. out_iounmap:
  221. iounmap(rtc->regs);
  222. out_free_irq:
  223. free_irq(irq, rtc);
  224. out:
  225. kfree(rtc);
  226. return ret;
  227. }
  228. static int __exit at32_rtc_remove(struct platform_device *pdev)
  229. {
  230. struct rtc_at32ap700x *rtc = platform_get_drvdata(pdev);
  231. free_irq(rtc->irq, rtc);
  232. iounmap(rtc->regs);
  233. rtc_device_unregister(rtc->rtc);
  234. kfree(rtc);
  235. platform_set_drvdata(pdev, NULL);
  236. return 0;
  237. }
  238. MODULE_ALIAS("at32ap700x_rtc");
  239. static struct platform_driver at32_rtc_driver = {
  240. .remove = __exit_p(at32_rtc_remove),
  241. .driver = {
  242. .name = "at32ap700x_rtc",
  243. .owner = THIS_MODULE,
  244. },
  245. };
  246. static int __init at32_rtc_init(void)
  247. {
  248. return platform_driver_probe(&at32_rtc_driver, at32_rtc_probe);
  249. }
  250. module_init(at32_rtc_init);
  251. static void __exit at32_rtc_exit(void)
  252. {
  253. platform_driver_unregister(&at32_rtc_driver);
  254. }
  255. module_exit(at32_rtc_exit);
  256. MODULE_AUTHOR("Hans-Christian Egtvedt <hcegtvedt@atmel.com>");
  257. MODULE_DESCRIPTION("Real time clock for AVR32 AT32AP700x");
  258. MODULE_LICENSE("GPL");