tsi108_eth.c 46 KB

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  1. /*******************************************************************************
  2. Copyright(c) 2006 Tundra Semiconductor Corporation.
  3. This program is free software; you can redistribute it and/or modify it
  4. under the terms of the GNU General Public License as published by the Free
  5. Software Foundation; either version 2 of the License, or (at your option)
  6. any later version.
  7. This program is distributed in the hope that it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, write to the Free Software Foundation, Inc., 59
  13. Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  14. *******************************************************************************/
  15. /* This driver is based on the driver code originally developed
  16. * for the Intel IOC80314 (ForestLake) Gigabit Ethernet by
  17. * scott.wood@timesys.com * Copyright (C) 2003 TimeSys Corporation
  18. *
  19. * Currently changes from original version are:
  20. * - porting to Tsi108-based platform and kernel 2.6 (kong.lai@tundra.com)
  21. * - modifications to handle two ports independently and support for
  22. * additional PHY devices (alexandre.bounine@tundra.com)
  23. * - Get hardware information from platform device. (tie-fei.zang@freescale.com)
  24. *
  25. */
  26. #include <linux/module.h>
  27. #include <linux/types.h>
  28. #include <linux/init.h>
  29. #include <linux/net.h>
  30. #include <linux/netdevice.h>
  31. #include <linux/etherdevice.h>
  32. #include <linux/skbuff.h>
  33. #include <linux/slab.h>
  34. #include <linux/spinlock.h>
  35. #include <linux/delay.h>
  36. #include <linux/crc32.h>
  37. #include <linux/mii.h>
  38. #include <linux/device.h>
  39. #include <linux/pci.h>
  40. #include <linux/rtnetlink.h>
  41. #include <linux/timer.h>
  42. #include <linux/platform_device.h>
  43. #include <asm/system.h>
  44. #include <asm/io.h>
  45. #include <asm/tsi108.h>
  46. #include "tsi108_eth.h"
  47. #define MII_READ_DELAY 10000 /* max link wait time in msec */
  48. #define TSI108_RXRING_LEN 256
  49. /* NOTE: The driver currently does not support receiving packets
  50. * larger than the buffer size, so don't decrease this (unless you
  51. * want to add such support).
  52. */
  53. #define TSI108_RXBUF_SIZE 1536
  54. #define TSI108_TXRING_LEN 256
  55. #define TSI108_TX_INT_FREQ 64
  56. /* Check the phy status every half a second. */
  57. #define CHECK_PHY_INTERVAL (HZ/2)
  58. static int tsi108_init_one(struct platform_device *pdev);
  59. static int tsi108_ether_remove(struct platform_device *pdev);
  60. struct tsi108_prv_data {
  61. void __iomem *regs; /* Base of normal regs */
  62. void __iomem *phyregs; /* Base of register bank used for PHY access */
  63. struct net_device *dev;
  64. struct napi_struct napi;
  65. unsigned int phy; /* Index of PHY for this interface */
  66. unsigned int irq_num;
  67. unsigned int id;
  68. unsigned int phy_type;
  69. struct timer_list timer;/* Timer that triggers the check phy function */
  70. unsigned int rxtail; /* Next entry in rxring to read */
  71. unsigned int rxhead; /* Next entry in rxring to give a new buffer */
  72. unsigned int rxfree; /* Number of free, allocated RX buffers */
  73. unsigned int rxpending; /* Non-zero if there are still descriptors
  74. * to be processed from a previous descriptor
  75. * interrupt condition that has been cleared */
  76. unsigned int txtail; /* Next TX descriptor to check status on */
  77. unsigned int txhead; /* Next TX descriptor to use */
  78. /* Number of free TX descriptors. This could be calculated from
  79. * rxhead and rxtail if one descriptor were left unused to disambiguate
  80. * full and empty conditions, but it's simpler to just keep track
  81. * explicitly. */
  82. unsigned int txfree;
  83. unsigned int phy_ok; /* The PHY is currently powered on. */
  84. /* PHY status (duplex is 1 for half, 2 for full,
  85. * so that the default 0 indicates that neither has
  86. * yet been configured). */
  87. unsigned int link_up;
  88. unsigned int speed;
  89. unsigned int duplex;
  90. tx_desc *txring;
  91. rx_desc *rxring;
  92. struct sk_buff *txskbs[TSI108_TXRING_LEN];
  93. struct sk_buff *rxskbs[TSI108_RXRING_LEN];
  94. dma_addr_t txdma, rxdma;
  95. /* txlock nests in misclock and phy_lock */
  96. spinlock_t txlock, misclock;
  97. /* stats is used to hold the upper bits of each hardware counter,
  98. * and tmpstats is used to hold the full values for returning
  99. * to the caller of get_stats(). They must be separate in case
  100. * an overflow interrupt occurs before the stats are consumed.
  101. */
  102. struct net_device_stats stats;
  103. struct net_device_stats tmpstats;
  104. /* These stats are kept separate in hardware, thus require individual
  105. * fields for handling carry. They are combined in get_stats.
  106. */
  107. unsigned long rx_fcs; /* Add to rx_frame_errors */
  108. unsigned long rx_short_fcs; /* Add to rx_frame_errors */
  109. unsigned long rx_long_fcs; /* Add to rx_frame_errors */
  110. unsigned long rx_underruns; /* Add to rx_length_errors */
  111. unsigned long rx_overruns; /* Add to rx_length_errors */
  112. unsigned long tx_coll_abort; /* Add to tx_aborted_errors/collisions */
  113. unsigned long tx_pause_drop; /* Add to tx_aborted_errors */
  114. unsigned long mc_hash[16];
  115. u32 msg_enable; /* debug message level */
  116. struct mii_if_info mii_if;
  117. unsigned int init_media;
  118. };
  119. /* Structure for a device driver */
  120. static struct platform_driver tsi_eth_driver = {
  121. .probe = tsi108_init_one,
  122. .remove = tsi108_ether_remove,
  123. .driver = {
  124. .name = "tsi-ethernet",
  125. },
  126. };
  127. static void tsi108_timed_checker(unsigned long dev_ptr);
  128. static void dump_eth_one(struct net_device *dev)
  129. {
  130. struct tsi108_prv_data *data = netdev_priv(dev);
  131. printk("Dumping %s...\n", dev->name);
  132. printk("intstat %x intmask %x phy_ok %d"
  133. " link %d speed %d duplex %d\n",
  134. TSI_READ(TSI108_EC_INTSTAT),
  135. TSI_READ(TSI108_EC_INTMASK), data->phy_ok,
  136. data->link_up, data->speed, data->duplex);
  137. printk("TX: head %d, tail %d, free %d, stat %x, estat %x, err %x\n",
  138. data->txhead, data->txtail, data->txfree,
  139. TSI_READ(TSI108_EC_TXSTAT),
  140. TSI_READ(TSI108_EC_TXESTAT),
  141. TSI_READ(TSI108_EC_TXERR));
  142. printk("RX: head %d, tail %d, free %d, stat %x,"
  143. " estat %x, err %x, pending %d\n\n",
  144. data->rxhead, data->rxtail, data->rxfree,
  145. TSI_READ(TSI108_EC_RXSTAT),
  146. TSI_READ(TSI108_EC_RXESTAT),
  147. TSI_READ(TSI108_EC_RXERR), data->rxpending);
  148. }
  149. /* Synchronization is needed between the thread and up/down events.
  150. * Note that the PHY is accessed through the same registers for both
  151. * interfaces, so this can't be made interface-specific.
  152. */
  153. static DEFINE_SPINLOCK(phy_lock);
  154. static int tsi108_read_mii(struct tsi108_prv_data *data, int reg)
  155. {
  156. unsigned i;
  157. TSI_WRITE_PHY(TSI108_MAC_MII_ADDR,
  158. (data->phy << TSI108_MAC_MII_ADDR_PHY) |
  159. (reg << TSI108_MAC_MII_ADDR_REG));
  160. TSI_WRITE_PHY(TSI108_MAC_MII_CMD, 0);
  161. TSI_WRITE_PHY(TSI108_MAC_MII_CMD, TSI108_MAC_MII_CMD_READ);
  162. for (i = 0; i < 100; i++) {
  163. if (!(TSI_READ_PHY(TSI108_MAC_MII_IND) &
  164. (TSI108_MAC_MII_IND_NOTVALID | TSI108_MAC_MII_IND_BUSY)))
  165. break;
  166. udelay(10);
  167. }
  168. if (i == 100)
  169. return 0xffff;
  170. else
  171. return (TSI_READ_PHY(TSI108_MAC_MII_DATAIN));
  172. }
  173. static void tsi108_write_mii(struct tsi108_prv_data *data,
  174. int reg, u16 val)
  175. {
  176. unsigned i = 100;
  177. TSI_WRITE_PHY(TSI108_MAC_MII_ADDR,
  178. (data->phy << TSI108_MAC_MII_ADDR_PHY) |
  179. (reg << TSI108_MAC_MII_ADDR_REG));
  180. TSI_WRITE_PHY(TSI108_MAC_MII_DATAOUT, val);
  181. while (i--) {
  182. if(!(TSI_READ_PHY(TSI108_MAC_MII_IND) &
  183. TSI108_MAC_MII_IND_BUSY))
  184. break;
  185. udelay(10);
  186. }
  187. }
  188. static int tsi108_mdio_read(struct net_device *dev, int addr, int reg)
  189. {
  190. struct tsi108_prv_data *data = netdev_priv(dev);
  191. return tsi108_read_mii(data, reg);
  192. }
  193. static void tsi108_mdio_write(struct net_device *dev, int addr, int reg, int val)
  194. {
  195. struct tsi108_prv_data *data = netdev_priv(dev);
  196. tsi108_write_mii(data, reg, val);
  197. }
  198. static inline void tsi108_write_tbi(struct tsi108_prv_data *data,
  199. int reg, u16 val)
  200. {
  201. unsigned i = 1000;
  202. TSI_WRITE(TSI108_MAC_MII_ADDR,
  203. (0x1e << TSI108_MAC_MII_ADDR_PHY)
  204. | (reg << TSI108_MAC_MII_ADDR_REG));
  205. TSI_WRITE(TSI108_MAC_MII_DATAOUT, val);
  206. while(i--) {
  207. if(!(TSI_READ(TSI108_MAC_MII_IND) & TSI108_MAC_MII_IND_BUSY))
  208. return;
  209. udelay(10);
  210. }
  211. printk(KERN_ERR "%s function time out \n", __FUNCTION__);
  212. }
  213. static int mii_speed(struct mii_if_info *mii)
  214. {
  215. int advert, lpa, val, media;
  216. int lpa2 = 0;
  217. int speed;
  218. if (!mii_link_ok(mii))
  219. return 0;
  220. val = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_BMSR);
  221. if ((val & BMSR_ANEGCOMPLETE) == 0)
  222. return 0;
  223. advert = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_ADVERTISE);
  224. lpa = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_LPA);
  225. media = mii_nway_result(advert & lpa);
  226. if (mii->supports_gmii)
  227. lpa2 = mii->mdio_read(mii->dev, mii->phy_id, MII_STAT1000);
  228. speed = lpa2 & (LPA_1000FULL | LPA_1000HALF) ? 1000 :
  229. (media & (ADVERTISE_100FULL | ADVERTISE_100HALF) ? 100 : 10);
  230. return speed;
  231. }
  232. static void tsi108_check_phy(struct net_device *dev)
  233. {
  234. struct tsi108_prv_data *data = netdev_priv(dev);
  235. u32 mac_cfg2_reg, portctrl_reg;
  236. u32 duplex;
  237. u32 speed;
  238. unsigned long flags;
  239. /* Do a dummy read, as for some reason the first read
  240. * after a link becomes up returns link down, even if
  241. * it's been a while since the link came up.
  242. */
  243. spin_lock_irqsave(&phy_lock, flags);
  244. if (!data->phy_ok)
  245. goto out;
  246. tsi108_read_mii(data, MII_BMSR);
  247. duplex = mii_check_media(&data->mii_if, netif_msg_link(data), data->init_media);
  248. data->init_media = 0;
  249. if (netif_carrier_ok(dev)) {
  250. speed = mii_speed(&data->mii_if);
  251. if ((speed != data->speed) || duplex) {
  252. mac_cfg2_reg = TSI_READ(TSI108_MAC_CFG2);
  253. portctrl_reg = TSI_READ(TSI108_EC_PORTCTRL);
  254. mac_cfg2_reg &= ~TSI108_MAC_CFG2_IFACE_MASK;
  255. if (speed == 1000) {
  256. mac_cfg2_reg |= TSI108_MAC_CFG2_GIG;
  257. portctrl_reg &= ~TSI108_EC_PORTCTRL_NOGIG;
  258. } else {
  259. mac_cfg2_reg |= TSI108_MAC_CFG2_NOGIG;
  260. portctrl_reg |= TSI108_EC_PORTCTRL_NOGIG;
  261. }
  262. data->speed = speed;
  263. if (data->mii_if.full_duplex) {
  264. mac_cfg2_reg |= TSI108_MAC_CFG2_FULLDUPLEX;
  265. portctrl_reg &= ~TSI108_EC_PORTCTRL_HALFDUPLEX;
  266. data->duplex = 2;
  267. } else {
  268. mac_cfg2_reg &= ~TSI108_MAC_CFG2_FULLDUPLEX;
  269. portctrl_reg |= TSI108_EC_PORTCTRL_HALFDUPLEX;
  270. data->duplex = 1;
  271. }
  272. TSI_WRITE(TSI108_MAC_CFG2, mac_cfg2_reg);
  273. TSI_WRITE(TSI108_EC_PORTCTRL, portctrl_reg);
  274. if (data->link_up == 0) {
  275. /* The manual says it can take 3-4 usecs for the speed change
  276. * to take effect.
  277. */
  278. udelay(5);
  279. spin_lock(&data->txlock);
  280. if (is_valid_ether_addr(dev->dev_addr) && data->txfree)
  281. netif_wake_queue(dev);
  282. data->link_up = 1;
  283. spin_unlock(&data->txlock);
  284. }
  285. }
  286. } else {
  287. if (data->link_up == 1) {
  288. netif_stop_queue(dev);
  289. data->link_up = 0;
  290. printk(KERN_NOTICE "%s : link is down\n", dev->name);
  291. }
  292. goto out;
  293. }
  294. out:
  295. spin_unlock_irqrestore(&phy_lock, flags);
  296. }
  297. static inline void
  298. tsi108_stat_carry_one(int carry, int carry_bit, int carry_shift,
  299. unsigned long *upper)
  300. {
  301. if (carry & carry_bit)
  302. *upper += carry_shift;
  303. }
  304. static void tsi108_stat_carry(struct net_device *dev)
  305. {
  306. struct tsi108_prv_data *data = netdev_priv(dev);
  307. u32 carry1, carry2;
  308. spin_lock_irq(&data->misclock);
  309. carry1 = TSI_READ(TSI108_STAT_CARRY1);
  310. carry2 = TSI_READ(TSI108_STAT_CARRY2);
  311. TSI_WRITE(TSI108_STAT_CARRY1, carry1);
  312. TSI_WRITE(TSI108_STAT_CARRY2, carry2);
  313. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXBYTES,
  314. TSI108_STAT_RXBYTES_CARRY, &data->stats.rx_bytes);
  315. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXPKTS,
  316. TSI108_STAT_RXPKTS_CARRY,
  317. &data->stats.rx_packets);
  318. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXFCS,
  319. TSI108_STAT_RXFCS_CARRY, &data->rx_fcs);
  320. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXMCAST,
  321. TSI108_STAT_RXMCAST_CARRY,
  322. &data->stats.multicast);
  323. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXALIGN,
  324. TSI108_STAT_RXALIGN_CARRY,
  325. &data->stats.rx_frame_errors);
  326. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXLENGTH,
  327. TSI108_STAT_RXLENGTH_CARRY,
  328. &data->stats.rx_length_errors);
  329. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXRUNT,
  330. TSI108_STAT_RXRUNT_CARRY, &data->rx_underruns);
  331. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXJUMBO,
  332. TSI108_STAT_RXJUMBO_CARRY, &data->rx_overruns);
  333. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXFRAG,
  334. TSI108_STAT_RXFRAG_CARRY, &data->rx_short_fcs);
  335. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXJABBER,
  336. TSI108_STAT_RXJABBER_CARRY, &data->rx_long_fcs);
  337. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXDROP,
  338. TSI108_STAT_RXDROP_CARRY,
  339. &data->stats.rx_missed_errors);
  340. tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXBYTES,
  341. TSI108_STAT_TXBYTES_CARRY, &data->stats.tx_bytes);
  342. tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXPKTS,
  343. TSI108_STAT_TXPKTS_CARRY,
  344. &data->stats.tx_packets);
  345. tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXEXDEF,
  346. TSI108_STAT_TXEXDEF_CARRY,
  347. &data->stats.tx_aborted_errors);
  348. tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXEXCOL,
  349. TSI108_STAT_TXEXCOL_CARRY, &data->tx_coll_abort);
  350. tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXTCOL,
  351. TSI108_STAT_TXTCOL_CARRY,
  352. &data->stats.collisions);
  353. tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXPAUSE,
  354. TSI108_STAT_TXPAUSEDROP_CARRY,
  355. &data->tx_pause_drop);
  356. spin_unlock_irq(&data->misclock);
  357. }
  358. /* Read a stat counter atomically with respect to carries.
  359. * data->misclock must be held.
  360. */
  361. static inline unsigned long
  362. tsi108_read_stat(struct tsi108_prv_data * data, int reg, int carry_bit,
  363. int carry_shift, unsigned long *upper)
  364. {
  365. int carryreg;
  366. unsigned long val;
  367. if (reg < 0xb0)
  368. carryreg = TSI108_STAT_CARRY1;
  369. else
  370. carryreg = TSI108_STAT_CARRY2;
  371. again:
  372. val = TSI_READ(reg) | *upper;
  373. /* Check to see if it overflowed, but the interrupt hasn't
  374. * been serviced yet. If so, handle the carry here, and
  375. * try again.
  376. */
  377. if (unlikely(TSI_READ(carryreg) & carry_bit)) {
  378. *upper += carry_shift;
  379. TSI_WRITE(carryreg, carry_bit);
  380. goto again;
  381. }
  382. return val;
  383. }
  384. static struct net_device_stats *tsi108_get_stats(struct net_device *dev)
  385. {
  386. unsigned long excol;
  387. struct tsi108_prv_data *data = netdev_priv(dev);
  388. spin_lock_irq(&data->misclock);
  389. data->tmpstats.rx_packets =
  390. tsi108_read_stat(data, TSI108_STAT_RXPKTS,
  391. TSI108_STAT_CARRY1_RXPKTS,
  392. TSI108_STAT_RXPKTS_CARRY, &data->stats.rx_packets);
  393. data->tmpstats.tx_packets =
  394. tsi108_read_stat(data, TSI108_STAT_TXPKTS,
  395. TSI108_STAT_CARRY2_TXPKTS,
  396. TSI108_STAT_TXPKTS_CARRY, &data->stats.tx_packets);
  397. data->tmpstats.rx_bytes =
  398. tsi108_read_stat(data, TSI108_STAT_RXBYTES,
  399. TSI108_STAT_CARRY1_RXBYTES,
  400. TSI108_STAT_RXBYTES_CARRY, &data->stats.rx_bytes);
  401. data->tmpstats.tx_bytes =
  402. tsi108_read_stat(data, TSI108_STAT_TXBYTES,
  403. TSI108_STAT_CARRY2_TXBYTES,
  404. TSI108_STAT_TXBYTES_CARRY, &data->stats.tx_bytes);
  405. data->tmpstats.multicast =
  406. tsi108_read_stat(data, TSI108_STAT_RXMCAST,
  407. TSI108_STAT_CARRY1_RXMCAST,
  408. TSI108_STAT_RXMCAST_CARRY, &data->stats.multicast);
  409. excol = tsi108_read_stat(data, TSI108_STAT_TXEXCOL,
  410. TSI108_STAT_CARRY2_TXEXCOL,
  411. TSI108_STAT_TXEXCOL_CARRY,
  412. &data->tx_coll_abort);
  413. data->tmpstats.collisions =
  414. tsi108_read_stat(data, TSI108_STAT_TXTCOL,
  415. TSI108_STAT_CARRY2_TXTCOL,
  416. TSI108_STAT_TXTCOL_CARRY, &data->stats.collisions);
  417. data->tmpstats.collisions += excol;
  418. data->tmpstats.rx_length_errors =
  419. tsi108_read_stat(data, TSI108_STAT_RXLENGTH,
  420. TSI108_STAT_CARRY1_RXLENGTH,
  421. TSI108_STAT_RXLENGTH_CARRY,
  422. &data->stats.rx_length_errors);
  423. data->tmpstats.rx_length_errors +=
  424. tsi108_read_stat(data, TSI108_STAT_RXRUNT,
  425. TSI108_STAT_CARRY1_RXRUNT,
  426. TSI108_STAT_RXRUNT_CARRY, &data->rx_underruns);
  427. data->tmpstats.rx_length_errors +=
  428. tsi108_read_stat(data, TSI108_STAT_RXJUMBO,
  429. TSI108_STAT_CARRY1_RXJUMBO,
  430. TSI108_STAT_RXJUMBO_CARRY, &data->rx_overruns);
  431. data->tmpstats.rx_frame_errors =
  432. tsi108_read_stat(data, TSI108_STAT_RXALIGN,
  433. TSI108_STAT_CARRY1_RXALIGN,
  434. TSI108_STAT_RXALIGN_CARRY,
  435. &data->stats.rx_frame_errors);
  436. data->tmpstats.rx_frame_errors +=
  437. tsi108_read_stat(data, TSI108_STAT_RXFCS,
  438. TSI108_STAT_CARRY1_RXFCS, TSI108_STAT_RXFCS_CARRY,
  439. &data->rx_fcs);
  440. data->tmpstats.rx_frame_errors +=
  441. tsi108_read_stat(data, TSI108_STAT_RXFRAG,
  442. TSI108_STAT_CARRY1_RXFRAG,
  443. TSI108_STAT_RXFRAG_CARRY, &data->rx_short_fcs);
  444. data->tmpstats.rx_missed_errors =
  445. tsi108_read_stat(data, TSI108_STAT_RXDROP,
  446. TSI108_STAT_CARRY1_RXDROP,
  447. TSI108_STAT_RXDROP_CARRY,
  448. &data->stats.rx_missed_errors);
  449. /* These three are maintained by software. */
  450. data->tmpstats.rx_fifo_errors = data->stats.rx_fifo_errors;
  451. data->tmpstats.rx_crc_errors = data->stats.rx_crc_errors;
  452. data->tmpstats.tx_aborted_errors =
  453. tsi108_read_stat(data, TSI108_STAT_TXEXDEF,
  454. TSI108_STAT_CARRY2_TXEXDEF,
  455. TSI108_STAT_TXEXDEF_CARRY,
  456. &data->stats.tx_aborted_errors);
  457. data->tmpstats.tx_aborted_errors +=
  458. tsi108_read_stat(data, TSI108_STAT_TXPAUSEDROP,
  459. TSI108_STAT_CARRY2_TXPAUSE,
  460. TSI108_STAT_TXPAUSEDROP_CARRY,
  461. &data->tx_pause_drop);
  462. data->tmpstats.tx_aborted_errors += excol;
  463. data->tmpstats.tx_errors = data->tmpstats.tx_aborted_errors;
  464. data->tmpstats.rx_errors = data->tmpstats.rx_length_errors +
  465. data->tmpstats.rx_crc_errors +
  466. data->tmpstats.rx_frame_errors +
  467. data->tmpstats.rx_fifo_errors + data->tmpstats.rx_missed_errors;
  468. spin_unlock_irq(&data->misclock);
  469. return &data->tmpstats;
  470. }
  471. static void tsi108_restart_rx(struct tsi108_prv_data * data, struct net_device *dev)
  472. {
  473. TSI_WRITE(TSI108_EC_RXQ_PTRHIGH,
  474. TSI108_EC_RXQ_PTRHIGH_VALID);
  475. TSI_WRITE(TSI108_EC_RXCTRL, TSI108_EC_RXCTRL_GO
  476. | TSI108_EC_RXCTRL_QUEUE0);
  477. }
  478. static void tsi108_restart_tx(struct tsi108_prv_data * data)
  479. {
  480. TSI_WRITE(TSI108_EC_TXQ_PTRHIGH,
  481. TSI108_EC_TXQ_PTRHIGH_VALID);
  482. TSI_WRITE(TSI108_EC_TXCTRL, TSI108_EC_TXCTRL_IDLEINT |
  483. TSI108_EC_TXCTRL_GO | TSI108_EC_TXCTRL_QUEUE0);
  484. }
  485. /* txlock must be held by caller, with IRQs disabled, and
  486. * with permission to re-enable them when the lock is dropped.
  487. */
  488. static void tsi108_complete_tx(struct net_device *dev)
  489. {
  490. struct tsi108_prv_data *data = netdev_priv(dev);
  491. int tx;
  492. struct sk_buff *skb;
  493. int release = 0;
  494. while (!data->txfree || data->txhead != data->txtail) {
  495. tx = data->txtail;
  496. if (data->txring[tx].misc & TSI108_TX_OWN)
  497. break;
  498. skb = data->txskbs[tx];
  499. if (!(data->txring[tx].misc & TSI108_TX_OK))
  500. printk("%s: bad tx packet, misc %x\n",
  501. dev->name, data->txring[tx].misc);
  502. data->txtail = (data->txtail + 1) % TSI108_TXRING_LEN;
  503. data->txfree++;
  504. if (data->txring[tx].misc & TSI108_TX_EOF) {
  505. dev_kfree_skb_any(skb);
  506. release++;
  507. }
  508. }
  509. if (release) {
  510. if (is_valid_ether_addr(dev->dev_addr) && data->link_up)
  511. netif_wake_queue(dev);
  512. }
  513. }
  514. static int tsi108_send_packet(struct sk_buff * skb, struct net_device *dev)
  515. {
  516. struct tsi108_prv_data *data = netdev_priv(dev);
  517. int frags = skb_shinfo(skb)->nr_frags + 1;
  518. int i;
  519. if (!data->phy_ok && net_ratelimit())
  520. printk(KERN_ERR "%s: Transmit while PHY is down!\n", dev->name);
  521. if (!data->link_up) {
  522. printk(KERN_ERR "%s: Transmit while link is down!\n",
  523. dev->name);
  524. netif_stop_queue(dev);
  525. return NETDEV_TX_BUSY;
  526. }
  527. if (data->txfree < MAX_SKB_FRAGS + 1) {
  528. netif_stop_queue(dev);
  529. if (net_ratelimit())
  530. printk(KERN_ERR "%s: Transmit with full tx ring!\n",
  531. dev->name);
  532. return NETDEV_TX_BUSY;
  533. }
  534. if (data->txfree - frags < MAX_SKB_FRAGS + 1) {
  535. netif_stop_queue(dev);
  536. }
  537. spin_lock_irq(&data->txlock);
  538. for (i = 0; i < frags; i++) {
  539. int misc = 0;
  540. int tx = data->txhead;
  541. /* This is done to mark every TSI108_TX_INT_FREQ tx buffers with
  542. * the interrupt bit. TX descriptor-complete interrupts are
  543. * enabled when the queue fills up, and masked when there is
  544. * still free space. This way, when saturating the outbound
  545. * link, the tx interrupts are kept to a reasonable level.
  546. * When the queue is not full, reclamation of skbs still occurs
  547. * as new packets are transmitted, or on a queue-empty
  548. * interrupt.
  549. */
  550. if ((tx % TSI108_TX_INT_FREQ == 0) &&
  551. ((TSI108_TXRING_LEN - data->txfree) >= TSI108_TX_INT_FREQ))
  552. misc = TSI108_TX_INT;
  553. data->txskbs[tx] = skb;
  554. if (i == 0) {
  555. data->txring[tx].buf0 = dma_map_single(NULL, skb->data,
  556. skb->len - skb->data_len, DMA_TO_DEVICE);
  557. data->txring[tx].len = skb->len - skb->data_len;
  558. misc |= TSI108_TX_SOF;
  559. } else {
  560. skb_frag_t *frag = &skb_shinfo(skb)->frags[i - 1];
  561. data->txring[tx].buf0 =
  562. dma_map_page(NULL, frag->page, frag->page_offset,
  563. frag->size, DMA_TO_DEVICE);
  564. data->txring[tx].len = frag->size;
  565. }
  566. if (i == frags - 1)
  567. misc |= TSI108_TX_EOF;
  568. if (netif_msg_pktdata(data)) {
  569. int i;
  570. printk("%s: Tx Frame contents (%d)\n", dev->name,
  571. skb->len);
  572. for (i = 0; i < skb->len; i++)
  573. printk(" %2.2x", skb->data[i]);
  574. printk(".\n");
  575. }
  576. data->txring[tx].misc = misc | TSI108_TX_OWN;
  577. data->txhead = (data->txhead + 1) % TSI108_TXRING_LEN;
  578. data->txfree--;
  579. }
  580. tsi108_complete_tx(dev);
  581. /* This must be done after the check for completed tx descriptors,
  582. * so that the tail pointer is correct.
  583. */
  584. if (!(TSI_READ(TSI108_EC_TXSTAT) & TSI108_EC_TXSTAT_QUEUE0))
  585. tsi108_restart_tx(data);
  586. spin_unlock_irq(&data->txlock);
  587. return NETDEV_TX_OK;
  588. }
  589. static int tsi108_complete_rx(struct net_device *dev, int budget)
  590. {
  591. struct tsi108_prv_data *data = netdev_priv(dev);
  592. int done = 0;
  593. while (data->rxfree && done != budget) {
  594. int rx = data->rxtail;
  595. struct sk_buff *skb;
  596. if (data->rxring[rx].misc & TSI108_RX_OWN)
  597. break;
  598. skb = data->rxskbs[rx];
  599. data->rxtail = (data->rxtail + 1) % TSI108_RXRING_LEN;
  600. data->rxfree--;
  601. done++;
  602. if (data->rxring[rx].misc & TSI108_RX_BAD) {
  603. spin_lock_irq(&data->misclock);
  604. if (data->rxring[rx].misc & TSI108_RX_CRC)
  605. data->stats.rx_crc_errors++;
  606. if (data->rxring[rx].misc & TSI108_RX_OVER)
  607. data->stats.rx_fifo_errors++;
  608. spin_unlock_irq(&data->misclock);
  609. dev_kfree_skb_any(skb);
  610. continue;
  611. }
  612. if (netif_msg_pktdata(data)) {
  613. int i;
  614. printk("%s: Rx Frame contents (%d)\n",
  615. dev->name, data->rxring[rx].len);
  616. for (i = 0; i < data->rxring[rx].len; i++)
  617. printk(" %2.2x", skb->data[i]);
  618. printk(".\n");
  619. }
  620. skb_put(skb, data->rxring[rx].len);
  621. skb->protocol = eth_type_trans(skb, dev);
  622. netif_receive_skb(skb);
  623. dev->last_rx = jiffies;
  624. }
  625. return done;
  626. }
  627. static int tsi108_refill_rx(struct net_device *dev, int budget)
  628. {
  629. struct tsi108_prv_data *data = netdev_priv(dev);
  630. int done = 0;
  631. while (data->rxfree != TSI108_RXRING_LEN && done != budget) {
  632. int rx = data->rxhead;
  633. struct sk_buff *skb;
  634. data->rxskbs[rx] = skb = dev_alloc_skb(TSI108_RXBUF_SIZE + 2);
  635. if (!skb)
  636. break;
  637. skb_reserve(skb, 2); /* Align the data on a 4-byte boundary. */
  638. data->rxring[rx].buf0 = dma_map_single(NULL, skb->data,
  639. TSI108_RX_SKB_SIZE,
  640. DMA_FROM_DEVICE);
  641. /* Sometimes the hardware sets blen to zero after packet
  642. * reception, even though the manual says that it's only ever
  643. * modified by the driver.
  644. */
  645. data->rxring[rx].blen = TSI108_RX_SKB_SIZE;
  646. data->rxring[rx].misc = TSI108_RX_OWN | TSI108_RX_INT;
  647. data->rxhead = (data->rxhead + 1) % TSI108_RXRING_LEN;
  648. data->rxfree++;
  649. done++;
  650. }
  651. if (done != 0 && !(TSI_READ(TSI108_EC_RXSTAT) &
  652. TSI108_EC_RXSTAT_QUEUE0))
  653. tsi108_restart_rx(data, dev);
  654. return done;
  655. }
  656. static int tsi108_poll(struct napi_struct *napi, int budget)
  657. {
  658. struct tsi108_prv_data *data = container_of(napi, struct tsi108_prv_data, napi);
  659. struct net_device *dev = data->dev;
  660. u32 estat = TSI_READ(TSI108_EC_RXESTAT);
  661. u32 intstat = TSI_READ(TSI108_EC_INTSTAT);
  662. int num_received = 0, num_filled = 0;
  663. intstat &= TSI108_INT_RXQUEUE0 | TSI108_INT_RXTHRESH |
  664. TSI108_INT_RXOVERRUN | TSI108_INT_RXERROR | TSI108_INT_RXWAIT;
  665. TSI_WRITE(TSI108_EC_RXESTAT, estat);
  666. TSI_WRITE(TSI108_EC_INTSTAT, intstat);
  667. if (data->rxpending || (estat & TSI108_EC_RXESTAT_Q0_DESCINT))
  668. num_received = tsi108_complete_rx(dev, budget);
  669. /* This should normally fill no more slots than the number of
  670. * packets received in tsi108_complete_rx(). The exception
  671. * is when we previously ran out of memory for RX SKBs. In that
  672. * case, it's helpful to obey the budget, not only so that the
  673. * CPU isn't hogged, but so that memory (which may still be low)
  674. * is not hogged by one device.
  675. *
  676. * A work unit is considered to be two SKBs to allow us to catch
  677. * up when the ring has shrunk due to out-of-memory but we're
  678. * still removing the full budget's worth of packets each time.
  679. */
  680. if (data->rxfree < TSI108_RXRING_LEN)
  681. num_filled = tsi108_refill_rx(dev, budget * 2);
  682. if (intstat & TSI108_INT_RXERROR) {
  683. u32 err = TSI_READ(TSI108_EC_RXERR);
  684. TSI_WRITE(TSI108_EC_RXERR, err);
  685. if (err) {
  686. if (net_ratelimit())
  687. printk(KERN_DEBUG "%s: RX error %x\n",
  688. dev->name, err);
  689. if (!(TSI_READ(TSI108_EC_RXSTAT) &
  690. TSI108_EC_RXSTAT_QUEUE0))
  691. tsi108_restart_rx(data, dev);
  692. }
  693. }
  694. if (intstat & TSI108_INT_RXOVERRUN) {
  695. spin_lock_irq(&data->misclock);
  696. data->stats.rx_fifo_errors++;
  697. spin_unlock_irq(&data->misclock);
  698. }
  699. if (num_received < budget) {
  700. data->rxpending = 0;
  701. netif_rx_complete(dev, napi);
  702. TSI_WRITE(TSI108_EC_INTMASK,
  703. TSI_READ(TSI108_EC_INTMASK)
  704. & ~(TSI108_INT_RXQUEUE0
  705. | TSI108_INT_RXTHRESH |
  706. TSI108_INT_RXOVERRUN |
  707. TSI108_INT_RXERROR |
  708. TSI108_INT_RXWAIT));
  709. } else {
  710. data->rxpending = 1;
  711. }
  712. return num_received;
  713. }
  714. static void tsi108_rx_int(struct net_device *dev)
  715. {
  716. struct tsi108_prv_data *data = netdev_priv(dev);
  717. /* A race could cause dev to already be scheduled, so it's not an
  718. * error if that happens (and interrupts shouldn't be re-masked,
  719. * because that can cause harmful races, if poll has already
  720. * unmasked them but not cleared LINK_STATE_SCHED).
  721. *
  722. * This can happen if this code races with tsi108_poll(), which masks
  723. * the interrupts after tsi108_irq_one() read the mask, but before
  724. * netif_rx_schedule is called. It could also happen due to calls
  725. * from tsi108_check_rxring().
  726. */
  727. if (netif_rx_schedule_prep(dev, &data->napi)) {
  728. /* Mask, rather than ack, the receive interrupts. The ack
  729. * will happen in tsi108_poll().
  730. */
  731. TSI_WRITE(TSI108_EC_INTMASK,
  732. TSI_READ(TSI108_EC_INTMASK) |
  733. TSI108_INT_RXQUEUE0
  734. | TSI108_INT_RXTHRESH |
  735. TSI108_INT_RXOVERRUN | TSI108_INT_RXERROR |
  736. TSI108_INT_RXWAIT);
  737. __netif_rx_schedule(dev, &data->napi);
  738. } else {
  739. if (!netif_running(dev)) {
  740. /* This can happen if an interrupt occurs while the
  741. * interface is being brought down, as the START
  742. * bit is cleared before the stop function is called.
  743. *
  744. * In this case, the interrupts must be masked, or
  745. * they will continue indefinitely.
  746. *
  747. * There's a race here if the interface is brought down
  748. * and then up in rapid succession, as the device could
  749. * be made running after the above check and before
  750. * the masking below. This will only happen if the IRQ
  751. * thread has a lower priority than the task brining
  752. * up the interface. Fixing this race would likely
  753. * require changes in generic code.
  754. */
  755. TSI_WRITE(TSI108_EC_INTMASK,
  756. TSI_READ
  757. (TSI108_EC_INTMASK) |
  758. TSI108_INT_RXQUEUE0 |
  759. TSI108_INT_RXTHRESH |
  760. TSI108_INT_RXOVERRUN |
  761. TSI108_INT_RXERROR |
  762. TSI108_INT_RXWAIT);
  763. }
  764. }
  765. }
  766. /* If the RX ring has run out of memory, try periodically
  767. * to allocate some more, as otherwise poll would never
  768. * get called (apart from the initial end-of-queue condition).
  769. *
  770. * This is called once per second (by default) from the thread.
  771. */
  772. static void tsi108_check_rxring(struct net_device *dev)
  773. {
  774. struct tsi108_prv_data *data = netdev_priv(dev);
  775. /* A poll is scheduled, as opposed to caling tsi108_refill_rx
  776. * directly, so as to keep the receive path single-threaded
  777. * (and thus not needing a lock).
  778. */
  779. if (netif_running(dev) && data->rxfree < TSI108_RXRING_LEN / 4)
  780. tsi108_rx_int(dev);
  781. }
  782. static void tsi108_tx_int(struct net_device *dev)
  783. {
  784. struct tsi108_prv_data *data = netdev_priv(dev);
  785. u32 estat = TSI_READ(TSI108_EC_TXESTAT);
  786. TSI_WRITE(TSI108_EC_TXESTAT, estat);
  787. TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_TXQUEUE0 |
  788. TSI108_INT_TXIDLE | TSI108_INT_TXERROR);
  789. if (estat & TSI108_EC_TXESTAT_Q0_ERR) {
  790. u32 err = TSI_READ(TSI108_EC_TXERR);
  791. TSI_WRITE(TSI108_EC_TXERR, err);
  792. if (err && net_ratelimit())
  793. printk(KERN_ERR "%s: TX error %x\n", dev->name, err);
  794. }
  795. if (estat & (TSI108_EC_TXESTAT_Q0_DESCINT | TSI108_EC_TXESTAT_Q0_EOQ)) {
  796. spin_lock(&data->txlock);
  797. tsi108_complete_tx(dev);
  798. spin_unlock(&data->txlock);
  799. }
  800. }
  801. static irqreturn_t tsi108_irq(int irq, void *dev_id)
  802. {
  803. struct net_device *dev = dev_id;
  804. struct tsi108_prv_data *data = netdev_priv(dev);
  805. u32 stat = TSI_READ(TSI108_EC_INTSTAT);
  806. if (!(stat & TSI108_INT_ANY))
  807. return IRQ_NONE; /* Not our interrupt */
  808. stat &= ~TSI_READ(TSI108_EC_INTMASK);
  809. if (stat & (TSI108_INT_TXQUEUE0 | TSI108_INT_TXIDLE |
  810. TSI108_INT_TXERROR))
  811. tsi108_tx_int(dev);
  812. if (stat & (TSI108_INT_RXQUEUE0 | TSI108_INT_RXTHRESH |
  813. TSI108_INT_RXWAIT | TSI108_INT_RXOVERRUN |
  814. TSI108_INT_RXERROR))
  815. tsi108_rx_int(dev);
  816. if (stat & TSI108_INT_SFN) {
  817. if (net_ratelimit())
  818. printk(KERN_DEBUG "%s: SFN error\n", dev->name);
  819. TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_SFN);
  820. }
  821. if (stat & TSI108_INT_STATCARRY) {
  822. tsi108_stat_carry(dev);
  823. TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_STATCARRY);
  824. }
  825. return IRQ_HANDLED;
  826. }
  827. static void tsi108_stop_ethernet(struct net_device *dev)
  828. {
  829. struct tsi108_prv_data *data = netdev_priv(dev);
  830. int i = 1000;
  831. /* Disable all TX and RX queues ... */
  832. TSI_WRITE(TSI108_EC_TXCTRL, 0);
  833. TSI_WRITE(TSI108_EC_RXCTRL, 0);
  834. /* ...and wait for them to become idle */
  835. while(i--) {
  836. if(!(TSI_READ(TSI108_EC_TXSTAT) & TSI108_EC_TXSTAT_ACTIVE))
  837. break;
  838. udelay(10);
  839. }
  840. i = 1000;
  841. while(i--){
  842. if(!(TSI_READ(TSI108_EC_RXSTAT) & TSI108_EC_RXSTAT_ACTIVE))
  843. return;
  844. udelay(10);
  845. }
  846. printk(KERN_ERR "%s function time out \n", __FUNCTION__);
  847. }
  848. static void tsi108_reset_ether(struct tsi108_prv_data * data)
  849. {
  850. TSI_WRITE(TSI108_MAC_CFG1, TSI108_MAC_CFG1_SOFTRST);
  851. udelay(100);
  852. TSI_WRITE(TSI108_MAC_CFG1, 0);
  853. TSI_WRITE(TSI108_EC_PORTCTRL, TSI108_EC_PORTCTRL_STATRST);
  854. udelay(100);
  855. TSI_WRITE(TSI108_EC_PORTCTRL,
  856. TSI_READ(TSI108_EC_PORTCTRL) &
  857. ~TSI108_EC_PORTCTRL_STATRST);
  858. TSI_WRITE(TSI108_EC_TXCFG, TSI108_EC_TXCFG_RST);
  859. udelay(100);
  860. TSI_WRITE(TSI108_EC_TXCFG,
  861. TSI_READ(TSI108_EC_TXCFG) &
  862. ~TSI108_EC_TXCFG_RST);
  863. TSI_WRITE(TSI108_EC_RXCFG, TSI108_EC_RXCFG_RST);
  864. udelay(100);
  865. TSI_WRITE(TSI108_EC_RXCFG,
  866. TSI_READ(TSI108_EC_RXCFG) &
  867. ~TSI108_EC_RXCFG_RST);
  868. TSI_WRITE(TSI108_MAC_MII_MGMT_CFG,
  869. TSI_READ(TSI108_MAC_MII_MGMT_CFG) |
  870. TSI108_MAC_MII_MGMT_RST);
  871. udelay(100);
  872. TSI_WRITE(TSI108_MAC_MII_MGMT_CFG,
  873. (TSI_READ(TSI108_MAC_MII_MGMT_CFG) &
  874. ~(TSI108_MAC_MII_MGMT_RST |
  875. TSI108_MAC_MII_MGMT_CLK)) | 0x07);
  876. }
  877. static int tsi108_get_mac(struct net_device *dev)
  878. {
  879. struct tsi108_prv_data *data = netdev_priv(dev);
  880. u32 word1 = TSI_READ(TSI108_MAC_ADDR1);
  881. u32 word2 = TSI_READ(TSI108_MAC_ADDR2);
  882. /* Note that the octets are reversed from what the manual says,
  883. * producing an even weirder ordering...
  884. */
  885. if (word2 == 0 && word1 == 0) {
  886. dev->dev_addr[0] = 0x00;
  887. dev->dev_addr[1] = 0x06;
  888. dev->dev_addr[2] = 0xd2;
  889. dev->dev_addr[3] = 0x00;
  890. dev->dev_addr[4] = 0x00;
  891. if (0x8 == data->phy)
  892. dev->dev_addr[5] = 0x01;
  893. else
  894. dev->dev_addr[5] = 0x02;
  895. word2 = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 24);
  896. word1 = (dev->dev_addr[2] << 0) | (dev->dev_addr[3] << 8) |
  897. (dev->dev_addr[4] << 16) | (dev->dev_addr[5] << 24);
  898. TSI_WRITE(TSI108_MAC_ADDR1, word1);
  899. TSI_WRITE(TSI108_MAC_ADDR2, word2);
  900. } else {
  901. dev->dev_addr[0] = (word2 >> 16) & 0xff;
  902. dev->dev_addr[1] = (word2 >> 24) & 0xff;
  903. dev->dev_addr[2] = (word1 >> 0) & 0xff;
  904. dev->dev_addr[3] = (word1 >> 8) & 0xff;
  905. dev->dev_addr[4] = (word1 >> 16) & 0xff;
  906. dev->dev_addr[5] = (word1 >> 24) & 0xff;
  907. }
  908. if (!is_valid_ether_addr(dev->dev_addr)) {
  909. printk("KERN_ERR: word1: %08x, word2: %08x\n", word1, word2);
  910. return -EINVAL;
  911. }
  912. return 0;
  913. }
  914. static int tsi108_set_mac(struct net_device *dev, void *addr)
  915. {
  916. struct tsi108_prv_data *data = netdev_priv(dev);
  917. u32 word1, word2;
  918. int i;
  919. if (!is_valid_ether_addr(addr))
  920. return -EINVAL;
  921. for (i = 0; i < 6; i++)
  922. /* +2 is for the offset of the HW addr type */
  923. dev->dev_addr[i] = ((unsigned char *)addr)[i + 2];
  924. word2 = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 24);
  925. word1 = (dev->dev_addr[2] << 0) | (dev->dev_addr[3] << 8) |
  926. (dev->dev_addr[4] << 16) | (dev->dev_addr[5] << 24);
  927. spin_lock_irq(&data->misclock);
  928. TSI_WRITE(TSI108_MAC_ADDR1, word1);
  929. TSI_WRITE(TSI108_MAC_ADDR2, word2);
  930. spin_lock(&data->txlock);
  931. if (data->txfree && data->link_up)
  932. netif_wake_queue(dev);
  933. spin_unlock(&data->txlock);
  934. spin_unlock_irq(&data->misclock);
  935. return 0;
  936. }
  937. /* Protected by dev->xmit_lock. */
  938. static void tsi108_set_rx_mode(struct net_device *dev)
  939. {
  940. struct tsi108_prv_data *data = netdev_priv(dev);
  941. u32 rxcfg = TSI_READ(TSI108_EC_RXCFG);
  942. if (dev->flags & IFF_PROMISC) {
  943. rxcfg &= ~(TSI108_EC_RXCFG_UC_HASH | TSI108_EC_RXCFG_MC_HASH);
  944. rxcfg |= TSI108_EC_RXCFG_UFE | TSI108_EC_RXCFG_MFE;
  945. goto out;
  946. }
  947. rxcfg &= ~(TSI108_EC_RXCFG_UFE | TSI108_EC_RXCFG_MFE);
  948. if (dev->flags & IFF_ALLMULTI || dev->mc_count) {
  949. int i;
  950. struct dev_mc_list *mc = dev->mc_list;
  951. rxcfg |= TSI108_EC_RXCFG_MFE | TSI108_EC_RXCFG_MC_HASH;
  952. memset(data->mc_hash, 0, sizeof(data->mc_hash));
  953. while (mc) {
  954. u32 hash, crc;
  955. if (mc->dmi_addrlen == 6) {
  956. crc = ether_crc(6, mc->dmi_addr);
  957. hash = crc >> 23;
  958. __set_bit(hash, &data->mc_hash[0]);
  959. } else {
  960. printk(KERN_ERR
  961. "%s: got multicast address of length %d "
  962. "instead of 6.\n", dev->name,
  963. mc->dmi_addrlen);
  964. }
  965. mc = mc->next;
  966. }
  967. TSI_WRITE(TSI108_EC_HASHADDR,
  968. TSI108_EC_HASHADDR_AUTOINC |
  969. TSI108_EC_HASHADDR_MCAST);
  970. for (i = 0; i < 16; i++) {
  971. /* The manual says that the hardware may drop
  972. * back-to-back writes to the data register.
  973. */
  974. udelay(1);
  975. TSI_WRITE(TSI108_EC_HASHDATA,
  976. data->mc_hash[i]);
  977. }
  978. }
  979. out:
  980. TSI_WRITE(TSI108_EC_RXCFG, rxcfg);
  981. }
  982. static void tsi108_init_phy(struct net_device *dev)
  983. {
  984. struct tsi108_prv_data *data = netdev_priv(dev);
  985. u32 i = 0;
  986. u16 phyval = 0;
  987. unsigned long flags;
  988. spin_lock_irqsave(&phy_lock, flags);
  989. tsi108_write_mii(data, MII_BMCR, BMCR_RESET);
  990. while (i--){
  991. if(!(tsi108_read_mii(data, MII_BMCR) & BMCR_RESET))
  992. break;
  993. udelay(10);
  994. }
  995. if (i == 0)
  996. printk(KERN_ERR "%s function time out \n", __FUNCTION__);
  997. if (data->phy_type == TSI108_PHY_BCM54XX) {
  998. tsi108_write_mii(data, 0x09, 0x0300);
  999. tsi108_write_mii(data, 0x10, 0x1020);
  1000. tsi108_write_mii(data, 0x1c, 0x8c00);
  1001. }
  1002. tsi108_write_mii(data,
  1003. MII_BMCR,
  1004. BMCR_ANENABLE | BMCR_ANRESTART);
  1005. while (tsi108_read_mii(data, MII_BMCR) & BMCR_ANRESTART)
  1006. cpu_relax();
  1007. /* Set G/MII mode and receive clock select in TBI control #2. The
  1008. * second port won't work if this isn't done, even though we don't
  1009. * use TBI mode.
  1010. */
  1011. tsi108_write_tbi(data, 0x11, 0x30);
  1012. /* FIXME: It seems to take more than 2 back-to-back reads to the
  1013. * PHY_STAT register before the link up status bit is set.
  1014. */
  1015. data->link_up = 1;
  1016. while (!((phyval = tsi108_read_mii(data, MII_BMSR)) &
  1017. BMSR_LSTATUS)) {
  1018. if (i++ > (MII_READ_DELAY / 10)) {
  1019. data->link_up = 0;
  1020. break;
  1021. }
  1022. spin_unlock_irqrestore(&phy_lock, flags);
  1023. msleep(10);
  1024. spin_lock_irqsave(&phy_lock, flags);
  1025. }
  1026. printk(KERN_DEBUG "PHY_STAT reg contains %08x\n", phyval);
  1027. data->phy_ok = 1;
  1028. data->init_media = 1;
  1029. spin_unlock_irqrestore(&phy_lock, flags);
  1030. }
  1031. static void tsi108_kill_phy(struct net_device *dev)
  1032. {
  1033. struct tsi108_prv_data *data = netdev_priv(dev);
  1034. unsigned long flags;
  1035. spin_lock_irqsave(&phy_lock, flags);
  1036. tsi108_write_mii(data, MII_BMCR, BMCR_PDOWN);
  1037. data->phy_ok = 0;
  1038. spin_unlock_irqrestore(&phy_lock, flags);
  1039. }
  1040. static int tsi108_open(struct net_device *dev)
  1041. {
  1042. int i;
  1043. struct tsi108_prv_data *data = netdev_priv(dev);
  1044. unsigned int rxring_size = TSI108_RXRING_LEN * sizeof(rx_desc);
  1045. unsigned int txring_size = TSI108_TXRING_LEN * sizeof(tx_desc);
  1046. i = request_irq(data->irq_num, tsi108_irq, 0, dev->name, dev);
  1047. if (i != 0) {
  1048. printk(KERN_ERR "tsi108_eth%d: Could not allocate IRQ%d.\n",
  1049. data->id, data->irq_num);
  1050. return i;
  1051. } else {
  1052. dev->irq = data->irq_num;
  1053. printk(KERN_NOTICE
  1054. "tsi108_open : Port %d Assigned IRQ %d to %s\n",
  1055. data->id, dev->irq, dev->name);
  1056. }
  1057. data->rxring = dma_alloc_coherent(NULL, rxring_size,
  1058. &data->rxdma, GFP_KERNEL);
  1059. if (!data->rxring) {
  1060. printk(KERN_DEBUG
  1061. "TSI108_ETH: failed to allocate memory for rxring!\n");
  1062. return -ENOMEM;
  1063. } else {
  1064. memset(data->rxring, 0, rxring_size);
  1065. }
  1066. data->txring = dma_alloc_coherent(NULL, txring_size,
  1067. &data->txdma, GFP_KERNEL);
  1068. if (!data->txring) {
  1069. printk(KERN_DEBUG
  1070. "TSI108_ETH: failed to allocate memory for txring!\n");
  1071. pci_free_consistent(0, rxring_size, data->rxring, data->rxdma);
  1072. return -ENOMEM;
  1073. } else {
  1074. memset(data->txring, 0, txring_size);
  1075. }
  1076. for (i = 0; i < TSI108_RXRING_LEN; i++) {
  1077. data->rxring[i].next0 = data->rxdma + (i + 1) * sizeof(rx_desc);
  1078. data->rxring[i].blen = TSI108_RXBUF_SIZE;
  1079. data->rxring[i].vlan = 0;
  1080. }
  1081. data->rxring[TSI108_RXRING_LEN - 1].next0 = data->rxdma;
  1082. data->rxtail = 0;
  1083. data->rxhead = 0;
  1084. for (i = 0; i < TSI108_RXRING_LEN; i++) {
  1085. struct sk_buff *skb = dev_alloc_skb(TSI108_RXBUF_SIZE + NET_IP_ALIGN);
  1086. if (!skb) {
  1087. /* Bah. No memory for now, but maybe we'll get
  1088. * some more later.
  1089. * For now, we'll live with the smaller ring.
  1090. */
  1091. printk(KERN_WARNING
  1092. "%s: Could only allocate %d receive skb(s).\n",
  1093. dev->name, i);
  1094. data->rxhead = i;
  1095. break;
  1096. }
  1097. data->rxskbs[i] = skb;
  1098. /* Align the payload on a 4-byte boundary */
  1099. skb_reserve(skb, 2);
  1100. data->rxskbs[i] = skb;
  1101. data->rxring[i].buf0 = virt_to_phys(data->rxskbs[i]->data);
  1102. data->rxring[i].misc = TSI108_RX_OWN | TSI108_RX_INT;
  1103. }
  1104. data->rxfree = i;
  1105. TSI_WRITE(TSI108_EC_RXQ_PTRLOW, data->rxdma);
  1106. for (i = 0; i < TSI108_TXRING_LEN; i++) {
  1107. data->txring[i].next0 = data->txdma + (i + 1) * sizeof(tx_desc);
  1108. data->txring[i].misc = 0;
  1109. }
  1110. data->txring[TSI108_TXRING_LEN - 1].next0 = data->txdma;
  1111. data->txtail = 0;
  1112. data->txhead = 0;
  1113. data->txfree = TSI108_TXRING_LEN;
  1114. TSI_WRITE(TSI108_EC_TXQ_PTRLOW, data->txdma);
  1115. tsi108_init_phy(dev);
  1116. napi_enable(&data->napi);
  1117. setup_timer(&data->timer, tsi108_timed_checker, (unsigned long)dev);
  1118. mod_timer(&data->timer, jiffies + 1);
  1119. tsi108_restart_rx(data, dev);
  1120. TSI_WRITE(TSI108_EC_INTSTAT, ~0);
  1121. TSI_WRITE(TSI108_EC_INTMASK,
  1122. ~(TSI108_INT_TXQUEUE0 | TSI108_INT_RXERROR |
  1123. TSI108_INT_RXTHRESH | TSI108_INT_RXQUEUE0 |
  1124. TSI108_INT_RXOVERRUN | TSI108_INT_RXWAIT |
  1125. TSI108_INT_SFN | TSI108_INT_STATCARRY));
  1126. TSI_WRITE(TSI108_MAC_CFG1,
  1127. TSI108_MAC_CFG1_RXEN | TSI108_MAC_CFG1_TXEN);
  1128. netif_start_queue(dev);
  1129. return 0;
  1130. }
  1131. static int tsi108_close(struct net_device *dev)
  1132. {
  1133. struct tsi108_prv_data *data = netdev_priv(dev);
  1134. netif_stop_queue(dev);
  1135. napi_disable(&data->napi);
  1136. del_timer_sync(&data->timer);
  1137. tsi108_stop_ethernet(dev);
  1138. tsi108_kill_phy(dev);
  1139. TSI_WRITE(TSI108_EC_INTMASK, ~0);
  1140. TSI_WRITE(TSI108_MAC_CFG1, 0);
  1141. /* Check for any pending TX packets, and drop them. */
  1142. while (!data->txfree || data->txhead != data->txtail) {
  1143. int tx = data->txtail;
  1144. struct sk_buff *skb;
  1145. skb = data->txskbs[tx];
  1146. data->txtail = (data->txtail + 1) % TSI108_TXRING_LEN;
  1147. data->txfree++;
  1148. dev_kfree_skb(skb);
  1149. }
  1150. synchronize_irq(data->irq_num);
  1151. free_irq(data->irq_num, dev);
  1152. /* Discard the RX ring. */
  1153. while (data->rxfree) {
  1154. int rx = data->rxtail;
  1155. struct sk_buff *skb;
  1156. skb = data->rxskbs[rx];
  1157. data->rxtail = (data->rxtail + 1) % TSI108_RXRING_LEN;
  1158. data->rxfree--;
  1159. dev_kfree_skb(skb);
  1160. }
  1161. dma_free_coherent(0,
  1162. TSI108_RXRING_LEN * sizeof(rx_desc),
  1163. data->rxring, data->rxdma);
  1164. dma_free_coherent(0,
  1165. TSI108_TXRING_LEN * sizeof(tx_desc),
  1166. data->txring, data->txdma);
  1167. return 0;
  1168. }
  1169. static void tsi108_init_mac(struct net_device *dev)
  1170. {
  1171. struct tsi108_prv_data *data = netdev_priv(dev);
  1172. TSI_WRITE(TSI108_MAC_CFG2, TSI108_MAC_CFG2_DFLT_PREAMBLE |
  1173. TSI108_MAC_CFG2_PADCRC);
  1174. TSI_WRITE(TSI108_EC_TXTHRESH,
  1175. (192 << TSI108_EC_TXTHRESH_STARTFILL) |
  1176. (192 << TSI108_EC_TXTHRESH_STOPFILL));
  1177. TSI_WRITE(TSI108_STAT_CARRYMASK1,
  1178. ~(TSI108_STAT_CARRY1_RXBYTES |
  1179. TSI108_STAT_CARRY1_RXPKTS |
  1180. TSI108_STAT_CARRY1_RXFCS |
  1181. TSI108_STAT_CARRY1_RXMCAST |
  1182. TSI108_STAT_CARRY1_RXALIGN |
  1183. TSI108_STAT_CARRY1_RXLENGTH |
  1184. TSI108_STAT_CARRY1_RXRUNT |
  1185. TSI108_STAT_CARRY1_RXJUMBO |
  1186. TSI108_STAT_CARRY1_RXFRAG |
  1187. TSI108_STAT_CARRY1_RXJABBER |
  1188. TSI108_STAT_CARRY1_RXDROP));
  1189. TSI_WRITE(TSI108_STAT_CARRYMASK2,
  1190. ~(TSI108_STAT_CARRY2_TXBYTES |
  1191. TSI108_STAT_CARRY2_TXPKTS |
  1192. TSI108_STAT_CARRY2_TXEXDEF |
  1193. TSI108_STAT_CARRY2_TXEXCOL |
  1194. TSI108_STAT_CARRY2_TXTCOL |
  1195. TSI108_STAT_CARRY2_TXPAUSE));
  1196. TSI_WRITE(TSI108_EC_PORTCTRL, TSI108_EC_PORTCTRL_STATEN);
  1197. TSI_WRITE(TSI108_MAC_CFG1, 0);
  1198. TSI_WRITE(TSI108_EC_RXCFG,
  1199. TSI108_EC_RXCFG_SE | TSI108_EC_RXCFG_BFE);
  1200. TSI_WRITE(TSI108_EC_TXQ_CFG, TSI108_EC_TXQ_CFG_DESC_INT |
  1201. TSI108_EC_TXQ_CFG_EOQ_OWN_INT |
  1202. TSI108_EC_TXQ_CFG_WSWP | (TSI108_PBM_PORT <<
  1203. TSI108_EC_TXQ_CFG_SFNPORT));
  1204. TSI_WRITE(TSI108_EC_RXQ_CFG, TSI108_EC_RXQ_CFG_DESC_INT |
  1205. TSI108_EC_RXQ_CFG_EOQ_OWN_INT |
  1206. TSI108_EC_RXQ_CFG_WSWP | (TSI108_PBM_PORT <<
  1207. TSI108_EC_RXQ_CFG_SFNPORT));
  1208. TSI_WRITE(TSI108_EC_TXQ_BUFCFG,
  1209. TSI108_EC_TXQ_BUFCFG_BURST256 |
  1210. TSI108_EC_TXQ_BUFCFG_BSWP | (TSI108_PBM_PORT <<
  1211. TSI108_EC_TXQ_BUFCFG_SFNPORT));
  1212. TSI_WRITE(TSI108_EC_RXQ_BUFCFG,
  1213. TSI108_EC_RXQ_BUFCFG_BURST256 |
  1214. TSI108_EC_RXQ_BUFCFG_BSWP | (TSI108_PBM_PORT <<
  1215. TSI108_EC_RXQ_BUFCFG_SFNPORT));
  1216. TSI_WRITE(TSI108_EC_INTMASK, ~0);
  1217. }
  1218. static int tsi108_do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
  1219. {
  1220. struct tsi108_prv_data *data = netdev_priv(dev);
  1221. return generic_mii_ioctl(&data->mii_if, if_mii(rq), cmd, NULL);
  1222. }
  1223. static int
  1224. tsi108_init_one(struct platform_device *pdev)
  1225. {
  1226. struct net_device *dev = NULL;
  1227. struct tsi108_prv_data *data = NULL;
  1228. hw_info *einfo;
  1229. int err = 0;
  1230. DECLARE_MAC_BUF(mac);
  1231. einfo = pdev->dev.platform_data;
  1232. if (NULL == einfo) {
  1233. printk(KERN_ERR "tsi-eth %d: Missing additional data!\n",
  1234. pdev->id);
  1235. return -ENODEV;
  1236. }
  1237. /* Create an ethernet device instance */
  1238. dev = alloc_etherdev(sizeof(struct tsi108_prv_data));
  1239. if (!dev) {
  1240. printk("tsi108_eth: Could not allocate a device structure\n");
  1241. return -ENOMEM;
  1242. }
  1243. printk("tsi108_eth%d: probe...\n", pdev->id);
  1244. data = netdev_priv(dev);
  1245. data->dev = dev;
  1246. pr_debug("tsi108_eth%d:regs:phyresgs:phy:irq_num=0x%x:0x%x:0x%x:0x%x\n",
  1247. pdev->id, einfo->regs, einfo->phyregs,
  1248. einfo->phy, einfo->irq_num);
  1249. data->regs = ioremap(einfo->regs, 0x400);
  1250. if (NULL == data->regs) {
  1251. err = -ENOMEM;
  1252. goto regs_fail;
  1253. }
  1254. data->phyregs = ioremap(einfo->phyregs, 0x400);
  1255. if (NULL == data->phyregs) {
  1256. err = -ENOMEM;
  1257. goto regs_fail;
  1258. }
  1259. /* MII setup */
  1260. data->mii_if.dev = dev;
  1261. data->mii_if.mdio_read = tsi108_mdio_read;
  1262. data->mii_if.mdio_write = tsi108_mdio_write;
  1263. data->mii_if.phy_id = einfo->phy;
  1264. data->mii_if.phy_id_mask = 0x1f;
  1265. data->mii_if.reg_num_mask = 0x1f;
  1266. data->mii_if.supports_gmii = mii_check_gmii_support(&data->mii_if);
  1267. data->phy = einfo->phy;
  1268. data->phy_type = einfo->phy_type;
  1269. data->irq_num = einfo->irq_num;
  1270. data->id = pdev->id;
  1271. dev->open = tsi108_open;
  1272. dev->stop = tsi108_close;
  1273. dev->hard_start_xmit = tsi108_send_packet;
  1274. dev->set_mac_address = tsi108_set_mac;
  1275. dev->set_multicast_list = tsi108_set_rx_mode;
  1276. dev->get_stats = tsi108_get_stats;
  1277. netif_napi_add(dev, &data->napi, tsi108_poll, 64);
  1278. dev->do_ioctl = tsi108_do_ioctl;
  1279. /* Apparently, the Linux networking code won't use scatter-gather
  1280. * if the hardware doesn't do checksums. However, it's faster
  1281. * to checksum in place and use SG, as (among other reasons)
  1282. * the cache won't be dirtied (which then has to be flushed
  1283. * before DMA). The checksumming is done by the driver (via
  1284. * a new function skb_csum_dev() in net/core/skbuff.c).
  1285. */
  1286. dev->features = NETIF_F_HIGHDMA;
  1287. spin_lock_init(&data->txlock);
  1288. spin_lock_init(&data->misclock);
  1289. tsi108_reset_ether(data);
  1290. tsi108_kill_phy(dev);
  1291. if ((err = tsi108_get_mac(dev)) != 0) {
  1292. printk(KERN_ERR "%s: Invalid MAC address. Please correct.\n",
  1293. dev->name);
  1294. goto register_fail;
  1295. }
  1296. tsi108_init_mac(dev);
  1297. err = register_netdev(dev);
  1298. if (err) {
  1299. printk(KERN_ERR "%s: Cannot register net device, aborting.\n",
  1300. dev->name);
  1301. goto register_fail;
  1302. }
  1303. printk(KERN_INFO "%s: Tsi108 Gigabit Ethernet, MAC: %s\n",
  1304. dev->name, print_mac(mac, dev->dev_addr));
  1305. #ifdef DEBUG
  1306. data->msg_enable = DEBUG;
  1307. dump_eth_one(dev);
  1308. #endif
  1309. return 0;
  1310. register_fail:
  1311. iounmap(data->regs);
  1312. iounmap(data->phyregs);
  1313. regs_fail:
  1314. free_netdev(dev);
  1315. return err;
  1316. }
  1317. /* There's no way to either get interrupts from the PHY when
  1318. * something changes, or to have the Tsi108 automatically communicate
  1319. * with the PHY to reconfigure itself.
  1320. *
  1321. * Thus, we have to do it using a timer.
  1322. */
  1323. static void tsi108_timed_checker(unsigned long dev_ptr)
  1324. {
  1325. struct net_device *dev = (struct net_device *)dev_ptr;
  1326. struct tsi108_prv_data *data = netdev_priv(dev);
  1327. tsi108_check_phy(dev);
  1328. tsi108_check_rxring(dev);
  1329. mod_timer(&data->timer, jiffies + CHECK_PHY_INTERVAL);
  1330. }
  1331. static int tsi108_ether_init(void)
  1332. {
  1333. int ret;
  1334. ret = platform_driver_register (&tsi_eth_driver);
  1335. if (ret < 0){
  1336. printk("tsi108_ether_init: error initializing ethernet "
  1337. "device\n");
  1338. return ret;
  1339. }
  1340. return 0;
  1341. }
  1342. static int tsi108_ether_remove(struct platform_device *pdev)
  1343. {
  1344. struct net_device *dev = platform_get_drvdata(pdev);
  1345. struct tsi108_prv_data *priv = netdev_priv(dev);
  1346. unregister_netdev(dev);
  1347. tsi108_stop_ethernet(dev);
  1348. platform_set_drvdata(pdev, NULL);
  1349. iounmap(priv->regs);
  1350. iounmap(priv->phyregs);
  1351. free_netdev(dev);
  1352. return 0;
  1353. }
  1354. static void tsi108_ether_exit(void)
  1355. {
  1356. platform_driver_unregister(&tsi_eth_driver);
  1357. }
  1358. module_init(tsi108_ether_init);
  1359. module_exit(tsi108_ether_exit);
  1360. MODULE_AUTHOR("Tundra Semiconductor Corporation");
  1361. MODULE_DESCRIPTION("Tsi108 Gigabit Ethernet driver");
  1362. MODULE_LICENSE("GPL");