sunlance.c 41 KB

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  1. /* $Id: sunlance.c,v 1.112 2002/01/15 06:48:55 davem Exp $
  2. * lance.c: Linux/Sparc/Lance driver
  3. *
  4. * Written 1995, 1996 by Miguel de Icaza
  5. * Sources:
  6. * The Linux depca driver
  7. * The Linux lance driver.
  8. * The Linux skeleton driver.
  9. * The NetBSD Sparc/Lance driver.
  10. * Theo de Raadt (deraadt@openbsd.org)
  11. * NCR92C990 Lan Controller manual
  12. *
  13. * 1.4:
  14. * Added support to run with a ledma on the Sun4m
  15. *
  16. * 1.5:
  17. * Added multiple card detection.
  18. *
  19. * 4/17/96: Burst sizes and tpe selection on sun4m by Eddie C. Dost
  20. * (ecd@skynet.be)
  21. *
  22. * 5/15/96: auto carrier detection on sun4m by Eddie C. Dost
  23. * (ecd@skynet.be)
  24. *
  25. * 5/17/96: lebuffer on scsi/ether cards now work David S. Miller
  26. * (davem@caip.rutgers.edu)
  27. *
  28. * 5/29/96: override option 'tpe-link-test?', if it is 'false', as
  29. * this disables auto carrier detection on sun4m. Eddie C. Dost
  30. * (ecd@skynet.be)
  31. *
  32. * 1.7:
  33. * 6/26/96: Bug fix for multiple ledmas, miguel.
  34. *
  35. * 1.8:
  36. * Stole multicast code from depca.c, fixed lance_tx.
  37. *
  38. * 1.9:
  39. * 8/21/96: Fixed the multicast code (Pedro Roque)
  40. *
  41. * 8/28/96: Send fake packet in lance_open() if auto_select is true,
  42. * so we can detect the carrier loss condition in time.
  43. * Eddie C. Dost (ecd@skynet.be)
  44. *
  45. * 9/15/96: Align rx_buf so that eth_copy_and_sum() won't cause an
  46. * MNA trap during chksum_partial_copy(). (ecd@skynet.be)
  47. *
  48. * 11/17/96: Handle LE_C0_MERR in lance_interrupt(). (ecd@skynet.be)
  49. *
  50. * 12/22/96: Don't loop forever in lance_rx() on incomplete packets.
  51. * This was the sun4c killer. Shit, stupid bug.
  52. * (ecd@skynet.be)
  53. *
  54. * 1.10:
  55. * 1/26/97: Modularize driver. (ecd@skynet.be)
  56. *
  57. * 1.11:
  58. * 12/27/97: Added sun4d support. (jj@sunsite.mff.cuni.cz)
  59. *
  60. * 1.12:
  61. * 11/3/99: Fixed SMP race in lance_start_xmit found by davem.
  62. * Anton Blanchard (anton@progsoc.uts.edu.au)
  63. * 2.00: 11/9/99: Massive overhaul and port to new SBUS driver interfaces.
  64. * David S. Miller (davem@redhat.com)
  65. * 2.01:
  66. * 11/08/01: Use library crc32 functions (Matt_Domsch@dell.com)
  67. *
  68. */
  69. #undef DEBUG_DRIVER
  70. static char lancestr[] = "LANCE";
  71. #include <linux/module.h>
  72. #include <linux/kernel.h>
  73. #include <linux/types.h>
  74. #include <linux/fcntl.h>
  75. #include <linux/interrupt.h>
  76. #include <linux/ioport.h>
  77. #include <linux/in.h>
  78. #include <linux/slab.h>
  79. #include <linux/string.h>
  80. #include <linux/delay.h>
  81. #include <linux/init.h>
  82. #include <linux/crc32.h>
  83. #include <linux/errno.h>
  84. #include <linux/socket.h> /* Used for the temporal inet entries and routing */
  85. #include <linux/route.h>
  86. #include <linux/netdevice.h>
  87. #include <linux/etherdevice.h>
  88. #include <linux/skbuff.h>
  89. #include <linux/ethtool.h>
  90. #include <linux/bitops.h>
  91. #include <asm/system.h>
  92. #include <asm/io.h>
  93. #include <asm/dma.h>
  94. #include <asm/pgtable.h>
  95. #include <asm/byteorder.h> /* Used by the checksum routines */
  96. #include <asm/idprom.h>
  97. #include <asm/sbus.h>
  98. #include <asm/prom.h>
  99. #include <asm/auxio.h> /* For tpe-link-test? setting */
  100. #include <asm/irq.h>
  101. #define DRV_NAME "sunlance"
  102. #define DRV_VERSION "2.02"
  103. #define DRV_RELDATE "8/24/03"
  104. #define DRV_AUTHOR "Miguel de Icaza (miguel@nuclecu.unam.mx)"
  105. static char version[] =
  106. DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE " " DRV_AUTHOR "\n";
  107. MODULE_VERSION(DRV_VERSION);
  108. MODULE_AUTHOR(DRV_AUTHOR);
  109. MODULE_DESCRIPTION("Sun Lance ethernet driver");
  110. MODULE_LICENSE("GPL");
  111. /* Define: 2^4 Tx buffers and 2^4 Rx buffers */
  112. #ifndef LANCE_LOG_TX_BUFFERS
  113. #define LANCE_LOG_TX_BUFFERS 4
  114. #define LANCE_LOG_RX_BUFFERS 4
  115. #endif
  116. #define LE_CSR0 0
  117. #define LE_CSR1 1
  118. #define LE_CSR2 2
  119. #define LE_CSR3 3
  120. #define LE_MO_PROM 0x8000 /* Enable promiscuous mode */
  121. #define LE_C0_ERR 0x8000 /* Error: set if BAB, SQE, MISS or ME is set */
  122. #define LE_C0_BABL 0x4000 /* BAB: Babble: tx timeout. */
  123. #define LE_C0_CERR 0x2000 /* SQE: Signal quality error */
  124. #define LE_C0_MISS 0x1000 /* MISS: Missed a packet */
  125. #define LE_C0_MERR 0x0800 /* ME: Memory error */
  126. #define LE_C0_RINT 0x0400 /* Received interrupt */
  127. #define LE_C0_TINT 0x0200 /* Transmitter Interrupt */
  128. #define LE_C0_IDON 0x0100 /* IFIN: Init finished. */
  129. #define LE_C0_INTR 0x0080 /* Interrupt or error */
  130. #define LE_C0_INEA 0x0040 /* Interrupt enable */
  131. #define LE_C0_RXON 0x0020 /* Receiver on */
  132. #define LE_C0_TXON 0x0010 /* Transmitter on */
  133. #define LE_C0_TDMD 0x0008 /* Transmitter demand */
  134. #define LE_C0_STOP 0x0004 /* Stop the card */
  135. #define LE_C0_STRT 0x0002 /* Start the card */
  136. #define LE_C0_INIT 0x0001 /* Init the card */
  137. #define LE_C3_BSWP 0x4 /* SWAP */
  138. #define LE_C3_ACON 0x2 /* ALE Control */
  139. #define LE_C3_BCON 0x1 /* Byte control */
  140. /* Receive message descriptor 1 */
  141. #define LE_R1_OWN 0x80 /* Who owns the entry */
  142. #define LE_R1_ERR 0x40 /* Error: if FRA, OFL, CRC or BUF is set */
  143. #define LE_R1_FRA 0x20 /* FRA: Frame error */
  144. #define LE_R1_OFL 0x10 /* OFL: Frame overflow */
  145. #define LE_R1_CRC 0x08 /* CRC error */
  146. #define LE_R1_BUF 0x04 /* BUF: Buffer error */
  147. #define LE_R1_SOP 0x02 /* Start of packet */
  148. #define LE_R1_EOP 0x01 /* End of packet */
  149. #define LE_R1_POK 0x03 /* Packet is complete: SOP + EOP */
  150. #define LE_T1_OWN 0x80 /* Lance owns the packet */
  151. #define LE_T1_ERR 0x40 /* Error summary */
  152. #define LE_T1_EMORE 0x10 /* Error: more than one retry needed */
  153. #define LE_T1_EONE 0x08 /* Error: one retry needed */
  154. #define LE_T1_EDEF 0x04 /* Error: deferred */
  155. #define LE_T1_SOP 0x02 /* Start of packet */
  156. #define LE_T1_EOP 0x01 /* End of packet */
  157. #define LE_T1_POK 0x03 /* Packet is complete: SOP + EOP */
  158. #define LE_T3_BUF 0x8000 /* Buffer error */
  159. #define LE_T3_UFL 0x4000 /* Error underflow */
  160. #define LE_T3_LCOL 0x1000 /* Error late collision */
  161. #define LE_T3_CLOS 0x0800 /* Error carrier loss */
  162. #define LE_T3_RTY 0x0400 /* Error retry */
  163. #define LE_T3_TDR 0x03ff /* Time Domain Reflectometry counter */
  164. #define TX_RING_SIZE (1 << (LANCE_LOG_TX_BUFFERS))
  165. #define TX_RING_MOD_MASK (TX_RING_SIZE - 1)
  166. #define TX_RING_LEN_BITS ((LANCE_LOG_TX_BUFFERS) << 29)
  167. #define TX_NEXT(__x) (((__x)+1) & TX_RING_MOD_MASK)
  168. #define RX_RING_SIZE (1 << (LANCE_LOG_RX_BUFFERS))
  169. #define RX_RING_MOD_MASK (RX_RING_SIZE - 1)
  170. #define RX_RING_LEN_BITS ((LANCE_LOG_RX_BUFFERS) << 29)
  171. #define RX_NEXT(__x) (((__x)+1) & RX_RING_MOD_MASK)
  172. #define PKT_BUF_SZ 1544
  173. #define RX_BUFF_SIZE PKT_BUF_SZ
  174. #define TX_BUFF_SIZE PKT_BUF_SZ
  175. struct lance_rx_desc {
  176. u16 rmd0; /* low address of packet */
  177. u8 rmd1_bits; /* descriptor bits */
  178. u8 rmd1_hadr; /* high address of packet */
  179. s16 length; /* This length is 2s complement (negative)!
  180. * Buffer length
  181. */
  182. u16 mblength; /* This is the actual number of bytes received */
  183. };
  184. struct lance_tx_desc {
  185. u16 tmd0; /* low address of packet */
  186. u8 tmd1_bits; /* descriptor bits */
  187. u8 tmd1_hadr; /* high address of packet */
  188. s16 length; /* Length is 2s complement (negative)! */
  189. u16 misc;
  190. };
  191. /* The LANCE initialization block, described in databook. */
  192. /* On the Sparc, this block should be on a DMA region */
  193. struct lance_init_block {
  194. u16 mode; /* Pre-set mode (reg. 15) */
  195. u8 phys_addr[6]; /* Physical ethernet address */
  196. u32 filter[2]; /* Multicast filter. */
  197. /* Receive and transmit ring base, along with extra bits. */
  198. u16 rx_ptr; /* receive descriptor addr */
  199. u16 rx_len; /* receive len and high addr */
  200. u16 tx_ptr; /* transmit descriptor addr */
  201. u16 tx_len; /* transmit len and high addr */
  202. /* The Tx and Rx ring entries must aligned on 8-byte boundaries. */
  203. struct lance_rx_desc brx_ring[RX_RING_SIZE];
  204. struct lance_tx_desc btx_ring[TX_RING_SIZE];
  205. u8 tx_buf [TX_RING_SIZE][TX_BUFF_SIZE];
  206. u8 pad[2]; /* align rx_buf for copy_and_sum(). */
  207. u8 rx_buf [RX_RING_SIZE][RX_BUFF_SIZE];
  208. };
  209. #define libdesc_offset(rt, elem) \
  210. ((__u32)(((unsigned long)(&(((struct lance_init_block *)0)->rt[elem])))))
  211. #define libbuff_offset(rt, elem) \
  212. ((__u32)(((unsigned long)(&(((struct lance_init_block *)0)->rt[elem][0])))))
  213. struct lance_private {
  214. void __iomem *lregs; /* Lance RAP/RDP regs. */
  215. void __iomem *dregs; /* DMA controller regs. */
  216. struct lance_init_block __iomem *init_block_iomem;
  217. struct lance_init_block *init_block_mem;
  218. spinlock_t lock;
  219. int rx_new, tx_new;
  220. int rx_old, tx_old;
  221. struct sbus_dma *ledma; /* If set this points to ledma */
  222. char tpe; /* cable-selection is TPE */
  223. char auto_select; /* cable-selection by carrier */
  224. char burst_sizes; /* ledma SBus burst sizes */
  225. char pio_buffer; /* init block in PIO space? */
  226. unsigned short busmaster_regval;
  227. void (*init_ring)(struct net_device *);
  228. void (*rx)(struct net_device *);
  229. void (*tx)(struct net_device *);
  230. char *name;
  231. dma_addr_t init_block_dvma;
  232. struct net_device *dev; /* Backpointer */
  233. struct sbus_dev *sdev;
  234. struct timer_list multicast_timer;
  235. };
  236. #define TX_BUFFS_AVAIL ((lp->tx_old<=lp->tx_new)?\
  237. lp->tx_old+TX_RING_MOD_MASK-lp->tx_new:\
  238. lp->tx_old - lp->tx_new-1)
  239. /* Lance registers. */
  240. #define RDP 0x00UL /* register data port */
  241. #define RAP 0x02UL /* register address port */
  242. #define LANCE_REG_SIZE 0x04UL
  243. #define STOP_LANCE(__lp) \
  244. do { void __iomem *__base = (__lp)->lregs; \
  245. sbus_writew(LE_CSR0, __base + RAP); \
  246. sbus_writew(LE_C0_STOP, __base + RDP); \
  247. } while (0)
  248. int sparc_lance_debug = 2;
  249. /* The Lance uses 24 bit addresses */
  250. /* On the Sun4c the DVMA will provide the remaining bytes for us */
  251. /* On the Sun4m we have to instruct the ledma to provide them */
  252. /* Even worse, on scsi/ether SBUS cards, the init block and the
  253. * transmit/receive buffers are addresses as offsets from absolute
  254. * zero on the lebuffer PIO area. -DaveM
  255. */
  256. #define LANCE_ADDR(x) ((long)(x) & ~0xff000000)
  257. /* Load the CSR registers */
  258. static void load_csrs(struct lance_private *lp)
  259. {
  260. u32 leptr;
  261. if (lp->pio_buffer)
  262. leptr = 0;
  263. else
  264. leptr = LANCE_ADDR(lp->init_block_dvma);
  265. sbus_writew(LE_CSR1, lp->lregs + RAP);
  266. sbus_writew(leptr & 0xffff, lp->lregs + RDP);
  267. sbus_writew(LE_CSR2, lp->lregs + RAP);
  268. sbus_writew(leptr >> 16, lp->lregs + RDP);
  269. sbus_writew(LE_CSR3, lp->lregs + RAP);
  270. sbus_writew(lp->busmaster_regval, lp->lregs + RDP);
  271. /* Point back to csr0 */
  272. sbus_writew(LE_CSR0, lp->lregs + RAP);
  273. }
  274. /* Setup the Lance Rx and Tx rings */
  275. static void lance_init_ring_dvma(struct net_device *dev)
  276. {
  277. struct lance_private *lp = netdev_priv(dev);
  278. struct lance_init_block *ib = lp->init_block_mem;
  279. dma_addr_t aib = lp->init_block_dvma;
  280. __u32 leptr;
  281. int i;
  282. /* Lock out other processes while setting up hardware */
  283. netif_stop_queue(dev);
  284. lp->rx_new = lp->tx_new = 0;
  285. lp->rx_old = lp->tx_old = 0;
  286. /* Copy the ethernet address to the lance init block
  287. * Note that on the sparc you need to swap the ethernet address.
  288. */
  289. ib->phys_addr [0] = dev->dev_addr [1];
  290. ib->phys_addr [1] = dev->dev_addr [0];
  291. ib->phys_addr [2] = dev->dev_addr [3];
  292. ib->phys_addr [3] = dev->dev_addr [2];
  293. ib->phys_addr [4] = dev->dev_addr [5];
  294. ib->phys_addr [5] = dev->dev_addr [4];
  295. /* Setup the Tx ring entries */
  296. for (i = 0; i <= TX_RING_SIZE; i++) {
  297. leptr = LANCE_ADDR(aib + libbuff_offset(tx_buf, i));
  298. ib->btx_ring [i].tmd0 = leptr;
  299. ib->btx_ring [i].tmd1_hadr = leptr >> 16;
  300. ib->btx_ring [i].tmd1_bits = 0;
  301. ib->btx_ring [i].length = 0xf000; /* The ones required by tmd2 */
  302. ib->btx_ring [i].misc = 0;
  303. }
  304. /* Setup the Rx ring entries */
  305. for (i = 0; i < RX_RING_SIZE; i++) {
  306. leptr = LANCE_ADDR(aib + libbuff_offset(rx_buf, i));
  307. ib->brx_ring [i].rmd0 = leptr;
  308. ib->brx_ring [i].rmd1_hadr = leptr >> 16;
  309. ib->brx_ring [i].rmd1_bits = LE_R1_OWN;
  310. ib->brx_ring [i].length = -RX_BUFF_SIZE | 0xf000;
  311. ib->brx_ring [i].mblength = 0;
  312. }
  313. /* Setup the initialization block */
  314. /* Setup rx descriptor pointer */
  315. leptr = LANCE_ADDR(aib + libdesc_offset(brx_ring, 0));
  316. ib->rx_len = (LANCE_LOG_RX_BUFFERS << 13) | (leptr >> 16);
  317. ib->rx_ptr = leptr;
  318. /* Setup tx descriptor pointer */
  319. leptr = LANCE_ADDR(aib + libdesc_offset(btx_ring, 0));
  320. ib->tx_len = (LANCE_LOG_TX_BUFFERS << 13) | (leptr >> 16);
  321. ib->tx_ptr = leptr;
  322. }
  323. static void lance_init_ring_pio(struct net_device *dev)
  324. {
  325. struct lance_private *lp = netdev_priv(dev);
  326. struct lance_init_block __iomem *ib = lp->init_block_iomem;
  327. u32 leptr;
  328. int i;
  329. /* Lock out other processes while setting up hardware */
  330. netif_stop_queue(dev);
  331. lp->rx_new = lp->tx_new = 0;
  332. lp->rx_old = lp->tx_old = 0;
  333. /* Copy the ethernet address to the lance init block
  334. * Note that on the sparc you need to swap the ethernet address.
  335. */
  336. sbus_writeb(dev->dev_addr[1], &ib->phys_addr[0]);
  337. sbus_writeb(dev->dev_addr[0], &ib->phys_addr[1]);
  338. sbus_writeb(dev->dev_addr[3], &ib->phys_addr[2]);
  339. sbus_writeb(dev->dev_addr[2], &ib->phys_addr[3]);
  340. sbus_writeb(dev->dev_addr[5], &ib->phys_addr[4]);
  341. sbus_writeb(dev->dev_addr[4], &ib->phys_addr[5]);
  342. /* Setup the Tx ring entries */
  343. for (i = 0; i <= TX_RING_SIZE; i++) {
  344. leptr = libbuff_offset(tx_buf, i);
  345. sbus_writew(leptr, &ib->btx_ring [i].tmd0);
  346. sbus_writeb(leptr >> 16,&ib->btx_ring [i].tmd1_hadr);
  347. sbus_writeb(0, &ib->btx_ring [i].tmd1_bits);
  348. /* The ones required by tmd2 */
  349. sbus_writew(0xf000, &ib->btx_ring [i].length);
  350. sbus_writew(0, &ib->btx_ring [i].misc);
  351. }
  352. /* Setup the Rx ring entries */
  353. for (i = 0; i < RX_RING_SIZE; i++) {
  354. leptr = libbuff_offset(rx_buf, i);
  355. sbus_writew(leptr, &ib->brx_ring [i].rmd0);
  356. sbus_writeb(leptr >> 16,&ib->brx_ring [i].rmd1_hadr);
  357. sbus_writeb(LE_R1_OWN, &ib->brx_ring [i].rmd1_bits);
  358. sbus_writew(-RX_BUFF_SIZE|0xf000,
  359. &ib->brx_ring [i].length);
  360. sbus_writew(0, &ib->brx_ring [i].mblength);
  361. }
  362. /* Setup the initialization block */
  363. /* Setup rx descriptor pointer */
  364. leptr = libdesc_offset(brx_ring, 0);
  365. sbus_writew((LANCE_LOG_RX_BUFFERS << 13) | (leptr >> 16),
  366. &ib->rx_len);
  367. sbus_writew(leptr, &ib->rx_ptr);
  368. /* Setup tx descriptor pointer */
  369. leptr = libdesc_offset(btx_ring, 0);
  370. sbus_writew((LANCE_LOG_TX_BUFFERS << 13) | (leptr >> 16),
  371. &ib->tx_len);
  372. sbus_writew(leptr, &ib->tx_ptr);
  373. }
  374. static void init_restart_ledma(struct lance_private *lp)
  375. {
  376. u32 csr = sbus_readl(lp->dregs + DMA_CSR);
  377. if (!(csr & DMA_HNDL_ERROR)) {
  378. /* E-Cache draining */
  379. while (sbus_readl(lp->dregs + DMA_CSR) & DMA_FIFO_ISDRAIN)
  380. barrier();
  381. }
  382. csr = sbus_readl(lp->dregs + DMA_CSR);
  383. csr &= ~DMA_E_BURSTS;
  384. if (lp->burst_sizes & DMA_BURST32)
  385. csr |= DMA_E_BURST32;
  386. else
  387. csr |= DMA_E_BURST16;
  388. csr |= (DMA_DSBL_RD_DRN | DMA_DSBL_WR_INV | DMA_FIFO_INV);
  389. if (lp->tpe)
  390. csr |= DMA_EN_ENETAUI;
  391. else
  392. csr &= ~DMA_EN_ENETAUI;
  393. udelay(20);
  394. sbus_writel(csr, lp->dregs + DMA_CSR);
  395. udelay(200);
  396. }
  397. static int init_restart_lance(struct lance_private *lp)
  398. {
  399. u16 regval = 0;
  400. int i;
  401. if (lp->dregs)
  402. init_restart_ledma(lp);
  403. sbus_writew(LE_CSR0, lp->lregs + RAP);
  404. sbus_writew(LE_C0_INIT, lp->lregs + RDP);
  405. /* Wait for the lance to complete initialization */
  406. for (i = 0; i < 100; i++) {
  407. regval = sbus_readw(lp->lregs + RDP);
  408. if (regval & (LE_C0_ERR | LE_C0_IDON))
  409. break;
  410. barrier();
  411. }
  412. if (i == 100 || (regval & LE_C0_ERR)) {
  413. printk(KERN_ERR "LANCE unopened after %d ticks, csr0=%4.4x.\n",
  414. i, regval);
  415. if (lp->dregs)
  416. printk("dcsr=%8.8x\n", sbus_readl(lp->dregs + DMA_CSR));
  417. return -1;
  418. }
  419. /* Clear IDON by writing a "1", enable interrupts and start lance */
  420. sbus_writew(LE_C0_IDON, lp->lregs + RDP);
  421. sbus_writew(LE_C0_INEA | LE_C0_STRT, lp->lregs + RDP);
  422. if (lp->dregs) {
  423. u32 csr = sbus_readl(lp->dregs + DMA_CSR);
  424. csr |= DMA_INT_ENAB;
  425. sbus_writel(csr, lp->dregs + DMA_CSR);
  426. }
  427. return 0;
  428. }
  429. static void lance_rx_dvma(struct net_device *dev)
  430. {
  431. struct lance_private *lp = netdev_priv(dev);
  432. struct lance_init_block *ib = lp->init_block_mem;
  433. struct lance_rx_desc *rd;
  434. u8 bits;
  435. int len, entry = lp->rx_new;
  436. struct sk_buff *skb;
  437. for (rd = &ib->brx_ring [entry];
  438. !((bits = rd->rmd1_bits) & LE_R1_OWN);
  439. rd = &ib->brx_ring [entry]) {
  440. /* We got an incomplete frame? */
  441. if ((bits & LE_R1_POK) != LE_R1_POK) {
  442. dev->stats.rx_over_errors++;
  443. dev->stats.rx_errors++;
  444. } else if (bits & LE_R1_ERR) {
  445. /* Count only the end frame as a rx error,
  446. * not the beginning
  447. */
  448. if (bits & LE_R1_BUF) dev->stats.rx_fifo_errors++;
  449. if (bits & LE_R1_CRC) dev->stats.rx_crc_errors++;
  450. if (bits & LE_R1_OFL) dev->stats.rx_over_errors++;
  451. if (bits & LE_R1_FRA) dev->stats.rx_frame_errors++;
  452. if (bits & LE_R1_EOP) dev->stats.rx_errors++;
  453. } else {
  454. len = (rd->mblength & 0xfff) - 4;
  455. skb = dev_alloc_skb(len + 2);
  456. if (skb == NULL) {
  457. printk(KERN_INFO "%s: Memory squeeze, deferring packet.\n",
  458. dev->name);
  459. dev->stats.rx_dropped++;
  460. rd->mblength = 0;
  461. rd->rmd1_bits = LE_R1_OWN;
  462. lp->rx_new = RX_NEXT(entry);
  463. return;
  464. }
  465. dev->stats.rx_bytes += len;
  466. skb_reserve(skb, 2); /* 16 byte align */
  467. skb_put(skb, len); /* make room */
  468. skb_copy_to_linear_data(skb,
  469. (unsigned char *)&(ib->rx_buf [entry][0]),
  470. len);
  471. skb->protocol = eth_type_trans(skb, dev);
  472. netif_rx(skb);
  473. dev->last_rx = jiffies;
  474. dev->stats.rx_packets++;
  475. }
  476. /* Return the packet to the pool */
  477. rd->mblength = 0;
  478. rd->rmd1_bits = LE_R1_OWN;
  479. entry = RX_NEXT(entry);
  480. }
  481. lp->rx_new = entry;
  482. }
  483. static void lance_tx_dvma(struct net_device *dev)
  484. {
  485. struct lance_private *lp = netdev_priv(dev);
  486. struct lance_init_block *ib = lp->init_block_mem;
  487. int i, j;
  488. spin_lock(&lp->lock);
  489. j = lp->tx_old;
  490. for (i = j; i != lp->tx_new; i = j) {
  491. struct lance_tx_desc *td = &ib->btx_ring [i];
  492. u8 bits = td->tmd1_bits;
  493. /* If we hit a packet not owned by us, stop */
  494. if (bits & LE_T1_OWN)
  495. break;
  496. if (bits & LE_T1_ERR) {
  497. u16 status = td->misc;
  498. dev->stats.tx_errors++;
  499. if (status & LE_T3_RTY) dev->stats.tx_aborted_errors++;
  500. if (status & LE_T3_LCOL) dev->stats.tx_window_errors++;
  501. if (status & LE_T3_CLOS) {
  502. dev->stats.tx_carrier_errors++;
  503. if (lp->auto_select) {
  504. lp->tpe = 1 - lp->tpe;
  505. printk(KERN_NOTICE "%s: Carrier Lost, trying %s\n",
  506. dev->name, lp->tpe?"TPE":"AUI");
  507. STOP_LANCE(lp);
  508. lp->init_ring(dev);
  509. load_csrs(lp);
  510. init_restart_lance(lp);
  511. goto out;
  512. }
  513. }
  514. /* Buffer errors and underflows turn off the
  515. * transmitter, restart the adapter.
  516. */
  517. if (status & (LE_T3_BUF|LE_T3_UFL)) {
  518. dev->stats.tx_fifo_errors++;
  519. printk(KERN_ERR "%s: Tx: ERR_BUF|ERR_UFL, restarting\n",
  520. dev->name);
  521. STOP_LANCE(lp);
  522. lp->init_ring(dev);
  523. load_csrs(lp);
  524. init_restart_lance(lp);
  525. goto out;
  526. }
  527. } else if ((bits & LE_T1_POK) == LE_T1_POK) {
  528. /*
  529. * So we don't count the packet more than once.
  530. */
  531. td->tmd1_bits = bits & ~(LE_T1_POK);
  532. /* One collision before packet was sent. */
  533. if (bits & LE_T1_EONE)
  534. dev->stats.collisions++;
  535. /* More than one collision, be optimistic. */
  536. if (bits & LE_T1_EMORE)
  537. dev->stats.collisions += 2;
  538. dev->stats.tx_packets++;
  539. }
  540. j = TX_NEXT(j);
  541. }
  542. lp->tx_old = j;
  543. out:
  544. if (netif_queue_stopped(dev) &&
  545. TX_BUFFS_AVAIL > 0)
  546. netif_wake_queue(dev);
  547. spin_unlock(&lp->lock);
  548. }
  549. static void lance_piocopy_to_skb(struct sk_buff *skb, void __iomem *piobuf, int len)
  550. {
  551. u16 *p16 = (u16 *) skb->data;
  552. u32 *p32;
  553. u8 *p8;
  554. void __iomem *pbuf = piobuf;
  555. /* We know here that both src and dest are on a 16bit boundary. */
  556. *p16++ = sbus_readw(pbuf);
  557. p32 = (u32 *) p16;
  558. pbuf += 2;
  559. len -= 2;
  560. while (len >= 4) {
  561. *p32++ = sbus_readl(pbuf);
  562. pbuf += 4;
  563. len -= 4;
  564. }
  565. p8 = (u8 *) p32;
  566. if (len >= 2) {
  567. p16 = (u16 *) p32;
  568. *p16++ = sbus_readw(pbuf);
  569. pbuf += 2;
  570. len -= 2;
  571. p8 = (u8 *) p16;
  572. }
  573. if (len >= 1)
  574. *p8 = sbus_readb(pbuf);
  575. }
  576. static void lance_rx_pio(struct net_device *dev)
  577. {
  578. struct lance_private *lp = netdev_priv(dev);
  579. struct lance_init_block __iomem *ib = lp->init_block_iomem;
  580. struct lance_rx_desc __iomem *rd;
  581. unsigned char bits;
  582. int len, entry;
  583. struct sk_buff *skb;
  584. entry = lp->rx_new;
  585. for (rd = &ib->brx_ring [entry];
  586. !((bits = sbus_readb(&rd->rmd1_bits)) & LE_R1_OWN);
  587. rd = &ib->brx_ring [entry]) {
  588. /* We got an incomplete frame? */
  589. if ((bits & LE_R1_POK) != LE_R1_POK) {
  590. dev->stats.rx_over_errors++;
  591. dev->stats.rx_errors++;
  592. } else if (bits & LE_R1_ERR) {
  593. /* Count only the end frame as a rx error,
  594. * not the beginning
  595. */
  596. if (bits & LE_R1_BUF) dev->stats.rx_fifo_errors++;
  597. if (bits & LE_R1_CRC) dev->stats.rx_crc_errors++;
  598. if (bits & LE_R1_OFL) dev->stats.rx_over_errors++;
  599. if (bits & LE_R1_FRA) dev->stats.rx_frame_errors++;
  600. if (bits & LE_R1_EOP) dev->stats.rx_errors++;
  601. } else {
  602. len = (sbus_readw(&rd->mblength) & 0xfff) - 4;
  603. skb = dev_alloc_skb(len + 2);
  604. if (skb == NULL) {
  605. printk(KERN_INFO "%s: Memory squeeze, deferring packet.\n",
  606. dev->name);
  607. dev->stats.rx_dropped++;
  608. sbus_writew(0, &rd->mblength);
  609. sbus_writeb(LE_R1_OWN, &rd->rmd1_bits);
  610. lp->rx_new = RX_NEXT(entry);
  611. return;
  612. }
  613. dev->stats.rx_bytes += len;
  614. skb_reserve (skb, 2); /* 16 byte align */
  615. skb_put(skb, len); /* make room */
  616. lance_piocopy_to_skb(skb, &(ib->rx_buf[entry][0]), len);
  617. skb->protocol = eth_type_trans(skb, dev);
  618. netif_rx(skb);
  619. dev->last_rx = jiffies;
  620. dev->stats.rx_packets++;
  621. }
  622. /* Return the packet to the pool */
  623. sbus_writew(0, &rd->mblength);
  624. sbus_writeb(LE_R1_OWN, &rd->rmd1_bits);
  625. entry = RX_NEXT(entry);
  626. }
  627. lp->rx_new = entry;
  628. }
  629. static void lance_tx_pio(struct net_device *dev)
  630. {
  631. struct lance_private *lp = netdev_priv(dev);
  632. struct lance_init_block __iomem *ib = lp->init_block_iomem;
  633. int i, j;
  634. spin_lock(&lp->lock);
  635. j = lp->tx_old;
  636. for (i = j; i != lp->tx_new; i = j) {
  637. struct lance_tx_desc __iomem *td = &ib->btx_ring [i];
  638. u8 bits = sbus_readb(&td->tmd1_bits);
  639. /* If we hit a packet not owned by us, stop */
  640. if (bits & LE_T1_OWN)
  641. break;
  642. if (bits & LE_T1_ERR) {
  643. u16 status = sbus_readw(&td->misc);
  644. dev->stats.tx_errors++;
  645. if (status & LE_T3_RTY) dev->stats.tx_aborted_errors++;
  646. if (status & LE_T3_LCOL) dev->stats.tx_window_errors++;
  647. if (status & LE_T3_CLOS) {
  648. dev->stats.tx_carrier_errors++;
  649. if (lp->auto_select) {
  650. lp->tpe = 1 - lp->tpe;
  651. printk(KERN_NOTICE "%s: Carrier Lost, trying %s\n",
  652. dev->name, lp->tpe?"TPE":"AUI");
  653. STOP_LANCE(lp);
  654. lp->init_ring(dev);
  655. load_csrs(lp);
  656. init_restart_lance(lp);
  657. goto out;
  658. }
  659. }
  660. /* Buffer errors and underflows turn off the
  661. * transmitter, restart the adapter.
  662. */
  663. if (status & (LE_T3_BUF|LE_T3_UFL)) {
  664. dev->stats.tx_fifo_errors++;
  665. printk(KERN_ERR "%s: Tx: ERR_BUF|ERR_UFL, restarting\n",
  666. dev->name);
  667. STOP_LANCE(lp);
  668. lp->init_ring(dev);
  669. load_csrs(lp);
  670. init_restart_lance(lp);
  671. goto out;
  672. }
  673. } else if ((bits & LE_T1_POK) == LE_T1_POK) {
  674. /*
  675. * So we don't count the packet more than once.
  676. */
  677. sbus_writeb(bits & ~(LE_T1_POK), &td->tmd1_bits);
  678. /* One collision before packet was sent. */
  679. if (bits & LE_T1_EONE)
  680. dev->stats.collisions++;
  681. /* More than one collision, be optimistic. */
  682. if (bits & LE_T1_EMORE)
  683. dev->stats.collisions += 2;
  684. dev->stats.tx_packets++;
  685. }
  686. j = TX_NEXT(j);
  687. }
  688. lp->tx_old = j;
  689. if (netif_queue_stopped(dev) &&
  690. TX_BUFFS_AVAIL > 0)
  691. netif_wake_queue(dev);
  692. out:
  693. spin_unlock(&lp->lock);
  694. }
  695. static irqreturn_t lance_interrupt(int irq, void *dev_id)
  696. {
  697. struct net_device *dev = dev_id;
  698. struct lance_private *lp = netdev_priv(dev);
  699. int csr0;
  700. sbus_writew(LE_CSR0, lp->lregs + RAP);
  701. csr0 = sbus_readw(lp->lregs + RDP);
  702. /* Acknowledge all the interrupt sources ASAP */
  703. sbus_writew(csr0 & (LE_C0_INTR | LE_C0_TINT | LE_C0_RINT),
  704. lp->lregs + RDP);
  705. if ((csr0 & LE_C0_ERR) != 0) {
  706. /* Clear the error condition */
  707. sbus_writew((LE_C0_BABL | LE_C0_ERR | LE_C0_MISS |
  708. LE_C0_CERR | LE_C0_MERR),
  709. lp->lregs + RDP);
  710. }
  711. if (csr0 & LE_C0_RINT)
  712. lp->rx(dev);
  713. if (csr0 & LE_C0_TINT)
  714. lp->tx(dev);
  715. if (csr0 & LE_C0_BABL)
  716. dev->stats.tx_errors++;
  717. if (csr0 & LE_C0_MISS)
  718. dev->stats.rx_errors++;
  719. if (csr0 & LE_C0_MERR) {
  720. if (lp->dregs) {
  721. u32 addr = sbus_readl(lp->dregs + DMA_ADDR);
  722. printk(KERN_ERR "%s: Memory error, status %04x, addr %06x\n",
  723. dev->name, csr0, addr & 0xffffff);
  724. } else {
  725. printk(KERN_ERR "%s: Memory error, status %04x\n",
  726. dev->name, csr0);
  727. }
  728. sbus_writew(LE_C0_STOP, lp->lregs + RDP);
  729. if (lp->dregs) {
  730. u32 dma_csr = sbus_readl(lp->dregs + DMA_CSR);
  731. dma_csr |= DMA_FIFO_INV;
  732. sbus_writel(dma_csr, lp->dregs + DMA_CSR);
  733. }
  734. lp->init_ring(dev);
  735. load_csrs(lp);
  736. init_restart_lance(lp);
  737. netif_wake_queue(dev);
  738. }
  739. sbus_writew(LE_C0_INEA, lp->lregs + RDP);
  740. return IRQ_HANDLED;
  741. }
  742. /* Build a fake network packet and send it to ourselves. */
  743. static void build_fake_packet(struct lance_private *lp)
  744. {
  745. struct net_device *dev = lp->dev;
  746. int i, entry;
  747. entry = lp->tx_new & TX_RING_MOD_MASK;
  748. if (lp->pio_buffer) {
  749. struct lance_init_block __iomem *ib = lp->init_block_iomem;
  750. u16 __iomem *packet = (u16 __iomem *) &(ib->tx_buf[entry][0]);
  751. struct ethhdr __iomem *eth = (struct ethhdr __iomem *) packet;
  752. for (i = 0; i < (ETH_ZLEN / sizeof(u16)); i++)
  753. sbus_writew(0, &packet[i]);
  754. for (i = 0; i < 6; i++) {
  755. sbus_writeb(dev->dev_addr[i], &eth->h_dest[i]);
  756. sbus_writeb(dev->dev_addr[i], &eth->h_source[i]);
  757. }
  758. sbus_writew((-ETH_ZLEN) | 0xf000, &ib->btx_ring[entry].length);
  759. sbus_writew(0, &ib->btx_ring[entry].misc);
  760. sbus_writeb(LE_T1_POK|LE_T1_OWN, &ib->btx_ring[entry].tmd1_bits);
  761. } else {
  762. struct lance_init_block *ib = lp->init_block_mem;
  763. u16 *packet = (u16 *) &(ib->tx_buf[entry][0]);
  764. struct ethhdr *eth = (struct ethhdr *) packet;
  765. memset(packet, 0, ETH_ZLEN);
  766. for (i = 0; i < 6; i++) {
  767. eth->h_dest[i] = dev->dev_addr[i];
  768. eth->h_source[i] = dev->dev_addr[i];
  769. }
  770. ib->btx_ring[entry].length = (-ETH_ZLEN) | 0xf000;
  771. ib->btx_ring[entry].misc = 0;
  772. ib->btx_ring[entry].tmd1_bits = (LE_T1_POK|LE_T1_OWN);
  773. }
  774. lp->tx_new = TX_NEXT(entry);
  775. }
  776. struct net_device *last_dev;
  777. static int lance_open(struct net_device *dev)
  778. {
  779. struct lance_private *lp = netdev_priv(dev);
  780. int status = 0;
  781. last_dev = dev;
  782. STOP_LANCE(lp);
  783. if (request_irq(dev->irq, &lance_interrupt, IRQF_SHARED,
  784. lancestr, (void *) dev)) {
  785. printk(KERN_ERR "Lance: Can't get irq %d\n", dev->irq);
  786. return -EAGAIN;
  787. }
  788. /* On the 4m, setup the ledma to provide the upper bits for buffers */
  789. if (lp->dregs) {
  790. u32 regval = lp->init_block_dvma & 0xff000000;
  791. sbus_writel(regval, lp->dregs + DMA_TEST);
  792. }
  793. /* Set mode and clear multicast filter only at device open,
  794. * so that lance_init_ring() called at any error will not
  795. * forget multicast filters.
  796. *
  797. * BTW it is common bug in all lance drivers! --ANK
  798. */
  799. if (lp->pio_buffer) {
  800. struct lance_init_block __iomem *ib = lp->init_block_iomem;
  801. sbus_writew(0, &ib->mode);
  802. sbus_writel(0, &ib->filter[0]);
  803. sbus_writel(0, &ib->filter[1]);
  804. } else {
  805. struct lance_init_block *ib = lp->init_block_mem;
  806. ib->mode = 0;
  807. ib->filter [0] = 0;
  808. ib->filter [1] = 0;
  809. }
  810. lp->init_ring(dev);
  811. load_csrs(lp);
  812. netif_start_queue(dev);
  813. status = init_restart_lance(lp);
  814. if (!status && lp->auto_select) {
  815. build_fake_packet(lp);
  816. sbus_writew(LE_C0_INEA | LE_C0_TDMD, lp->lregs + RDP);
  817. }
  818. return status;
  819. }
  820. static int lance_close(struct net_device *dev)
  821. {
  822. struct lance_private *lp = netdev_priv(dev);
  823. netif_stop_queue(dev);
  824. del_timer_sync(&lp->multicast_timer);
  825. STOP_LANCE(lp);
  826. free_irq(dev->irq, (void *) dev);
  827. return 0;
  828. }
  829. static int lance_reset(struct net_device *dev)
  830. {
  831. struct lance_private *lp = netdev_priv(dev);
  832. int status;
  833. STOP_LANCE(lp);
  834. /* On the 4m, reset the dma too */
  835. if (lp->dregs) {
  836. u32 csr, addr;
  837. printk(KERN_ERR "resetting ledma\n");
  838. csr = sbus_readl(lp->dregs + DMA_CSR);
  839. sbus_writel(csr | DMA_RST_ENET, lp->dregs + DMA_CSR);
  840. udelay(200);
  841. sbus_writel(csr & ~DMA_RST_ENET, lp->dregs + DMA_CSR);
  842. addr = lp->init_block_dvma & 0xff000000;
  843. sbus_writel(addr, lp->dregs + DMA_TEST);
  844. }
  845. lp->init_ring(dev);
  846. load_csrs(lp);
  847. dev->trans_start = jiffies;
  848. status = init_restart_lance(lp);
  849. return status;
  850. }
  851. static void lance_piocopy_from_skb(void __iomem *dest, unsigned char *src, int len)
  852. {
  853. void __iomem *piobuf = dest;
  854. u32 *p32;
  855. u16 *p16;
  856. u8 *p8;
  857. switch ((unsigned long)src & 0x3) {
  858. case 0:
  859. p32 = (u32 *) src;
  860. while (len >= 4) {
  861. sbus_writel(*p32, piobuf);
  862. p32++;
  863. piobuf += 4;
  864. len -= 4;
  865. }
  866. src = (char *) p32;
  867. break;
  868. case 1:
  869. case 3:
  870. p8 = (u8 *) src;
  871. while (len >= 4) {
  872. u32 val;
  873. val = p8[0] << 24;
  874. val |= p8[1] << 16;
  875. val |= p8[2] << 8;
  876. val |= p8[3];
  877. sbus_writel(val, piobuf);
  878. p8 += 4;
  879. piobuf += 4;
  880. len -= 4;
  881. }
  882. src = (char *) p8;
  883. break;
  884. case 2:
  885. p16 = (u16 *) src;
  886. while (len >= 4) {
  887. u32 val = p16[0]<<16 | p16[1];
  888. sbus_writel(val, piobuf);
  889. p16 += 2;
  890. piobuf += 4;
  891. len -= 4;
  892. }
  893. src = (char *) p16;
  894. break;
  895. };
  896. if (len >= 2) {
  897. u16 val = src[0] << 8 | src[1];
  898. sbus_writew(val, piobuf);
  899. src += 2;
  900. piobuf += 2;
  901. len -= 2;
  902. }
  903. if (len >= 1)
  904. sbus_writeb(src[0], piobuf);
  905. }
  906. static void lance_piozero(void __iomem *dest, int len)
  907. {
  908. void __iomem *piobuf = dest;
  909. if ((unsigned long)piobuf & 1) {
  910. sbus_writeb(0, piobuf);
  911. piobuf += 1;
  912. len -= 1;
  913. if (len == 0)
  914. return;
  915. }
  916. if (len == 1) {
  917. sbus_writeb(0, piobuf);
  918. return;
  919. }
  920. if ((unsigned long)piobuf & 2) {
  921. sbus_writew(0, piobuf);
  922. piobuf += 2;
  923. len -= 2;
  924. if (len == 0)
  925. return;
  926. }
  927. while (len >= 4) {
  928. sbus_writel(0, piobuf);
  929. piobuf += 4;
  930. len -= 4;
  931. }
  932. if (len >= 2) {
  933. sbus_writew(0, piobuf);
  934. piobuf += 2;
  935. len -= 2;
  936. }
  937. if (len >= 1)
  938. sbus_writeb(0, piobuf);
  939. }
  940. static void lance_tx_timeout(struct net_device *dev)
  941. {
  942. struct lance_private *lp = netdev_priv(dev);
  943. printk(KERN_ERR "%s: transmit timed out, status %04x, reset\n",
  944. dev->name, sbus_readw(lp->lregs + RDP));
  945. lance_reset(dev);
  946. netif_wake_queue(dev);
  947. }
  948. static int lance_start_xmit(struct sk_buff *skb, struct net_device *dev)
  949. {
  950. struct lance_private *lp = netdev_priv(dev);
  951. int entry, skblen, len;
  952. skblen = skb->len;
  953. len = (skblen <= ETH_ZLEN) ? ETH_ZLEN : skblen;
  954. spin_lock_irq(&lp->lock);
  955. dev->stats.tx_bytes += len;
  956. entry = lp->tx_new & TX_RING_MOD_MASK;
  957. if (lp->pio_buffer) {
  958. struct lance_init_block __iomem *ib = lp->init_block_iomem;
  959. sbus_writew((-len) | 0xf000, &ib->btx_ring[entry].length);
  960. sbus_writew(0, &ib->btx_ring[entry].misc);
  961. lance_piocopy_from_skb(&ib->tx_buf[entry][0], skb->data, skblen);
  962. if (len != skblen)
  963. lance_piozero(&ib->tx_buf[entry][skblen], len - skblen);
  964. sbus_writeb(LE_T1_POK | LE_T1_OWN, &ib->btx_ring[entry].tmd1_bits);
  965. } else {
  966. struct lance_init_block *ib = lp->init_block_mem;
  967. ib->btx_ring [entry].length = (-len) | 0xf000;
  968. ib->btx_ring [entry].misc = 0;
  969. skb_copy_from_linear_data(skb, &ib->tx_buf [entry][0], skblen);
  970. if (len != skblen)
  971. memset((char *) &ib->tx_buf [entry][skblen], 0, len - skblen);
  972. ib->btx_ring [entry].tmd1_bits = (LE_T1_POK | LE_T1_OWN);
  973. }
  974. lp->tx_new = TX_NEXT(entry);
  975. if (TX_BUFFS_AVAIL <= 0)
  976. netif_stop_queue(dev);
  977. /* Kick the lance: transmit now */
  978. sbus_writew(LE_C0_INEA | LE_C0_TDMD, lp->lregs + RDP);
  979. /* Read back CSR to invalidate the E-Cache.
  980. * This is needed, because DMA_DSBL_WR_INV is set.
  981. */
  982. if (lp->dregs)
  983. sbus_readw(lp->lregs + RDP);
  984. spin_unlock_irq(&lp->lock);
  985. dev->trans_start = jiffies;
  986. dev_kfree_skb(skb);
  987. return 0;
  988. }
  989. /* taken from the depca driver */
  990. static void lance_load_multicast(struct net_device *dev)
  991. {
  992. struct lance_private *lp = netdev_priv(dev);
  993. struct dev_mc_list *dmi = dev->mc_list;
  994. char *addrs;
  995. int i;
  996. u32 crc;
  997. u32 val;
  998. /* set all multicast bits */
  999. if (dev->flags & IFF_ALLMULTI)
  1000. val = ~0;
  1001. else
  1002. val = 0;
  1003. if (lp->pio_buffer) {
  1004. struct lance_init_block __iomem *ib = lp->init_block_iomem;
  1005. sbus_writel(val, &ib->filter[0]);
  1006. sbus_writel(val, &ib->filter[1]);
  1007. } else {
  1008. struct lance_init_block *ib = lp->init_block_mem;
  1009. ib->filter [0] = val;
  1010. ib->filter [1] = val;
  1011. }
  1012. if (dev->flags & IFF_ALLMULTI)
  1013. return;
  1014. /* Add addresses */
  1015. for (i = 0; i < dev->mc_count; i++) {
  1016. addrs = dmi->dmi_addr;
  1017. dmi = dmi->next;
  1018. /* multicast address? */
  1019. if (!(*addrs & 1))
  1020. continue;
  1021. crc = ether_crc_le(6, addrs);
  1022. crc = crc >> 26;
  1023. if (lp->pio_buffer) {
  1024. struct lance_init_block __iomem *ib = lp->init_block_iomem;
  1025. u16 __iomem *mcast_table = (u16 __iomem *) &ib->filter;
  1026. u16 tmp = sbus_readw(&mcast_table[crc>>4]);
  1027. tmp |= 1 << (crc & 0xf);
  1028. sbus_writew(tmp, &mcast_table[crc>>4]);
  1029. } else {
  1030. struct lance_init_block *ib = lp->init_block_mem;
  1031. u16 *mcast_table = (u16 *) &ib->filter;
  1032. mcast_table [crc >> 4] |= 1 << (crc & 0xf);
  1033. }
  1034. }
  1035. }
  1036. static void lance_set_multicast(struct net_device *dev)
  1037. {
  1038. struct lance_private *lp = netdev_priv(dev);
  1039. struct lance_init_block *ib_mem = lp->init_block_mem;
  1040. struct lance_init_block __iomem *ib_iomem = lp->init_block_iomem;
  1041. u16 mode;
  1042. if (!netif_running(dev))
  1043. return;
  1044. if (lp->tx_old != lp->tx_new) {
  1045. mod_timer(&lp->multicast_timer, jiffies + 4);
  1046. netif_wake_queue(dev);
  1047. return;
  1048. }
  1049. netif_stop_queue(dev);
  1050. STOP_LANCE(lp);
  1051. lp->init_ring(dev);
  1052. if (lp->pio_buffer)
  1053. mode = sbus_readw(&ib_iomem->mode);
  1054. else
  1055. mode = ib_mem->mode;
  1056. if (dev->flags & IFF_PROMISC) {
  1057. mode |= LE_MO_PROM;
  1058. if (lp->pio_buffer)
  1059. sbus_writew(mode, &ib_iomem->mode);
  1060. else
  1061. ib_mem->mode = mode;
  1062. } else {
  1063. mode &= ~LE_MO_PROM;
  1064. if (lp->pio_buffer)
  1065. sbus_writew(mode, &ib_iomem->mode);
  1066. else
  1067. ib_mem->mode = mode;
  1068. lance_load_multicast(dev);
  1069. }
  1070. load_csrs(lp);
  1071. init_restart_lance(lp);
  1072. netif_wake_queue(dev);
  1073. }
  1074. static void lance_set_multicast_retry(unsigned long _opaque)
  1075. {
  1076. struct net_device *dev = (struct net_device *) _opaque;
  1077. lance_set_multicast(dev);
  1078. }
  1079. static void lance_free_hwresources(struct lance_private *lp)
  1080. {
  1081. if (lp->lregs)
  1082. sbus_iounmap(lp->lregs, LANCE_REG_SIZE);
  1083. if (lp->init_block_iomem) {
  1084. sbus_iounmap(lp->init_block_iomem,
  1085. sizeof(struct lance_init_block));
  1086. } else if (lp->init_block_mem) {
  1087. sbus_free_consistent(lp->sdev,
  1088. sizeof(struct lance_init_block),
  1089. lp->init_block_mem,
  1090. lp->init_block_dvma);
  1091. }
  1092. }
  1093. /* Ethtool support... */
  1094. static void sparc_lance_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
  1095. {
  1096. struct lance_private *lp = netdev_priv(dev);
  1097. strcpy(info->driver, "sunlance");
  1098. strcpy(info->version, "2.02");
  1099. sprintf(info->bus_info, "SBUS:%d",
  1100. lp->sdev->slot);
  1101. }
  1102. static u32 sparc_lance_get_link(struct net_device *dev)
  1103. {
  1104. /* We really do not keep track of this, but this
  1105. * is better than not reporting anything at all.
  1106. */
  1107. return 1;
  1108. }
  1109. static const struct ethtool_ops sparc_lance_ethtool_ops = {
  1110. .get_drvinfo = sparc_lance_get_drvinfo,
  1111. .get_link = sparc_lance_get_link,
  1112. };
  1113. static int __devinit sparc_lance_probe_one(struct sbus_dev *sdev,
  1114. struct sbus_dma *ledma,
  1115. struct sbus_dev *lebuffer)
  1116. {
  1117. static unsigned version_printed;
  1118. struct device_node *dp = sdev->ofdev.node;
  1119. struct net_device *dev;
  1120. struct lance_private *lp;
  1121. int i;
  1122. DECLARE_MAC_BUF(mac);
  1123. dev = alloc_etherdev(sizeof(struct lance_private) + 8);
  1124. if (!dev)
  1125. return -ENOMEM;
  1126. lp = netdev_priv(dev);
  1127. if (sparc_lance_debug && version_printed++ == 0)
  1128. printk (KERN_INFO "%s", version);
  1129. spin_lock_init(&lp->lock);
  1130. /* Copy the IDPROM ethernet address to the device structure, later we
  1131. * will copy the address in the device structure to the lance
  1132. * initialization block.
  1133. */
  1134. for (i = 0; i < 6; i++)
  1135. dev->dev_addr[i] = idprom->id_ethaddr[i];
  1136. /* Get the IO region */
  1137. lp->lregs = sbus_ioremap(&sdev->resource[0], 0,
  1138. LANCE_REG_SIZE, lancestr);
  1139. if (!lp->lregs) {
  1140. printk(KERN_ERR "SunLance: Cannot map registers.\n");
  1141. goto fail;
  1142. }
  1143. lp->sdev = sdev;
  1144. if (lebuffer) {
  1145. /* sanity check */
  1146. if (lebuffer->resource[0].start & 7) {
  1147. printk(KERN_ERR "SunLance: ERROR: Rx and Tx rings not on even boundary.\n");
  1148. goto fail;
  1149. }
  1150. lp->init_block_iomem =
  1151. sbus_ioremap(&lebuffer->resource[0], 0,
  1152. sizeof(struct lance_init_block), "lebuffer");
  1153. if (!lp->init_block_iomem) {
  1154. printk(KERN_ERR "SunLance: Cannot map PIO buffer.\n");
  1155. goto fail;
  1156. }
  1157. lp->init_block_dvma = 0;
  1158. lp->pio_buffer = 1;
  1159. lp->init_ring = lance_init_ring_pio;
  1160. lp->rx = lance_rx_pio;
  1161. lp->tx = lance_tx_pio;
  1162. } else {
  1163. lp->init_block_mem =
  1164. sbus_alloc_consistent(sdev, sizeof(struct lance_init_block),
  1165. &lp->init_block_dvma);
  1166. if (!lp->init_block_mem || lp->init_block_dvma == 0) {
  1167. printk(KERN_ERR "SunLance: Cannot allocate consistent DMA memory.\n");
  1168. goto fail;
  1169. }
  1170. lp->pio_buffer = 0;
  1171. lp->init_ring = lance_init_ring_dvma;
  1172. lp->rx = lance_rx_dvma;
  1173. lp->tx = lance_tx_dvma;
  1174. }
  1175. lp->busmaster_regval = of_getintprop_default(dp, "busmaster-regval",
  1176. (LE_C3_BSWP |
  1177. LE_C3_ACON |
  1178. LE_C3_BCON));
  1179. lp->name = lancestr;
  1180. lp->ledma = ledma;
  1181. lp->burst_sizes = 0;
  1182. if (lp->ledma) {
  1183. struct device_node *ledma_dp = ledma->sdev->ofdev.node;
  1184. const char *prop;
  1185. unsigned int sbmask;
  1186. u32 csr;
  1187. /* Find burst-size property for ledma */
  1188. lp->burst_sizes = of_getintprop_default(ledma_dp,
  1189. "burst-sizes", 0);
  1190. /* ledma may be capable of fast bursts, but sbus may not. */
  1191. sbmask = of_getintprop_default(ledma_dp, "burst-sizes",
  1192. DMA_BURSTBITS);
  1193. lp->burst_sizes &= sbmask;
  1194. /* Get the cable-selection property */
  1195. prop = of_get_property(ledma_dp, "cable-selection", NULL);
  1196. if (!prop || prop[0] == '\0') {
  1197. struct device_node *nd;
  1198. printk(KERN_INFO "SunLance: using "
  1199. "auto-carrier-detection.\n");
  1200. nd = of_find_node_by_path("/options");
  1201. if (!nd)
  1202. goto no_link_test;
  1203. prop = of_get_property(nd, "tpe-link-test?", NULL);
  1204. if (!prop)
  1205. goto no_link_test;
  1206. if (strcmp(prop, "true")) {
  1207. printk(KERN_NOTICE "SunLance: warning: overriding option "
  1208. "'tpe-link-test?'\n");
  1209. printk(KERN_NOTICE "SunLance: warning: mail any problems "
  1210. "to ecd@skynet.be\n");
  1211. auxio_set_lte(AUXIO_LTE_ON);
  1212. }
  1213. no_link_test:
  1214. lp->auto_select = 1;
  1215. lp->tpe = 0;
  1216. } else if (!strcmp(prop, "aui")) {
  1217. lp->auto_select = 0;
  1218. lp->tpe = 0;
  1219. } else {
  1220. lp->auto_select = 0;
  1221. lp->tpe = 1;
  1222. }
  1223. lp->dregs = ledma->regs;
  1224. /* Reset ledma */
  1225. csr = sbus_readl(lp->dregs + DMA_CSR);
  1226. sbus_writel(csr | DMA_RST_ENET, lp->dregs + DMA_CSR);
  1227. udelay(200);
  1228. sbus_writel(csr & ~DMA_RST_ENET, lp->dregs + DMA_CSR);
  1229. } else
  1230. lp->dregs = NULL;
  1231. lp->dev = dev;
  1232. SET_NETDEV_DEV(dev, &sdev->ofdev.dev);
  1233. dev->open = &lance_open;
  1234. dev->stop = &lance_close;
  1235. dev->hard_start_xmit = &lance_start_xmit;
  1236. dev->tx_timeout = &lance_tx_timeout;
  1237. dev->watchdog_timeo = 5*HZ;
  1238. dev->set_multicast_list = &lance_set_multicast;
  1239. dev->ethtool_ops = &sparc_lance_ethtool_ops;
  1240. dev->irq = sdev->irqs[0];
  1241. dev->dma = 0;
  1242. /* We cannot sleep if the chip is busy during a
  1243. * multicast list update event, because such events
  1244. * can occur from interrupts (ex. IPv6). So we
  1245. * use a timer to try again later when necessary. -DaveM
  1246. */
  1247. init_timer(&lp->multicast_timer);
  1248. lp->multicast_timer.data = (unsigned long) dev;
  1249. lp->multicast_timer.function = &lance_set_multicast_retry;
  1250. if (register_netdev(dev)) {
  1251. printk(KERN_ERR "SunLance: Cannot register device.\n");
  1252. goto fail;
  1253. }
  1254. dev_set_drvdata(&sdev->ofdev.dev, lp);
  1255. printk(KERN_INFO "%s: LANCE %s\n",
  1256. dev->name, print_mac(mac, dev->dev_addr));
  1257. return 0;
  1258. fail:
  1259. lance_free_hwresources(lp);
  1260. free_netdev(dev);
  1261. return -ENODEV;
  1262. }
  1263. /* On 4m, find the associated dma for the lance chip */
  1264. static struct sbus_dma * __devinit find_ledma(struct sbus_dev *sdev)
  1265. {
  1266. struct sbus_dma *p;
  1267. for_each_dvma(p) {
  1268. if (p->sdev == sdev)
  1269. return p;
  1270. }
  1271. return NULL;
  1272. }
  1273. #ifdef CONFIG_SUN4
  1274. #include <asm/sun4paddr.h>
  1275. #include <asm/machines.h>
  1276. /* Find all the lance cards on the system and initialize them */
  1277. static struct sbus_dev sun4_sdev;
  1278. static int __devinit sparc_lance_init(void)
  1279. {
  1280. if ((idprom->id_machtype == (SM_SUN4|SM_4_330)) ||
  1281. (idprom->id_machtype == (SM_SUN4|SM_4_470))) {
  1282. memset(&sun4_sdev, 0, sizeof(struct sbus_dev));
  1283. sun4_sdev.reg_addrs[0].phys_addr = sun4_eth_physaddr;
  1284. sun4_sdev.irqs[0] = 6;
  1285. return sparc_lance_probe_one(&sun4_sdev, NULL, NULL);
  1286. }
  1287. return -ENODEV;
  1288. }
  1289. static int __exit sunlance_sun4_remove(void)
  1290. {
  1291. struct lance_private *lp = dev_get_drvdata(&sun4_sdev.ofdev.dev);
  1292. struct net_device *net_dev = lp->dev;
  1293. unregister_netdev(net_dev);
  1294. lance_free_hwresources(lp);
  1295. free_netdev(net_dev);
  1296. dev_set_drvdata(&sun4_sdev.ofdev.dev, NULL);
  1297. return 0;
  1298. }
  1299. #else /* !CONFIG_SUN4 */
  1300. static int __devinit sunlance_sbus_probe(struct of_device *dev, const struct of_device_id *match)
  1301. {
  1302. struct sbus_dev *sdev = to_sbus_device(&dev->dev);
  1303. int err;
  1304. if (sdev->parent) {
  1305. struct of_device *parent = &sdev->parent->ofdev;
  1306. if (!strcmp(parent->node->name, "ledma")) {
  1307. struct sbus_dma *ledma = find_ledma(to_sbus_device(&parent->dev));
  1308. err = sparc_lance_probe_one(sdev, ledma, NULL);
  1309. } else if (!strcmp(parent->node->name, "lebuffer")) {
  1310. err = sparc_lance_probe_one(sdev, NULL, to_sbus_device(&parent->dev));
  1311. } else
  1312. err = sparc_lance_probe_one(sdev, NULL, NULL);
  1313. } else
  1314. err = sparc_lance_probe_one(sdev, NULL, NULL);
  1315. return err;
  1316. }
  1317. static int __devexit sunlance_sbus_remove(struct of_device *dev)
  1318. {
  1319. struct lance_private *lp = dev_get_drvdata(&dev->dev);
  1320. struct net_device *net_dev = lp->dev;
  1321. unregister_netdev(net_dev);
  1322. lance_free_hwresources(lp);
  1323. free_netdev(net_dev);
  1324. dev_set_drvdata(&dev->dev, NULL);
  1325. return 0;
  1326. }
  1327. static struct of_device_id sunlance_sbus_match[] = {
  1328. {
  1329. .name = "le",
  1330. },
  1331. {},
  1332. };
  1333. MODULE_DEVICE_TABLE(of, sunlance_sbus_match);
  1334. static struct of_platform_driver sunlance_sbus_driver = {
  1335. .name = "sunlance",
  1336. .match_table = sunlance_sbus_match,
  1337. .probe = sunlance_sbus_probe,
  1338. .remove = __devexit_p(sunlance_sbus_remove),
  1339. };
  1340. /* Find all the lance cards on the system and initialize them */
  1341. static int __init sparc_lance_init(void)
  1342. {
  1343. return of_register_driver(&sunlance_sbus_driver, &sbus_bus_type);
  1344. }
  1345. #endif /* !CONFIG_SUN4 */
  1346. static void __exit sparc_lance_exit(void)
  1347. {
  1348. #ifdef CONFIG_SUN4
  1349. sunlance_sun4_remove();
  1350. #else
  1351. of_unregister_driver(&sunlance_sbus_driver);
  1352. #endif
  1353. }
  1354. module_init(sparc_lance_init);
  1355. module_exit(sparc_lance_exit);