smc911x.c 60 KB

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  1. /*
  2. * smc911x.c
  3. * This is a driver for SMSC's LAN911{5,6,7,8} single-chip Ethernet devices.
  4. *
  5. * Copyright (C) 2005 Sensoria Corp
  6. * Derived from the unified SMC91x driver by Nicolas Pitre
  7. * and the smsc911x.c reference driver by SMSC
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  22. *
  23. * Arguments:
  24. * watchdog = TX watchdog timeout
  25. * tx_fifo_kb = Size of TX FIFO in KB
  26. *
  27. * History:
  28. * 04/16/05 Dustin McIntire Initial version
  29. */
  30. static const char version[] =
  31. "smc911x.c: v1.0 04-16-2005 by Dustin McIntire <dustin@sensoria.com>\n";
  32. /* Debugging options */
  33. #define ENABLE_SMC_DEBUG_RX 0
  34. #define ENABLE_SMC_DEBUG_TX 0
  35. #define ENABLE_SMC_DEBUG_DMA 0
  36. #define ENABLE_SMC_DEBUG_PKTS 0
  37. #define ENABLE_SMC_DEBUG_MISC 0
  38. #define ENABLE_SMC_DEBUG_FUNC 0
  39. #define SMC_DEBUG_RX ((ENABLE_SMC_DEBUG_RX ? 1 : 0) << 0)
  40. #define SMC_DEBUG_TX ((ENABLE_SMC_DEBUG_TX ? 1 : 0) << 1)
  41. #define SMC_DEBUG_DMA ((ENABLE_SMC_DEBUG_DMA ? 1 : 0) << 2)
  42. #define SMC_DEBUG_PKTS ((ENABLE_SMC_DEBUG_PKTS ? 1 : 0) << 3)
  43. #define SMC_DEBUG_MISC ((ENABLE_SMC_DEBUG_MISC ? 1 : 0) << 4)
  44. #define SMC_DEBUG_FUNC ((ENABLE_SMC_DEBUG_FUNC ? 1 : 0) << 5)
  45. #ifndef SMC_DEBUG
  46. #define SMC_DEBUG ( SMC_DEBUG_RX | \
  47. SMC_DEBUG_TX | \
  48. SMC_DEBUG_DMA | \
  49. SMC_DEBUG_PKTS | \
  50. SMC_DEBUG_MISC | \
  51. SMC_DEBUG_FUNC \
  52. )
  53. #endif
  54. #include <linux/init.h>
  55. #include <linux/module.h>
  56. #include <linux/kernel.h>
  57. #include <linux/sched.h>
  58. #include <linux/slab.h>
  59. #include <linux/delay.h>
  60. #include <linux/interrupt.h>
  61. #include <linux/errno.h>
  62. #include <linux/ioport.h>
  63. #include <linux/crc32.h>
  64. #include <linux/device.h>
  65. #include <linux/platform_device.h>
  66. #include <linux/spinlock.h>
  67. #include <linux/ethtool.h>
  68. #include <linux/mii.h>
  69. #include <linux/workqueue.h>
  70. #include <linux/netdevice.h>
  71. #include <linux/etherdevice.h>
  72. #include <linux/skbuff.h>
  73. #include <asm/io.h>
  74. #include "smc911x.h"
  75. /*
  76. * Transmit timeout, default 5 seconds.
  77. */
  78. static int watchdog = 5000;
  79. module_param(watchdog, int, 0400);
  80. MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
  81. static int tx_fifo_kb=8;
  82. module_param(tx_fifo_kb, int, 0400);
  83. MODULE_PARM_DESC(tx_fifo_kb,"transmit FIFO size in KB (1<x<15)(default=8)");
  84. MODULE_LICENSE("GPL");
  85. /*
  86. * The internal workings of the driver. If you are changing anything
  87. * here with the SMC stuff, you should have the datasheet and know
  88. * what you are doing.
  89. */
  90. #define CARDNAME "smc911x"
  91. /*
  92. * Use power-down feature of the chip
  93. */
  94. #define POWER_DOWN 1
  95. /* store this information for the driver.. */
  96. struct smc911x_local {
  97. /*
  98. * If I have to wait until the DMA is finished and ready to reload a
  99. * packet, I will store the skbuff here. Then, the DMA will send it
  100. * out and free it.
  101. */
  102. struct sk_buff *pending_tx_skb;
  103. /* version/revision of the SMC911x chip */
  104. u16 version;
  105. u16 revision;
  106. /* FIFO sizes */
  107. int tx_fifo_kb;
  108. int tx_fifo_size;
  109. int rx_fifo_size;
  110. int afc_cfg;
  111. /* Contains the current active receive/phy mode */
  112. int ctl_rfduplx;
  113. int ctl_rspeed;
  114. u32 msg_enable;
  115. u32 phy_type;
  116. struct mii_if_info mii;
  117. /* work queue */
  118. struct work_struct phy_configure;
  119. int work_pending;
  120. int tx_throttle;
  121. spinlock_t lock;
  122. struct net_device *netdev;
  123. #ifdef SMC_USE_DMA
  124. /* DMA needs the physical address of the chip */
  125. u_long physaddr;
  126. int rxdma;
  127. int txdma;
  128. int rxdma_active;
  129. int txdma_active;
  130. struct sk_buff *current_rx_skb;
  131. struct sk_buff *current_tx_skb;
  132. struct device *dev;
  133. #endif
  134. };
  135. #if SMC_DEBUG > 0
  136. #define DBG(n, args...) \
  137. do { \
  138. if (SMC_DEBUG & (n)) \
  139. printk(args); \
  140. } while (0)
  141. #define PRINTK(args...) printk(args)
  142. #else
  143. #define DBG(n, args...) do { } while (0)
  144. #define PRINTK(args...) printk(KERN_DEBUG args)
  145. #endif
  146. #if SMC_DEBUG_PKTS > 0
  147. static void PRINT_PKT(u_char *buf, int length)
  148. {
  149. int i;
  150. int remainder;
  151. int lines;
  152. lines = length / 16;
  153. remainder = length % 16;
  154. for (i = 0; i < lines ; i ++) {
  155. int cur;
  156. for (cur = 0; cur < 8; cur++) {
  157. u_char a, b;
  158. a = *buf++;
  159. b = *buf++;
  160. printk("%02x%02x ", a, b);
  161. }
  162. printk("\n");
  163. }
  164. for (i = 0; i < remainder/2 ; i++) {
  165. u_char a, b;
  166. a = *buf++;
  167. b = *buf++;
  168. printk("%02x%02x ", a, b);
  169. }
  170. printk("\n");
  171. }
  172. #else
  173. #define PRINT_PKT(x...) do { } while (0)
  174. #endif
  175. /* this enables an interrupt in the interrupt mask register */
  176. #define SMC_ENABLE_INT(x) do { \
  177. unsigned int __mask; \
  178. unsigned long __flags; \
  179. spin_lock_irqsave(&lp->lock, __flags); \
  180. __mask = SMC_GET_INT_EN(); \
  181. __mask |= (x); \
  182. SMC_SET_INT_EN(__mask); \
  183. spin_unlock_irqrestore(&lp->lock, __flags); \
  184. } while (0)
  185. /* this disables an interrupt from the interrupt mask register */
  186. #define SMC_DISABLE_INT(x) do { \
  187. unsigned int __mask; \
  188. unsigned long __flags; \
  189. spin_lock_irqsave(&lp->lock, __flags); \
  190. __mask = SMC_GET_INT_EN(); \
  191. __mask &= ~(x); \
  192. SMC_SET_INT_EN(__mask); \
  193. spin_unlock_irqrestore(&lp->lock, __flags); \
  194. } while (0)
  195. /*
  196. * this does a soft reset on the device
  197. */
  198. static void smc911x_reset(struct net_device *dev)
  199. {
  200. unsigned long ioaddr = dev->base_addr;
  201. struct smc911x_local *lp = netdev_priv(dev);
  202. unsigned int reg, timeout=0, resets=1;
  203. unsigned long flags;
  204. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  205. /* Take out of PM setting first */
  206. if ((SMC_GET_PMT_CTRL() & PMT_CTRL_READY_) == 0) {
  207. /* Write to the bytetest will take out of powerdown */
  208. SMC_SET_BYTE_TEST(0);
  209. timeout=10;
  210. do {
  211. udelay(10);
  212. reg = SMC_GET_PMT_CTRL() & PMT_CTRL_READY_;
  213. } while ( timeout-- && !reg);
  214. if (timeout == 0) {
  215. PRINTK("%s: smc911x_reset timeout waiting for PM restore\n", dev->name);
  216. return;
  217. }
  218. }
  219. /* Disable all interrupts */
  220. spin_lock_irqsave(&lp->lock, flags);
  221. SMC_SET_INT_EN(0);
  222. spin_unlock_irqrestore(&lp->lock, flags);
  223. while (resets--) {
  224. SMC_SET_HW_CFG(HW_CFG_SRST_);
  225. timeout=10;
  226. do {
  227. udelay(10);
  228. reg = SMC_GET_HW_CFG();
  229. /* If chip indicates reset timeout then try again */
  230. if (reg & HW_CFG_SRST_TO_) {
  231. PRINTK("%s: chip reset timeout, retrying...\n", dev->name);
  232. resets++;
  233. break;
  234. }
  235. } while ( timeout-- && (reg & HW_CFG_SRST_));
  236. }
  237. if (timeout == 0) {
  238. PRINTK("%s: smc911x_reset timeout waiting for reset\n", dev->name);
  239. return;
  240. }
  241. /* make sure EEPROM has finished loading before setting GPIO_CFG */
  242. timeout=1000;
  243. while ( timeout-- && (SMC_GET_E2P_CMD() & E2P_CMD_EPC_BUSY_)) {
  244. udelay(10);
  245. }
  246. if (timeout == 0){
  247. PRINTK("%s: smc911x_reset timeout waiting for EEPROM busy\n", dev->name);
  248. return;
  249. }
  250. /* Initialize interrupts */
  251. SMC_SET_INT_EN(0);
  252. SMC_ACK_INT(-1);
  253. /* Reset the FIFO level and flow control settings */
  254. SMC_SET_HW_CFG((lp->tx_fifo_kb & 0xF) << 16);
  255. //TODO: Figure out what appropriate pause time is
  256. SMC_SET_FLOW(FLOW_FCPT_ | FLOW_FCEN_);
  257. SMC_SET_AFC_CFG(lp->afc_cfg);
  258. /* Set to LED outputs */
  259. SMC_SET_GPIO_CFG(0x70070000);
  260. /*
  261. * Deassert IRQ for 1*10us for edge type interrupts
  262. * and drive IRQ pin push-pull
  263. */
  264. SMC_SET_IRQ_CFG( (1 << 24) | INT_CFG_IRQ_EN_ | INT_CFG_IRQ_TYPE_ );
  265. /* clear anything saved */
  266. if (lp->pending_tx_skb != NULL) {
  267. dev_kfree_skb (lp->pending_tx_skb);
  268. lp->pending_tx_skb = NULL;
  269. dev->stats.tx_errors++;
  270. dev->stats.tx_aborted_errors++;
  271. }
  272. }
  273. /*
  274. * Enable Interrupts, Receive, and Transmit
  275. */
  276. static void smc911x_enable(struct net_device *dev)
  277. {
  278. unsigned long ioaddr = dev->base_addr;
  279. struct smc911x_local *lp = netdev_priv(dev);
  280. unsigned mask, cfg, cr;
  281. unsigned long flags;
  282. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  283. SMC_SET_MAC_ADDR(dev->dev_addr);
  284. /* Enable TX */
  285. cfg = SMC_GET_HW_CFG();
  286. cfg &= HW_CFG_TX_FIF_SZ_ | 0xFFF;
  287. cfg |= HW_CFG_SF_;
  288. SMC_SET_HW_CFG(cfg);
  289. SMC_SET_FIFO_TDA(0xFF);
  290. /* Update TX stats on every 64 packets received or every 1 sec */
  291. SMC_SET_FIFO_TSL(64);
  292. SMC_SET_GPT_CFG(GPT_CFG_TIMER_EN_ | 10000);
  293. spin_lock_irqsave(&lp->lock, flags);
  294. SMC_GET_MAC_CR(cr);
  295. cr |= MAC_CR_TXEN_ | MAC_CR_HBDIS_;
  296. SMC_SET_MAC_CR(cr);
  297. SMC_SET_TX_CFG(TX_CFG_TX_ON_);
  298. spin_unlock_irqrestore(&lp->lock, flags);
  299. /* Add 2 byte padding to start of packets */
  300. SMC_SET_RX_CFG((2<<8) & RX_CFG_RXDOFF_);
  301. /* Turn on receiver and enable RX */
  302. if (cr & MAC_CR_RXEN_)
  303. DBG(SMC_DEBUG_RX, "%s: Receiver already enabled\n", dev->name);
  304. spin_lock_irqsave(&lp->lock, flags);
  305. SMC_SET_MAC_CR( cr | MAC_CR_RXEN_ );
  306. spin_unlock_irqrestore(&lp->lock, flags);
  307. /* Interrupt on every received packet */
  308. SMC_SET_FIFO_RSA(0x01);
  309. SMC_SET_FIFO_RSL(0x00);
  310. /* now, enable interrupts */
  311. mask = INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_ | INT_EN_RSFL_EN_ |
  312. INT_EN_GPT_INT_EN_ | INT_EN_RXDFH_INT_EN_ | INT_EN_RXE_EN_ |
  313. INT_EN_PHY_INT_EN_;
  314. if (IS_REV_A(lp->revision))
  315. mask|=INT_EN_RDFL_EN_;
  316. else {
  317. mask|=INT_EN_RDFO_EN_;
  318. }
  319. SMC_ENABLE_INT(mask);
  320. }
  321. /*
  322. * this puts the device in an inactive state
  323. */
  324. static void smc911x_shutdown(struct net_device *dev)
  325. {
  326. unsigned long ioaddr = dev->base_addr;
  327. struct smc911x_local *lp = netdev_priv(dev);
  328. unsigned cr;
  329. unsigned long flags;
  330. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", CARDNAME, __FUNCTION__);
  331. /* Disable IRQ's */
  332. SMC_SET_INT_EN(0);
  333. /* Turn of Rx and TX */
  334. spin_lock_irqsave(&lp->lock, flags);
  335. SMC_GET_MAC_CR(cr);
  336. cr &= ~(MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_);
  337. SMC_SET_MAC_CR(cr);
  338. SMC_SET_TX_CFG(TX_CFG_STOP_TX_);
  339. spin_unlock_irqrestore(&lp->lock, flags);
  340. }
  341. static inline void smc911x_drop_pkt(struct net_device *dev)
  342. {
  343. unsigned long ioaddr = dev->base_addr;
  344. unsigned int fifo_count, timeout, reg;
  345. DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, "%s: --> %s\n", CARDNAME, __FUNCTION__);
  346. fifo_count = SMC_GET_RX_FIFO_INF() & 0xFFFF;
  347. if (fifo_count <= 4) {
  348. /* Manually dump the packet data */
  349. while (fifo_count--)
  350. SMC_GET_RX_FIFO();
  351. } else {
  352. /* Fast forward through the bad packet */
  353. SMC_SET_RX_DP_CTRL(RX_DP_CTRL_FFWD_BUSY_);
  354. timeout=50;
  355. do {
  356. udelay(10);
  357. reg = SMC_GET_RX_DP_CTRL() & RX_DP_CTRL_FFWD_BUSY_;
  358. } while ( timeout-- && reg);
  359. if (timeout == 0) {
  360. PRINTK("%s: timeout waiting for RX fast forward\n", dev->name);
  361. }
  362. }
  363. }
  364. /*
  365. * This is the procedure to handle the receipt of a packet.
  366. * It should be called after checking for packet presence in
  367. * the RX status FIFO. It must be called with the spin lock
  368. * already held.
  369. */
  370. static inline void smc911x_rcv(struct net_device *dev)
  371. {
  372. struct smc911x_local *lp = netdev_priv(dev);
  373. unsigned long ioaddr = dev->base_addr;
  374. unsigned int pkt_len, status;
  375. struct sk_buff *skb;
  376. unsigned char *data;
  377. DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, "%s: --> %s\n",
  378. dev->name, __FUNCTION__);
  379. status = SMC_GET_RX_STS_FIFO();
  380. DBG(SMC_DEBUG_RX, "%s: Rx pkt len %d status 0x%08x \n",
  381. dev->name, (status & 0x3fff0000) >> 16, status & 0xc000ffff);
  382. pkt_len = (status & RX_STS_PKT_LEN_) >> 16;
  383. if (status & RX_STS_ES_) {
  384. /* Deal with a bad packet */
  385. dev->stats.rx_errors++;
  386. if (status & RX_STS_CRC_ERR_)
  387. dev->stats.rx_crc_errors++;
  388. else {
  389. if (status & RX_STS_LEN_ERR_)
  390. dev->stats.rx_length_errors++;
  391. if (status & RX_STS_MCAST_)
  392. dev->stats.multicast++;
  393. }
  394. /* Remove the bad packet data from the RX FIFO */
  395. smc911x_drop_pkt(dev);
  396. } else {
  397. /* Receive a valid packet */
  398. /* Alloc a buffer with extra room for DMA alignment */
  399. skb=dev_alloc_skb(pkt_len+32);
  400. if (unlikely(skb == NULL)) {
  401. PRINTK( "%s: Low memory, rcvd packet dropped.\n",
  402. dev->name);
  403. dev->stats.rx_dropped++;
  404. smc911x_drop_pkt(dev);
  405. return;
  406. }
  407. /* Align IP header to 32 bits
  408. * Note that the device is configured to add a 2
  409. * byte padding to the packet start, so we really
  410. * want to write to the orignal data pointer */
  411. data = skb->data;
  412. skb_reserve(skb, 2);
  413. skb_put(skb,pkt_len-4);
  414. #ifdef SMC_USE_DMA
  415. {
  416. unsigned int fifo;
  417. /* Lower the FIFO threshold if possible */
  418. fifo = SMC_GET_FIFO_INT();
  419. if (fifo & 0xFF) fifo--;
  420. DBG(SMC_DEBUG_RX, "%s: Setting RX stat FIFO threshold to %d\n",
  421. dev->name, fifo & 0xff);
  422. SMC_SET_FIFO_INT(fifo);
  423. /* Setup RX DMA */
  424. SMC_SET_RX_CFG(RX_CFG_RX_END_ALGN16_ | ((2<<8) & RX_CFG_RXDOFF_));
  425. lp->rxdma_active = 1;
  426. lp->current_rx_skb = skb;
  427. SMC_PULL_DATA(data, (pkt_len+2+15) & ~15);
  428. /* Packet processing deferred to DMA RX interrupt */
  429. }
  430. #else
  431. SMC_SET_RX_CFG(RX_CFG_RX_END_ALGN4_ | ((2<<8) & RX_CFG_RXDOFF_));
  432. SMC_PULL_DATA(data, pkt_len+2+3);
  433. DBG(SMC_DEBUG_PKTS, "%s: Received packet\n", dev->name);
  434. PRINT_PKT(data, ((pkt_len - 4) <= 64) ? pkt_len - 4 : 64);
  435. dev->last_rx = jiffies;
  436. skb->protocol = eth_type_trans(skb, dev);
  437. netif_rx(skb);
  438. dev->stats.rx_packets++;
  439. dev->stats.rx_bytes += pkt_len-4;
  440. #endif
  441. }
  442. }
  443. /*
  444. * This is called to actually send a packet to the chip.
  445. */
  446. static void smc911x_hardware_send_pkt(struct net_device *dev)
  447. {
  448. struct smc911x_local *lp = netdev_priv(dev);
  449. unsigned long ioaddr = dev->base_addr;
  450. struct sk_buff *skb;
  451. unsigned int cmdA, cmdB, len;
  452. unsigned char *buf;
  453. unsigned long flags;
  454. DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n", dev->name, __FUNCTION__);
  455. BUG_ON(lp->pending_tx_skb == NULL);
  456. skb = lp->pending_tx_skb;
  457. lp->pending_tx_skb = NULL;
  458. /* cmdA {25:24] data alignment [20:16] start offset [10:0] buffer length */
  459. /* cmdB {31:16] pkt tag [10:0] length */
  460. #ifdef SMC_USE_DMA
  461. /* 16 byte buffer alignment mode */
  462. buf = (char*)((u32)(skb->data) & ~0xF);
  463. len = (skb->len + 0xF + ((u32)skb->data & 0xF)) & ~0xF;
  464. cmdA = (1<<24) | (((u32)skb->data & 0xF)<<16) |
  465. TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ |
  466. skb->len;
  467. #else
  468. buf = (char*)((u32)skb->data & ~0x3);
  469. len = (skb->len + 3 + ((u32)skb->data & 3)) & ~0x3;
  470. cmdA = (((u32)skb->data & 0x3) << 16) |
  471. TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ |
  472. skb->len;
  473. #endif
  474. /* tag is packet length so we can use this in stats update later */
  475. cmdB = (skb->len << 16) | (skb->len & 0x7FF);
  476. DBG(SMC_DEBUG_TX, "%s: TX PKT LENGTH 0x%04x (%d) BUF 0x%p CMDA 0x%08x CMDB 0x%08x\n",
  477. dev->name, len, len, buf, cmdA, cmdB);
  478. SMC_SET_TX_FIFO(cmdA);
  479. SMC_SET_TX_FIFO(cmdB);
  480. DBG(SMC_DEBUG_PKTS, "%s: Transmitted packet\n", dev->name);
  481. PRINT_PKT(buf, len <= 64 ? len : 64);
  482. /* Send pkt via PIO or DMA */
  483. #ifdef SMC_USE_DMA
  484. lp->current_tx_skb = skb;
  485. SMC_PUSH_DATA(buf, len);
  486. /* DMA complete IRQ will free buffer and set jiffies */
  487. #else
  488. SMC_PUSH_DATA(buf, len);
  489. dev->trans_start = jiffies;
  490. dev_kfree_skb(skb);
  491. #endif
  492. spin_lock_irqsave(&lp->lock, flags);
  493. if (!lp->tx_throttle) {
  494. netif_wake_queue(dev);
  495. }
  496. spin_unlock_irqrestore(&lp->lock, flags);
  497. SMC_ENABLE_INT(INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_);
  498. }
  499. /*
  500. * Since I am not sure if I will have enough room in the chip's ram
  501. * to store the packet, I call this routine which either sends it
  502. * now, or set the card to generates an interrupt when ready
  503. * for the packet.
  504. */
  505. static int smc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
  506. {
  507. struct smc911x_local *lp = netdev_priv(dev);
  508. unsigned long ioaddr = dev->base_addr;
  509. unsigned int free;
  510. unsigned long flags;
  511. DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n",
  512. dev->name, __FUNCTION__);
  513. BUG_ON(lp->pending_tx_skb != NULL);
  514. free = SMC_GET_TX_FIFO_INF() & TX_FIFO_INF_TDFREE_;
  515. DBG(SMC_DEBUG_TX, "%s: TX free space %d\n", dev->name, free);
  516. /* Turn off the flow when running out of space in FIFO */
  517. if (free <= SMC911X_TX_FIFO_LOW_THRESHOLD) {
  518. DBG(SMC_DEBUG_TX, "%s: Disabling data flow due to low FIFO space (%d)\n",
  519. dev->name, free);
  520. spin_lock_irqsave(&lp->lock, flags);
  521. /* Reenable when at least 1 packet of size MTU present */
  522. SMC_SET_FIFO_TDA((SMC911X_TX_FIFO_LOW_THRESHOLD)/64);
  523. lp->tx_throttle = 1;
  524. netif_stop_queue(dev);
  525. spin_unlock_irqrestore(&lp->lock, flags);
  526. }
  527. /* Drop packets when we run out of space in TX FIFO
  528. * Account for overhead required for:
  529. *
  530. * Tx command words 8 bytes
  531. * Start offset 15 bytes
  532. * End padding 15 bytes
  533. */
  534. if (unlikely(free < (skb->len + 8 + 15 + 15))) {
  535. printk("%s: No Tx free space %d < %d\n",
  536. dev->name, free, skb->len);
  537. lp->pending_tx_skb = NULL;
  538. dev->stats.tx_errors++;
  539. dev->stats.tx_dropped++;
  540. dev_kfree_skb(skb);
  541. return 0;
  542. }
  543. #ifdef SMC_USE_DMA
  544. {
  545. /* If the DMA is already running then defer this packet Tx until
  546. * the DMA IRQ starts it
  547. */
  548. spin_lock_irqsave(&lp->lock, flags);
  549. if (lp->txdma_active) {
  550. DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: Tx DMA running, deferring packet\n", dev->name);
  551. lp->pending_tx_skb = skb;
  552. netif_stop_queue(dev);
  553. spin_unlock_irqrestore(&lp->lock, flags);
  554. return 0;
  555. } else {
  556. DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: Activating Tx DMA\n", dev->name);
  557. lp->txdma_active = 1;
  558. }
  559. spin_unlock_irqrestore(&lp->lock, flags);
  560. }
  561. #endif
  562. lp->pending_tx_skb = skb;
  563. smc911x_hardware_send_pkt(dev);
  564. return 0;
  565. }
  566. /*
  567. * This handles a TX status interrupt, which is only called when:
  568. * - a TX error occurred, or
  569. * - TX of a packet completed.
  570. */
  571. static void smc911x_tx(struct net_device *dev)
  572. {
  573. unsigned long ioaddr = dev->base_addr;
  574. struct smc911x_local *lp = netdev_priv(dev);
  575. unsigned int tx_status;
  576. DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n",
  577. dev->name, __FUNCTION__);
  578. /* Collect the TX status */
  579. while (((SMC_GET_TX_FIFO_INF() & TX_FIFO_INF_TSUSED_) >> 16) != 0) {
  580. DBG(SMC_DEBUG_TX, "%s: Tx stat FIFO used 0x%04x\n",
  581. dev->name,
  582. (SMC_GET_TX_FIFO_INF() & TX_FIFO_INF_TSUSED_) >> 16);
  583. tx_status = SMC_GET_TX_STS_FIFO();
  584. dev->stats.tx_packets++;
  585. dev->stats.tx_bytes+=tx_status>>16;
  586. DBG(SMC_DEBUG_TX, "%s: Tx FIFO tag 0x%04x status 0x%04x\n",
  587. dev->name, (tx_status & 0xffff0000) >> 16,
  588. tx_status & 0x0000ffff);
  589. /* count Tx errors, but ignore lost carrier errors when in
  590. * full-duplex mode */
  591. if ((tx_status & TX_STS_ES_) && !(lp->ctl_rfduplx &&
  592. !(tx_status & 0x00000306))) {
  593. dev->stats.tx_errors++;
  594. }
  595. if (tx_status & TX_STS_MANY_COLL_) {
  596. dev->stats.collisions+=16;
  597. dev->stats.tx_aborted_errors++;
  598. } else {
  599. dev->stats.collisions+=(tx_status & TX_STS_COLL_CNT_) >> 3;
  600. }
  601. /* carrier error only has meaning for half-duplex communication */
  602. if ((tx_status & (TX_STS_LOC_ | TX_STS_NO_CARR_)) &&
  603. !lp->ctl_rfduplx) {
  604. dev->stats.tx_carrier_errors++;
  605. }
  606. if (tx_status & TX_STS_LATE_COLL_) {
  607. dev->stats.collisions++;
  608. dev->stats.tx_aborted_errors++;
  609. }
  610. }
  611. }
  612. /*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
  613. /*
  614. * Reads a register from the MII Management serial interface
  615. */
  616. static int smc911x_phy_read(struct net_device *dev, int phyaddr, int phyreg)
  617. {
  618. unsigned long ioaddr = dev->base_addr;
  619. unsigned int phydata;
  620. SMC_GET_MII(phyreg, phyaddr, phydata);
  621. DBG(SMC_DEBUG_MISC, "%s: phyaddr=0x%x, phyreg=0x%02x, phydata=0x%04x\n",
  622. __FUNCTION__, phyaddr, phyreg, phydata);
  623. return phydata;
  624. }
  625. /*
  626. * Writes a register to the MII Management serial interface
  627. */
  628. static void smc911x_phy_write(struct net_device *dev, int phyaddr, int phyreg,
  629. int phydata)
  630. {
  631. unsigned long ioaddr = dev->base_addr;
  632. DBG(SMC_DEBUG_MISC, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
  633. __FUNCTION__, phyaddr, phyreg, phydata);
  634. SMC_SET_MII(phyreg, phyaddr, phydata);
  635. }
  636. /*
  637. * Finds and reports the PHY address (115 and 117 have external
  638. * PHY interface 118 has internal only
  639. */
  640. static void smc911x_phy_detect(struct net_device *dev)
  641. {
  642. unsigned long ioaddr = dev->base_addr;
  643. struct smc911x_local *lp = netdev_priv(dev);
  644. int phyaddr;
  645. unsigned int cfg, id1, id2;
  646. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  647. lp->phy_type = 0;
  648. /*
  649. * Scan all 32 PHY addresses if necessary, starting at
  650. * PHY#1 to PHY#31, and then PHY#0 last.
  651. */
  652. switch(lp->version) {
  653. case 0x115:
  654. case 0x117:
  655. cfg = SMC_GET_HW_CFG();
  656. if (cfg & HW_CFG_EXT_PHY_DET_) {
  657. cfg &= ~HW_CFG_PHY_CLK_SEL_;
  658. cfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_;
  659. SMC_SET_HW_CFG(cfg);
  660. udelay(10); /* Wait for clocks to stop */
  661. cfg |= HW_CFG_EXT_PHY_EN_;
  662. SMC_SET_HW_CFG(cfg);
  663. udelay(10); /* Wait for clocks to stop */
  664. cfg &= ~HW_CFG_PHY_CLK_SEL_;
  665. cfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_;
  666. SMC_SET_HW_CFG(cfg);
  667. udelay(10); /* Wait for clocks to stop */
  668. cfg |= HW_CFG_SMI_SEL_;
  669. SMC_SET_HW_CFG(cfg);
  670. for (phyaddr = 1; phyaddr < 32; ++phyaddr) {
  671. /* Read the PHY identifiers */
  672. SMC_GET_PHY_ID1(phyaddr & 31, id1);
  673. SMC_GET_PHY_ID2(phyaddr & 31, id2);
  674. /* Make sure it is a valid identifier */
  675. if (id1 != 0x0000 && id1 != 0xffff &&
  676. id1 != 0x8000 && id2 != 0x0000 &&
  677. id2 != 0xffff && id2 != 0x8000) {
  678. /* Save the PHY's address */
  679. lp->mii.phy_id = phyaddr & 31;
  680. lp->phy_type = id1 << 16 | id2;
  681. break;
  682. }
  683. }
  684. }
  685. default:
  686. /* Internal media only */
  687. SMC_GET_PHY_ID1(1, id1);
  688. SMC_GET_PHY_ID2(1, id2);
  689. /* Save the PHY's address */
  690. lp->mii.phy_id = 1;
  691. lp->phy_type = id1 << 16 | id2;
  692. }
  693. DBG(SMC_DEBUG_MISC, "%s: phy_id1=0x%x, phy_id2=0x%x phyaddr=0x%d\n",
  694. dev->name, id1, id2, lp->mii.phy_id);
  695. }
  696. /*
  697. * Sets the PHY to a configuration as determined by the user.
  698. * Called with spin_lock held.
  699. */
  700. static int smc911x_phy_fixed(struct net_device *dev)
  701. {
  702. struct smc911x_local *lp = netdev_priv(dev);
  703. unsigned long ioaddr = dev->base_addr;
  704. int phyaddr = lp->mii.phy_id;
  705. int bmcr;
  706. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  707. /* Enter Link Disable state */
  708. SMC_GET_PHY_BMCR(phyaddr, bmcr);
  709. bmcr |= BMCR_PDOWN;
  710. SMC_SET_PHY_BMCR(phyaddr, bmcr);
  711. /*
  712. * Set our fixed capabilities
  713. * Disable auto-negotiation
  714. */
  715. bmcr &= ~BMCR_ANENABLE;
  716. if (lp->ctl_rfduplx)
  717. bmcr |= BMCR_FULLDPLX;
  718. if (lp->ctl_rspeed == 100)
  719. bmcr |= BMCR_SPEED100;
  720. /* Write our capabilities to the phy control register */
  721. SMC_SET_PHY_BMCR(phyaddr, bmcr);
  722. /* Re-Configure the Receive/Phy Control register */
  723. bmcr &= ~BMCR_PDOWN;
  724. SMC_SET_PHY_BMCR(phyaddr, bmcr);
  725. return 1;
  726. }
  727. /*
  728. * smc911x_phy_reset - reset the phy
  729. * @dev: net device
  730. * @phy: phy address
  731. *
  732. * Issue a software reset for the specified PHY and
  733. * wait up to 100ms for the reset to complete. We should
  734. * not access the PHY for 50ms after issuing the reset.
  735. *
  736. * The time to wait appears to be dependent on the PHY.
  737. *
  738. */
  739. static int smc911x_phy_reset(struct net_device *dev, int phy)
  740. {
  741. struct smc911x_local *lp = netdev_priv(dev);
  742. unsigned long ioaddr = dev->base_addr;
  743. int timeout;
  744. unsigned long flags;
  745. unsigned int reg;
  746. DBG(SMC_DEBUG_FUNC, "%s: --> %s()\n", dev->name, __FUNCTION__);
  747. spin_lock_irqsave(&lp->lock, flags);
  748. reg = SMC_GET_PMT_CTRL();
  749. reg &= ~0xfffff030;
  750. reg |= PMT_CTRL_PHY_RST_;
  751. SMC_SET_PMT_CTRL(reg);
  752. spin_unlock_irqrestore(&lp->lock, flags);
  753. for (timeout = 2; timeout; timeout--) {
  754. msleep(50);
  755. spin_lock_irqsave(&lp->lock, flags);
  756. reg = SMC_GET_PMT_CTRL();
  757. spin_unlock_irqrestore(&lp->lock, flags);
  758. if (!(reg & PMT_CTRL_PHY_RST_)) {
  759. /* extra delay required because the phy may
  760. * not be completed with its reset
  761. * when PHY_BCR_RESET_ is cleared. 256us
  762. * should suffice, but use 500us to be safe
  763. */
  764. udelay(500);
  765. break;
  766. }
  767. }
  768. return reg & PMT_CTRL_PHY_RST_;
  769. }
  770. /*
  771. * smc911x_phy_powerdown - powerdown phy
  772. * @dev: net device
  773. * @phy: phy address
  774. *
  775. * Power down the specified PHY
  776. */
  777. static void smc911x_phy_powerdown(struct net_device *dev, int phy)
  778. {
  779. unsigned long ioaddr = dev->base_addr;
  780. unsigned int bmcr;
  781. /* Enter Link Disable state */
  782. SMC_GET_PHY_BMCR(phy, bmcr);
  783. bmcr |= BMCR_PDOWN;
  784. SMC_SET_PHY_BMCR(phy, bmcr);
  785. }
  786. /*
  787. * smc911x_phy_check_media - check the media status and adjust BMCR
  788. * @dev: net device
  789. * @init: set true for initialisation
  790. *
  791. * Select duplex mode depending on negotiation state. This
  792. * also updates our carrier state.
  793. */
  794. static void smc911x_phy_check_media(struct net_device *dev, int init)
  795. {
  796. struct smc911x_local *lp = netdev_priv(dev);
  797. unsigned long ioaddr = dev->base_addr;
  798. int phyaddr = lp->mii.phy_id;
  799. unsigned int bmcr, cr;
  800. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  801. if (mii_check_media(&lp->mii, netif_msg_link(lp), init)) {
  802. /* duplex state has changed */
  803. SMC_GET_PHY_BMCR(phyaddr, bmcr);
  804. SMC_GET_MAC_CR(cr);
  805. if (lp->mii.full_duplex) {
  806. DBG(SMC_DEBUG_MISC, "%s: Configuring for full-duplex mode\n", dev->name);
  807. bmcr |= BMCR_FULLDPLX;
  808. cr |= MAC_CR_RCVOWN_;
  809. } else {
  810. DBG(SMC_DEBUG_MISC, "%s: Configuring for half-duplex mode\n", dev->name);
  811. bmcr &= ~BMCR_FULLDPLX;
  812. cr &= ~MAC_CR_RCVOWN_;
  813. }
  814. SMC_SET_PHY_BMCR(phyaddr, bmcr);
  815. SMC_SET_MAC_CR(cr);
  816. }
  817. }
  818. /*
  819. * Configures the specified PHY through the MII management interface
  820. * using Autonegotiation.
  821. * Calls smc911x_phy_fixed() if the user has requested a certain config.
  822. * If RPC ANEG bit is set, the media selection is dependent purely on
  823. * the selection by the MII (either in the MII BMCR reg or the result
  824. * of autonegotiation.) If the RPC ANEG bit is cleared, the selection
  825. * is controlled by the RPC SPEED and RPC DPLX bits.
  826. */
  827. static void smc911x_phy_configure(struct work_struct *work)
  828. {
  829. struct smc911x_local *lp = container_of(work, struct smc911x_local,
  830. phy_configure);
  831. struct net_device *dev = lp->netdev;
  832. unsigned long ioaddr = dev->base_addr;
  833. int phyaddr = lp->mii.phy_id;
  834. int my_phy_caps; /* My PHY capabilities */
  835. int my_ad_caps; /* My Advertised capabilities */
  836. int status;
  837. unsigned long flags;
  838. DBG(SMC_DEBUG_FUNC, "%s: --> %s()\n", dev->name, __FUNCTION__);
  839. /*
  840. * We should not be called if phy_type is zero.
  841. */
  842. if (lp->phy_type == 0)
  843. goto smc911x_phy_configure_exit_nolock;
  844. if (smc911x_phy_reset(dev, phyaddr)) {
  845. printk("%s: PHY reset timed out\n", dev->name);
  846. goto smc911x_phy_configure_exit_nolock;
  847. }
  848. spin_lock_irqsave(&lp->lock, flags);
  849. /*
  850. * Enable PHY Interrupts (for register 18)
  851. * Interrupts listed here are enabled
  852. */
  853. SMC_SET_PHY_INT_MASK(phyaddr, PHY_INT_MASK_ENERGY_ON_ |
  854. PHY_INT_MASK_ANEG_COMP_ | PHY_INT_MASK_REMOTE_FAULT_ |
  855. PHY_INT_MASK_LINK_DOWN_);
  856. /* If the user requested no auto neg, then go set his request */
  857. if (lp->mii.force_media) {
  858. smc911x_phy_fixed(dev);
  859. goto smc911x_phy_configure_exit;
  860. }
  861. /* Copy our capabilities from MII_BMSR to MII_ADVERTISE */
  862. SMC_GET_PHY_BMSR(phyaddr, my_phy_caps);
  863. if (!(my_phy_caps & BMSR_ANEGCAPABLE)) {
  864. printk(KERN_INFO "Auto negotiation NOT supported\n");
  865. smc911x_phy_fixed(dev);
  866. goto smc911x_phy_configure_exit;
  867. }
  868. /* CSMA capable w/ both pauses */
  869. my_ad_caps = ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
  870. if (my_phy_caps & BMSR_100BASE4)
  871. my_ad_caps |= ADVERTISE_100BASE4;
  872. if (my_phy_caps & BMSR_100FULL)
  873. my_ad_caps |= ADVERTISE_100FULL;
  874. if (my_phy_caps & BMSR_100HALF)
  875. my_ad_caps |= ADVERTISE_100HALF;
  876. if (my_phy_caps & BMSR_10FULL)
  877. my_ad_caps |= ADVERTISE_10FULL;
  878. if (my_phy_caps & BMSR_10HALF)
  879. my_ad_caps |= ADVERTISE_10HALF;
  880. /* Disable capabilities not selected by our user */
  881. if (lp->ctl_rspeed != 100)
  882. my_ad_caps &= ~(ADVERTISE_100BASE4|ADVERTISE_100FULL|ADVERTISE_100HALF);
  883. if (!lp->ctl_rfduplx)
  884. my_ad_caps &= ~(ADVERTISE_100FULL|ADVERTISE_10FULL);
  885. /* Update our Auto-Neg Advertisement Register */
  886. SMC_SET_PHY_MII_ADV(phyaddr, my_ad_caps);
  887. lp->mii.advertising = my_ad_caps;
  888. /*
  889. * Read the register back. Without this, it appears that when
  890. * auto-negotiation is restarted, sometimes it isn't ready and
  891. * the link does not come up.
  892. */
  893. udelay(10);
  894. SMC_GET_PHY_MII_ADV(phyaddr, status);
  895. DBG(SMC_DEBUG_MISC, "%s: phy caps=0x%04x\n", dev->name, my_phy_caps);
  896. DBG(SMC_DEBUG_MISC, "%s: phy advertised caps=0x%04x\n", dev->name, my_ad_caps);
  897. /* Restart auto-negotiation process in order to advertise my caps */
  898. SMC_SET_PHY_BMCR(phyaddr, BMCR_ANENABLE | BMCR_ANRESTART);
  899. smc911x_phy_check_media(dev, 1);
  900. smc911x_phy_configure_exit:
  901. spin_unlock_irqrestore(&lp->lock, flags);
  902. smc911x_phy_configure_exit_nolock:
  903. lp->work_pending = 0;
  904. }
  905. /*
  906. * smc911x_phy_interrupt
  907. *
  908. * Purpose: Handle interrupts relating to PHY register 18. This is
  909. * called from the "hard" interrupt handler under our private spinlock.
  910. */
  911. static void smc911x_phy_interrupt(struct net_device *dev)
  912. {
  913. struct smc911x_local *lp = netdev_priv(dev);
  914. unsigned long ioaddr = dev->base_addr;
  915. int phyaddr = lp->mii.phy_id;
  916. int status;
  917. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  918. if (lp->phy_type == 0)
  919. return;
  920. smc911x_phy_check_media(dev, 0);
  921. /* read to clear status bits */
  922. SMC_GET_PHY_INT_SRC(phyaddr,status);
  923. DBG(SMC_DEBUG_MISC, "%s: PHY interrupt status 0x%04x\n",
  924. dev->name, status & 0xffff);
  925. DBG(SMC_DEBUG_MISC, "%s: AFC_CFG 0x%08x\n",
  926. dev->name, SMC_GET_AFC_CFG());
  927. }
  928. /*--- END PHY CONTROL AND CONFIGURATION-------------------------------------*/
  929. /*
  930. * This is the main routine of the driver, to handle the device when
  931. * it needs some attention.
  932. */
  933. static irqreturn_t smc911x_interrupt(int irq, void *dev_id)
  934. {
  935. struct net_device *dev = dev_id;
  936. unsigned long ioaddr = dev->base_addr;
  937. struct smc911x_local *lp = netdev_priv(dev);
  938. unsigned int status, mask, timeout;
  939. unsigned int rx_overrun=0, cr, pkts;
  940. unsigned long flags;
  941. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  942. spin_lock_irqsave(&lp->lock, flags);
  943. /* Spurious interrupt check */
  944. if ((SMC_GET_IRQ_CFG() & (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) !=
  945. (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) {
  946. spin_unlock_irqrestore(&lp->lock, flags);
  947. return IRQ_NONE;
  948. }
  949. mask = SMC_GET_INT_EN();
  950. SMC_SET_INT_EN(0);
  951. /* set a timeout value, so I don't stay here forever */
  952. timeout = 8;
  953. do {
  954. status = SMC_GET_INT();
  955. DBG(SMC_DEBUG_MISC, "%s: INT 0x%08x MASK 0x%08x OUTSIDE MASK 0x%08x\n",
  956. dev->name, status, mask, status & ~mask);
  957. status &= mask;
  958. if (!status)
  959. break;
  960. /* Handle SW interrupt condition */
  961. if (status & INT_STS_SW_INT_) {
  962. SMC_ACK_INT(INT_STS_SW_INT_);
  963. mask &= ~INT_EN_SW_INT_EN_;
  964. }
  965. /* Handle various error conditions */
  966. if (status & INT_STS_RXE_) {
  967. SMC_ACK_INT(INT_STS_RXE_);
  968. dev->stats.rx_errors++;
  969. }
  970. if (status & INT_STS_RXDFH_INT_) {
  971. SMC_ACK_INT(INT_STS_RXDFH_INT_);
  972. dev->stats.rx_dropped+=SMC_GET_RX_DROP();
  973. }
  974. /* Undocumented interrupt-what is the right thing to do here? */
  975. if (status & INT_STS_RXDF_INT_) {
  976. SMC_ACK_INT(INT_STS_RXDF_INT_);
  977. }
  978. /* Rx Data FIFO exceeds set level */
  979. if (status & INT_STS_RDFL_) {
  980. if (IS_REV_A(lp->revision)) {
  981. rx_overrun=1;
  982. SMC_GET_MAC_CR(cr);
  983. cr &= ~MAC_CR_RXEN_;
  984. SMC_SET_MAC_CR(cr);
  985. DBG(SMC_DEBUG_RX, "%s: RX overrun\n", dev->name);
  986. dev->stats.rx_errors++;
  987. dev->stats.rx_fifo_errors++;
  988. }
  989. SMC_ACK_INT(INT_STS_RDFL_);
  990. }
  991. if (status & INT_STS_RDFO_) {
  992. if (!IS_REV_A(lp->revision)) {
  993. SMC_GET_MAC_CR(cr);
  994. cr &= ~MAC_CR_RXEN_;
  995. SMC_SET_MAC_CR(cr);
  996. rx_overrun=1;
  997. DBG(SMC_DEBUG_RX, "%s: RX overrun\n", dev->name);
  998. dev->stats.rx_errors++;
  999. dev->stats.rx_fifo_errors++;
  1000. }
  1001. SMC_ACK_INT(INT_STS_RDFO_);
  1002. }
  1003. /* Handle receive condition */
  1004. if ((status & INT_STS_RSFL_) || rx_overrun) {
  1005. unsigned int fifo;
  1006. DBG(SMC_DEBUG_RX, "%s: RX irq\n", dev->name);
  1007. fifo = SMC_GET_RX_FIFO_INF();
  1008. pkts = (fifo & RX_FIFO_INF_RXSUSED_) >> 16;
  1009. DBG(SMC_DEBUG_RX, "%s: Rx FIFO pkts %d, bytes %d\n",
  1010. dev->name, pkts, fifo & 0xFFFF );
  1011. if (pkts != 0) {
  1012. #ifdef SMC_USE_DMA
  1013. unsigned int fifo;
  1014. if (lp->rxdma_active){
  1015. DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA,
  1016. "%s: RX DMA active\n", dev->name);
  1017. /* The DMA is already running so up the IRQ threshold */
  1018. fifo = SMC_GET_FIFO_INT() & ~0xFF;
  1019. fifo |= pkts & 0xFF;
  1020. DBG(SMC_DEBUG_RX,
  1021. "%s: Setting RX stat FIFO threshold to %d\n",
  1022. dev->name, fifo & 0xff);
  1023. SMC_SET_FIFO_INT(fifo);
  1024. } else
  1025. #endif
  1026. smc911x_rcv(dev);
  1027. }
  1028. SMC_ACK_INT(INT_STS_RSFL_);
  1029. }
  1030. /* Handle transmit FIFO available */
  1031. if (status & INT_STS_TDFA_) {
  1032. DBG(SMC_DEBUG_TX, "%s: TX data FIFO space available irq\n", dev->name);
  1033. SMC_SET_FIFO_TDA(0xFF);
  1034. lp->tx_throttle = 0;
  1035. #ifdef SMC_USE_DMA
  1036. if (!lp->txdma_active)
  1037. #endif
  1038. netif_wake_queue(dev);
  1039. SMC_ACK_INT(INT_STS_TDFA_);
  1040. }
  1041. /* Handle transmit done condition */
  1042. #if 1
  1043. if (status & (INT_STS_TSFL_ | INT_STS_GPT_INT_)) {
  1044. DBG(SMC_DEBUG_TX | SMC_DEBUG_MISC,
  1045. "%s: Tx stat FIFO limit (%d) /GPT irq\n",
  1046. dev->name, (SMC_GET_FIFO_INT() & 0x00ff0000) >> 16);
  1047. smc911x_tx(dev);
  1048. SMC_SET_GPT_CFG(GPT_CFG_TIMER_EN_ | 10000);
  1049. SMC_ACK_INT(INT_STS_TSFL_);
  1050. SMC_ACK_INT(INT_STS_TSFL_ | INT_STS_GPT_INT_);
  1051. }
  1052. #else
  1053. if (status & INT_STS_TSFL_) {
  1054. DBG(SMC_DEBUG_TX, "%s: TX status FIFO limit (%d) irq \n", dev->name, );
  1055. smc911x_tx(dev);
  1056. SMC_ACK_INT(INT_STS_TSFL_);
  1057. }
  1058. if (status & INT_STS_GPT_INT_) {
  1059. DBG(SMC_DEBUG_RX, "%s: IRQ_CFG 0x%08x FIFO_INT 0x%08x RX_CFG 0x%08x\n",
  1060. dev->name,
  1061. SMC_GET_IRQ_CFG(),
  1062. SMC_GET_FIFO_INT(),
  1063. SMC_GET_RX_CFG());
  1064. DBG(SMC_DEBUG_RX, "%s: Rx Stat FIFO Used 0x%02x "
  1065. "Data FIFO Used 0x%04x Stat FIFO 0x%08x\n",
  1066. dev->name,
  1067. (SMC_GET_RX_FIFO_INF() & 0x00ff0000) >> 16,
  1068. SMC_GET_RX_FIFO_INF() & 0xffff,
  1069. SMC_GET_RX_STS_FIFO_PEEK());
  1070. SMC_SET_GPT_CFG(GPT_CFG_TIMER_EN_ | 10000);
  1071. SMC_ACK_INT(INT_STS_GPT_INT_);
  1072. }
  1073. #endif
  1074. /* Handle PHY interrupt condition */
  1075. if (status & INT_STS_PHY_INT_) {
  1076. DBG(SMC_DEBUG_MISC, "%s: PHY irq\n", dev->name);
  1077. smc911x_phy_interrupt(dev);
  1078. SMC_ACK_INT(INT_STS_PHY_INT_);
  1079. }
  1080. } while (--timeout);
  1081. /* restore mask state */
  1082. SMC_SET_INT_EN(mask);
  1083. DBG(SMC_DEBUG_MISC, "%s: Interrupt done (%d loops)\n",
  1084. dev->name, 8-timeout);
  1085. spin_unlock_irqrestore(&lp->lock, flags);
  1086. DBG(3, "%s: Interrupt done (%d loops)\n", dev->name, 8-timeout);
  1087. return IRQ_HANDLED;
  1088. }
  1089. #ifdef SMC_USE_DMA
  1090. static void
  1091. smc911x_tx_dma_irq(int dma, void *data)
  1092. {
  1093. struct net_device *dev = (struct net_device *)data;
  1094. struct smc911x_local *lp = netdev_priv(dev);
  1095. struct sk_buff *skb = lp->current_tx_skb;
  1096. unsigned long flags;
  1097. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  1098. DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: TX DMA irq handler\n", dev->name);
  1099. /* Clear the DMA interrupt sources */
  1100. SMC_DMA_ACK_IRQ(dev, dma);
  1101. BUG_ON(skb == NULL);
  1102. dma_unmap_single(NULL, tx_dmabuf, tx_dmalen, DMA_TO_DEVICE);
  1103. dev->trans_start = jiffies;
  1104. dev_kfree_skb_irq(skb);
  1105. lp->current_tx_skb = NULL;
  1106. if (lp->pending_tx_skb != NULL)
  1107. smc911x_hardware_send_pkt(dev);
  1108. else {
  1109. DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA,
  1110. "%s: No pending Tx packets. DMA disabled\n", dev->name);
  1111. spin_lock_irqsave(&lp->lock, flags);
  1112. lp->txdma_active = 0;
  1113. if (!lp->tx_throttle) {
  1114. netif_wake_queue(dev);
  1115. }
  1116. spin_unlock_irqrestore(&lp->lock, flags);
  1117. }
  1118. DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA,
  1119. "%s: TX DMA irq completed\n", dev->name);
  1120. }
  1121. static void
  1122. smc911x_rx_dma_irq(int dma, void *data)
  1123. {
  1124. struct net_device *dev = (struct net_device *)data;
  1125. unsigned long ioaddr = dev->base_addr;
  1126. struct smc911x_local *lp = netdev_priv(dev);
  1127. struct sk_buff *skb = lp->current_rx_skb;
  1128. unsigned long flags;
  1129. unsigned int pkts;
  1130. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  1131. DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA, "%s: RX DMA irq handler\n", dev->name);
  1132. /* Clear the DMA interrupt sources */
  1133. SMC_DMA_ACK_IRQ(dev, dma);
  1134. dma_unmap_single(NULL, rx_dmabuf, rx_dmalen, DMA_FROM_DEVICE);
  1135. BUG_ON(skb == NULL);
  1136. lp->current_rx_skb = NULL;
  1137. PRINT_PKT(skb->data, skb->len);
  1138. dev->last_rx = jiffies;
  1139. skb->protocol = eth_type_trans(skb, dev);
  1140. netif_rx(skb);
  1141. dev->stats.rx_packets++;
  1142. dev->stats.rx_bytes += skb->len;
  1143. spin_lock_irqsave(&lp->lock, flags);
  1144. pkts = (SMC_GET_RX_FIFO_INF() & RX_FIFO_INF_RXSUSED_) >> 16;
  1145. if (pkts != 0) {
  1146. smc911x_rcv(dev);
  1147. }else {
  1148. lp->rxdma_active = 0;
  1149. }
  1150. spin_unlock_irqrestore(&lp->lock, flags);
  1151. DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA,
  1152. "%s: RX DMA irq completed. DMA RX FIFO PKTS %d\n",
  1153. dev->name, pkts);
  1154. }
  1155. #endif /* SMC_USE_DMA */
  1156. #ifdef CONFIG_NET_POLL_CONTROLLER
  1157. /*
  1158. * Polling receive - used by netconsole and other diagnostic tools
  1159. * to allow network i/o with interrupts disabled.
  1160. */
  1161. static void smc911x_poll_controller(struct net_device *dev)
  1162. {
  1163. disable_irq(dev->irq);
  1164. smc911x_interrupt(dev->irq, dev);
  1165. enable_irq(dev->irq);
  1166. }
  1167. #endif
  1168. /* Our watchdog timed out. Called by the networking layer */
  1169. static void smc911x_timeout(struct net_device *dev)
  1170. {
  1171. struct smc911x_local *lp = netdev_priv(dev);
  1172. unsigned long ioaddr = dev->base_addr;
  1173. int status, mask;
  1174. unsigned long flags;
  1175. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  1176. spin_lock_irqsave(&lp->lock, flags);
  1177. status = SMC_GET_INT();
  1178. mask = SMC_GET_INT_EN();
  1179. spin_unlock_irqrestore(&lp->lock, flags);
  1180. DBG(SMC_DEBUG_MISC, "%s: INT 0x%02x MASK 0x%02x \n",
  1181. dev->name, status, mask);
  1182. /* Dump the current TX FIFO contents and restart */
  1183. mask = SMC_GET_TX_CFG();
  1184. SMC_SET_TX_CFG(mask | TX_CFG_TXS_DUMP_ | TX_CFG_TXD_DUMP_);
  1185. /*
  1186. * Reconfiguring the PHY doesn't seem like a bad idea here, but
  1187. * smc911x_phy_configure() calls msleep() which calls schedule_timeout()
  1188. * which calls schedule(). Hence we use a work queue.
  1189. */
  1190. if (lp->phy_type != 0) {
  1191. if (schedule_work(&lp->phy_configure)) {
  1192. lp->work_pending = 1;
  1193. }
  1194. }
  1195. /* We can accept TX packets again */
  1196. dev->trans_start = jiffies;
  1197. netif_wake_queue(dev);
  1198. }
  1199. /*
  1200. * This routine will, depending on the values passed to it,
  1201. * either make it accept multicast packets, go into
  1202. * promiscuous mode (for TCPDUMP and cousins) or accept
  1203. * a select set of multicast packets
  1204. */
  1205. static void smc911x_set_multicast_list(struct net_device *dev)
  1206. {
  1207. struct smc911x_local *lp = netdev_priv(dev);
  1208. unsigned long ioaddr = dev->base_addr;
  1209. unsigned int multicast_table[2];
  1210. unsigned int mcr, update_multicast = 0;
  1211. unsigned long flags;
  1212. /* table for flipping the order of 5 bits */
  1213. static const unsigned char invert5[] =
  1214. {0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0C, 0x1C,
  1215. 0x02, 0x12, 0x0A, 0x1A, 0x06, 0x16, 0x0E, 0x1E,
  1216. 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0D, 0x1D,
  1217. 0x03, 0x13, 0x0B, 0x1B, 0x07, 0x17, 0x0F, 0x1F};
  1218. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  1219. spin_lock_irqsave(&lp->lock, flags);
  1220. SMC_GET_MAC_CR(mcr);
  1221. spin_unlock_irqrestore(&lp->lock, flags);
  1222. if (dev->flags & IFF_PROMISC) {
  1223. DBG(SMC_DEBUG_MISC, "%s: RCR_PRMS\n", dev->name);
  1224. mcr |= MAC_CR_PRMS_;
  1225. }
  1226. /*
  1227. * Here, I am setting this to accept all multicast packets.
  1228. * I don't need to zero the multicast table, because the flag is
  1229. * checked before the table is
  1230. */
  1231. else if (dev->flags & IFF_ALLMULTI || dev->mc_count > 16) {
  1232. DBG(SMC_DEBUG_MISC, "%s: RCR_ALMUL\n", dev->name);
  1233. mcr |= MAC_CR_MCPAS_;
  1234. }
  1235. /*
  1236. * This sets the internal hardware table to filter out unwanted
  1237. * multicast packets before they take up memory.
  1238. *
  1239. * The SMC chip uses a hash table where the high 6 bits of the CRC of
  1240. * address are the offset into the table. If that bit is 1, then the
  1241. * multicast packet is accepted. Otherwise, it's dropped silently.
  1242. *
  1243. * To use the 6 bits as an offset into the table, the high 1 bit is
  1244. * the number of the 32 bit register, while the low 5 bits are the bit
  1245. * within that register.
  1246. */
  1247. else if (dev->mc_count) {
  1248. int i;
  1249. struct dev_mc_list *cur_addr;
  1250. /* Set the Hash perfec mode */
  1251. mcr |= MAC_CR_HPFILT_;
  1252. /* start with a table of all zeros: reject all */
  1253. memset(multicast_table, 0, sizeof(multicast_table));
  1254. cur_addr = dev->mc_list;
  1255. for (i = 0; i < dev->mc_count; i++, cur_addr = cur_addr->next) {
  1256. int position;
  1257. /* do we have a pointer here? */
  1258. if (!cur_addr)
  1259. break;
  1260. /* make sure this is a multicast address -
  1261. shouldn't this be a given if we have it here ? */
  1262. if (!(*cur_addr->dmi_addr & 1))
  1263. continue;
  1264. /* only use the low order bits */
  1265. position = crc32_le(~0, cur_addr->dmi_addr, 6) & 0x3f;
  1266. /* do some messy swapping to put the bit in the right spot */
  1267. multicast_table[invert5[position&0x1F]&0x1] |=
  1268. (1<<invert5[(position>>1)&0x1F]);
  1269. }
  1270. /* be sure I get rid of flags I might have set */
  1271. mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
  1272. /* now, the table can be loaded into the chipset */
  1273. update_multicast = 1;
  1274. } else {
  1275. DBG(SMC_DEBUG_MISC, "%s: ~(MAC_CR_PRMS_|MAC_CR_MCPAS_)\n",
  1276. dev->name);
  1277. mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
  1278. /*
  1279. * since I'm disabling all multicast entirely, I need to
  1280. * clear the multicast list
  1281. */
  1282. memset(multicast_table, 0, sizeof(multicast_table));
  1283. update_multicast = 1;
  1284. }
  1285. spin_lock_irqsave(&lp->lock, flags);
  1286. SMC_SET_MAC_CR(mcr);
  1287. if (update_multicast) {
  1288. DBG(SMC_DEBUG_MISC,
  1289. "%s: update mcast hash table 0x%08x 0x%08x\n",
  1290. dev->name, multicast_table[0], multicast_table[1]);
  1291. SMC_SET_HASHL(multicast_table[0]);
  1292. SMC_SET_HASHH(multicast_table[1]);
  1293. }
  1294. spin_unlock_irqrestore(&lp->lock, flags);
  1295. }
  1296. /*
  1297. * Open and Initialize the board
  1298. *
  1299. * Set up everything, reset the card, etc..
  1300. */
  1301. static int
  1302. smc911x_open(struct net_device *dev)
  1303. {
  1304. struct smc911x_local *lp = netdev_priv(dev);
  1305. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  1306. /*
  1307. * Check that the address is valid. If its not, refuse
  1308. * to bring the device up. The user must specify an
  1309. * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx
  1310. */
  1311. if (!is_valid_ether_addr(dev->dev_addr)) {
  1312. PRINTK("%s: no valid ethernet hw addr\n", __FUNCTION__);
  1313. return -EINVAL;
  1314. }
  1315. /* reset the hardware */
  1316. smc911x_reset(dev);
  1317. /* Configure the PHY, initialize the link state */
  1318. smc911x_phy_configure(&lp->phy_configure);
  1319. /* Turn on Tx + Rx */
  1320. smc911x_enable(dev);
  1321. netif_start_queue(dev);
  1322. return 0;
  1323. }
  1324. /*
  1325. * smc911x_close
  1326. *
  1327. * this makes the board clean up everything that it can
  1328. * and not talk to the outside world. Caused by
  1329. * an 'ifconfig ethX down'
  1330. */
  1331. static int smc911x_close(struct net_device *dev)
  1332. {
  1333. struct smc911x_local *lp = netdev_priv(dev);
  1334. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  1335. netif_stop_queue(dev);
  1336. netif_carrier_off(dev);
  1337. /* clear everything */
  1338. smc911x_shutdown(dev);
  1339. if (lp->phy_type != 0) {
  1340. /* We need to ensure that no calls to
  1341. * smc911x_phy_configure are pending.
  1342. * flush_scheduled_work() cannot be called because we
  1343. * are running with the netlink semaphore held (from
  1344. * devinet_ioctl()) and the pending work queue
  1345. * contains linkwatch_event() (scheduled by
  1346. * netif_carrier_off() above). linkwatch_event() also
  1347. * wants the netlink semaphore.
  1348. */
  1349. while (lp->work_pending)
  1350. schedule();
  1351. smc911x_phy_powerdown(dev, lp->mii.phy_id);
  1352. }
  1353. if (lp->pending_tx_skb) {
  1354. dev_kfree_skb(lp->pending_tx_skb);
  1355. lp->pending_tx_skb = NULL;
  1356. }
  1357. return 0;
  1358. }
  1359. /*
  1360. * Ethtool support
  1361. */
  1362. static int
  1363. smc911x_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
  1364. {
  1365. struct smc911x_local *lp = netdev_priv(dev);
  1366. unsigned long ioaddr = dev->base_addr;
  1367. int ret, status;
  1368. unsigned long flags;
  1369. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  1370. cmd->maxtxpkt = 1;
  1371. cmd->maxrxpkt = 1;
  1372. if (lp->phy_type != 0) {
  1373. spin_lock_irqsave(&lp->lock, flags);
  1374. ret = mii_ethtool_gset(&lp->mii, cmd);
  1375. spin_unlock_irqrestore(&lp->lock, flags);
  1376. } else {
  1377. cmd->supported = SUPPORTED_10baseT_Half |
  1378. SUPPORTED_10baseT_Full |
  1379. SUPPORTED_TP | SUPPORTED_AUI;
  1380. if (lp->ctl_rspeed == 10)
  1381. cmd->speed = SPEED_10;
  1382. else if (lp->ctl_rspeed == 100)
  1383. cmd->speed = SPEED_100;
  1384. cmd->autoneg = AUTONEG_DISABLE;
  1385. if (lp->mii.phy_id==1)
  1386. cmd->transceiver = XCVR_INTERNAL;
  1387. else
  1388. cmd->transceiver = XCVR_EXTERNAL;
  1389. cmd->port = 0;
  1390. SMC_GET_PHY_SPECIAL(lp->mii.phy_id, status);
  1391. cmd->duplex =
  1392. (status & (PHY_SPECIAL_SPD_10FULL_ | PHY_SPECIAL_SPD_100FULL_)) ?
  1393. DUPLEX_FULL : DUPLEX_HALF;
  1394. ret = 0;
  1395. }
  1396. return ret;
  1397. }
  1398. static int
  1399. smc911x_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
  1400. {
  1401. struct smc911x_local *lp = netdev_priv(dev);
  1402. int ret;
  1403. unsigned long flags;
  1404. if (lp->phy_type != 0) {
  1405. spin_lock_irqsave(&lp->lock, flags);
  1406. ret = mii_ethtool_sset(&lp->mii, cmd);
  1407. spin_unlock_irqrestore(&lp->lock, flags);
  1408. } else {
  1409. if (cmd->autoneg != AUTONEG_DISABLE ||
  1410. cmd->speed != SPEED_10 ||
  1411. (cmd->duplex != DUPLEX_HALF && cmd->duplex != DUPLEX_FULL) ||
  1412. (cmd->port != PORT_TP && cmd->port != PORT_AUI))
  1413. return -EINVAL;
  1414. lp->ctl_rfduplx = cmd->duplex == DUPLEX_FULL;
  1415. ret = 0;
  1416. }
  1417. return ret;
  1418. }
  1419. static void
  1420. smc911x_ethtool_getdrvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
  1421. {
  1422. strncpy(info->driver, CARDNAME, sizeof(info->driver));
  1423. strncpy(info->version, version, sizeof(info->version));
  1424. strncpy(info->bus_info, dev->dev.parent->bus_id, sizeof(info->bus_info));
  1425. }
  1426. static int smc911x_ethtool_nwayreset(struct net_device *dev)
  1427. {
  1428. struct smc911x_local *lp = netdev_priv(dev);
  1429. int ret = -EINVAL;
  1430. unsigned long flags;
  1431. if (lp->phy_type != 0) {
  1432. spin_lock_irqsave(&lp->lock, flags);
  1433. ret = mii_nway_restart(&lp->mii);
  1434. spin_unlock_irqrestore(&lp->lock, flags);
  1435. }
  1436. return ret;
  1437. }
  1438. static u32 smc911x_ethtool_getmsglevel(struct net_device *dev)
  1439. {
  1440. struct smc911x_local *lp = netdev_priv(dev);
  1441. return lp->msg_enable;
  1442. }
  1443. static void smc911x_ethtool_setmsglevel(struct net_device *dev, u32 level)
  1444. {
  1445. struct smc911x_local *lp = netdev_priv(dev);
  1446. lp->msg_enable = level;
  1447. }
  1448. static int smc911x_ethtool_getregslen(struct net_device *dev)
  1449. {
  1450. /* System regs + MAC regs + PHY regs */
  1451. return (((E2P_CMD - ID_REV)/4 + 1) +
  1452. (WUCSR - MAC_CR)+1 + 32) * sizeof(u32);
  1453. }
  1454. static void smc911x_ethtool_getregs(struct net_device *dev,
  1455. struct ethtool_regs* regs, void *buf)
  1456. {
  1457. unsigned long ioaddr = dev->base_addr;
  1458. struct smc911x_local *lp = netdev_priv(dev);
  1459. unsigned long flags;
  1460. u32 reg,i,j=0;
  1461. u32 *data = (u32*)buf;
  1462. regs->version = lp->version;
  1463. for(i=ID_REV;i<=E2P_CMD;i+=4) {
  1464. data[j++] = SMC_inl(ioaddr,i);
  1465. }
  1466. for(i=MAC_CR;i<=WUCSR;i++) {
  1467. spin_lock_irqsave(&lp->lock, flags);
  1468. SMC_GET_MAC_CSR(i, reg);
  1469. spin_unlock_irqrestore(&lp->lock, flags);
  1470. data[j++] = reg;
  1471. }
  1472. for(i=0;i<=31;i++) {
  1473. spin_lock_irqsave(&lp->lock, flags);
  1474. SMC_GET_MII(i, lp->mii.phy_id, reg);
  1475. spin_unlock_irqrestore(&lp->lock, flags);
  1476. data[j++] = reg & 0xFFFF;
  1477. }
  1478. }
  1479. static int smc911x_ethtool_wait_eeprom_ready(struct net_device *dev)
  1480. {
  1481. unsigned long ioaddr = dev->base_addr;
  1482. unsigned int timeout;
  1483. int e2p_cmd;
  1484. e2p_cmd = SMC_GET_E2P_CMD();
  1485. for(timeout=10;(e2p_cmd & E2P_CMD_EPC_BUSY_) && timeout; timeout--) {
  1486. if (e2p_cmd & E2P_CMD_EPC_TIMEOUT_) {
  1487. PRINTK("%s: %s timeout waiting for EEPROM to respond\n",
  1488. dev->name, __FUNCTION__);
  1489. return -EFAULT;
  1490. }
  1491. mdelay(1);
  1492. e2p_cmd = SMC_GET_E2P_CMD();
  1493. }
  1494. if (timeout == 0) {
  1495. PRINTK("%s: %s timeout waiting for EEPROM CMD not busy\n",
  1496. dev->name, __FUNCTION__);
  1497. return -ETIMEDOUT;
  1498. }
  1499. return 0;
  1500. }
  1501. static inline int smc911x_ethtool_write_eeprom_cmd(struct net_device *dev,
  1502. int cmd, int addr)
  1503. {
  1504. unsigned long ioaddr = dev->base_addr;
  1505. int ret;
  1506. if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
  1507. return ret;
  1508. SMC_SET_E2P_CMD(E2P_CMD_EPC_BUSY_ |
  1509. ((cmd) & (0x7<<28)) |
  1510. ((addr) & 0xFF));
  1511. return 0;
  1512. }
  1513. static inline int smc911x_ethtool_read_eeprom_byte(struct net_device *dev,
  1514. u8 *data)
  1515. {
  1516. unsigned long ioaddr = dev->base_addr;
  1517. int ret;
  1518. if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
  1519. return ret;
  1520. *data = SMC_GET_E2P_DATA();
  1521. return 0;
  1522. }
  1523. static inline int smc911x_ethtool_write_eeprom_byte(struct net_device *dev,
  1524. u8 data)
  1525. {
  1526. unsigned long ioaddr = dev->base_addr;
  1527. int ret;
  1528. if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
  1529. return ret;
  1530. SMC_SET_E2P_DATA(data);
  1531. return 0;
  1532. }
  1533. static int smc911x_ethtool_geteeprom(struct net_device *dev,
  1534. struct ethtool_eeprom *eeprom, u8 *data)
  1535. {
  1536. u8 eebuf[SMC911X_EEPROM_LEN];
  1537. int i, ret;
  1538. for(i=0;i<SMC911X_EEPROM_LEN;i++) {
  1539. if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_READ_, i ))!=0)
  1540. return ret;
  1541. if ((ret=smc911x_ethtool_read_eeprom_byte(dev, &eebuf[i]))!=0)
  1542. return ret;
  1543. }
  1544. memcpy(data, eebuf+eeprom->offset, eeprom->len);
  1545. return 0;
  1546. }
  1547. static int smc911x_ethtool_seteeprom(struct net_device *dev,
  1548. struct ethtool_eeprom *eeprom, u8 *data)
  1549. {
  1550. int i, ret;
  1551. /* Enable erase */
  1552. if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_EWEN_, 0 ))!=0)
  1553. return ret;
  1554. for(i=eeprom->offset;i<(eeprom->offset+eeprom->len);i++) {
  1555. /* erase byte */
  1556. if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_ERASE_, i ))!=0)
  1557. return ret;
  1558. /* write byte */
  1559. if ((ret=smc911x_ethtool_write_eeprom_byte(dev, *data))!=0)
  1560. return ret;
  1561. if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_WRITE_, i ))!=0)
  1562. return ret;
  1563. }
  1564. return 0;
  1565. }
  1566. static int smc911x_ethtool_geteeprom_len(struct net_device *dev)
  1567. {
  1568. return SMC911X_EEPROM_LEN;
  1569. }
  1570. static const struct ethtool_ops smc911x_ethtool_ops = {
  1571. .get_settings = smc911x_ethtool_getsettings,
  1572. .set_settings = smc911x_ethtool_setsettings,
  1573. .get_drvinfo = smc911x_ethtool_getdrvinfo,
  1574. .get_msglevel = smc911x_ethtool_getmsglevel,
  1575. .set_msglevel = smc911x_ethtool_setmsglevel,
  1576. .nway_reset = smc911x_ethtool_nwayreset,
  1577. .get_link = ethtool_op_get_link,
  1578. .get_regs_len = smc911x_ethtool_getregslen,
  1579. .get_regs = smc911x_ethtool_getregs,
  1580. .get_eeprom_len = smc911x_ethtool_geteeprom_len,
  1581. .get_eeprom = smc911x_ethtool_geteeprom,
  1582. .set_eeprom = smc911x_ethtool_seteeprom,
  1583. };
  1584. /*
  1585. * smc911x_findirq
  1586. *
  1587. * This routine has a simple purpose -- make the SMC chip generate an
  1588. * interrupt, so an auto-detect routine can detect it, and find the IRQ,
  1589. */
  1590. static int __init smc911x_findirq(unsigned long ioaddr)
  1591. {
  1592. int timeout = 20;
  1593. unsigned long cookie;
  1594. DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
  1595. cookie = probe_irq_on();
  1596. /*
  1597. * Force a SW interrupt
  1598. */
  1599. SMC_SET_INT_EN(INT_EN_SW_INT_EN_);
  1600. /*
  1601. * Wait until positive that the interrupt has been generated
  1602. */
  1603. do {
  1604. int int_status;
  1605. udelay(10);
  1606. int_status = SMC_GET_INT_EN();
  1607. if (int_status & INT_EN_SW_INT_EN_)
  1608. break; /* got the interrupt */
  1609. } while (--timeout);
  1610. /*
  1611. * there is really nothing that I can do here if timeout fails,
  1612. * as autoirq_report will return a 0 anyway, which is what I
  1613. * want in this case. Plus, the clean up is needed in both
  1614. * cases.
  1615. */
  1616. /* and disable all interrupts again */
  1617. SMC_SET_INT_EN(0);
  1618. /* and return what I found */
  1619. return probe_irq_off(cookie);
  1620. }
  1621. /*
  1622. * Function: smc911x_probe(unsigned long ioaddr)
  1623. *
  1624. * Purpose:
  1625. * Tests to see if a given ioaddr points to an SMC911x chip.
  1626. * Returns a 0 on success
  1627. *
  1628. * Algorithm:
  1629. * (1) see if the endian word is OK
  1630. * (1) see if I recognize the chip ID in the appropriate register
  1631. *
  1632. * Here I do typical initialization tasks.
  1633. *
  1634. * o Initialize the structure if needed
  1635. * o print out my vanity message if not done so already
  1636. * o print out what type of hardware is detected
  1637. * o print out the ethernet address
  1638. * o find the IRQ
  1639. * o set up my private data
  1640. * o configure the dev structure with my subroutines
  1641. * o actually GRAB the irq.
  1642. * o GRAB the region
  1643. */
  1644. static int __init smc911x_probe(struct net_device *dev, unsigned long ioaddr)
  1645. {
  1646. struct smc911x_local *lp = netdev_priv(dev);
  1647. int i, retval;
  1648. unsigned int val, chip_id, revision;
  1649. const char *version_string;
  1650. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  1651. /* First, see if the endian word is recognized */
  1652. val = SMC_GET_BYTE_TEST();
  1653. DBG(SMC_DEBUG_MISC, "%s: endian probe returned 0x%04x\n", CARDNAME, val);
  1654. if (val != 0x87654321) {
  1655. printk(KERN_ERR "Invalid chip endian 0x08%x\n",val);
  1656. retval = -ENODEV;
  1657. goto err_out;
  1658. }
  1659. /*
  1660. * check if the revision register is something that I
  1661. * recognize. These might need to be added to later,
  1662. * as future revisions could be added.
  1663. */
  1664. chip_id = SMC_GET_PN();
  1665. DBG(SMC_DEBUG_MISC, "%s: id probe returned 0x%04x\n", CARDNAME, chip_id);
  1666. for(i=0;chip_ids[i].id != 0; i++) {
  1667. if (chip_ids[i].id == chip_id) break;
  1668. }
  1669. if (!chip_ids[i].id) {
  1670. printk(KERN_ERR "Unknown chip ID %04x\n", chip_id);
  1671. retval = -ENODEV;
  1672. goto err_out;
  1673. }
  1674. version_string = chip_ids[i].name;
  1675. revision = SMC_GET_REV();
  1676. DBG(SMC_DEBUG_MISC, "%s: revision = 0x%04x\n", CARDNAME, revision);
  1677. /* At this point I'll assume that the chip is an SMC911x. */
  1678. DBG(SMC_DEBUG_MISC, "%s: Found a %s\n", CARDNAME, chip_ids[i].name);
  1679. /* Validate the TX FIFO size requested */
  1680. if ((tx_fifo_kb < 2) || (tx_fifo_kb > 14)) {
  1681. printk(KERN_ERR "Invalid TX FIFO size requested %d\n", tx_fifo_kb);
  1682. retval = -EINVAL;
  1683. goto err_out;
  1684. }
  1685. /* fill in some of the fields */
  1686. dev->base_addr = ioaddr;
  1687. lp->version = chip_ids[i].id;
  1688. lp->revision = revision;
  1689. lp->tx_fifo_kb = tx_fifo_kb;
  1690. /* Reverse calculate the RX FIFO size from the TX */
  1691. lp->tx_fifo_size=(lp->tx_fifo_kb<<10) - 512;
  1692. lp->rx_fifo_size= ((0x4000 - 512 - lp->tx_fifo_size) / 16) * 15;
  1693. /* Set the automatic flow control values */
  1694. switch(lp->tx_fifo_kb) {
  1695. /*
  1696. * AFC_HI is about ((Rx Data Fifo Size)*2/3)/64
  1697. * AFC_LO is AFC_HI/2
  1698. * BACK_DUR is about 5uS*(AFC_LO) rounded down
  1699. */
  1700. case 2:/* 13440 Rx Data Fifo Size */
  1701. lp->afc_cfg=0x008C46AF;break;
  1702. case 3:/* 12480 Rx Data Fifo Size */
  1703. lp->afc_cfg=0x0082419F;break;
  1704. case 4:/* 11520 Rx Data Fifo Size */
  1705. lp->afc_cfg=0x00783C9F;break;
  1706. case 5:/* 10560 Rx Data Fifo Size */
  1707. lp->afc_cfg=0x006E374F;break;
  1708. case 6:/* 9600 Rx Data Fifo Size */
  1709. lp->afc_cfg=0x0064328F;break;
  1710. case 7:/* 8640 Rx Data Fifo Size */
  1711. lp->afc_cfg=0x005A2D7F;break;
  1712. case 8:/* 7680 Rx Data Fifo Size */
  1713. lp->afc_cfg=0x0050287F;break;
  1714. case 9:/* 6720 Rx Data Fifo Size */
  1715. lp->afc_cfg=0x0046236F;break;
  1716. case 10:/* 5760 Rx Data Fifo Size */
  1717. lp->afc_cfg=0x003C1E6F;break;
  1718. case 11:/* 4800 Rx Data Fifo Size */
  1719. lp->afc_cfg=0x0032195F;break;
  1720. /*
  1721. * AFC_HI is ~1520 bytes less than RX Data Fifo Size
  1722. * AFC_LO is AFC_HI/2
  1723. * BACK_DUR is about 5uS*(AFC_LO) rounded down
  1724. */
  1725. case 12:/* 3840 Rx Data Fifo Size */
  1726. lp->afc_cfg=0x0024124F;break;
  1727. case 13:/* 2880 Rx Data Fifo Size */
  1728. lp->afc_cfg=0x0015073F;break;
  1729. case 14:/* 1920 Rx Data Fifo Size */
  1730. lp->afc_cfg=0x0006032F;break;
  1731. default:
  1732. PRINTK("%s: ERROR -- no AFC_CFG setting found",
  1733. dev->name);
  1734. break;
  1735. }
  1736. DBG(SMC_DEBUG_MISC | SMC_DEBUG_TX | SMC_DEBUG_RX,
  1737. "%s: tx_fifo %d rx_fifo %d afc_cfg 0x%08x\n", CARDNAME,
  1738. lp->tx_fifo_size, lp->rx_fifo_size, lp->afc_cfg);
  1739. spin_lock_init(&lp->lock);
  1740. /* Get the MAC address */
  1741. SMC_GET_MAC_ADDR(dev->dev_addr);
  1742. /* now, reset the chip, and put it into a known state */
  1743. smc911x_reset(dev);
  1744. /*
  1745. * If dev->irq is 0, then the device has to be banged on to see
  1746. * what the IRQ is.
  1747. *
  1748. * Specifying an IRQ is done with the assumption that the user knows
  1749. * what (s)he is doing. No checking is done!!!!
  1750. */
  1751. if (dev->irq < 1) {
  1752. int trials;
  1753. trials = 3;
  1754. while (trials--) {
  1755. dev->irq = smc911x_findirq(ioaddr);
  1756. if (dev->irq)
  1757. break;
  1758. /* kick the card and try again */
  1759. smc911x_reset(dev);
  1760. }
  1761. }
  1762. if (dev->irq == 0) {
  1763. printk("%s: Couldn't autodetect your IRQ. Use irq=xx.\n",
  1764. dev->name);
  1765. retval = -ENODEV;
  1766. goto err_out;
  1767. }
  1768. dev->irq = irq_canonicalize(dev->irq);
  1769. /* Fill in the fields of the device structure with ethernet values. */
  1770. ether_setup(dev);
  1771. dev->open = smc911x_open;
  1772. dev->stop = smc911x_close;
  1773. dev->hard_start_xmit = smc911x_hard_start_xmit;
  1774. dev->tx_timeout = smc911x_timeout;
  1775. dev->watchdog_timeo = msecs_to_jiffies(watchdog);
  1776. dev->set_multicast_list = smc911x_set_multicast_list;
  1777. dev->ethtool_ops = &smc911x_ethtool_ops;
  1778. #ifdef CONFIG_NET_POLL_CONTROLLER
  1779. dev->poll_controller = smc911x_poll_controller;
  1780. #endif
  1781. INIT_WORK(&lp->phy_configure, smc911x_phy_configure);
  1782. lp->mii.phy_id_mask = 0x1f;
  1783. lp->mii.reg_num_mask = 0x1f;
  1784. lp->mii.force_media = 0;
  1785. lp->mii.full_duplex = 0;
  1786. lp->mii.dev = dev;
  1787. lp->mii.mdio_read = smc911x_phy_read;
  1788. lp->mii.mdio_write = smc911x_phy_write;
  1789. /*
  1790. * Locate the phy, if any.
  1791. */
  1792. smc911x_phy_detect(dev);
  1793. /* Set default parameters */
  1794. lp->msg_enable = NETIF_MSG_LINK;
  1795. lp->ctl_rfduplx = 1;
  1796. lp->ctl_rspeed = 100;
  1797. /* Grab the IRQ */
  1798. retval = request_irq(dev->irq, &smc911x_interrupt,
  1799. IRQF_SHARED | SMC_IRQ_SENSE, dev->name, dev);
  1800. if (retval)
  1801. goto err_out;
  1802. #ifdef SMC_USE_DMA
  1803. lp->rxdma = SMC_DMA_REQUEST(dev, smc911x_rx_dma_irq);
  1804. lp->txdma = SMC_DMA_REQUEST(dev, smc911x_tx_dma_irq);
  1805. lp->rxdma_active = 0;
  1806. lp->txdma_active = 0;
  1807. dev->dma = lp->rxdma;
  1808. #endif
  1809. retval = register_netdev(dev);
  1810. if (retval == 0) {
  1811. /* now, print out the card info, in a short format.. */
  1812. printk("%s: %s (rev %d) at %#lx IRQ %d",
  1813. dev->name, version_string, lp->revision,
  1814. dev->base_addr, dev->irq);
  1815. #ifdef SMC_USE_DMA
  1816. if (lp->rxdma != -1)
  1817. printk(" RXDMA %d ", lp->rxdma);
  1818. if (lp->txdma != -1)
  1819. printk("TXDMA %d", lp->txdma);
  1820. #endif
  1821. printk("\n");
  1822. if (!is_valid_ether_addr(dev->dev_addr)) {
  1823. printk("%s: Invalid ethernet MAC address. Please "
  1824. "set using ifconfig\n", dev->name);
  1825. } else {
  1826. /* Print the Ethernet address */
  1827. printk("%s: Ethernet addr: ", dev->name);
  1828. for (i = 0; i < 5; i++)
  1829. printk("%2.2x:", dev->dev_addr[i]);
  1830. printk("%2.2x\n", dev->dev_addr[5]);
  1831. }
  1832. if (lp->phy_type == 0) {
  1833. PRINTK("%s: No PHY found\n", dev->name);
  1834. } else if ((lp->phy_type & ~0xff) == LAN911X_INTERNAL_PHY_ID) {
  1835. PRINTK("%s: LAN911x Internal PHY\n", dev->name);
  1836. } else {
  1837. PRINTK("%s: External PHY 0x%08x\n", dev->name, lp->phy_type);
  1838. }
  1839. }
  1840. err_out:
  1841. #ifdef SMC_USE_DMA
  1842. if (retval) {
  1843. if (lp->rxdma != -1) {
  1844. SMC_DMA_FREE(dev, lp->rxdma);
  1845. }
  1846. if (lp->txdma != -1) {
  1847. SMC_DMA_FREE(dev, lp->txdma);
  1848. }
  1849. }
  1850. #endif
  1851. return retval;
  1852. }
  1853. /*
  1854. * smc911x_init(void)
  1855. *
  1856. * Output:
  1857. * 0 --> there is a device
  1858. * anything else, error
  1859. */
  1860. static int smc911x_drv_probe(struct platform_device *pdev)
  1861. {
  1862. struct net_device *ndev;
  1863. struct resource *res;
  1864. struct smc911x_local *lp;
  1865. unsigned int *addr;
  1866. int ret;
  1867. DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
  1868. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1869. if (!res) {
  1870. ret = -ENODEV;
  1871. goto out;
  1872. }
  1873. /*
  1874. * Request the regions.
  1875. */
  1876. if (!request_mem_region(res->start, SMC911X_IO_EXTENT, CARDNAME)) {
  1877. ret = -EBUSY;
  1878. goto out;
  1879. }
  1880. ndev = alloc_etherdev(sizeof(struct smc911x_local));
  1881. if (!ndev) {
  1882. printk("%s: could not allocate device.\n", CARDNAME);
  1883. ret = -ENOMEM;
  1884. goto release_1;
  1885. }
  1886. SET_NETDEV_DEV(ndev, &pdev->dev);
  1887. ndev->dma = (unsigned char)-1;
  1888. ndev->irq = platform_get_irq(pdev, 0);
  1889. lp = netdev_priv(ndev);
  1890. lp->netdev = ndev;
  1891. addr = ioremap(res->start, SMC911X_IO_EXTENT);
  1892. if (!addr) {
  1893. ret = -ENOMEM;
  1894. goto release_both;
  1895. }
  1896. platform_set_drvdata(pdev, ndev);
  1897. ret = smc911x_probe(ndev, (unsigned long)addr);
  1898. if (ret != 0) {
  1899. platform_set_drvdata(pdev, NULL);
  1900. iounmap(addr);
  1901. release_both:
  1902. free_netdev(ndev);
  1903. release_1:
  1904. release_mem_region(res->start, SMC911X_IO_EXTENT);
  1905. out:
  1906. printk("%s: not found (%d).\n", CARDNAME, ret);
  1907. }
  1908. #ifdef SMC_USE_DMA
  1909. else {
  1910. lp->physaddr = res->start;
  1911. lp->dev = &pdev->dev;
  1912. }
  1913. #endif
  1914. return ret;
  1915. }
  1916. static int smc911x_drv_remove(struct platform_device *pdev)
  1917. {
  1918. struct net_device *ndev = platform_get_drvdata(pdev);
  1919. struct resource *res;
  1920. DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
  1921. platform_set_drvdata(pdev, NULL);
  1922. unregister_netdev(ndev);
  1923. free_irq(ndev->irq, ndev);
  1924. #ifdef SMC_USE_DMA
  1925. {
  1926. struct smc911x_local *lp = netdev_priv(ndev);
  1927. if (lp->rxdma != -1) {
  1928. SMC_DMA_FREE(dev, lp->rxdma);
  1929. }
  1930. if (lp->txdma != -1) {
  1931. SMC_DMA_FREE(dev, lp->txdma);
  1932. }
  1933. }
  1934. #endif
  1935. iounmap((void *)ndev->base_addr);
  1936. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1937. release_mem_region(res->start, SMC911X_IO_EXTENT);
  1938. free_netdev(ndev);
  1939. return 0;
  1940. }
  1941. static int smc911x_drv_suspend(struct platform_device *dev, pm_message_t state)
  1942. {
  1943. struct net_device *ndev = platform_get_drvdata(dev);
  1944. unsigned long ioaddr = ndev->base_addr;
  1945. DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
  1946. if (ndev) {
  1947. if (netif_running(ndev)) {
  1948. netif_device_detach(ndev);
  1949. smc911x_shutdown(ndev);
  1950. #if POWER_DOWN
  1951. /* Set D2 - Energy detect only setting */
  1952. SMC_SET_PMT_CTRL(2<<12);
  1953. #endif
  1954. }
  1955. }
  1956. return 0;
  1957. }
  1958. static int smc911x_drv_resume(struct platform_device *dev)
  1959. {
  1960. struct net_device *ndev = platform_get_drvdata(dev);
  1961. DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
  1962. if (ndev) {
  1963. struct smc911x_local *lp = netdev_priv(ndev);
  1964. if (netif_running(ndev)) {
  1965. smc911x_reset(ndev);
  1966. smc911x_enable(ndev);
  1967. if (lp->phy_type != 0)
  1968. smc911x_phy_configure(&lp->phy_configure);
  1969. netif_device_attach(ndev);
  1970. }
  1971. }
  1972. return 0;
  1973. }
  1974. static struct platform_driver smc911x_driver = {
  1975. .probe = smc911x_drv_probe,
  1976. .remove = smc911x_drv_remove,
  1977. .suspend = smc911x_drv_suspend,
  1978. .resume = smc911x_drv_resume,
  1979. .driver = {
  1980. .name = CARDNAME,
  1981. },
  1982. };
  1983. static int __init smc911x_init(void)
  1984. {
  1985. return platform_driver_register(&smc911x_driver);
  1986. }
  1987. static void __exit smc911x_cleanup(void)
  1988. {
  1989. platform_driver_unregister(&smc911x_driver);
  1990. }
  1991. module_init(smc911x_init);
  1992. module_exit(smc911x_cleanup);