saa9730.c 31 KB

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  1. /*
  2. * Copyright (C) 2000, 2005 MIPS Technologies, Inc. All rights reserved.
  3. * Authors: Carsten Langgaard <carstenl@mips.com>
  4. * Maciej W. Rozycki <macro@mips.com>
  5. * Copyright (C) 2004 Ralf Baechle <ralf@linux-mips.org>
  6. *
  7. * This program is free software; you can distribute it and/or modify it
  8. * under the terms of the GNU General Public License (Version 2) as
  9. * published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope it will be useful, but WITHOUT
  12. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  14. * for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License along
  17. * with this program; if not, write to the Free Software Foundation, Inc.,
  18. * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
  19. *
  20. * SAA9730 ethernet driver.
  21. *
  22. * Changes:
  23. * Angelo Dell'Aera <buffer@antifork.org> : Conversion to the new PCI API
  24. * (pci_driver).
  25. * Conversion to spinlocks.
  26. * Error handling fixes.
  27. */
  28. #include <linux/init.h>
  29. #include <linux/netdevice.h>
  30. #include <linux/delay.h>
  31. #include <linux/etherdevice.h>
  32. #include <linux/module.h>
  33. #include <linux/skbuff.h>
  34. #include <linux/pci.h>
  35. #include <linux/spinlock.h>
  36. #include <linux/types.h>
  37. #include <asm/addrspace.h>
  38. #include <asm/io.h>
  39. #include <asm/mips-boards/prom.h>
  40. #include "saa9730.h"
  41. #ifdef LAN_SAA9730_DEBUG
  42. int lan_saa9730_debug = LAN_SAA9730_DEBUG;
  43. #else
  44. int lan_saa9730_debug;
  45. #endif
  46. #define DRV_MODULE_NAME "saa9730"
  47. static struct pci_device_id saa9730_pci_tbl[] = {
  48. { PCI_VENDOR_ID_PHILIPS, PCI_DEVICE_ID_PHILIPS_SAA9730,
  49. PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
  50. { 0, }
  51. };
  52. MODULE_DEVICE_TABLE(pci, saa9730_pci_tbl);
  53. /* Non-zero only if the current card is a PCI with BIOS-set IRQ. */
  54. static unsigned int pci_irq_line;
  55. static void evm_saa9730_enable_lan_int(struct lan_saa9730_private *lp)
  56. {
  57. writel(readl(&lp->evm_saa9730_regs->InterruptBlock1) | EVM_LAN_INT,
  58. &lp->evm_saa9730_regs->InterruptBlock1);
  59. writel(readl(&lp->evm_saa9730_regs->InterruptStatus1) | EVM_LAN_INT,
  60. &lp->evm_saa9730_regs->InterruptStatus1);
  61. writel(readl(&lp->evm_saa9730_regs->InterruptEnable1) | EVM_LAN_INT |
  62. EVM_MASTER_EN, &lp->evm_saa9730_regs->InterruptEnable1);
  63. }
  64. static void evm_saa9730_disable_lan_int(struct lan_saa9730_private *lp)
  65. {
  66. writel(readl(&lp->evm_saa9730_regs->InterruptBlock1) & ~EVM_LAN_INT,
  67. &lp->evm_saa9730_regs->InterruptBlock1);
  68. writel(readl(&lp->evm_saa9730_regs->InterruptEnable1) & ~EVM_LAN_INT,
  69. &lp->evm_saa9730_regs->InterruptEnable1);
  70. }
  71. static void evm_saa9730_clear_lan_int(struct lan_saa9730_private *lp)
  72. {
  73. writel(EVM_LAN_INT, &lp->evm_saa9730_regs->InterruptStatus1);
  74. }
  75. static void evm_saa9730_block_lan_int(struct lan_saa9730_private *lp)
  76. {
  77. writel(readl(&lp->evm_saa9730_regs->InterruptBlock1) & ~EVM_LAN_INT,
  78. &lp->evm_saa9730_regs->InterruptBlock1);
  79. }
  80. static void evm_saa9730_unblock_lan_int(struct lan_saa9730_private *lp)
  81. {
  82. writel(readl(&lp->evm_saa9730_regs->InterruptBlock1) | EVM_LAN_INT,
  83. &lp->evm_saa9730_regs->InterruptBlock1);
  84. }
  85. static void __used show_saa9730_regs(struct net_device *dev)
  86. {
  87. struct lan_saa9730_private *lp = netdev_priv(dev);
  88. int i, j;
  89. printk("TxmBufferA = %p\n", lp->TxmBuffer[0][0]);
  90. printk("TxmBufferB = %p\n", lp->TxmBuffer[1][0]);
  91. printk("RcvBufferA = %p\n", lp->RcvBuffer[0][0]);
  92. printk("RcvBufferB = %p\n", lp->RcvBuffer[1][0]);
  93. for (i = 0; i < LAN_SAA9730_BUFFERS; i++) {
  94. for (j = 0; j < LAN_SAA9730_TXM_Q_SIZE; j++) {
  95. printk("TxmBuffer[%d][%d] = %x\n", i, j,
  96. le32_to_cpu(*(unsigned int *)
  97. lp->TxmBuffer[i][j]));
  98. }
  99. }
  100. for (i = 0; i < LAN_SAA9730_BUFFERS; i++) {
  101. for (j = 0; j < LAN_SAA9730_RCV_Q_SIZE; j++) {
  102. printk("RcvBuffer[%d][%d] = %x\n", i, j,
  103. le32_to_cpu(*(unsigned int *)
  104. lp->RcvBuffer[i][j]));
  105. }
  106. }
  107. printk("lp->evm_saa9730_regs->InterruptBlock1 = %x\n",
  108. readl(&lp->evm_saa9730_regs->InterruptBlock1));
  109. printk("lp->evm_saa9730_regs->InterruptStatus1 = %x\n",
  110. readl(&lp->evm_saa9730_regs->InterruptStatus1));
  111. printk("lp->evm_saa9730_regs->InterruptEnable1 = %x\n",
  112. readl(&lp->evm_saa9730_regs->InterruptEnable1));
  113. printk("lp->lan_saa9730_regs->Ok2Use = %x\n",
  114. readl(&lp->lan_saa9730_regs->Ok2Use));
  115. printk("lp->NextTxmBufferIndex = %x\n", lp->NextTxmBufferIndex);
  116. printk("lp->NextTxmPacketIndex = %x\n", lp->NextTxmPacketIndex);
  117. printk("lp->PendingTxmBufferIndex = %x\n",
  118. lp->PendingTxmBufferIndex);
  119. printk("lp->PendingTxmPacketIndex = %x\n",
  120. lp->PendingTxmPacketIndex);
  121. printk("lp->lan_saa9730_regs->LanDmaCtl = %x\n",
  122. readl(&lp->lan_saa9730_regs->LanDmaCtl));
  123. printk("lp->lan_saa9730_regs->DmaStatus = %x\n",
  124. readl(&lp->lan_saa9730_regs->DmaStatus));
  125. printk("lp->lan_saa9730_regs->CamCtl = %x\n",
  126. readl(&lp->lan_saa9730_regs->CamCtl));
  127. printk("lp->lan_saa9730_regs->TxCtl = %x\n",
  128. readl(&lp->lan_saa9730_regs->TxCtl));
  129. printk("lp->lan_saa9730_regs->TxStatus = %x\n",
  130. readl(&lp->lan_saa9730_regs->TxStatus));
  131. printk("lp->lan_saa9730_regs->RxCtl = %x\n",
  132. readl(&lp->lan_saa9730_regs->RxCtl));
  133. printk("lp->lan_saa9730_regs->RxStatus = %x\n",
  134. readl(&lp->lan_saa9730_regs->RxStatus));
  135. for (i = 0; i < LAN_SAA9730_CAM_DWORDS; i++) {
  136. writel(i, &lp->lan_saa9730_regs->CamAddress);
  137. printk("lp->lan_saa9730_regs->CamData = %x\n",
  138. readl(&lp->lan_saa9730_regs->CamData));
  139. }
  140. printk("dev->stats.tx_packets = %lx\n", dev->stats.tx_packets);
  141. printk("dev->stats.tx_errors = %lx\n", dev->stats.tx_errors);
  142. printk("dev->stats.tx_aborted_errors = %lx\n",
  143. dev->stats.tx_aborted_errors);
  144. printk("dev->stats.tx_window_errors = %lx\n",
  145. dev->stats.tx_window_errors);
  146. printk("dev->stats.tx_carrier_errors = %lx\n",
  147. dev->stats.tx_carrier_errors);
  148. printk("dev->stats.tx_fifo_errors = %lx\n",
  149. dev->stats.tx_fifo_errors);
  150. printk("dev->stats.tx_heartbeat_errors = %lx\n",
  151. dev->stats.tx_heartbeat_errors);
  152. printk("dev->stats.collisions = %lx\n", dev->stats.collisions);
  153. printk("dev->stats.rx_packets = %lx\n", dev->stats.rx_packets);
  154. printk("dev->stats.rx_errors = %lx\n", dev->stats.rx_errors);
  155. printk("dev->stats.rx_dropped = %lx\n", dev->stats.rx_dropped);
  156. printk("dev->stats.rx_crc_errors = %lx\n", dev->stats.rx_crc_errors);
  157. printk("dev->stats.rx_frame_errors = %lx\n",
  158. dev->stats.rx_frame_errors);
  159. printk("dev->stats.rx_fifo_errors = %lx\n",
  160. dev->stats.rx_fifo_errors);
  161. printk("dev->stats.rx_length_errors = %lx\n",
  162. dev->stats.rx_length_errors);
  163. printk("lp->lan_saa9730_regs->DebugPCIMasterAddr = %x\n",
  164. readl(&lp->lan_saa9730_regs->DebugPCIMasterAddr));
  165. printk("lp->lan_saa9730_regs->DebugLanTxStateMachine = %x\n",
  166. readl(&lp->lan_saa9730_regs->DebugLanTxStateMachine));
  167. printk("lp->lan_saa9730_regs->DebugLanRxStateMachine = %x\n",
  168. readl(&lp->lan_saa9730_regs->DebugLanRxStateMachine));
  169. printk("lp->lan_saa9730_regs->DebugLanTxFifoPointers = %x\n",
  170. readl(&lp->lan_saa9730_regs->DebugLanTxFifoPointers));
  171. printk("lp->lan_saa9730_regs->DebugLanRxFifoPointers = %x\n",
  172. readl(&lp->lan_saa9730_regs->DebugLanRxFifoPointers));
  173. printk("lp->lan_saa9730_regs->DebugLanCtlStateMachine = %x\n",
  174. readl(&lp->lan_saa9730_regs->DebugLanCtlStateMachine));
  175. }
  176. static void lan_saa9730_buffer_init(struct lan_saa9730_private *lp)
  177. {
  178. int i, j;
  179. /* Init RX buffers */
  180. for (i = 0; i < LAN_SAA9730_BUFFERS; i++) {
  181. for (j = 0; j < LAN_SAA9730_RCV_Q_SIZE; j++) {
  182. *(unsigned int *) lp->RcvBuffer[i][j] =
  183. cpu_to_le32(RXSF_READY <<
  184. RX_STAT_CTL_OWNER_SHF);
  185. }
  186. }
  187. /* Init TX buffers */
  188. for (i = 0; i < LAN_SAA9730_BUFFERS; i++) {
  189. for (j = 0; j < LAN_SAA9730_TXM_Q_SIZE; j++) {
  190. *(unsigned int *) lp->TxmBuffer[i][j] =
  191. cpu_to_le32(TXSF_EMPTY <<
  192. TX_STAT_CTL_OWNER_SHF);
  193. }
  194. }
  195. }
  196. static void lan_saa9730_free_buffers(struct pci_dev *pdev,
  197. struct lan_saa9730_private *lp)
  198. {
  199. pci_free_consistent(pdev, lp->buffer_size, lp->buffer_start,
  200. lp->dma_addr);
  201. }
  202. static int lan_saa9730_allocate_buffers(struct pci_dev *pdev,
  203. struct lan_saa9730_private *lp)
  204. {
  205. void *Pa;
  206. unsigned int i, j, rxoffset, txoffset;
  207. int ret;
  208. /* Initialize buffer space */
  209. lp->DmaRcvPackets = LAN_SAA9730_RCV_Q_SIZE;
  210. lp->DmaTxmPackets = LAN_SAA9730_TXM_Q_SIZE;
  211. /* Initialize Rx Buffer Index */
  212. lp->NextRcvPacketIndex = 0;
  213. lp->NextRcvBufferIndex = 0;
  214. /* Set current buffer index & next available packet index */
  215. lp->NextTxmPacketIndex = 0;
  216. lp->NextTxmBufferIndex = 0;
  217. lp->PendingTxmPacketIndex = 0;
  218. lp->PendingTxmBufferIndex = 0;
  219. /*
  220. * Allocate all RX and TX packets in one chunk.
  221. * The Rx and Tx packets must be PACKET_SIZE aligned.
  222. */
  223. lp->buffer_size = ((LAN_SAA9730_RCV_Q_SIZE + LAN_SAA9730_TXM_Q_SIZE) *
  224. LAN_SAA9730_PACKET_SIZE * LAN_SAA9730_BUFFERS) +
  225. LAN_SAA9730_PACKET_SIZE;
  226. lp->buffer_start = pci_alloc_consistent(pdev, lp->buffer_size,
  227. &lp->dma_addr);
  228. if (!lp->buffer_start) {
  229. ret = -ENOMEM;
  230. goto out;
  231. }
  232. Pa = (void *)ALIGN((unsigned long)lp->buffer_start,
  233. LAN_SAA9730_PACKET_SIZE);
  234. rxoffset = Pa - lp->buffer_start;
  235. /* Init RX buffers */
  236. for (i = 0; i < LAN_SAA9730_BUFFERS; i++) {
  237. for (j = 0; j < LAN_SAA9730_RCV_Q_SIZE; j++) {
  238. *(unsigned int *) Pa =
  239. cpu_to_le32(RXSF_READY <<
  240. RX_STAT_CTL_OWNER_SHF);
  241. lp->RcvBuffer[i][j] = Pa;
  242. Pa += LAN_SAA9730_PACKET_SIZE;
  243. }
  244. }
  245. txoffset = Pa - lp->buffer_start;
  246. /* Init TX buffers */
  247. for (i = 0; i < LAN_SAA9730_BUFFERS; i++) {
  248. for (j = 0; j < LAN_SAA9730_TXM_Q_SIZE; j++) {
  249. *(unsigned int *) Pa =
  250. cpu_to_le32(TXSF_EMPTY <<
  251. TX_STAT_CTL_OWNER_SHF);
  252. lp->TxmBuffer[i][j] = Pa;
  253. Pa += LAN_SAA9730_PACKET_SIZE;
  254. }
  255. }
  256. /*
  257. * Set rx buffer A and rx buffer B to point to the first two buffer
  258. * spaces.
  259. */
  260. writel(lp->dma_addr + rxoffset, &lp->lan_saa9730_regs->RxBuffA);
  261. writel(lp->dma_addr + rxoffset +
  262. LAN_SAA9730_PACKET_SIZE * LAN_SAA9730_RCV_Q_SIZE,
  263. &lp->lan_saa9730_regs->RxBuffB);
  264. /*
  265. * Set txm_buf_a and txm_buf_b to point to the first two buffer
  266. * space
  267. */
  268. writel(lp->dma_addr + txoffset,
  269. &lp->lan_saa9730_regs->TxBuffA);
  270. writel(lp->dma_addr + txoffset +
  271. LAN_SAA9730_PACKET_SIZE * LAN_SAA9730_TXM_Q_SIZE,
  272. &lp->lan_saa9730_regs->TxBuffB);
  273. /* Set packet number */
  274. writel((lp->DmaRcvPackets << PK_COUNT_RX_A_SHF) |
  275. (lp->DmaRcvPackets << PK_COUNT_RX_B_SHF) |
  276. (lp->DmaTxmPackets << PK_COUNT_TX_A_SHF) |
  277. (lp->DmaTxmPackets << PK_COUNT_TX_B_SHF),
  278. &lp->lan_saa9730_regs->PacketCount);
  279. return 0;
  280. out:
  281. return ret;
  282. }
  283. static int lan_saa9730_cam_load(struct lan_saa9730_private *lp)
  284. {
  285. unsigned int i;
  286. unsigned char *NetworkAddress;
  287. NetworkAddress = (unsigned char *) &lp->PhysicalAddress[0][0];
  288. for (i = 0; i < LAN_SAA9730_CAM_DWORDS; i++) {
  289. /* First set address to where data is written */
  290. writel(i, &lp->lan_saa9730_regs->CamAddress);
  291. writel((NetworkAddress[0] << 24) | (NetworkAddress[1] << 16) |
  292. (NetworkAddress[2] << 8) | NetworkAddress[3],
  293. &lp->lan_saa9730_regs->CamData);
  294. NetworkAddress += 4;
  295. }
  296. return 0;
  297. }
  298. static int lan_saa9730_cam_init(struct net_device *dev)
  299. {
  300. struct lan_saa9730_private *lp = netdev_priv(dev);
  301. unsigned int i;
  302. /* Copy MAC-address into all entries. */
  303. for (i = 0; i < LAN_SAA9730_CAM_ENTRIES; i++) {
  304. memcpy((unsigned char *) lp->PhysicalAddress[i],
  305. (unsigned char *) dev->dev_addr, 6);
  306. }
  307. return 0;
  308. }
  309. static int lan_saa9730_mii_init(struct lan_saa9730_private *lp)
  310. {
  311. int i, l;
  312. /* Check link status, spin here till station is not busy. */
  313. i = 0;
  314. while (readl(&lp->lan_saa9730_regs->StationMgmtCtl) & MD_CA_BUSY) {
  315. i++;
  316. if (i > 100) {
  317. printk("Error: lan_saa9730_mii_init: timeout\n");
  318. return -1;
  319. }
  320. mdelay(1); /* wait 1 ms. */
  321. }
  322. /* Now set the control and address register. */
  323. writel(MD_CA_BUSY | PHY_STATUS | PHY_ADDRESS << MD_CA_PHY_SHF,
  324. &lp->lan_saa9730_regs->StationMgmtCtl);
  325. /* check link status, spin here till station is not busy */
  326. i = 0;
  327. while (readl(&lp->lan_saa9730_regs->StationMgmtCtl) & MD_CA_BUSY) {
  328. i++;
  329. if (i > 100) {
  330. printk("Error: lan_saa9730_mii_init: timeout\n");
  331. return -1;
  332. }
  333. mdelay(1); /* wait 1 ms. */
  334. }
  335. /* Wait for 1 ms. */
  336. mdelay(1);
  337. /* Check the link status. */
  338. if (readl(&lp->lan_saa9730_regs->StationMgmtData) &
  339. PHY_STATUS_LINK_UP) {
  340. /* Link is up. */
  341. return 0;
  342. } else {
  343. /* Link is down, reset the PHY first. */
  344. /* set PHY address = 'CONTROL' */
  345. writel(PHY_ADDRESS << MD_CA_PHY_SHF | MD_CA_WR | PHY_CONTROL,
  346. &lp->lan_saa9730_regs->StationMgmtCtl);
  347. /* Wait for 1 ms. */
  348. mdelay(1);
  349. /* set 'CONTROL' = force reset and renegotiate */
  350. writel(PHY_CONTROL_RESET | PHY_CONTROL_AUTO_NEG |
  351. PHY_CONTROL_RESTART_AUTO_NEG,
  352. &lp->lan_saa9730_regs->StationMgmtData);
  353. /* Wait for 50 ms. */
  354. mdelay(50);
  355. /* set 'BUSY' to start operation */
  356. writel(MD_CA_BUSY | PHY_ADDRESS << MD_CA_PHY_SHF | MD_CA_WR |
  357. PHY_CONTROL, &lp->lan_saa9730_regs->StationMgmtCtl);
  358. /* await completion */
  359. i = 0;
  360. while (readl(&lp->lan_saa9730_regs->StationMgmtCtl) &
  361. MD_CA_BUSY) {
  362. i++;
  363. if (i > 100) {
  364. printk
  365. ("Error: lan_saa9730_mii_init: timeout\n");
  366. return -1;
  367. }
  368. mdelay(1); /* wait 1 ms. */
  369. }
  370. /* Wait for 1 ms. */
  371. mdelay(1);
  372. for (l = 0; l < 2; l++) {
  373. /* set PHY address = 'STATUS' */
  374. writel(MD_CA_BUSY | PHY_ADDRESS << MD_CA_PHY_SHF |
  375. PHY_STATUS,
  376. &lp->lan_saa9730_regs->StationMgmtCtl);
  377. /* await completion */
  378. i = 0;
  379. while (readl(&lp->lan_saa9730_regs->StationMgmtCtl) &
  380. MD_CA_BUSY) {
  381. i++;
  382. if (i > 100) {
  383. printk
  384. ("Error: lan_saa9730_mii_init: timeout\n");
  385. return -1;
  386. }
  387. mdelay(1); /* wait 1 ms. */
  388. }
  389. /* wait for 3 sec. */
  390. mdelay(3000);
  391. /* check the link status */
  392. if (readl(&lp->lan_saa9730_regs->StationMgmtData) &
  393. PHY_STATUS_LINK_UP) {
  394. /* link is up */
  395. break;
  396. }
  397. }
  398. }
  399. return 0;
  400. }
  401. static int lan_saa9730_control_init(struct lan_saa9730_private *lp)
  402. {
  403. /* Initialize DMA control register. */
  404. writel((LANMB_ANY << DMA_CTL_MAX_XFER_SHF) |
  405. (LANEND_LITTLE << DMA_CTL_ENDIAN_SHF) |
  406. (LAN_SAA9730_RCV_Q_INT_THRESHOLD << DMA_CTL_RX_INT_COUNT_SHF)
  407. | DMA_CTL_RX_INT_TO_EN | DMA_CTL_RX_INT_EN |
  408. DMA_CTL_MAC_RX_INT_EN | DMA_CTL_MAC_TX_INT_EN,
  409. &lp->lan_saa9730_regs->LanDmaCtl);
  410. /* Initial MAC control register. */
  411. writel((MACCM_MII << MAC_CONTROL_CONN_SHF) | MAC_CONTROL_FULL_DUP,
  412. &lp->lan_saa9730_regs->MacCtl);
  413. /* Initialize CAM control register. */
  414. writel(CAM_CONTROL_COMP_EN | CAM_CONTROL_BROAD_ACC,
  415. &lp->lan_saa9730_regs->CamCtl);
  416. /*
  417. * Initialize CAM enable register, only turn on first entry, should
  418. * contain own addr.
  419. */
  420. writel(0x0001, &lp->lan_saa9730_regs->CamEnable);
  421. /* Initialize Tx control register */
  422. writel(TX_CTL_EN_COMP, &lp->lan_saa9730_regs->TxCtl);
  423. /* Initialize Rcv control register */
  424. writel(RX_CTL_STRIP_CRC, &lp->lan_saa9730_regs->RxCtl);
  425. /* Reset DMA engine */
  426. writel(DMA_TEST_SW_RESET, &lp->lan_saa9730_regs->DmaTest);
  427. return 0;
  428. }
  429. static int lan_saa9730_stop(struct lan_saa9730_private *lp)
  430. {
  431. int i;
  432. /* Stop DMA first */
  433. writel(readl(&lp->lan_saa9730_regs->LanDmaCtl) &
  434. ~(DMA_CTL_EN_TX_DMA | DMA_CTL_EN_RX_DMA),
  435. &lp->lan_saa9730_regs->LanDmaCtl);
  436. /* Set the SW Reset bits in DMA and MAC control registers */
  437. writel(DMA_TEST_SW_RESET, &lp->lan_saa9730_regs->DmaTest);
  438. writel(readl(&lp->lan_saa9730_regs->MacCtl) | MAC_CONTROL_RESET,
  439. &lp->lan_saa9730_regs->MacCtl);
  440. /*
  441. * Wait for MAC reset to have finished. The reset bit is auto cleared
  442. * when the reset is done.
  443. */
  444. i = 0;
  445. while (readl(&lp->lan_saa9730_regs->MacCtl) & MAC_CONTROL_RESET) {
  446. i++;
  447. if (i > 100) {
  448. printk
  449. ("Error: lan_sa9730_stop: MAC reset timeout\n");
  450. return -1;
  451. }
  452. mdelay(1); /* wait 1 ms. */
  453. }
  454. return 0;
  455. }
  456. static int lan_saa9730_dma_init(struct lan_saa9730_private *lp)
  457. {
  458. /* Stop lan controller. */
  459. lan_saa9730_stop(lp);
  460. writel(LAN_SAA9730_DEFAULT_TIME_OUT_CNT,
  461. &lp->lan_saa9730_regs->Timeout);
  462. return 0;
  463. }
  464. static int lan_saa9730_start(struct lan_saa9730_private *lp)
  465. {
  466. lan_saa9730_buffer_init(lp);
  467. /* Initialize Rx Buffer Index */
  468. lp->NextRcvPacketIndex = 0;
  469. lp->NextRcvBufferIndex = 0;
  470. /* Set current buffer index & next available packet index */
  471. lp->NextTxmPacketIndex = 0;
  472. lp->NextTxmBufferIndex = 0;
  473. lp->PendingTxmPacketIndex = 0;
  474. lp->PendingTxmBufferIndex = 0;
  475. writel(readl(&lp->lan_saa9730_regs->LanDmaCtl) | DMA_CTL_EN_TX_DMA |
  476. DMA_CTL_EN_RX_DMA, &lp->lan_saa9730_regs->LanDmaCtl);
  477. /* For Tx, turn on MAC then DMA */
  478. writel(readl(&lp->lan_saa9730_regs->TxCtl) | TX_CTL_TX_EN,
  479. &lp->lan_saa9730_regs->TxCtl);
  480. /* For Rx, turn on DMA then MAC */
  481. writel(readl(&lp->lan_saa9730_regs->RxCtl) | RX_CTL_RX_EN,
  482. &lp->lan_saa9730_regs->RxCtl);
  483. /* Set Ok2Use to let hardware own the buffers. */
  484. writel(OK2USE_RX_A | OK2USE_RX_B, &lp->lan_saa9730_regs->Ok2Use);
  485. return 0;
  486. }
  487. static int lan_saa9730_restart(struct lan_saa9730_private *lp)
  488. {
  489. lan_saa9730_stop(lp);
  490. lan_saa9730_start(lp);
  491. return 0;
  492. }
  493. static int lan_saa9730_tx(struct net_device *dev)
  494. {
  495. struct lan_saa9730_private *lp = netdev_priv(dev);
  496. unsigned int *pPacket;
  497. unsigned int tx_status;
  498. if (lan_saa9730_debug > 5)
  499. printk("lan_saa9730_tx interrupt\n");
  500. /* Clear interrupt. */
  501. writel(DMA_STATUS_MAC_TX_INT, &lp->lan_saa9730_regs->DmaStatus);
  502. while (1) {
  503. pPacket = lp->TxmBuffer[lp->PendingTxmBufferIndex]
  504. [lp->PendingTxmPacketIndex];
  505. /* Get status of first packet transmitted. */
  506. tx_status = le32_to_cpu(*pPacket);
  507. /* Check ownership. */
  508. if ((tx_status & TX_STAT_CTL_OWNER_MSK) !=
  509. (TXSF_HWDONE << TX_STAT_CTL_OWNER_SHF)) break;
  510. /* Check for error. */
  511. if (tx_status & TX_STAT_CTL_ERROR_MSK) {
  512. if (lan_saa9730_debug > 1)
  513. printk("lan_saa9730_tx: tx error = %x\n",
  514. tx_status);
  515. dev->stats.tx_errors++;
  516. if (tx_status &
  517. (TX_STATUS_EX_COLL << TX_STAT_CTL_STATUS_SHF))
  518. dev->stats.tx_aborted_errors++;
  519. if (tx_status &
  520. (TX_STATUS_LATE_COLL << TX_STAT_CTL_STATUS_SHF))
  521. dev->stats.tx_window_errors++;
  522. if (tx_status &
  523. (TX_STATUS_L_CARR << TX_STAT_CTL_STATUS_SHF))
  524. dev->stats.tx_carrier_errors++;
  525. if (tx_status &
  526. (TX_STATUS_UNDER << TX_STAT_CTL_STATUS_SHF))
  527. dev->stats.tx_fifo_errors++;
  528. if (tx_status &
  529. (TX_STATUS_SQ_ERR << TX_STAT_CTL_STATUS_SHF))
  530. dev->stats.tx_heartbeat_errors++;
  531. dev->stats.collisions +=
  532. tx_status & TX_STATUS_TX_COLL_MSK;
  533. }
  534. /* Free buffer. */
  535. *pPacket =
  536. cpu_to_le32(TXSF_EMPTY << TX_STAT_CTL_OWNER_SHF);
  537. /* Update pending index pointer. */
  538. lp->PendingTxmPacketIndex++;
  539. if (lp->PendingTxmPacketIndex >= LAN_SAA9730_TXM_Q_SIZE) {
  540. lp->PendingTxmPacketIndex = 0;
  541. lp->PendingTxmBufferIndex ^= 1;
  542. }
  543. }
  544. /* The tx buffer is no longer full. */
  545. netif_wake_queue(dev);
  546. return 0;
  547. }
  548. static int lan_saa9730_rx(struct net_device *dev)
  549. {
  550. struct lan_saa9730_private *lp = netdev_priv(dev);
  551. int len = 0;
  552. struct sk_buff *skb = 0;
  553. unsigned int rx_status;
  554. int BufferIndex;
  555. int PacketIndex;
  556. unsigned int *pPacket;
  557. unsigned char *pData;
  558. if (lan_saa9730_debug > 5)
  559. printk("lan_saa9730_rx interrupt\n");
  560. /* Clear receive interrupts. */
  561. writel(DMA_STATUS_MAC_RX_INT | DMA_STATUS_RX_INT |
  562. DMA_STATUS_RX_TO_INT, &lp->lan_saa9730_regs->DmaStatus);
  563. /* Address next packet */
  564. BufferIndex = lp->NextRcvBufferIndex;
  565. PacketIndex = lp->NextRcvPacketIndex;
  566. pPacket = lp->RcvBuffer[BufferIndex][PacketIndex];
  567. rx_status = le32_to_cpu(*pPacket);
  568. /* Process each packet. */
  569. while ((rx_status & RX_STAT_CTL_OWNER_MSK) ==
  570. (RXSF_HWDONE << RX_STAT_CTL_OWNER_SHF)) {
  571. /* Check the rx status. */
  572. if (rx_status & (RX_STATUS_GOOD << RX_STAT_CTL_STATUS_SHF)) {
  573. /* Received packet is good. */
  574. len = (rx_status & RX_STAT_CTL_LENGTH_MSK) >>
  575. RX_STAT_CTL_LENGTH_SHF;
  576. pData = (unsigned char *) pPacket;
  577. pData += 4;
  578. skb = dev_alloc_skb(len + 2);
  579. if (skb == 0) {
  580. printk
  581. ("%s: Memory squeeze, deferring packet.\n",
  582. dev->name);
  583. dev->stats.rx_dropped++;
  584. } else {
  585. dev->stats.rx_bytes += len;
  586. dev->stats.rx_packets++;
  587. skb_reserve(skb, 2); /* 16 byte align */
  588. skb_put(skb, len); /* make room */
  589. skb_copy_to_linear_data(skb,
  590. (unsigned char *) pData,
  591. len);
  592. skb->protocol = eth_type_trans(skb, dev);
  593. netif_rx(skb);
  594. dev->last_rx = jiffies;
  595. }
  596. } else {
  597. /* We got an error packet. */
  598. if (lan_saa9730_debug > 2)
  599. printk
  600. ("lan_saa9730_rx: We got an error packet = %x\n",
  601. rx_status);
  602. dev->stats.rx_errors++;
  603. if (rx_status &
  604. (RX_STATUS_CRC_ERR << RX_STAT_CTL_STATUS_SHF))
  605. dev->stats.rx_crc_errors++;
  606. if (rx_status &
  607. (RX_STATUS_ALIGN_ERR << RX_STAT_CTL_STATUS_SHF))
  608. dev->stats.rx_frame_errors++;
  609. if (rx_status &
  610. (RX_STATUS_OVERFLOW << RX_STAT_CTL_STATUS_SHF))
  611. dev->stats.rx_fifo_errors++;
  612. if (rx_status &
  613. (RX_STATUS_LONG_ERR << RX_STAT_CTL_STATUS_SHF))
  614. dev->stats.rx_length_errors++;
  615. }
  616. /* Indicate we have processed the buffer. */
  617. *pPacket = cpu_to_le32(RXSF_READY << RX_STAT_CTL_OWNER_SHF);
  618. /* Make sure A or B is available to hardware as appropriate. */
  619. writel(BufferIndex ? OK2USE_RX_B : OK2USE_RX_A,
  620. &lp->lan_saa9730_regs->Ok2Use);
  621. /* Go to next packet in sequence. */
  622. lp->NextRcvPacketIndex++;
  623. if (lp->NextRcvPacketIndex >= LAN_SAA9730_RCV_Q_SIZE) {
  624. lp->NextRcvPacketIndex = 0;
  625. lp->NextRcvBufferIndex ^= 1;
  626. }
  627. /* Address next packet */
  628. BufferIndex = lp->NextRcvBufferIndex;
  629. PacketIndex = lp->NextRcvPacketIndex;
  630. pPacket = lp->RcvBuffer[BufferIndex][PacketIndex];
  631. rx_status = le32_to_cpu(*pPacket);
  632. }
  633. return 0;
  634. }
  635. static irqreturn_t lan_saa9730_interrupt(const int irq, void *dev_id)
  636. {
  637. struct net_device *dev = dev_id;
  638. struct lan_saa9730_private *lp = netdev_priv(dev);
  639. if (lan_saa9730_debug > 5)
  640. printk("lan_saa9730_interrupt\n");
  641. /* Disable the EVM LAN interrupt. */
  642. evm_saa9730_block_lan_int(lp);
  643. /* Clear the EVM LAN interrupt. */
  644. evm_saa9730_clear_lan_int(lp);
  645. /* Service pending transmit interrupts. */
  646. if (readl(&lp->lan_saa9730_regs->DmaStatus) & DMA_STATUS_MAC_TX_INT)
  647. lan_saa9730_tx(dev);
  648. /* Service pending receive interrupts. */
  649. if (readl(&lp->lan_saa9730_regs->DmaStatus) &
  650. (DMA_STATUS_MAC_RX_INT | DMA_STATUS_RX_INT |
  651. DMA_STATUS_RX_TO_INT)) lan_saa9730_rx(dev);
  652. /* Enable the EVM LAN interrupt. */
  653. evm_saa9730_unblock_lan_int(lp);
  654. return IRQ_HANDLED;
  655. }
  656. static int lan_saa9730_open(struct net_device *dev)
  657. {
  658. struct lan_saa9730_private *lp = netdev_priv(dev);
  659. /* Associate IRQ with lan_saa9730_interrupt */
  660. if (request_irq(dev->irq, &lan_saa9730_interrupt, 0, "SAA9730 Eth",
  661. dev)) {
  662. printk("lan_saa9730_open: Can't get irq %d\n", dev->irq);
  663. return -EAGAIN;
  664. }
  665. /* Enable the Lan interrupt in the event manager. */
  666. evm_saa9730_enable_lan_int(lp);
  667. /* Start the LAN controller */
  668. if (lan_saa9730_start(lp))
  669. return -1;
  670. netif_start_queue(dev);
  671. return 0;
  672. }
  673. static int lan_saa9730_write(struct lan_saa9730_private *lp,
  674. struct sk_buff *skb, int skblen)
  675. {
  676. unsigned char *pbData = skb->data;
  677. unsigned int len = skblen;
  678. unsigned char *pbPacketData;
  679. unsigned int tx_status;
  680. int BufferIndex;
  681. int PacketIndex;
  682. if (lan_saa9730_debug > 5)
  683. printk("lan_saa9730_write: skb=%p\n", skb);
  684. BufferIndex = lp->NextTxmBufferIndex;
  685. PacketIndex = lp->NextTxmPacketIndex;
  686. tx_status = le32_to_cpu(*(unsigned int *)lp->TxmBuffer[BufferIndex]
  687. [PacketIndex]);
  688. if ((tx_status & TX_STAT_CTL_OWNER_MSK) !=
  689. (TXSF_EMPTY << TX_STAT_CTL_OWNER_SHF)) {
  690. if (lan_saa9730_debug > 4)
  691. printk
  692. ("lan_saa9730_write: Tx buffer not available: tx_status = %x\n",
  693. tx_status);
  694. return -1;
  695. }
  696. lp->NextTxmPacketIndex++;
  697. if (lp->NextTxmPacketIndex >= LAN_SAA9730_TXM_Q_SIZE) {
  698. lp->NextTxmPacketIndex = 0;
  699. lp->NextTxmBufferIndex ^= 1;
  700. }
  701. pbPacketData = lp->TxmBuffer[BufferIndex][PacketIndex];
  702. pbPacketData += 4;
  703. /* copy the bits */
  704. memcpy(pbPacketData, pbData, len);
  705. /* Set transmit status for hardware */
  706. *(unsigned int *)lp->TxmBuffer[BufferIndex][PacketIndex] =
  707. cpu_to_le32((TXSF_READY << TX_STAT_CTL_OWNER_SHF) |
  708. (TX_STAT_CTL_INT_AFTER_TX <<
  709. TX_STAT_CTL_FRAME_SHF) |
  710. (len << TX_STAT_CTL_LENGTH_SHF));
  711. /* Make sure A or B is available to hardware as appropriate. */
  712. writel(BufferIndex ? OK2USE_TX_B : OK2USE_TX_A,
  713. &lp->lan_saa9730_regs->Ok2Use);
  714. return 0;
  715. }
  716. static void lan_saa9730_tx_timeout(struct net_device *dev)
  717. {
  718. struct lan_saa9730_private *lp = netdev_priv(dev);
  719. /* Transmitter timeout, serious problems */
  720. dev->stats.tx_errors++;
  721. printk("%s: transmit timed out, reset\n", dev->name);
  722. /*show_saa9730_regs(dev); */
  723. lan_saa9730_restart(lp);
  724. dev->trans_start = jiffies;
  725. netif_wake_queue(dev);
  726. }
  727. static int lan_saa9730_start_xmit(struct sk_buff *skb,
  728. struct net_device *dev)
  729. {
  730. struct lan_saa9730_private *lp = netdev_priv(dev);
  731. unsigned long flags;
  732. int skblen;
  733. int len;
  734. if (lan_saa9730_debug > 4)
  735. printk("Send packet: skb=%p\n", skb);
  736. skblen = skb->len;
  737. spin_lock_irqsave(&lp->lock, flags);
  738. len = (skblen <= ETH_ZLEN) ? ETH_ZLEN : skblen;
  739. if (lan_saa9730_write(lp, skb, skblen)) {
  740. spin_unlock_irqrestore(&lp->lock, flags);
  741. printk("Error when writing packet to controller: skb=%p\n", skb);
  742. netif_stop_queue(dev);
  743. return -1;
  744. }
  745. dev->stats.tx_bytes += len;
  746. dev->stats.tx_packets++;
  747. dev->trans_start = jiffies;
  748. netif_wake_queue(dev);
  749. dev_kfree_skb(skb);
  750. spin_unlock_irqrestore(&lp->lock, flags);
  751. return 0;
  752. }
  753. static int lan_saa9730_close(struct net_device *dev)
  754. {
  755. struct lan_saa9730_private *lp = netdev_priv(dev);
  756. if (lan_saa9730_debug > 1)
  757. printk("lan_saa9730_close:\n");
  758. netif_stop_queue(dev);
  759. /* Disable the Lan interrupt in the event manager. */
  760. evm_saa9730_disable_lan_int(lp);
  761. /* Stop the controller */
  762. if (lan_saa9730_stop(lp))
  763. return -1;
  764. free_irq(dev->irq, (void *) dev);
  765. return 0;
  766. }
  767. static void lan_saa9730_set_multicast(struct net_device *dev)
  768. {
  769. struct lan_saa9730_private *lp = netdev_priv(dev);
  770. /* Stop the controller */
  771. lan_saa9730_stop(lp);
  772. if (dev->flags & IFF_PROMISC) {
  773. /* accept all packets */
  774. writel(CAM_CONTROL_COMP_EN | CAM_CONTROL_STATION_ACC |
  775. CAM_CONTROL_GROUP_ACC | CAM_CONTROL_BROAD_ACC,
  776. &lp->lan_saa9730_regs->CamCtl);
  777. } else {
  778. if (dev->flags & IFF_ALLMULTI || dev->mc_count) {
  779. /* accept all multicast packets */
  780. /*
  781. * Will handle the multicast stuff later. -carstenl
  782. */
  783. writel(CAM_CONTROL_COMP_EN | CAM_CONTROL_GROUP_ACC |
  784. CAM_CONTROL_BROAD_ACC,
  785. &lp->lan_saa9730_regs->CamCtl);
  786. }
  787. }
  788. lan_saa9730_restart(lp);
  789. }
  790. static void __devexit saa9730_remove_one(struct pci_dev *pdev)
  791. {
  792. struct net_device *dev = pci_get_drvdata(pdev);
  793. struct lan_saa9730_private *lp = netdev_priv(dev);
  794. if (dev) {
  795. unregister_netdev(dev);
  796. lan_saa9730_free_buffers(pdev, lp);
  797. iounmap(lp->lan_saa9730_regs);
  798. iounmap(lp->evm_saa9730_regs);
  799. free_netdev(dev);
  800. pci_release_regions(pdev);
  801. pci_disable_device(pdev);
  802. pci_set_drvdata(pdev, NULL);
  803. }
  804. }
  805. static int lan_saa9730_init(struct net_device *dev, struct pci_dev *pdev,
  806. unsigned long ioaddr, int irq)
  807. {
  808. struct lan_saa9730_private *lp = netdev_priv(dev);
  809. unsigned char ethernet_addr[6];
  810. int ret;
  811. if (get_ethernet_addr(ethernet_addr)) {
  812. ret = -ENODEV;
  813. goto out;
  814. }
  815. memcpy(dev->dev_addr, ethernet_addr, 6);
  816. dev->base_addr = ioaddr;
  817. dev->irq = irq;
  818. lp->pci_dev = pdev;
  819. /* Set SAA9730 LAN base address. */
  820. lp->lan_saa9730_regs = ioremap(ioaddr + SAA9730_LAN_REGS_ADDR,
  821. SAA9730_LAN_REGS_SIZE);
  822. if (!lp->lan_saa9730_regs) {
  823. ret = -ENOMEM;
  824. goto out;
  825. }
  826. /* Set SAA9730 EVM base address. */
  827. lp->evm_saa9730_regs = ioremap(ioaddr + SAA9730_EVM_REGS_ADDR,
  828. SAA9730_EVM_REGS_SIZE);
  829. if (!lp->evm_saa9730_regs) {
  830. ret = -ENOMEM;
  831. goto out_iounmap_lan;
  832. }
  833. /* Allocate LAN RX/TX frame buffer space. */
  834. if ((ret = lan_saa9730_allocate_buffers(pdev, lp)))
  835. goto out_iounmap;
  836. /* Stop LAN controller. */
  837. if ((ret = lan_saa9730_stop(lp)))
  838. goto out_free_consistent;
  839. /* Initialize CAM registers. */
  840. if ((ret = lan_saa9730_cam_init(dev)))
  841. goto out_free_consistent;
  842. /* Initialize MII registers. */
  843. if ((ret = lan_saa9730_mii_init(lp)))
  844. goto out_free_consistent;
  845. /* Initialize control registers. */
  846. if ((ret = lan_saa9730_control_init(lp)))
  847. goto out_free_consistent;
  848. /* Load CAM registers. */
  849. if ((ret = lan_saa9730_cam_load(lp)))
  850. goto out_free_consistent;
  851. /* Initialize DMA context registers. */
  852. if ((ret = lan_saa9730_dma_init(lp)))
  853. goto out_free_consistent;
  854. spin_lock_init(&lp->lock);
  855. dev->open = lan_saa9730_open;
  856. dev->hard_start_xmit = lan_saa9730_start_xmit;
  857. dev->stop = lan_saa9730_close;
  858. dev->set_multicast_list = lan_saa9730_set_multicast;
  859. dev->tx_timeout = lan_saa9730_tx_timeout;
  860. dev->watchdog_timeo = (HZ >> 1);
  861. dev->dma = 0;
  862. ret = register_netdev (dev);
  863. if (ret)
  864. goto out_free_consistent;
  865. return 0;
  866. out_free_consistent:
  867. lan_saa9730_free_buffers(pdev, lp);
  868. out_iounmap:
  869. iounmap(lp->evm_saa9730_regs);
  870. out_iounmap_lan:
  871. iounmap(lp->lan_saa9730_regs);
  872. out:
  873. return ret;
  874. }
  875. static int __devinit saa9730_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
  876. {
  877. struct net_device *dev = NULL;
  878. unsigned long pci_ioaddr;
  879. int err;
  880. if (lan_saa9730_debug > 1)
  881. printk("saa9730.c: PCI bios is present, checking for devices...\n");
  882. err = pci_enable_device(pdev);
  883. if (err) {
  884. printk(KERN_ERR "Cannot enable PCI device, aborting.\n");
  885. goto out;
  886. }
  887. err = pci_request_regions(pdev, DRV_MODULE_NAME);
  888. if (err) {
  889. printk(KERN_ERR "Cannot obtain PCI resources, aborting.\n");
  890. goto out_disable_pdev;
  891. }
  892. pci_irq_line = pdev->irq;
  893. /* LAN base address in located at BAR 1. */
  894. pci_ioaddr = pci_resource_start(pdev, 1);
  895. pci_set_master(pdev);
  896. printk("Found SAA9730 (PCI) at %lx, irq %d.\n",
  897. pci_ioaddr, pci_irq_line);
  898. dev = alloc_etherdev(sizeof(struct lan_saa9730_private));
  899. if (!dev)
  900. goto out_disable_pdev;
  901. err = lan_saa9730_init(dev, pdev, pci_ioaddr, pci_irq_line);
  902. if (err) {
  903. printk("LAN init failed");
  904. goto out_free_netdev;
  905. }
  906. pci_set_drvdata(pdev, dev);
  907. SET_NETDEV_DEV(dev, &pdev->dev);
  908. return 0;
  909. out_free_netdev:
  910. free_netdev(dev);
  911. out_disable_pdev:
  912. pci_disable_device(pdev);
  913. out:
  914. pci_set_drvdata(pdev, NULL);
  915. return err;
  916. }
  917. static struct pci_driver saa9730_driver = {
  918. .name = DRV_MODULE_NAME,
  919. .id_table = saa9730_pci_tbl,
  920. .probe = saa9730_init_one,
  921. .remove = __devexit_p(saa9730_remove_one),
  922. };
  923. static int __init saa9730_init(void)
  924. {
  925. return pci_register_driver(&saa9730_driver);
  926. }
  927. static void __exit saa9730_cleanup(void)
  928. {
  929. pci_unregister_driver(&saa9730_driver);
  930. }
  931. module_init(saa9730_init);
  932. module_exit(saa9730_cleanup);
  933. MODULE_AUTHOR("Ralf Baechle <ralf@linux-mips.org>");
  934. MODULE_DESCRIPTION("Philips SAA9730 ethernet driver");
  935. MODULE_LICENSE("GPL");