marvell.c 7.4 KB

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  1. /*
  2. * drivers/net/phy/marvell.c
  3. *
  4. * Driver for Marvell PHYs
  5. *
  6. * Author: Andy Fleming
  7. *
  8. * Copyright (c) 2004 Freescale Semiconductor, Inc.
  9. *
  10. * This program is free software; you can redistribute it and/or modify it
  11. * under the terms of the GNU General Public License as published by the
  12. * Free Software Foundation; either version 2 of the License, or (at your
  13. * option) any later version.
  14. *
  15. */
  16. #include <linux/kernel.h>
  17. #include <linux/string.h>
  18. #include <linux/errno.h>
  19. #include <linux/unistd.h>
  20. #include <linux/slab.h>
  21. #include <linux/interrupt.h>
  22. #include <linux/init.h>
  23. #include <linux/delay.h>
  24. #include <linux/netdevice.h>
  25. #include <linux/etherdevice.h>
  26. #include <linux/skbuff.h>
  27. #include <linux/spinlock.h>
  28. #include <linux/mm.h>
  29. #include <linux/module.h>
  30. #include <linux/mii.h>
  31. #include <linux/ethtool.h>
  32. #include <linux/phy.h>
  33. #include <asm/io.h>
  34. #include <asm/irq.h>
  35. #include <asm/uaccess.h>
  36. #define MII_M1011_IEVENT 0x13
  37. #define MII_M1011_IEVENT_CLEAR 0x0000
  38. #define MII_M1011_IMASK 0x12
  39. #define MII_M1011_IMASK_INIT 0x6400
  40. #define MII_M1011_IMASK_CLEAR 0x0000
  41. #define MII_M1011_PHY_SCR 0x10
  42. #define MII_M1011_PHY_SCR_AUTO_CROSS 0x0060
  43. #define MII_M1145_PHY_EXT_CR 0x14
  44. #define MII_M1145_RGMII_RX_DELAY 0x0080
  45. #define MII_M1145_RGMII_TX_DELAY 0x0002
  46. #define M1145_DEV_FLAGS_RESISTANCE 0x00000001
  47. #define MII_M1111_PHY_LED_CONTROL 0x18
  48. #define MII_M1111_PHY_LED_DIRECT 0x4100
  49. #define MII_M1111_PHY_LED_COMBINE 0x411c
  50. #define MII_M1111_PHY_EXT_CR 0x14
  51. #define MII_M1111_RX_DELAY 0x80
  52. #define MII_M1111_TX_DELAY 0x2
  53. #define MII_M1111_PHY_EXT_SR 0x1b
  54. #define MII_M1111_HWCFG_MODE_MASK 0xf
  55. #define MII_M1111_HWCFG_MODE_RGMII 0xb
  56. #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4
  57. MODULE_DESCRIPTION("Marvell PHY driver");
  58. MODULE_AUTHOR("Andy Fleming");
  59. MODULE_LICENSE("GPL");
  60. static int marvell_ack_interrupt(struct phy_device *phydev)
  61. {
  62. int err;
  63. /* Clear the interrupts by reading the reg */
  64. err = phy_read(phydev, MII_M1011_IEVENT);
  65. if (err < 0)
  66. return err;
  67. return 0;
  68. }
  69. static int marvell_config_intr(struct phy_device *phydev)
  70. {
  71. int err;
  72. if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
  73. err = phy_write(phydev, MII_M1011_IMASK, MII_M1011_IMASK_INIT);
  74. else
  75. err = phy_write(phydev, MII_M1011_IMASK, MII_M1011_IMASK_CLEAR);
  76. return err;
  77. }
  78. static int marvell_config_aneg(struct phy_device *phydev)
  79. {
  80. int err;
  81. /* The Marvell PHY has an errata which requires
  82. * that certain registers get written in order
  83. * to restart autonegotiation */
  84. err = phy_write(phydev, MII_BMCR, BMCR_RESET);
  85. if (err < 0)
  86. return err;
  87. err = phy_write(phydev, 0x1d, 0x1f);
  88. if (err < 0)
  89. return err;
  90. err = phy_write(phydev, 0x1e, 0x200c);
  91. if (err < 0)
  92. return err;
  93. err = phy_write(phydev, 0x1d, 0x5);
  94. if (err < 0)
  95. return err;
  96. err = phy_write(phydev, 0x1e, 0);
  97. if (err < 0)
  98. return err;
  99. err = phy_write(phydev, 0x1e, 0x100);
  100. if (err < 0)
  101. return err;
  102. err = phy_write(phydev, MII_M1011_PHY_SCR,
  103. MII_M1011_PHY_SCR_AUTO_CROSS);
  104. if (err < 0)
  105. return err;
  106. err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
  107. MII_M1111_PHY_LED_DIRECT);
  108. if (err < 0)
  109. return err;
  110. err = genphy_config_aneg(phydev);
  111. return err;
  112. }
  113. static int m88e1111_config_init(struct phy_device *phydev)
  114. {
  115. int err;
  116. if ((phydev->interface == PHY_INTERFACE_MODE_RGMII) ||
  117. (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)) {
  118. int temp;
  119. if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
  120. temp = phy_read(phydev, MII_M1111_PHY_EXT_CR);
  121. if (temp < 0)
  122. return temp;
  123. temp |= (MII_M1111_RX_DELAY | MII_M1111_TX_DELAY);
  124. err = phy_write(phydev, MII_M1111_PHY_EXT_CR, temp);
  125. if (err < 0)
  126. return err;
  127. }
  128. temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
  129. if (temp < 0)
  130. return temp;
  131. temp &= ~(MII_M1111_HWCFG_MODE_MASK);
  132. temp |= MII_M1111_HWCFG_MODE_RGMII;
  133. err = phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
  134. if (err < 0)
  135. return err;
  136. }
  137. if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
  138. int temp;
  139. temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
  140. if (temp < 0)
  141. return temp;
  142. temp &= ~(MII_M1111_HWCFG_MODE_MASK);
  143. temp |= MII_M1111_HWCFG_MODE_SGMII_NO_CLK;
  144. err = phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
  145. if (err < 0)
  146. return err;
  147. }
  148. err = phy_write(phydev, MII_BMCR, BMCR_RESET);
  149. if (err < 0)
  150. return err;
  151. return 0;
  152. }
  153. static int m88e1145_config_init(struct phy_device *phydev)
  154. {
  155. int err;
  156. /* Take care of errata E0 & E1 */
  157. err = phy_write(phydev, 0x1d, 0x001b);
  158. if (err < 0)
  159. return err;
  160. err = phy_write(phydev, 0x1e, 0x418f);
  161. if (err < 0)
  162. return err;
  163. err = phy_write(phydev, 0x1d, 0x0016);
  164. if (err < 0)
  165. return err;
  166. err = phy_write(phydev, 0x1e, 0xa2da);
  167. if (err < 0)
  168. return err;
  169. if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
  170. int temp = phy_read(phydev, MII_M1145_PHY_EXT_CR);
  171. if (temp < 0)
  172. return temp;
  173. temp |= (MII_M1145_RGMII_RX_DELAY | MII_M1145_RGMII_TX_DELAY);
  174. err = phy_write(phydev, MII_M1145_PHY_EXT_CR, temp);
  175. if (err < 0)
  176. return err;
  177. if (phydev->dev_flags & M1145_DEV_FLAGS_RESISTANCE) {
  178. err = phy_write(phydev, 0x1d, 0x0012);
  179. if (err < 0)
  180. return err;
  181. temp = phy_read(phydev, 0x1e);
  182. if (temp < 0)
  183. return temp;
  184. temp &= 0xf03f;
  185. temp |= 2 << 9; /* 36 ohm */
  186. temp |= 2 << 6; /* 39 ohm */
  187. err = phy_write(phydev, 0x1e, temp);
  188. if (err < 0)
  189. return err;
  190. err = phy_write(phydev, 0x1d, 0x3);
  191. if (err < 0)
  192. return err;
  193. err = phy_write(phydev, 0x1e, 0x8000);
  194. if (err < 0)
  195. return err;
  196. }
  197. }
  198. return 0;
  199. }
  200. static struct phy_driver marvell_drivers[] = {
  201. {
  202. .phy_id = 0x01410c60,
  203. .phy_id_mask = 0xfffffff0,
  204. .name = "Marvell 88E1101",
  205. .features = PHY_GBIT_FEATURES,
  206. .flags = PHY_HAS_INTERRUPT,
  207. .config_aneg = &marvell_config_aneg,
  208. .read_status = &genphy_read_status,
  209. .ack_interrupt = &marvell_ack_interrupt,
  210. .config_intr = &marvell_config_intr,
  211. .driver = {.owner = THIS_MODULE,},
  212. },
  213. {
  214. .phy_id = 0x01410c90,
  215. .phy_id_mask = 0xfffffff0,
  216. .name = "Marvell 88E1112",
  217. .features = PHY_GBIT_FEATURES,
  218. .flags = PHY_HAS_INTERRUPT,
  219. .config_init = &m88e1111_config_init,
  220. .config_aneg = &marvell_config_aneg,
  221. .read_status = &genphy_read_status,
  222. .ack_interrupt = &marvell_ack_interrupt,
  223. .config_intr = &marvell_config_intr,
  224. .driver = {.owner = THIS_MODULE,},
  225. },
  226. {
  227. .phy_id = 0x01410cc0,
  228. .phy_id_mask = 0xfffffff0,
  229. .name = "Marvell 88E1111",
  230. .features = PHY_GBIT_FEATURES,
  231. .flags = PHY_HAS_INTERRUPT,
  232. .config_init = &m88e1111_config_init,
  233. .config_aneg = &marvell_config_aneg,
  234. .read_status = &genphy_read_status,
  235. .ack_interrupt = &marvell_ack_interrupt,
  236. .config_intr = &marvell_config_intr,
  237. .driver = {.owner = THIS_MODULE,},
  238. },
  239. {
  240. .phy_id = 0x01410cd0,
  241. .phy_id_mask = 0xfffffff0,
  242. .name = "Marvell 88E1145",
  243. .features = PHY_GBIT_FEATURES,
  244. .flags = PHY_HAS_INTERRUPT,
  245. .config_init = &m88e1145_config_init,
  246. .config_aneg = &marvell_config_aneg,
  247. .read_status = &genphy_read_status,
  248. .ack_interrupt = &marvell_ack_interrupt,
  249. .config_intr = &marvell_config_intr,
  250. .driver = {.owner = THIS_MODULE,},
  251. }
  252. };
  253. static int __init marvell_init(void)
  254. {
  255. int ret;
  256. int i;
  257. for (i = 0; i < ARRAY_SIZE(marvell_drivers); i++) {
  258. ret = phy_driver_register(&marvell_drivers[i]);
  259. if (ret) {
  260. while (i-- > 0)
  261. phy_driver_unregister(&marvell_drivers[i]);
  262. return ret;
  263. }
  264. }
  265. return 0;
  266. }
  267. static void __exit marvell_exit(void)
  268. {
  269. int i;
  270. for (i = 0; i < ARRAY_SIZE(marvell_drivers); i++)
  271. phy_driver_unregister(&marvell_drivers[i]);
  272. }
  273. module_init(marvell_init);
  274. module_exit(marvell_exit);